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qom: Fix typo, 'my_class_init' -> 'derived_class_init'
[qemu/cris-port.git] / memory.c
blob130152cf1d4515fceb11bec514715f49e6a4d7c8
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 static unsigned memory_region_transaction_depth;
32 static bool memory_region_update_pending;
33 static bool ioeventfd_update_pending;
34 static bool global_dirty_log = false;
35
36 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
37 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
38
39 static QTAILQ_HEAD(, AddressSpace) address_spaces
40 = QTAILQ_HEAD_INITIALIZER(address_spaces);
41
42 typedef struct AddrRange AddrRange;
43
44 /*
45 * Note that signed integers are needed for negative offsetting in aliases
46 * (large MemoryRegion::alias_offset).
47 */
48 struct AddrRange {
49 Int128 start;
50 Int128 size;
51 };
52
53 static AddrRange addrrange_make(Int128 start, Int128 size)
54 {
55 return (AddrRange) { start, size };
56 }
57
58 static bool addrrange_equal(AddrRange r1, AddrRange r2)
59 {
60 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
61 }
62
63 static Int128 addrrange_end(AddrRange r)
64 {
65 return int128_add(r.start, r.size);
66 }
67
68 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
69 {
70 int128_addto(&range.start, delta);
71 return range;
72 }
73
74 static bool addrrange_contains(AddrRange range, Int128 addr)
75 {
76 return int128_ge(addr, range.start)
77 && int128_lt(addr, addrrange_end(range));
78 }
79
80 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
81 {
82 return addrrange_contains(r1, r2.start)
83 || addrrange_contains(r2, r1.start);
84 }
85
86 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
87 {
88 Int128 start = int128_max(r1.start, r2.start);
89 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
90 return addrrange_make(start, int128_sub(end, start));
91 }
92
93 enum ListenerDirection { Forward, Reverse };
94
95 static bool memory_listener_match(MemoryListener *listener,
96 MemoryRegionSection *section)
97 {
98 return !listener->address_space_filter
99 || listener->address_space_filter == section->address_space;
100 }
101
102 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
103 do { \
104 MemoryListener *_listener; \
105 \
106 switch (_direction) { \
107 case Forward: \
108 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
109 if (_listener->_callback) { \
110 _listener->_callback(_listener, ##_args); \
111 } \
112 } \
113 break; \
114 case Reverse: \
115 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
116 memory_listeners, link) { \
117 if (_listener->_callback) { \
118 _listener->_callback(_listener, ##_args); \
119 } \
120 } \
121 break; \
122 default: \
123 abort(); \
124 } \
125 } while (0)
126
127 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
128 do { \
129 MemoryListener *_listener; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
134 if (_listener->_callback \
135 && memory_listener_match(_listener, _section)) { \
136 _listener->_callback(_listener, _section, ##_args); \
137 } \
138 } \
139 break; \
140 case Reverse: \
141 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
142 memory_listeners, link) { \
143 if (_listener->_callback \
144 && memory_listener_match(_listener, _section)) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
156 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
157 .mr = (fr)->mr, \
158 .address_space = (as), \
159 .offset_within_region = (fr)->offset_in_region, \
160 .size = (fr)->addr.size, \
161 .offset_within_address_space = int128_get64((fr)->addr.start), \
162 .readonly = (fr)->readonly, \
163 }))
164
165 struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168 };
169
170 struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
174 EventNotifier *e;
175 };
176
177 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179 {
180 if (int128_lt(a.addr.start, b.addr.start)) {
181 return true;
182 } else if (int128_gt(a.addr.start, b.addr.start)) {
183 return false;
184 } else if (int128_lt(a.addr.size, b.addr.size)) {
185 return true;
186 } else if (int128_gt(a.addr.size, b.addr.size)) {
187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
199 if (a.e < b.e) {
200 return true;
201 } else if (a.e > b.e) {
202 return false;
203 }
204 return false;
205 }
206
207 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209 {
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212 }
213
214 typedef struct FlatRange FlatRange;
215 typedef struct FlatView FlatView;
216
217 /* Range of memory in the global map. Addresses are absolute. */
218 struct FlatRange {
219 MemoryRegion *mr;
220 hwaddr offset_in_region;
221 AddrRange addr;
222 uint8_t dirty_log_mask;
223 bool romd_mode;
224 bool readonly;
225 };
226
227 /* Flattened global view of current active memory hierarchy. Kept in sorted
228 * order.
229 */
230 struct FlatView {
231 struct rcu_head rcu;
232 unsigned ref;
233 FlatRange *ranges;
234 unsigned nr;
235 unsigned nr_allocated;
236 };
237
238 typedef struct AddressSpaceOps AddressSpaceOps;
239
240 #define FOR_EACH_FLAT_RANGE(var, view) \
241 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
242
243 static bool flatrange_equal(FlatRange *a, FlatRange *b)
244 {
245 return a->mr == b->mr
246 && addrrange_equal(a->addr, b->addr)
247 && a->offset_in_region == b->offset_in_region
248 && a->romd_mode == b->romd_mode
249 && a->readonly == b->readonly;
250 }
251
252 static void flatview_init(FlatView *view)
253 {
254 view->ref = 1;
255 view->ranges = NULL;
256 view->nr = 0;
257 view->nr_allocated = 0;
258 }
259
260 /* Insert a range into a given position. Caller is responsible for maintaining
261 * sorting order.
262 */
263 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
264 {
265 if (view->nr == view->nr_allocated) {
266 view->nr_allocated = MAX(2 * view->nr, 10);
267 view->ranges = g_realloc(view->ranges,
268 view->nr_allocated * sizeof(*view->ranges));
269 }
270 memmove(view->ranges + pos + 1, view->ranges + pos,
271 (view->nr - pos) * sizeof(FlatRange));
272 view->ranges[pos] = *range;
273 memory_region_ref(range->mr);
274 ++view->nr;
275 }
276
277 static void flatview_destroy(FlatView *view)
278 {
279 int i;
280
281 for (i = 0; i < view->nr; i++) {
282 memory_region_unref(view->ranges[i].mr);
283 }
284 g_free(view->ranges);
285 g_free(view);
286 }
287
288 static void flatview_ref(FlatView *view)
289 {
290 atomic_inc(&view->ref);
291 }
292
293 static void flatview_unref(FlatView *view)
294 {
295 if (atomic_fetch_dec(&view->ref) == 1) {
296 flatview_destroy(view);
297 }
298 }
299
300 static bool can_merge(FlatRange *r1, FlatRange *r2)
301 {
302 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
303 && r1->mr == r2->mr
304 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
305 r1->addr.size),
306 int128_make64(r2->offset_in_region))
307 && r1->dirty_log_mask == r2->dirty_log_mask
308 && r1->romd_mode == r2->romd_mode
309 && r1->readonly == r2->readonly;
310 }
311
312 /* Attempt to simplify a view by merging adjacent ranges */
313 static void flatview_simplify(FlatView *view)
314 {
315 unsigned i, j;
316
317 i = 0;
318 while (i < view->nr) {
319 j = i + 1;
320 while (j < view->nr
321 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
322 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
323 ++j;
324 }
325 ++i;
326 memmove(&view->ranges[i], &view->ranges[j],
327 (view->nr - j) * sizeof(view->ranges[j]));
328 view->nr -= j - i;
329 }
330 }
331
332 static bool memory_region_big_endian(MemoryRegion *mr)
333 {
334 #ifdef TARGET_WORDS_BIGENDIAN
335 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
336 #else
337 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
338 #endif
339 }
340
341 static bool memory_region_wrong_endianness(MemoryRegion *mr)
342 {
343 #ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
345 #else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347 #endif
348 }
349
350 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
351 {
352 if (memory_region_wrong_endianness(mr)) {
353 switch (size) {
354 case 1:
355 break;
356 case 2:
357 *data = bswap16(*data);
358 break;
359 case 4:
360 *data = bswap32(*data);
361 break;
362 case 8:
363 *data = bswap64(*data);
364 break;
365 default:
366 abort();
367 }
368 }
369 }
370
371 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
372 hwaddr addr,
373 uint64_t *value,
374 unsigned size,
375 unsigned shift,
376 uint64_t mask)
377 {
378 uint64_t tmp;
379
380 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
381 trace_memory_region_ops_read(mr, addr, tmp, size);
382 *value |= (tmp & mask) << shift;
383 }
384
385 static void memory_region_read_accessor(MemoryRegion *mr,
386 hwaddr addr,
387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask)
391 {
392 uint64_t tmp;
393
394 if (mr->flush_coalesced_mmio) {
395 qemu_flush_coalesced_mmio_buffer();
396 }
397 tmp = mr->ops->read(mr->opaque, addr, size);
398 trace_memory_region_ops_read(mr, addr, tmp, size);
399 *value |= (tmp & mask) << shift;
400 }
401
402 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
403 hwaddr addr,
404 uint64_t *value,
405 unsigned size,
406 unsigned shift,
407 uint64_t mask)
408 {
409 uint64_t tmp;
410
411 tmp = (*value >> shift) & mask;
412 trace_memory_region_ops_write(mr, addr, tmp, size);
413 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
414 }
415
416 static void memory_region_write_accessor(MemoryRegion *mr,
417 hwaddr addr,
418 uint64_t *value,
419 unsigned size,
420 unsigned shift,
421 uint64_t mask)
422 {
423 uint64_t tmp;
424
425 if (mr->flush_coalesced_mmio) {
426 qemu_flush_coalesced_mmio_buffer();
427 }
428 tmp = (*value >> shift) & mask;
429 trace_memory_region_ops_write(mr, addr, tmp, size);
430 mr->ops->write(mr->opaque, addr, tmp, size);
431 }
432
433 static void access_with_adjusted_size(hwaddr addr,
434 uint64_t *value,
435 unsigned size,
436 unsigned access_size_min,
437 unsigned access_size_max,
438 void (*access)(MemoryRegion *mr,
439 hwaddr addr,
440 uint64_t *value,
441 unsigned size,
442 unsigned shift,
443 uint64_t mask),
444 MemoryRegion *mr)
445 {
446 uint64_t access_mask;
447 unsigned access_size;
448 unsigned i;
449
450 if (!access_size_min) {
451 access_size_min = 1;
452 }
453 if (!access_size_max) {
454 access_size_max = 4;
455 }
456
457 /* FIXME: support unaligned access? */
458 access_size = MAX(MIN(size, access_size_max), access_size_min);
459 access_mask = -1ULL >> (64 - access_size * 8);
460 if (memory_region_big_endian(mr)) {
461 for (i = 0; i < size; i += access_size) {
462 access(mr, addr + i, value, access_size,
463 (size - access_size - i) * 8, access_mask);
464 }
465 } else {
466 for (i = 0; i < size; i += access_size) {
467 access(mr, addr + i, value, access_size, i * 8, access_mask);
468 }
469 }
470 }
471
472 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
473 {
474 AddressSpace *as;
475
476 while (mr->container) {
477 mr = mr->container;
478 }
479 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
480 if (mr == as->root) {
481 return as;
482 }
483 }
484 return NULL;
485 }
486
487 /* Render a memory region into the global view. Ranges in @view obscure
488 * ranges in @mr.
489 */
490 static void render_memory_region(FlatView *view,
491 MemoryRegion *mr,
492 Int128 base,
493 AddrRange clip,
494 bool readonly)
495 {
496 MemoryRegion *subregion;
497 unsigned i;
498 hwaddr offset_in_region;
499 Int128 remain;
500 Int128 now;
501 FlatRange fr;
502 AddrRange tmp;
503
504 if (!mr->enabled) {
505 return;
506 }
507
508 int128_addto(&base, int128_make64(mr->addr));
509 readonly |= mr->readonly;
510
511 tmp = addrrange_make(base, mr->size);
512
513 if (!addrrange_intersects(tmp, clip)) {
514 return;
515 }
516
517 clip = addrrange_intersection(tmp, clip);
518
519 if (mr->alias) {
520 int128_subfrom(&base, int128_make64(mr->alias->addr));
521 int128_subfrom(&base, int128_make64(mr->alias_offset));
522 render_memory_region(view, mr->alias, base, clip, readonly);
523 return;
524 }
525
526 /* Render subregions in priority order. */
527 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
528 render_memory_region(view, subregion, base, clip, readonly);
529 }
530
531 if (!mr->terminates) {
532 return;
533 }
534
535 offset_in_region = int128_get64(int128_sub(clip.start, base));
536 base = clip.start;
537 remain = clip.size;
538
539 fr.mr = mr;
540 fr.dirty_log_mask = mr->dirty_log_mask;
541 fr.romd_mode = mr->romd_mode;
542 fr.readonly = readonly;
543
544 /* Render the region itself into any gaps left by the current view. */
545 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
546 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
547 continue;
548 }
549 if (int128_lt(base, view->ranges[i].addr.start)) {
550 now = int128_min(remain,
551 int128_sub(view->ranges[i].addr.start, base));
552 fr.offset_in_region = offset_in_region;
553 fr.addr = addrrange_make(base, now);
554 flatview_insert(view, i, &fr);
555 ++i;
556 int128_addto(&base, now);
557 offset_in_region += int128_get64(now);
558 int128_subfrom(&remain, now);
559 }
560 now = int128_sub(int128_min(int128_add(base, remain),
561 addrrange_end(view->ranges[i].addr)),
562 base);
563 int128_addto(&base, now);
564 offset_in_region += int128_get64(now);
565 int128_subfrom(&remain, now);
566 }
567 if (int128_nz(remain)) {
568 fr.offset_in_region = offset_in_region;
569 fr.addr = addrrange_make(base, remain);
570 flatview_insert(view, i, &fr);
571 }
572 }
573
574 /* Render a memory topology into a list of disjoint absolute ranges. */
575 static FlatView *generate_memory_topology(MemoryRegion *mr)
576 {
577 FlatView *view;
578
579 view = g_new(FlatView, 1);
580 flatview_init(view);
581
582 if (mr) {
583 render_memory_region(view, mr, int128_zero(),
584 addrrange_make(int128_zero(), int128_2_64()), false);
585 }
586 flatview_simplify(view);
587
588 return view;
589 }
590
591 static void address_space_add_del_ioeventfds(AddressSpace *as,
592 MemoryRegionIoeventfd *fds_new,
593 unsigned fds_new_nb,
594 MemoryRegionIoeventfd *fds_old,
595 unsigned fds_old_nb)
596 {
597 unsigned iold, inew;
598 MemoryRegionIoeventfd *fd;
599 MemoryRegionSection section;
600
601 /* Generate a symmetric difference of the old and new fd sets, adding
602 * and deleting as necessary.
603 */
604
605 iold = inew = 0;
606 while (iold < fds_old_nb || inew < fds_new_nb) {
607 if (iold < fds_old_nb
608 && (inew == fds_new_nb
609 || memory_region_ioeventfd_before(fds_old[iold],
610 fds_new[inew]))) {
611 fd = &fds_old[iold];
612 section = (MemoryRegionSection) {
613 .address_space = as,
614 .offset_within_address_space = int128_get64(fd->addr.start),
615 .size = fd->addr.size,
616 };
617 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
618 fd->match_data, fd->data, fd->e);
619 ++iold;
620 } else if (inew < fds_new_nb
621 && (iold == fds_old_nb
622 || memory_region_ioeventfd_before(fds_new[inew],
623 fds_old[iold]))) {
624 fd = &fds_new[inew];
625 section = (MemoryRegionSection) {
626 .address_space = as,
627 .offset_within_address_space = int128_get64(fd->addr.start),
628 .size = fd->addr.size,
629 };
630 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
631 fd->match_data, fd->data, fd->e);
632 ++inew;
633 } else {
634 ++iold;
635 ++inew;
636 }
637 }
638 }
639
640 static FlatView *address_space_get_flatview(AddressSpace *as)
641 {
642 FlatView *view;
643
644 rcu_read_lock();
645 view = atomic_rcu_read(&as->current_map);
646 flatview_ref(view);
647 rcu_read_unlock();
648 return view;
649 }
650
651 static void address_space_update_ioeventfds(AddressSpace *as)
652 {
653 FlatView *view;
654 FlatRange *fr;
655 unsigned ioeventfd_nb = 0;
656 MemoryRegionIoeventfd *ioeventfds = NULL;
657 AddrRange tmp;
658 unsigned i;
659
660 view = address_space_get_flatview(as);
661 FOR_EACH_FLAT_RANGE(fr, view) {
662 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
663 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
664 int128_sub(fr->addr.start,
665 int128_make64(fr->offset_in_region)));
666 if (addrrange_intersects(fr->addr, tmp)) {
667 ++ioeventfd_nb;
668 ioeventfds = g_realloc(ioeventfds,
669 ioeventfd_nb * sizeof(*ioeventfds));
670 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
671 ioeventfds[ioeventfd_nb-1].addr = tmp;
672 }
673 }
674 }
675
676 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
677 as->ioeventfds, as->ioeventfd_nb);
678
679 g_free(as->ioeventfds);
680 as->ioeventfds = ioeventfds;
681 as->ioeventfd_nb = ioeventfd_nb;
682 flatview_unref(view);
683 }
684
685 static void address_space_update_topology_pass(AddressSpace *as,
686 const FlatView *old_view,
687 const FlatView *new_view,
688 bool adding)
689 {
690 unsigned iold, inew;
691 FlatRange *frold, *frnew;
692
693 /* Generate a symmetric difference of the old and new memory maps.
694 * Kill ranges in the old map, and instantiate ranges in the new map.
695 */
696 iold = inew = 0;
697 while (iold < old_view->nr || inew < new_view->nr) {
698 if (iold < old_view->nr) {
699 frold = &old_view->ranges[iold];
700 } else {
701 frold = NULL;
702 }
703 if (inew < new_view->nr) {
704 frnew = &new_view->ranges[inew];
705 } else {
706 frnew = NULL;
707 }
708
709 if (frold
710 && (!frnew
711 || int128_lt(frold->addr.start, frnew->addr.start)
712 || (int128_eq(frold->addr.start, frnew->addr.start)
713 && !flatrange_equal(frold, frnew)))) {
714 /* In old but not in new, or in both but attributes changed. */
715
716 if (!adding) {
717 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
718 }
719
720 ++iold;
721 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
722 /* In both and unchanged (except logging may have changed) */
723
724 if (adding) {
725 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
726 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
727 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
728 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
729 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
730 }
731 }
732
733 ++iold;
734 ++inew;
735 } else {
736 /* In new */
737
738 if (adding) {
739 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
740 }
741
742 ++inew;
743 }
744 }
745 }
746
747
748 static void address_space_update_topology(AddressSpace *as)
749 {
750 FlatView *old_view = address_space_get_flatview(as);
751 FlatView *new_view = generate_memory_topology(as->root);
752
753 address_space_update_topology_pass(as, old_view, new_view, false);
754 address_space_update_topology_pass(as, old_view, new_view, true);
755
756 /* Writes are protected by the BQL. */
757 atomic_rcu_set(&as->current_map, new_view);
758 call_rcu(old_view, flatview_unref, rcu);
759
760 /* Note that all the old MemoryRegions are still alive up to this
761 * point. This relieves most MemoryListeners from the need to
762 * ref/unref the MemoryRegions they get---unless they use them
763 * outside the iothread mutex, in which case precise reference
764 * counting is necessary.
765 */
766 flatview_unref(old_view);
767
768 address_space_update_ioeventfds(as);
769 }
770
771 void memory_region_transaction_begin(void)
772 {
773 qemu_flush_coalesced_mmio_buffer();
774 ++memory_region_transaction_depth;
775 }
776
777 static void memory_region_clear_pending(void)
778 {
779 memory_region_update_pending = false;
780 ioeventfd_update_pending = false;
781 }
782
783 void memory_region_transaction_commit(void)
784 {
785 AddressSpace *as;
786
787 assert(memory_region_transaction_depth);
788 --memory_region_transaction_depth;
789 if (!memory_region_transaction_depth) {
790 if (memory_region_update_pending) {
791 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
792
793 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
794 address_space_update_topology(as);
795 }
796
797 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
798 } else if (ioeventfd_update_pending) {
799 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
800 address_space_update_ioeventfds(as);
801 }
802 }
803 memory_region_clear_pending();
804 }
805 }
806
807 static void memory_region_destructor_none(MemoryRegion *mr)
808 {
809 }
810
811 static void memory_region_destructor_ram(MemoryRegion *mr)
812 {
813 qemu_ram_free(mr->ram_addr);
814 }
815
816 static void memory_region_destructor_alias(MemoryRegion *mr)
817 {
818 memory_region_unref(mr->alias);
819 }
820
821 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
822 {
823 qemu_ram_free_from_ptr(mr->ram_addr);
824 }
825
826 static void memory_region_destructor_rom_device(MemoryRegion *mr)
827 {
828 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
829 }
830
831 static bool memory_region_need_escape(char c)
832 {
833 return c == '/' || c == '[' || c == '\\' || c == ']';
834 }
835
836 static char *memory_region_escape_name(const char *name)
837 {
838 const char *p;
839 char *escaped, *q;
840 uint8_t c;
841 size_t bytes = 0;
842
843 for (p = name; *p; p++) {
844 bytes += memory_region_need_escape(*p) ? 4 : 1;
845 }
846 if (bytes == p - name) {
847 return g_memdup(name, bytes + 1);
848 }
849
850 escaped = g_malloc(bytes + 1);
851 for (p = name, q = escaped; *p; p++) {
852 c = *p;
853 if (unlikely(memory_region_need_escape(c))) {
854 *q++ = '\\';
855 *q++ = 'x';
856 *q++ = "0123456789abcdef"[c >> 4];
857 c = "0123456789abcdef"[c & 15];
858 }
859 *q++ = c;
860 }
861 *q = 0;
862 return escaped;
863 }
864
865 void memory_region_init(MemoryRegion *mr,
866 Object *owner,
867 const char *name,
868 uint64_t size)
869 {
870 if (!owner) {
871 owner = qdev_get_machine();
872 }
873
874 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
875 mr->size = int128_make64(size);
876 if (size == UINT64_MAX) {
877 mr->size = int128_2_64();
878 }
879 mr->name = g_strdup(name);
880
881 if (name) {
882 char *escaped_name = memory_region_escape_name(name);
883 char *name_array = g_strdup_printf("%s[*]", escaped_name);
884 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
885 object_unref(OBJECT(mr));
886 g_free(name_array);
887 g_free(escaped_name);
888 }
889 }
890
891 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
892 const char *name, Error **errp)
893 {
894 MemoryRegion *mr = MEMORY_REGION(obj);
895 uint64_t value = mr->addr;
896
897 visit_type_uint64(v, &value, name, errp);
898 }
899
900 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
901 const char *name, Error **errp)
902 {
903 MemoryRegion *mr = MEMORY_REGION(obj);
904 gchar *path = (gchar *)"";
905
906 if (mr->container) {
907 path = object_get_canonical_path(OBJECT(mr->container));
908 }
909 visit_type_str(v, &path, name, errp);
910 if (mr->container) {
911 g_free(path);
912 }
913 }
914
915 static Object *memory_region_resolve_container(Object *obj, void *opaque,
916 const char *part)
917 {
918 MemoryRegion *mr = MEMORY_REGION(obj);
919
920 return OBJECT(mr->container);
921 }
922
923 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
924 const char *name, Error **errp)
925 {
926 MemoryRegion *mr = MEMORY_REGION(obj);
927 int32_t value = mr->priority;
928
929 visit_type_int32(v, &value, name, errp);
930 }
931
932 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
933 {
934 MemoryRegion *mr = MEMORY_REGION(obj);
935
936 return mr->may_overlap;
937 }
938
939 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
940 const char *name, Error **errp)
941 {
942 MemoryRegion *mr = MEMORY_REGION(obj);
943 uint64_t value = memory_region_size(mr);
944
945 visit_type_uint64(v, &value, name, errp);
946 }
947
948 static void memory_region_initfn(Object *obj)
949 {
950 MemoryRegion *mr = MEMORY_REGION(obj);
951 ObjectProperty *op;
952
953 mr->ops = &unassigned_mem_ops;
954 mr->enabled = true;
955 mr->romd_mode = true;
956 mr->destructor = memory_region_destructor_none;
957 QTAILQ_INIT(&mr->subregions);
958 QTAILQ_INIT(&mr->coalesced);
959
960 op = object_property_add(OBJECT(mr), "container",
961 "link<" TYPE_MEMORY_REGION ">",
962 memory_region_get_container,
963 NULL, /* memory_region_set_container */
964 NULL, NULL, &error_abort);
965 op->resolve = memory_region_resolve_container;
966
967 object_property_add(OBJECT(mr), "addr", "uint64",
968 memory_region_get_addr,
969 NULL, /* memory_region_set_addr */
970 NULL, NULL, &error_abort);
971 object_property_add(OBJECT(mr), "priority", "uint32",
972 memory_region_get_priority,
973 NULL, /* memory_region_set_priority */
974 NULL, NULL, &error_abort);
975 object_property_add_bool(OBJECT(mr), "may-overlap",
976 memory_region_get_may_overlap,
977 NULL, /* memory_region_set_may_overlap */
978 &error_abort);
979 object_property_add(OBJECT(mr), "size", "uint64",
980 memory_region_get_size,
981 NULL, /* memory_region_set_size, */
982 NULL, NULL, &error_abort);
983 }
984
985 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
986 unsigned size)
987 {
988 #ifdef DEBUG_UNASSIGNED
989 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
990 #endif
991 if (current_cpu != NULL) {
992 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
993 }
994 return 0;
995 }
996
997 static void unassigned_mem_write(void *opaque, hwaddr addr,
998 uint64_t val, unsigned size)
999 {
1000 #ifdef DEBUG_UNASSIGNED
1001 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1002 #endif
1003 if (current_cpu != NULL) {
1004 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1005 }
1006 }
1007
1008 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1009 unsigned size, bool is_write)
1010 {
1011 return false;
1012 }
1013
1014 const MemoryRegionOps unassigned_mem_ops = {
1015 .valid.accepts = unassigned_mem_accepts,
1016 .endianness = DEVICE_NATIVE_ENDIAN,
1017 };
1018
1019 bool memory_region_access_valid(MemoryRegion *mr,
1020 hwaddr addr,
1021 unsigned size,
1022 bool is_write)
1023 {
1024 int access_size_min, access_size_max;
1025 int access_size, i;
1026
1027 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1028 return false;
1029 }
1030
1031 if (!mr->ops->valid.accepts) {
1032 return true;
1033 }
1034
1035 access_size_min = mr->ops->valid.min_access_size;
1036 if (!mr->ops->valid.min_access_size) {
1037 access_size_min = 1;
1038 }
1039
1040 access_size_max = mr->ops->valid.max_access_size;
1041 if (!mr->ops->valid.max_access_size) {
1042 access_size_max = 4;
1043 }
1044
1045 access_size = MAX(MIN(size, access_size_max), access_size_min);
1046 for (i = 0; i < size; i += access_size) {
1047 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1048 is_write)) {
1049 return false;
1050 }
1051 }
1052
1053 return true;
1054 }
1055
1056 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
1057 hwaddr addr,
1058 unsigned size)
1059 {
1060 uint64_t data = 0;
1061
1062 if (mr->ops->read) {
1063 access_with_adjusted_size(addr, &data, size,
1064 mr->ops->impl.min_access_size,
1065 mr->ops->impl.max_access_size,
1066 memory_region_read_accessor, mr);
1067 } else {
1068 access_with_adjusted_size(addr, &data, size, 1, 4,
1069 memory_region_oldmmio_read_accessor, mr);
1070 }
1071
1072 return data;
1073 }
1074
1075 static bool memory_region_dispatch_read(MemoryRegion *mr,
1076 hwaddr addr,
1077 uint64_t *pval,
1078 unsigned size)
1079 {
1080 if (!memory_region_access_valid(mr, addr, size, false)) {
1081 *pval = unassigned_mem_read(mr, addr, size);
1082 return true;
1083 }
1084
1085 *pval = memory_region_dispatch_read1(mr, addr, size);
1086 adjust_endianness(mr, pval, size);
1087 return false;
1088 }
1089
1090 static bool memory_region_dispatch_write(MemoryRegion *mr,
1091 hwaddr addr,
1092 uint64_t data,
1093 unsigned size)
1094 {
1095 if (!memory_region_access_valid(mr, addr, size, true)) {
1096 unassigned_mem_write(mr, addr, data, size);
1097 return true;
1098 }
1099
1100 adjust_endianness(mr, &data, size);
1101
1102 if (mr->ops->write) {
1103 access_with_adjusted_size(addr, &data, size,
1104 mr->ops->impl.min_access_size,
1105 mr->ops->impl.max_access_size,
1106 memory_region_write_accessor, mr);
1107 } else {
1108 access_with_adjusted_size(addr, &data, size, 1, 4,
1109 memory_region_oldmmio_write_accessor, mr);
1110 }
1111 return false;
1112 }
1113
1114 void memory_region_init_io(MemoryRegion *mr,
1115 Object *owner,
1116 const MemoryRegionOps *ops,
1117 void *opaque,
1118 const char *name,
1119 uint64_t size)
1120 {
1121 memory_region_init(mr, owner, name, size);
1122 mr->ops = ops;
1123 mr->opaque = opaque;
1124 mr->terminates = true;
1125 mr->ram_addr = ~(ram_addr_t)0;
1126 }
1127
1128 void memory_region_init_ram(MemoryRegion *mr,
1129 Object *owner,
1130 const char *name,
1131 uint64_t size,
1132 Error **errp)
1133 {
1134 memory_region_init(mr, owner, name, size);
1135 mr->ram = true;
1136 mr->terminates = true;
1137 mr->destructor = memory_region_destructor_ram;
1138 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1139 }
1140
1141 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1142 Object *owner,
1143 const char *name,
1144 uint64_t size,
1145 uint64_t max_size,
1146 void (*resized)(const char*,
1147 uint64_t length,
1148 void *host),
1149 Error **errp)
1150 {
1151 memory_region_init(mr, owner, name, size);
1152 mr->ram = true;
1153 mr->terminates = true;
1154 mr->destructor = memory_region_destructor_ram;
1155 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1156 }
1157
1158 #ifdef __linux__
1159 void memory_region_init_ram_from_file(MemoryRegion *mr,
1160 struct Object *owner,
1161 const char *name,
1162 uint64_t size,
1163 bool share,
1164 const char *path,
1165 Error **errp)
1166 {
1167 memory_region_init(mr, owner, name, size);
1168 mr->ram = true;
1169 mr->terminates = true;
1170 mr->destructor = memory_region_destructor_ram;
1171 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1172 }
1173 #endif
1174
1175 void memory_region_init_ram_ptr(MemoryRegion *mr,
1176 Object *owner,
1177 const char *name,
1178 uint64_t size,
1179 void *ptr)
1180 {
1181 memory_region_init(mr, owner, name, size);
1182 mr->ram = true;
1183 mr->terminates = true;
1184 mr->destructor = memory_region_destructor_ram_from_ptr;
1185
1186 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1187 assert(ptr != NULL);
1188 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1189 }
1190
1191 void memory_region_set_skip_dump(MemoryRegion *mr)
1192 {
1193 mr->skip_dump = true;
1194 }
1195
1196 void memory_region_init_alias(MemoryRegion *mr,
1197 Object *owner,
1198 const char *name,
1199 MemoryRegion *orig,
1200 hwaddr offset,
1201 uint64_t size)
1202 {
1203 memory_region_init(mr, owner, name, size);
1204 memory_region_ref(orig);
1205 mr->destructor = memory_region_destructor_alias;
1206 mr->alias = orig;
1207 mr->alias_offset = offset;
1208 }
1209
1210 void memory_region_init_rom_device(MemoryRegion *mr,
1211 Object *owner,
1212 const MemoryRegionOps *ops,
1213 void *opaque,
1214 const char *name,
1215 uint64_t size,
1216 Error **errp)
1217 {
1218 memory_region_init(mr, owner, name, size);
1219 mr->ops = ops;
1220 mr->opaque = opaque;
1221 mr->terminates = true;
1222 mr->rom_device = true;
1223 mr->destructor = memory_region_destructor_rom_device;
1224 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1225 }
1226
1227 void memory_region_init_iommu(MemoryRegion *mr,
1228 Object *owner,
1229 const MemoryRegionIOMMUOps *ops,
1230 const char *name,
1231 uint64_t size)
1232 {
1233 memory_region_init(mr, owner, name, size);
1234 mr->iommu_ops = ops,
1235 mr->terminates = true; /* then re-forwards */
1236 notifier_list_init(&mr->iommu_notify);
1237 }
1238
1239 void memory_region_init_reservation(MemoryRegion *mr,
1240 Object *owner,
1241 const char *name,
1242 uint64_t size)
1243 {
1244 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1245 }
1246
1247 static void memory_region_finalize(Object *obj)
1248 {
1249 MemoryRegion *mr = MEMORY_REGION(obj);
1250
1251 assert(QTAILQ_EMPTY(&mr->subregions));
1252 mr->destructor(mr);
1253 memory_region_clear_coalescing(mr);
1254 g_free((char *)mr->name);
1255 g_free(mr->ioeventfds);
1256 }
1257
1258 Object *memory_region_owner(MemoryRegion *mr)
1259 {
1260 Object *obj = OBJECT(mr);
1261 return obj->parent;
1262 }
1263
1264 void memory_region_ref(MemoryRegion *mr)
1265 {
1266 /* MMIO callbacks most likely will access data that belongs
1267 * to the owner, hence the need to ref/unref the owner whenever
1268 * the memory region is in use.
1269 *
1270 * The memory region is a child of its owner. As long as the
1271 * owner doesn't call unparent itself on the memory region,
1272 * ref-ing the owner will also keep the memory region alive.
1273 * Memory regions without an owner are supposed to never go away,
1274 * but we still ref/unref them for debugging purposes.
1275 */
1276 Object *obj = OBJECT(mr);
1277 if (obj && obj->parent) {
1278 object_ref(obj->parent);
1279 } else {
1280 object_ref(obj);
1281 }
1282 }
1283
1284 void memory_region_unref(MemoryRegion *mr)
1285 {
1286 Object *obj = OBJECT(mr);
1287 if (obj && obj->parent) {
1288 object_unref(obj->parent);
1289 } else {
1290 object_unref(obj);
1291 }
1292 }
1293
1294 uint64_t memory_region_size(MemoryRegion *mr)
1295 {
1296 if (int128_eq(mr->size, int128_2_64())) {
1297 return UINT64_MAX;
1298 }
1299 return int128_get64(mr->size);
1300 }
1301
1302 const char *memory_region_name(const MemoryRegion *mr)
1303 {
1304 if (!mr->name) {
1305 ((MemoryRegion *)mr)->name =
1306 object_get_canonical_path_component(OBJECT(mr));
1307 }
1308 return mr->name;
1309 }
1310
1311 bool memory_region_is_ram(MemoryRegion *mr)
1312 {
1313 return mr->ram;
1314 }
1315
1316 bool memory_region_is_skip_dump(MemoryRegion *mr)
1317 {
1318 return mr->skip_dump;
1319 }
1320
1321 bool memory_region_is_logging(MemoryRegion *mr)
1322 {
1323 return mr->dirty_log_mask;
1324 }
1325
1326 bool memory_region_is_rom(MemoryRegion *mr)
1327 {
1328 return mr->ram && mr->readonly;
1329 }
1330
1331 bool memory_region_is_iommu(MemoryRegion *mr)
1332 {
1333 return mr->iommu_ops;
1334 }
1335
1336 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1337 {
1338 notifier_list_add(&mr->iommu_notify, n);
1339 }
1340
1341 void memory_region_unregister_iommu_notifier(Notifier *n)
1342 {
1343 notifier_remove(n);
1344 }
1345
1346 void memory_region_notify_iommu(MemoryRegion *mr,
1347 IOMMUTLBEntry entry)
1348 {
1349 assert(memory_region_is_iommu(mr));
1350 notifier_list_notify(&mr->iommu_notify, &entry);
1351 }
1352
1353 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1354 {
1355 uint8_t mask = 1 << client;
1356
1357 memory_region_transaction_begin();
1358 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1359 memory_region_update_pending |= mr->enabled;
1360 memory_region_transaction_commit();
1361 }
1362
1363 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1364 hwaddr size, unsigned client)
1365 {
1366 assert(mr->terminates);
1367 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1368 }
1369
1370 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1371 hwaddr size)
1372 {
1373 assert(mr->terminates);
1374 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1375 }
1376
1377 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1378 hwaddr size, unsigned client)
1379 {
1380 bool ret;
1381 assert(mr->terminates);
1382 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1383 if (ret) {
1384 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1385 }
1386 return ret;
1387 }
1388
1389
1390 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1391 {
1392 AddressSpace *as;
1393 FlatRange *fr;
1394
1395 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1396 FlatView *view = address_space_get_flatview(as);
1397 FOR_EACH_FLAT_RANGE(fr, view) {
1398 if (fr->mr == mr) {
1399 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1400 }
1401 }
1402 flatview_unref(view);
1403 }
1404 }
1405
1406 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1407 {
1408 if (mr->readonly != readonly) {
1409 memory_region_transaction_begin();
1410 mr->readonly = readonly;
1411 memory_region_update_pending |= mr->enabled;
1412 memory_region_transaction_commit();
1413 }
1414 }
1415
1416 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1417 {
1418 if (mr->romd_mode != romd_mode) {
1419 memory_region_transaction_begin();
1420 mr->romd_mode = romd_mode;
1421 memory_region_update_pending |= mr->enabled;
1422 memory_region_transaction_commit();
1423 }
1424 }
1425
1426 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1427 hwaddr size, unsigned client)
1428 {
1429 assert(mr->terminates);
1430 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1431 }
1432
1433 int memory_region_get_fd(MemoryRegion *mr)
1434 {
1435 if (mr->alias) {
1436 return memory_region_get_fd(mr->alias);
1437 }
1438
1439 assert(mr->terminates);
1440
1441 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1442 }
1443
1444 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1445 {
1446 if (mr->alias) {
1447 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1448 }
1449
1450 assert(mr->terminates);
1451
1452 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1453 }
1454
1455 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1456 {
1457 FlatView *view;
1458 FlatRange *fr;
1459 CoalescedMemoryRange *cmr;
1460 AddrRange tmp;
1461 MemoryRegionSection section;
1462
1463 view = address_space_get_flatview(as);
1464 FOR_EACH_FLAT_RANGE(fr, view) {
1465 if (fr->mr == mr) {
1466 section = (MemoryRegionSection) {
1467 .address_space = as,
1468 .offset_within_address_space = int128_get64(fr->addr.start),
1469 .size = fr->addr.size,
1470 };
1471
1472 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1473 int128_get64(fr->addr.start),
1474 int128_get64(fr->addr.size));
1475 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1476 tmp = addrrange_shift(cmr->addr,
1477 int128_sub(fr->addr.start,
1478 int128_make64(fr->offset_in_region)));
1479 if (!addrrange_intersects(tmp, fr->addr)) {
1480 continue;
1481 }
1482 tmp = addrrange_intersection(tmp, fr->addr);
1483 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1484 int128_get64(tmp.start),
1485 int128_get64(tmp.size));
1486 }
1487 }
1488 }
1489 flatview_unref(view);
1490 }
1491
1492 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1493 {
1494 AddressSpace *as;
1495
1496 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1497 memory_region_update_coalesced_range_as(mr, as);
1498 }
1499 }
1500
1501 void memory_region_set_coalescing(MemoryRegion *mr)
1502 {
1503 memory_region_clear_coalescing(mr);
1504 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1505 }
1506
1507 void memory_region_add_coalescing(MemoryRegion *mr,
1508 hwaddr offset,
1509 uint64_t size)
1510 {
1511 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1512
1513 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1514 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1515 memory_region_update_coalesced_range(mr);
1516 memory_region_set_flush_coalesced(mr);
1517 }
1518
1519 void memory_region_clear_coalescing(MemoryRegion *mr)
1520 {
1521 CoalescedMemoryRange *cmr;
1522 bool updated = false;
1523
1524 qemu_flush_coalesced_mmio_buffer();
1525 mr->flush_coalesced_mmio = false;
1526
1527 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1528 cmr = QTAILQ_FIRST(&mr->coalesced);
1529 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1530 g_free(cmr);
1531 updated = true;
1532 }
1533
1534 if (updated) {
1535 memory_region_update_coalesced_range(mr);
1536 }
1537 }
1538
1539 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1540 {
1541 mr->flush_coalesced_mmio = true;
1542 }
1543
1544 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1545 {
1546 qemu_flush_coalesced_mmio_buffer();
1547 if (QTAILQ_EMPTY(&mr->coalesced)) {
1548 mr->flush_coalesced_mmio = false;
1549 }
1550 }
1551
1552 void memory_region_add_eventfd(MemoryRegion *mr,
1553 hwaddr addr,
1554 unsigned size,
1555 bool match_data,
1556 uint64_t data,
1557 EventNotifier *e)
1558 {
1559 MemoryRegionIoeventfd mrfd = {
1560 .addr.start = int128_make64(addr),
1561 .addr.size = int128_make64(size),
1562 .match_data = match_data,
1563 .data = data,
1564 .e = e,
1565 };
1566 unsigned i;
1567
1568 adjust_endianness(mr, &mrfd.data, size);
1569 memory_region_transaction_begin();
1570 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1571 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1572 break;
1573 }
1574 }
1575 ++mr->ioeventfd_nb;
1576 mr->ioeventfds = g_realloc(mr->ioeventfds,
1577 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1578 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1579 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1580 mr->ioeventfds[i] = mrfd;
1581 ioeventfd_update_pending |= mr->enabled;
1582 memory_region_transaction_commit();
1583 }
1584
1585 void memory_region_del_eventfd(MemoryRegion *mr,
1586 hwaddr addr,
1587 unsigned size,
1588 bool match_data,
1589 uint64_t data,
1590 EventNotifier *e)
1591 {
1592 MemoryRegionIoeventfd mrfd = {
1593 .addr.start = int128_make64(addr),
1594 .addr.size = int128_make64(size),
1595 .match_data = match_data,
1596 .data = data,
1597 .e = e,
1598 };
1599 unsigned i;
1600
1601 adjust_endianness(mr, &mrfd.data, size);
1602 memory_region_transaction_begin();
1603 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1604 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1605 break;
1606 }
1607 }
1608 assert(i != mr->ioeventfd_nb);
1609 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1610 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1611 --mr->ioeventfd_nb;
1612 mr->ioeventfds = g_realloc(mr->ioeventfds,
1613 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1614 ioeventfd_update_pending |= mr->enabled;
1615 memory_region_transaction_commit();
1616 }
1617
1618 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1619 {
1620 hwaddr offset = subregion->addr;
1621 MemoryRegion *mr = subregion->container;
1622 MemoryRegion *other;
1623
1624 memory_region_transaction_begin();
1625
1626 memory_region_ref(subregion);
1627 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1628 if (subregion->may_overlap || other->may_overlap) {
1629 continue;
1630 }
1631 if (int128_ge(int128_make64(offset),
1632 int128_add(int128_make64(other->addr), other->size))
1633 || int128_le(int128_add(int128_make64(offset), subregion->size),
1634 int128_make64(other->addr))) {
1635 continue;
1636 }
1637 #if 0
1638 printf("warning: subregion collision %llx/%llx (%s) "
1639 "vs %llx/%llx (%s)\n",
1640 (unsigned long long)offset,
1641 (unsigned long long)int128_get64(subregion->size),
1642 subregion->name,
1643 (unsigned long long)other->addr,
1644 (unsigned long long)int128_get64(other->size),
1645 other->name);
1646 #endif
1647 }
1648 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1649 if (subregion->priority >= other->priority) {
1650 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1651 goto done;
1652 }
1653 }
1654 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1655 done:
1656 memory_region_update_pending |= mr->enabled && subregion->enabled;
1657 memory_region_transaction_commit();
1658 }
1659
1660 static void memory_region_add_subregion_common(MemoryRegion *mr,
1661 hwaddr offset,
1662 MemoryRegion *subregion)
1663 {
1664 assert(!subregion->container);
1665 subregion->container = mr;
1666 subregion->addr = offset;
1667 memory_region_update_container_subregions(subregion);
1668 }
1669
1670 void memory_region_add_subregion(MemoryRegion *mr,
1671 hwaddr offset,
1672 MemoryRegion *subregion)
1673 {
1674 subregion->may_overlap = false;
1675 subregion->priority = 0;
1676 memory_region_add_subregion_common(mr, offset, subregion);
1677 }
1678
1679 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1680 hwaddr offset,
1681 MemoryRegion *subregion,
1682 int priority)
1683 {
1684 subregion->may_overlap = true;
1685 subregion->priority = priority;
1686 memory_region_add_subregion_common(mr, offset, subregion);
1687 }
1688
1689 void memory_region_del_subregion(MemoryRegion *mr,
1690 MemoryRegion *subregion)
1691 {
1692 memory_region_transaction_begin();
1693 assert(subregion->container == mr);
1694 subregion->container = NULL;
1695 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1696 memory_region_unref(subregion);
1697 memory_region_update_pending |= mr->enabled && subregion->enabled;
1698 memory_region_transaction_commit();
1699 }
1700
1701 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1702 {
1703 if (enabled == mr->enabled) {
1704 return;
1705 }
1706 memory_region_transaction_begin();
1707 mr->enabled = enabled;
1708 memory_region_update_pending = true;
1709 memory_region_transaction_commit();
1710 }
1711
1712 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1713 {
1714 Int128 s = int128_make64(size);
1715
1716 if (size == UINT64_MAX) {
1717 s = int128_2_64();
1718 }
1719 if (int128_eq(s, mr->size)) {
1720 return;
1721 }
1722 memory_region_transaction_begin();
1723 mr->size = s;
1724 memory_region_update_pending = true;
1725 memory_region_transaction_commit();
1726 }
1727
1728 static void memory_region_readd_subregion(MemoryRegion *mr)
1729 {
1730 MemoryRegion *container = mr->container;
1731
1732 if (container) {
1733 memory_region_transaction_begin();
1734 memory_region_ref(mr);
1735 memory_region_del_subregion(container, mr);
1736 mr->container = container;
1737 memory_region_update_container_subregions(mr);
1738 memory_region_unref(mr);
1739 memory_region_transaction_commit();
1740 }
1741 }
1742
1743 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1744 {
1745 if (addr != mr->addr) {
1746 mr->addr = addr;
1747 memory_region_readd_subregion(mr);
1748 }
1749 }
1750
1751 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1752 {
1753 assert(mr->alias);
1754
1755 if (offset == mr->alias_offset) {
1756 return;
1757 }
1758
1759 memory_region_transaction_begin();
1760 mr->alias_offset = offset;
1761 memory_region_update_pending |= mr->enabled;
1762 memory_region_transaction_commit();
1763 }
1764
1765 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1766 {
1767 return mr->ram_addr;
1768 }
1769
1770 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1771 {
1772 return mr->align;
1773 }
1774
1775 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1776 {
1777 const AddrRange *addr = addr_;
1778 const FlatRange *fr = fr_;
1779
1780 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1781 return -1;
1782 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1783 return 1;
1784 }
1785 return 0;
1786 }
1787
1788 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1789 {
1790 return bsearch(&addr, view->ranges, view->nr,
1791 sizeof(FlatRange), cmp_flatrange_addr);
1792 }
1793
1794 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1795 {
1796 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1797 if (!mr || (mr == container)) {
1798 return false;
1799 }
1800 memory_region_unref(mr);
1801 return true;
1802 }
1803
1804 bool memory_region_is_mapped(MemoryRegion *mr)
1805 {
1806 return mr->container ? true : false;
1807 }
1808
1809 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1810 hwaddr addr, uint64_t size)
1811 {
1812 MemoryRegionSection ret = { .mr = NULL };
1813 MemoryRegion *root;
1814 AddressSpace *as;
1815 AddrRange range;
1816 FlatView *view;
1817 FlatRange *fr;
1818
1819 addr += mr->addr;
1820 for (root = mr; root->container; ) {
1821 root = root->container;
1822 addr += root->addr;
1823 }
1824
1825 as = memory_region_to_address_space(root);
1826 if (!as) {
1827 return ret;
1828 }
1829 range = addrrange_make(int128_make64(addr), int128_make64(size));
1830
1831 rcu_read_lock();
1832 view = atomic_rcu_read(&as->current_map);
1833 fr = flatview_lookup(view, range);
1834 if (!fr) {
1835 goto out;
1836 }
1837
1838 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1839 --fr;
1840 }
1841
1842 ret.mr = fr->mr;
1843 ret.address_space = as;
1844 range = addrrange_intersection(range, fr->addr);
1845 ret.offset_within_region = fr->offset_in_region;
1846 ret.offset_within_region += int128_get64(int128_sub(range.start,
1847 fr->addr.start));
1848 ret.size = range.size;
1849 ret.offset_within_address_space = int128_get64(range.start);
1850 ret.readonly = fr->readonly;
1851 memory_region_ref(ret.mr);
1852 out:
1853 rcu_read_unlock();
1854 return ret;
1855 }
1856
1857 void address_space_sync_dirty_bitmap(AddressSpace *as)
1858 {
1859 FlatView *view;
1860 FlatRange *fr;
1861
1862 view = address_space_get_flatview(as);
1863 FOR_EACH_FLAT_RANGE(fr, view) {
1864 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1865 }
1866 flatview_unref(view);
1867 }
1868
1869 void memory_global_dirty_log_start(void)
1870 {
1871 global_dirty_log = true;
1872 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1873 }
1874
1875 void memory_global_dirty_log_stop(void)
1876 {
1877 global_dirty_log = false;
1878 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1879 }
1880
1881 static void listener_add_address_space(MemoryListener *listener,
1882 AddressSpace *as)
1883 {
1884 FlatView *view;
1885 FlatRange *fr;
1886
1887 if (listener->address_space_filter
1888 && listener->address_space_filter != as) {
1889 return;
1890 }
1891
1892 if (global_dirty_log) {
1893 if (listener->log_global_start) {
1894 listener->log_global_start(listener);
1895 }
1896 }
1897
1898 view = address_space_get_flatview(as);
1899 FOR_EACH_FLAT_RANGE(fr, view) {
1900 MemoryRegionSection section = {
1901 .mr = fr->mr,
1902 .address_space = as,
1903 .offset_within_region = fr->offset_in_region,
1904 .size = fr->addr.size,
1905 .offset_within_address_space = int128_get64(fr->addr.start),
1906 .readonly = fr->readonly,
1907 };
1908 if (listener->region_add) {
1909 listener->region_add(listener, &section);
1910 }
1911 }
1912 flatview_unref(view);
1913 }
1914
1915 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1916 {
1917 MemoryListener *other = NULL;
1918 AddressSpace *as;
1919
1920 listener->address_space_filter = filter;
1921 if (QTAILQ_EMPTY(&memory_listeners)
1922 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1923 memory_listeners)->priority) {
1924 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1925 } else {
1926 QTAILQ_FOREACH(other, &memory_listeners, link) {
1927 if (listener->priority < other->priority) {
1928 break;
1929 }
1930 }
1931 QTAILQ_INSERT_BEFORE(other, listener, link);
1932 }
1933
1934 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1935 listener_add_address_space(listener, as);
1936 }
1937 }
1938
1939 void memory_listener_unregister(MemoryListener *listener)
1940 {
1941 QTAILQ_REMOVE(&memory_listeners, listener, link);
1942 }
1943
1944 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1945 {
1946 memory_region_transaction_begin();
1947 as->root = root;
1948 as->current_map = g_new(FlatView, 1);
1949 flatview_init(as->current_map);
1950 as->ioeventfd_nb = 0;
1951 as->ioeventfds = NULL;
1952 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1953 as->name = g_strdup(name ? name : "anonymous");
1954 address_space_init_dispatch(as);
1955 memory_region_update_pending |= root->enabled;
1956 memory_region_transaction_commit();
1957 }
1958
1959 static void do_address_space_destroy(AddressSpace *as)
1960 {
1961 MemoryListener *listener;
1962
1963 address_space_destroy_dispatch(as);
1964
1965 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1966 assert(listener->address_space_filter != as);
1967 }
1968
1969 flatview_unref(as->current_map);
1970 g_free(as->name);
1971 g_free(as->ioeventfds);
1972 }
1973
1974 void address_space_destroy(AddressSpace *as)
1975 {
1976 /* Flush out anything from MemoryListeners listening in on this */
1977 memory_region_transaction_begin();
1978 as->root = NULL;
1979 memory_region_transaction_commit();
1980 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1981 address_space_unregister(as);
1982
1983 /* At this point, as->dispatch and as->current_map are dummy
1984 * entries that the guest should never use. Wait for the old
1985 * values to expire before freeing the data.
1986 */
1987 call_rcu(as, do_address_space_destroy, rcu);
1988 }
1989
1990 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1991 {
1992 return memory_region_dispatch_read(mr, addr, pval, size);
1993 }
1994
1995 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1996 uint64_t val, unsigned size)
1997 {
1998 return memory_region_dispatch_write(mr, addr, val, size);
1999 }
2000
2001 typedef struct MemoryRegionList MemoryRegionList;
2002
2003 struct MemoryRegionList {
2004 const MemoryRegion *mr;
2005 QTAILQ_ENTRY(MemoryRegionList) queue;
2006 };
2007
2008 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2009
2010 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2011 const MemoryRegion *mr, unsigned int level,
2012 hwaddr base,
2013 MemoryRegionListHead *alias_print_queue)
2014 {
2015 MemoryRegionList *new_ml, *ml, *next_ml;
2016 MemoryRegionListHead submr_print_queue;
2017 const MemoryRegion *submr;
2018 unsigned int i;
2019
2020 if (!mr || !mr->enabled) {
2021 return;
2022 }
2023
2024 for (i = 0; i < level; i++) {
2025 mon_printf(f, " ");
2026 }
2027
2028 if (mr->alias) {
2029 MemoryRegionList *ml;
2030 bool found = false;
2031
2032 /* check if the alias is already in the queue */
2033 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2034 if (ml->mr == mr->alias) {
2035 found = true;
2036 }
2037 }
2038
2039 if (!found) {
2040 ml = g_new(MemoryRegionList, 1);
2041 ml->mr = mr->alias;
2042 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2043 }
2044 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2045 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2046 "-" TARGET_FMT_plx "\n",
2047 base + mr->addr,
2048 base + mr->addr
2049 + (int128_nz(mr->size) ?
2050 (hwaddr)int128_get64(int128_sub(mr->size,
2051 int128_one())) : 0),
2052 mr->priority,
2053 mr->romd_mode ? 'R' : '-',
2054 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2055 : '-',
2056 memory_region_name(mr),
2057 memory_region_name(mr->alias),
2058 mr->alias_offset,
2059 mr->alias_offset
2060 + (int128_nz(mr->size) ?
2061 (hwaddr)int128_get64(int128_sub(mr->size,
2062 int128_one())) : 0));
2063 } else {
2064 mon_printf(f,
2065 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
2066 base + mr->addr,
2067 base + mr->addr
2068 + (int128_nz(mr->size) ?
2069 (hwaddr)int128_get64(int128_sub(mr->size,
2070 int128_one())) : 0),
2071 mr->priority,
2072 mr->romd_mode ? 'R' : '-',
2073 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2074 : '-',
2075 memory_region_name(mr));
2076 }
2077
2078 QTAILQ_INIT(&submr_print_queue);
2079
2080 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2081 new_ml = g_new(MemoryRegionList, 1);
2082 new_ml->mr = submr;
2083 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2084 if (new_ml->mr->addr < ml->mr->addr ||
2085 (new_ml->mr->addr == ml->mr->addr &&
2086 new_ml->mr->priority > ml->mr->priority)) {
2087 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2088 new_ml = NULL;
2089 break;
2090 }
2091 }
2092 if (new_ml) {
2093 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2094 }
2095 }
2096
2097 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2098 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2099 alias_print_queue);
2100 }
2101
2102 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2103 g_free(ml);
2104 }
2105 }
2106
2107 void mtree_info(fprintf_function mon_printf, void *f)
2108 {
2109 MemoryRegionListHead ml_head;
2110 MemoryRegionList *ml, *ml2;
2111 AddressSpace *as;
2112
2113 QTAILQ_INIT(&ml_head);
2114
2115 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2116 mon_printf(f, "%s\n", as->name);
2117 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
2118 }
2119
2120 mon_printf(f, "aliases\n");
2121 /* print aliased regions */
2122 QTAILQ_FOREACH(ml, &ml_head, queue) {
2123 mon_printf(f, "%s\n", memory_region_name(ml->mr));
2124 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
2125 }
2126
2127 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2128 g_free(ml);
2129 }
2130 }
2131
2132 static const TypeInfo memory_region_info = {
2133 .parent = TYPE_OBJECT,
2134 .name = TYPE_MEMORY_REGION,
2135 .instance_size = sizeof(MemoryRegion),
2136 .instance_init = memory_region_initfn,
2137 .instance_finalize = memory_region_finalize,
2138 };
2139
2140 static void memory_register_types(void)
2141 {
2142 type_register_static(&memory_region_info);
2143 }
2144
2145 type_init(memory_register_types)
CRIS target port of Qemu