ioport.c

   1 /*
   2  * QEMU System Emulator
   3  *
   4  * Copyright (c) 2003-2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 /*
  25  * splitted out ioport related stuffs from vl.c.
  26  */
  27
  28 #include "exec/ioport.h"
  29 #include "trace.h"
  30 #include "exec/memory.h"
  31 #include "exec/address-spaces.h"
  32
  33 //#define DEBUG_IOPORT
  34
  35 #ifdef DEBUG_IOPORT
  36 #  define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
  37 #else
  38 #  define LOG_IOPORT(...) do { } while (0)
  39 #endif
  40
  41 typedef struct MemoryRegionPortioList {
  42     MemoryRegion mr;
  43     void *portio_opaque;
  44     MemoryRegionPortio ports[];
  45 } MemoryRegionPortioList;
  46
  47 static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
  48 {
  49     return -1ULL;
  50 }
  51
  52 static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
  53                                 unsigned size)
  54 {
  55 }
  56
  57 const MemoryRegionOps unassigned_io_ops = {
  58     .read = unassigned_io_read,
  59     .write = unassigned_io_write,
  60     .endianness = DEVICE_NATIVE_ENDIAN,
  61 };
  62
  63 void cpu_outb(pio_addr_t addr, uint8_t val)
  64 {
  65     LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
  66     trace_cpu_out(addr, val);
  67     address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
  68                         &val, 1);
  69 }
  70
  71 void cpu_outw(pio_addr_t addr, uint16_t val)
  72 {
  73     uint8_t buf[2];
  74
  75     LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
  76     trace_cpu_out(addr, val);
  77     stw_p(buf, val);
  78     address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
  79                         buf, 2);
  80 }
  81
  82 void cpu_outl(pio_addr_t addr, uint32_t val)
  83 {
  84     uint8_t buf[4];
  85
  86     LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
  87     trace_cpu_out(addr, val);
  88     stl_p(buf, val);
  89     address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
  90                         buf, 4);
  91 }
  92
  93 uint8_t cpu_inb(pio_addr_t addr)
  94 {
  95     uint8_t val;
  96
  97     address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
  98                        &val, 1);
  99     trace_cpu_in(addr, val);
 100     LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
 101     return val;
 102 }
 103
 104 uint16_t cpu_inw(pio_addr_t addr)
 105 {
 106     uint8_t buf[2];
 107     uint16_t val;
 108
 109     address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
 110     val = lduw_p(buf);
 111     trace_cpu_in(addr, val);
 112     LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
 113     return val;
 114 }
 115
 116 uint32_t cpu_inl(pio_addr_t addr)
 117 {
 118     uint8_t buf[4];
 119     uint32_t val;
 120
 121     address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
 122     val = ldl_p(buf);
 123     trace_cpu_in(addr, val);
 124     LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
 125     return val;
 126 }
 127
 128 void portio_list_init(PortioList *piolist,
 129                       Object *owner,
 130                       const MemoryRegionPortio *callbacks,
 131                       void *opaque, const char *name)
 132 {
 133     unsigned n = 0;
 134
 135     while (callbacks[n].size) {
 136         ++n;
 137     }
 138
 139     piolist->ports = callbacks;
 140     piolist->nr = 0;
 141     piolist->regions = g_new0(MemoryRegion *, n);
 142     piolist->address_space = NULL;
 143     piolist->opaque = opaque;
 144     piolist->owner = owner;
 145     piolist->name = name;
 146     piolist->flush_coalesced_mmio = false;
 147 }
 148
 149 void portio_list_set_flush_coalesced(PortioList *piolist)
 150 {
 151     piolist->flush_coalesced_mmio = true;
 152 }
 153
 154 void portio_list_destroy(PortioList *piolist)
 155 {
 156     MemoryRegionPortioList *mrpio;
 157     unsigned i;
 158
 159     for (i = 0; i < piolist->nr; ++i) {
 160         mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
 161         object_unparent(OBJECT(&mrpio->mr));
 162         g_free(mrpio);
 163     }
 164     g_free(piolist->regions);
 165 }
 166
 167 static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
 168                                              uint64_t offset, unsigned size,
 169                                              bool write)
 170 {
 171     const MemoryRegionPortio *mrp;
 172
 173     for (mrp = mrpio->ports; mrp->size; ++mrp) {
 174         if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
 175             size == mrp->size &&
 176             (write ? (bool)mrp->write : (bool)mrp->read)) {
 177             return mrp;
 178         }
 179     }
 180     return NULL;
 181 }
 182
 183 static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
 184 {
 185     MemoryRegionPortioList *mrpio = opaque;
 186     const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
 187     uint64_t data;
 188
 189     data = ((uint64_t)1 << (size * 8)) - 1;
 190     if (mrp) {
 191         data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
 192     } else if (size == 2) {
 193         mrp = find_portio(mrpio, addr, 1, false);
 194         if (mrp) {
 195             data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
 196             if (addr + 1 < mrp->offset + mrp->len) {
 197                 data |= mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8;
 198             } else {
 199                 data |= 0xff00;
 200             }
 201         }
 202     }
 203     return data;
 204 }
 205
 206 static void portio_write(void *opaque, hwaddr addr, uint64_t data,
 207                          unsigned size)
 208 {
 209     MemoryRegionPortioList *mrpio = opaque;
 210     const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
 211
 212     if (mrp) {
 213         mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
 214     } else if (size == 2) {
 215         mrp = find_portio(mrpio, addr, 1, true);
 216         if (mrp) {
 217             mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
 218             if (addr + 1 < mrp->offset + mrp->len) {
 219                 mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
 220             }
 221         }
 222     }
 223 }
 224
 225 static const MemoryRegionOps portio_ops = {
 226     .read = portio_read,
 227     .write = portio_write,
 228     .endianness = DEVICE_LITTLE_ENDIAN,
 229     .valid.unaligned = true,
 230     .impl.unaligned = true,
 231 };
 232
 233 static void portio_list_add_1(PortioList *piolist,
 234                               const MemoryRegionPortio *pio_init,
 235                               unsigned count, unsigned start,
 236                               unsigned off_low, unsigned off_high)
 237 {
 238     MemoryRegionPortioList *mrpio;
 239     unsigned i;
 240
 241     /* Copy the sub-list and null-terminate it.  */
 242     mrpio = g_malloc0(sizeof(MemoryRegionPortioList) +
 243                       sizeof(MemoryRegionPortio) * (count + 1));
 244     mrpio->portio_opaque = piolist->opaque;
 245     memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
 246     memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
 247
 248     /* Adjust the offsets to all be zero-based for the region.  */
 249     for (i = 0; i < count; ++i) {
 250         mrpio->ports[i].offset -= off_low;
 251         mrpio->ports[i].base = start + off_low;
 252     }
 253
 254     memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio,
 255                           piolist->name, off_high - off_low);
 256     if (piolist->flush_coalesced_mmio) {
 257         memory_region_set_flush_coalesced(&mrpio->mr);
 258     }
 259     memory_region_add_subregion(piolist->address_space,
 260                                 start + off_low, &mrpio->mr);
 261     piolist->regions[piolist->nr] = &mrpio->mr;
 262     ++piolist->nr;
 263 }
 264
 265 void portio_list_add(PortioList *piolist,
 266                      MemoryRegion *address_space,
 267                      uint32_t start)
 268 {
 269     const MemoryRegionPortio *pio, *pio_start = piolist->ports;
 270     unsigned int off_low, off_high, off_last, count;
 271
 272     piolist->address_space = address_space;
 273
 274     /* Handle the first entry specially.  */
 275     off_last = off_low = pio_start->offset;
 276     off_high = off_low + pio_start->len + pio_start->size - 1;
 277     count = 1;
 278
 279     for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
 280         /* All entries must be sorted by offset.  */
 281         assert(pio->offset >= off_last);
 282         off_last = pio->offset;
 283
 284         /* If we see a hole, break the region.  */
 285         if (off_last > off_high) {
 286             portio_list_add_1(piolist, pio_start, count, start, off_low,
 287                               off_high);
 288             /* ... and start collecting anew.  */
 289             pio_start = pio;
 290             off_low = off_last;
 291             off_high = off_low + pio->len + pio_start->size - 1;
 292             count = 0;
 293         } else if (off_last + pio->len > off_high) {
 294             off_high = off_last + pio->len + pio_start->size - 1;
 295         }
 296     }
 297
 298     /* There will always be an open sub-list.  */
 299     portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
 300 }
 301
 302 void portio_list_del(PortioList *piolist)
 303 {
 304     MemoryRegionPortioList *mrpio;
 305     unsigned i;
 306
 307     for (i = 0; i < piolist->nr; ++i) {
 308         mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
 309         memory_region_del_subregion(piolist->address_space, &mrpio->mr);
 310     }
 311 }