tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 /* Default target word size to pointer size.  */
  33 #ifndef TCG_TARGET_REG_BITS
  34 # if UINTPTR_MAX == UINT32_MAX
  35 #  define TCG_TARGET_REG_BITS 32
  36 # elif UINTPTR_MAX == UINT64_MAX
  37 #  define TCG_TARGET_REG_BITS 64
  38 # else
  39 #  error Unknown pointer size for tcg target
  40 # endif
  41 #endif
  42
  43 #if TCG_TARGET_REG_BITS == 32
  44 typedef int32_t tcg_target_long;
  45 typedef uint32_t tcg_target_ulong;
  46 #define TCG_PRIlx PRIx32
  47 #define TCG_PRIld PRId32
  48 #elif TCG_TARGET_REG_BITS == 64
  49 typedef int64_t tcg_target_long;
  50 typedef uint64_t tcg_target_ulong;
  51 #define TCG_PRIlx PRIx64
  52 #define TCG_PRIld PRId64
  53 #else
  54 #error unsupported
  55 #endif
  56
  57 #include "tcg-runtime.h"
  58
  59 #if TCG_TARGET_NB_REGS <= 32
  60 typedef uint32_t TCGRegSet;
  61 #elif TCG_TARGET_NB_REGS <= 64
  62 typedef uint64_t TCGRegSet;
  63 #else
  64 #error unsupported
  65 #endif
  66
  67 #if TCG_TARGET_REG_BITS == 32
  68 /* Turn some undef macros into false macros.  */
  69 #define TCG_TARGET_HAS_trunc_shr_i32    0
  70 #define TCG_TARGET_HAS_div_i64          0
  71 #define TCG_TARGET_HAS_rem_i64          0
  72 #define TCG_TARGET_HAS_div2_i64         0
  73 #define TCG_TARGET_HAS_rot_i64          0
  74 #define TCG_TARGET_HAS_ext8s_i64        0
  75 #define TCG_TARGET_HAS_ext16s_i64       0
  76 #define TCG_TARGET_HAS_ext32s_i64       0
  77 #define TCG_TARGET_HAS_ext8u_i64        0
  78 #define TCG_TARGET_HAS_ext16u_i64       0
  79 #define TCG_TARGET_HAS_ext32u_i64       0
  80 #define TCG_TARGET_HAS_bswap16_i64      0
  81 #define TCG_TARGET_HAS_bswap32_i64      0
  82 #define TCG_TARGET_HAS_bswap64_i64      0
  83 #define TCG_TARGET_HAS_neg_i64          0
  84 #define TCG_TARGET_HAS_not_i64          0
  85 #define TCG_TARGET_HAS_andc_i64         0
  86 #define TCG_TARGET_HAS_orc_i64          0
  87 #define TCG_TARGET_HAS_eqv_i64          0
  88 #define TCG_TARGET_HAS_nand_i64         0
  89 #define TCG_TARGET_HAS_nor_i64          0
  90 #define TCG_TARGET_HAS_deposit_i64      0
  91 #define TCG_TARGET_HAS_movcond_i64      0
  92 #define TCG_TARGET_HAS_add2_i64         0
  93 #define TCG_TARGET_HAS_sub2_i64         0
  94 #define TCG_TARGET_HAS_mulu2_i64        0
  95 #define TCG_TARGET_HAS_muls2_i64        0
  96 #define TCG_TARGET_HAS_muluh_i64        0
  97 #define TCG_TARGET_HAS_mulsh_i64        0
  98 /* Turn some undef macros into true macros.  */
  99 #define TCG_TARGET_HAS_add2_i32         1
 100 #define TCG_TARGET_HAS_sub2_i32         1
 101 #endif
 102
 103 #ifndef TCG_TARGET_deposit_i32_valid
 104 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 105 #endif
 106 #ifndef TCG_TARGET_deposit_i64_valid
 107 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 108 #endif
 109
 110 /* Only one of DIV or DIV2 should be defined.  */
 111 #if defined(TCG_TARGET_HAS_div_i32)
 112 #define TCG_TARGET_HAS_div2_i32         0
 113 #elif defined(TCG_TARGET_HAS_div2_i32)
 114 #define TCG_TARGET_HAS_div_i32          0
 115 #define TCG_TARGET_HAS_rem_i32          0
 116 #endif
 117 #if defined(TCG_TARGET_HAS_div_i64)
 118 #define TCG_TARGET_HAS_div2_i64         0
 119 #elif defined(TCG_TARGET_HAS_div2_i64)
 120 #define TCG_TARGET_HAS_div_i64          0
 121 #define TCG_TARGET_HAS_rem_i64          0
 122 #endif
 123
 124 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 125 #if TCG_TARGET_REG_BITS == 32 \
 126     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 127          || defined(TCG_TARGET_HAS_muluh_i32))
 128 # error "Missing unsigned widening multiply"
 129 #endif
 130
 131 typedef enum TCGOpcode {
 132 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 133 #include "tcg-opc.h"
 134 #undef DEF
 135     NB_OPS,
 136 } TCGOpcode;
 137
 138 #define tcg_regset_clear(d) (d) = 0
 139 #define tcg_regset_set(d, s) (d) = (s)
 140 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 141 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 142 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 143 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 144 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 145 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 146 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 147 #define tcg_regset_not(d, a) (d) = ~(a)
 148
 149 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 150 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 151 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 152 typedef uint8_t tcg_insn_unit;
 153 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 154 typedef uint16_t tcg_insn_unit;
 155 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 156 typedef uint32_t tcg_insn_unit;
 157 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 158 typedef uint64_t tcg_insn_unit;
 159 #else
 160 /* The port better have done this.  */
 161 #endif
 162
 163
 164 typedef struct TCGRelocation {
 165     struct TCGRelocation *next;
 166     int type;
 167     tcg_insn_unit *ptr;
 168     intptr_t addend;
 169 } TCGRelocation;
 170
 171 typedef struct TCGLabel {
 172     int has_value;
 173     union {
 174         uintptr_t value;
 175         tcg_insn_unit *value_ptr;
 176         TCGRelocation *first_reloc;
 177     } u;
 178 } TCGLabel;
 179
 180 typedef struct TCGPool {
 181     struct TCGPool *next;
 182     int size;
 183     uint8_t data[0] __attribute__ ((aligned));
 184 } TCGPool;
 185
 186 #define TCG_POOL_CHUNK_SIZE 32768
 187
 188 #define TCG_MAX_LABELS 512
 189
 190 #define TCG_MAX_TEMPS 512
 191
 192 /* when the size of the arguments of a called function is smaller than
 193    this value, they are statically allocated in the TB stack frame */
 194 #define TCG_STATIC_CALL_ARGS_SIZE 128
 195
 196 typedef enum TCGType {
 197     TCG_TYPE_I32,
 198     TCG_TYPE_I64,
 199     TCG_TYPE_COUNT, /* number of different types */
 200
 201     /* An alias for the size of the host register.  */
 202 #if TCG_TARGET_REG_BITS == 32
 203     TCG_TYPE_REG = TCG_TYPE_I32,
 204 #else
 205     TCG_TYPE_REG = TCG_TYPE_I64,
 206 #endif
 207
 208     /* An alias for the size of the native pointer.  */
 209 #if UINTPTR_MAX == UINT32_MAX
 210     TCG_TYPE_PTR = TCG_TYPE_I32,
 211 #else
 212     TCG_TYPE_PTR = TCG_TYPE_I64,
 213 #endif
 214
 215     /* An alias for the size of the target "long", aka register.  */
 216 #if TARGET_LONG_BITS == 64
 217     TCG_TYPE_TL = TCG_TYPE_I64,
 218 #else
 219     TCG_TYPE_TL = TCG_TYPE_I32,
 220 #endif
 221 } TCGType;
 222
 223 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 224 typedef enum TCGMemOp {
 225     MO_8     = 0,
 226     MO_16    = 1,
 227     MO_32    = 2,
 228     MO_64    = 3,
 229     MO_SIZE  = 3,   /* Mask for the above.  */
 230
 231     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 232
 233     MO_BSWAP = 8,   /* Host reverse endian.  */
 234 #ifdef HOST_WORDS_BIGENDIAN
 235     MO_LE    = MO_BSWAP,
 236     MO_BE    = 0,
 237 #else
 238     MO_LE    = 0,
 239     MO_BE    = MO_BSWAP,
 240 #endif
 241 #ifdef TARGET_WORDS_BIGENDIAN
 242     MO_TE    = MO_BE,
 243 #else
 244     MO_TE    = MO_LE,
 245 #endif
 246
 247     /* Combinations of the above, for ease of use.  */
 248     MO_UB    = MO_8,
 249     MO_UW    = MO_16,
 250     MO_UL    = MO_32,
 251     MO_SB    = MO_SIGN | MO_8,
 252     MO_SW    = MO_SIGN | MO_16,
 253     MO_SL    = MO_SIGN | MO_32,
 254     MO_Q     = MO_64,
 255
 256     MO_LEUW  = MO_LE | MO_UW,
 257     MO_LEUL  = MO_LE | MO_UL,
 258     MO_LESW  = MO_LE | MO_SW,
 259     MO_LESL  = MO_LE | MO_SL,
 260     MO_LEQ   = MO_LE | MO_Q,
 261
 262     MO_BEUW  = MO_BE | MO_UW,
 263     MO_BEUL  = MO_BE | MO_UL,
 264     MO_BESW  = MO_BE | MO_SW,
 265     MO_BESL  = MO_BE | MO_SL,
 266     MO_BEQ   = MO_BE | MO_Q,
 267
 268     MO_TEUW  = MO_TE | MO_UW,
 269     MO_TEUL  = MO_TE | MO_UL,
 270     MO_TESW  = MO_TE | MO_SW,
 271     MO_TESL  = MO_TE | MO_SL,
 272     MO_TEQ   = MO_TE | MO_Q,
 273
 274     MO_SSIZE = MO_SIZE | MO_SIGN,
 275 } TCGMemOp;
 276
 277 typedef tcg_target_ulong TCGArg;
 278
 279 /* Define a type and accessor macros for variables.  Using a struct is
 280    nice because it gives some level of type safely.  Ideally the compiler
 281    be able to see through all this.  However in practice this is not true,
 282    especially on targets with braindamaged ABIs (e.g. i386).
 283    We use plain int by default to avoid this runtime overhead.
 284    Users of tcg_gen_* don't need to know about any of this, and should
 285    treat TCGv as an opaque type.
 286    In addition we do typechecking for different types of variables.  TCGv_i32
 287    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 288    are aliases for target_ulong and host pointer sized values respectively.
 289  */
 290
 291 #ifdef CONFIG_DEBUG_TCG
 292 #define DEBUG_TCGV 1
 293 #endif
 294
 295 #ifdef DEBUG_TCGV
 296
 297 typedef struct
 298 {
 299     int i32;
 300 } TCGv_i32;
 301
 302 typedef struct
 303 {
 304     int i64;
 305 } TCGv_i64;
 306
 307 typedef struct {
 308     int iptr;
 309 } TCGv_ptr;
 310
 311 #define MAKE_TCGV_I32(i) __extension__                  \
 312     ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 313 #define MAKE_TCGV_I64(i) __extension__                  \
 314     ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
 315 #define MAKE_TCGV_PTR(i) __extension__                  \
 316     ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
 317 #define GET_TCGV_I32(t) ((t).i32)
 318 #define GET_TCGV_I64(t) ((t).i64)
 319 #define GET_TCGV_PTR(t) ((t).iptr)
 320 #if TCG_TARGET_REG_BITS == 32
 321 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 322 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 323 #endif
 324
 325 #else /* !DEBUG_TCGV */
 326
 327 typedef int TCGv_i32;
 328 typedef int TCGv_i64;
 329 #if TCG_TARGET_REG_BITS == 32
 330 #define TCGv_ptr TCGv_i32
 331 #else
 332 #define TCGv_ptr TCGv_i64
 333 #endif
 334 #define MAKE_TCGV_I32(x) (x)
 335 #define MAKE_TCGV_I64(x) (x)
 336 #define MAKE_TCGV_PTR(x) (x)
 337 #define GET_TCGV_I32(t) (t)
 338 #define GET_TCGV_I64(t) (t)
 339 #define GET_TCGV_PTR(t) (t)
 340
 341 #if TCG_TARGET_REG_BITS == 32
 342 #define TCGV_LOW(t) (t)
 343 #define TCGV_HIGH(t) ((t) + 1)
 344 #endif
 345
 346 #endif /* DEBUG_TCGV */
 347
 348 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 349 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 350 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 351
 352 /* Dummy definition to avoid compiler warnings.  */
 353 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 354 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 355 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 356
 357 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 358 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 359 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 360
 361 /* call flags */
 362 /* Helper does not read globals (either directly or through an exception). It
 363    implies TCG_CALL_NO_WRITE_GLOBALS. */
 364 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 365 /* Helper does not write globals */
 366 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 367 /* Helper can be safely suppressed if the return value is not used. */
 368 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 369
 370 /* convenience version of most used call flags */
 371 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 372 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 373 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 374 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 375 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 376
 377 /* used to align parameters */
 378 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 379 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 380
 381 /* Conditions.  Note that these are laid out for easy manipulation by
 382    the functions below:
 383      bit 0 is used for inverting;
 384      bit 1 is signed,
 385      bit 2 is unsigned,
 386      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 387 typedef enum {
 388     /* non-signed */
 389     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 390     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 391     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 392     TCG_COND_NE     = 8 | 0 | 0 | 1,
 393     /* signed */
 394     TCG_COND_LT     = 0 | 0 | 2 | 0,
 395     TCG_COND_GE     = 0 | 0 | 2 | 1,
 396     TCG_COND_LE     = 8 | 0 | 2 | 0,
 397     TCG_COND_GT     = 8 | 0 | 2 | 1,
 398     /* unsigned */
 399     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 400     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 401     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 402     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 403 } TCGCond;
 404
 405 /* Invert the sense of the comparison.  */
 406 static inline TCGCond tcg_invert_cond(TCGCond c)
 407 {
 408     return (TCGCond)(c ^ 1);
 409 }
 410
 411 /* Swap the operands in a comparison.  */
 412 static inline TCGCond tcg_swap_cond(TCGCond c)
 413 {
 414     return c & 6 ? (TCGCond)(c ^ 9) : c;
 415 }
 416
 417 /* Create an "unsigned" version of a "signed" comparison.  */
 418 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 419 {
 420     return c & 2 ? (TCGCond)(c ^ 6) : c;
 421 }
 422
 423 /* Must a comparison be considered unsigned?  */
 424 static inline bool is_unsigned_cond(TCGCond c)
 425 {
 426     return (c & 4) != 0;
 427 }
 428
 429 /* Create a "high" version of a double-word comparison.
 430    This removes equality from a LTE or GTE comparison.  */
 431 static inline TCGCond tcg_high_cond(TCGCond c)
 432 {
 433     switch (c) {
 434     case TCG_COND_GE:
 435     case TCG_COND_LE:
 436     case TCG_COND_GEU:
 437     case TCG_COND_LEU:
 438         return (TCGCond)(c ^ 8);
 439     default:
 440         return c;
 441     }
 442 }
 443
 444 #define TEMP_VAL_DEAD  0
 445 #define TEMP_VAL_REG   1
 446 #define TEMP_VAL_MEM   2
 447 #define TEMP_VAL_CONST 3
 448
 449 /* XXX: optimize memory layout */
 450 typedef struct TCGTemp {
 451     TCGType base_type;
 452     TCGType type;
 453     int val_type;
 454     int reg;
 455     tcg_target_long val;
 456     int mem_reg;
 457     intptr_t mem_offset;
 458     unsigned int fixed_reg:1;
 459     unsigned int mem_coherent:1;
 460     unsigned int mem_allocated:1;
 461     unsigned int temp_local:1; /* If true, the temp is saved across
 462                                   basic blocks. Otherwise, it is not
 463                                   preserved across basic blocks. */
 464     unsigned int temp_allocated:1; /* never used for code gen */
 465     const char *name;
 466 } TCGTemp;
 467
 468 typedef struct TCGContext TCGContext;
 469
 470 typedef struct TCGTempSet {
 471     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 472 } TCGTempSet;
 473
 474 struct TCGContext {
 475     uint8_t *pool_cur, *pool_end;
 476     TCGPool *pool_first, *pool_current, *pool_first_large;
 477     TCGLabel *labels;
 478     int nb_labels;
 479     int nb_globals;
 480     int nb_temps;
 481
 482     /* goto_tb support */
 483     tcg_insn_unit *code_buf;
 484     uintptr_t *tb_next;
 485     uint16_t *tb_next_offset;
 486     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 487
 488     /* liveness analysis */
 489     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 490                                corresponding argument is dead */
 491     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 492                                corresponding output argument needs to be
 493                                sync to memory. */
 494
 495     /* tells in which temporary a given register is. It does not take
 496        into account fixed registers */
 497     int reg_to_temp[TCG_TARGET_NB_REGS];
 498     TCGRegSet reserved_regs;
 499     intptr_t current_frame_offset;
 500     intptr_t frame_start;
 501     intptr_t frame_end;
 502     int frame_reg;
 503
 504     tcg_insn_unit *code_ptr;
 505     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 506     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 507
 508     GHashTable *helpers;
 509
 510 #ifdef CONFIG_PROFILER
 511     /* profiling info */
 512     int64_t tb_count1;
 513     int64_t tb_count;
 514     int64_t op_count; /* total insn count */
 515     int op_count_max; /* max insn per TB */
 516     int64_t temp_count;
 517     int temp_count_max;
 518     int64_t del_op_count;
 519     int64_t code_in_len;
 520     int64_t code_out_len;
 521     int64_t interm_time;
 522     int64_t code_time;
 523     int64_t la_time;
 524     int64_t opt_time;
 525     int64_t restore_count;
 526     int64_t restore_time;
 527 #endif
 528
 529 #ifdef CONFIG_DEBUG_TCG
 530     int temps_in_use;
 531     int goto_tb_issue_mask;
 532 #endif
 533
 534     uint16_t gen_opc_buf[OPC_BUF_SIZE];
 535     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 536
 537     uint16_t *gen_opc_ptr;
 538     TCGArg *gen_opparam_ptr;
 539     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 540     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 541     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 542
 543     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 544        here, because there's too much arithmetic throughout that relies
 545        on addition and subtraction working on bytes.  Rely on the GCC
 546        extension that allows arithmetic on void*.  */
 547     int code_gen_max_blocks;
 548     void *code_gen_prologue;
 549     void *code_gen_buffer;
 550     size_t code_gen_buffer_size;
 551     /* threshold to flush the translated code buffer */
 552     size_t code_gen_buffer_max_size;
 553     void *code_gen_ptr;
 554
 555     TBContext tb_ctx;
 556
 557     /* The TCGBackendData structure is private to tcg-target.c.  */
 558     struct TCGBackendData *be;
 559 };
 560
 561 extern TCGContext tcg_ctx;
 562
 563 /* pool based memory allocation */
 564
 565 void *tcg_malloc_internal(TCGContext *s, int size);
 566 void tcg_pool_reset(TCGContext *s);
 567 void tcg_pool_delete(TCGContext *s);
 568
 569 static inline void *tcg_malloc(int size)
 570 {
 571     TCGContext *s = &tcg_ctx;
 572     uint8_t *ptr, *ptr_end;
 573     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 574     ptr = s->pool_cur;
 575     ptr_end = ptr + size;
 576     if (unlikely(ptr_end > s->pool_end)) {
 577         return tcg_malloc_internal(&tcg_ctx, size);
 578     } else {
 579         s->pool_cur = ptr_end;
 580         return ptr;
 581     }
 582 }
 583
 584 void tcg_context_init(TCGContext *s);
 585 void tcg_prologue_init(TCGContext *s);
 586 void tcg_func_start(TCGContext *s);
 587
 588 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 589 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 590                            long offset);
 591
 592 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 593
 594 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 595 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 596 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 597 static inline TCGv_i32 tcg_temp_new_i32(void)
 598 {
 599     return tcg_temp_new_internal_i32(0);
 600 }
 601 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 602 {
 603     return tcg_temp_new_internal_i32(1);
 604 }
 605 void tcg_temp_free_i32(TCGv_i32 arg);
 606 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 607
 608 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 609 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 610 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 611 static inline TCGv_i64 tcg_temp_new_i64(void)
 612 {
 613     return tcg_temp_new_internal_i64(0);
 614 }
 615 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 616 {
 617     return tcg_temp_new_internal_i64(1);
 618 }
 619 void tcg_temp_free_i64(TCGv_i64 arg);
 620 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 621
 622 #if defined(CONFIG_DEBUG_TCG)
 623 /* If you call tcg_clear_temp_count() at the start of a section of
 624  * code which is not supposed to leak any TCG temporaries, then
 625  * calling tcg_check_temp_count() at the end of the section will
 626  * return 1 if the section did in fact leak a temporary.
 627  */
 628 void tcg_clear_temp_count(void);
 629 int tcg_check_temp_count(void);
 630 #else
 631 #define tcg_clear_temp_count() do { } while (0)
 632 #define tcg_check_temp_count() 0
 633 #endif
 634
 635 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 636
 637 #define TCG_CT_ALIAS  0x80
 638 #define TCG_CT_IALIAS 0x40
 639 #define TCG_CT_REG    0x01
 640 #define TCG_CT_CONST  0x02 /* any constant of register size */
 641
 642 typedef struct TCGArgConstraint {
 643     uint16_t ct;
 644     uint8_t alias_index;
 645     union {
 646         TCGRegSet regs;
 647     } u;
 648 } TCGArgConstraint;
 649
 650 #define TCG_MAX_OP_ARGS 16
 651
 652 /* Bits for TCGOpDef->flags, 8 bits available.  */
 653 enum {
 654     /* Instruction defines the end of a basic block.  */
 655     TCG_OPF_BB_END       = 0x01,
 656     /* Instruction clobbers call registers and potentially update globals.  */
 657     TCG_OPF_CALL_CLOBBER = 0x02,
 658     /* Instruction has side effects: it cannot be removed if its outputs
 659        are not used, and might trigger exceptions.  */
 660     TCG_OPF_SIDE_EFFECTS = 0x04,
 661     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 662     TCG_OPF_64BIT        = 0x08,
 663     /* Instruction is optional and not implemented by the host, or insn
 664        is generic and should not be implemened by the host.  */
 665     TCG_OPF_NOT_PRESENT  = 0x10,
 666 };
 667
 668 typedef struct TCGOpDef {
 669     const char *name;
 670     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 671     uint8_t flags;
 672     TCGArgConstraint *args_ct;
 673     int *sorted_args;
 674 #if defined(CONFIG_DEBUG_TCG)
 675     int used;
 676 #endif
 677 } TCGOpDef;
 678
 679 extern TCGOpDef tcg_op_defs[];
 680 extern const size_t tcg_op_defs_max;
 681
 682 typedef struct TCGTargetOpDef {
 683     TCGOpcode op;
 684     const char *args_ct_str[TCG_MAX_OP_ARGS];
 685 } TCGTargetOpDef;
 686
 687 #define tcg_abort() \
 688 do {\
 689     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 690     abort();\
 691 } while (0)
 692
 693 #ifdef CONFIG_DEBUG_TCG
 694 # define tcg_debug_assert(X) do { assert(X); } while (0)
 695 #elif QEMU_GNUC_PREREQ(4, 5)
 696 # define tcg_debug_assert(X) \
 697     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 698 #else
 699 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 700 #endif
 701
 702 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 703
 704 #if UINTPTR_MAX == UINT32_MAX
 705 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 706 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 707
 708 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 709 #define tcg_global_reg_new_ptr(R, N) \
 710     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 711 #define tcg_global_mem_new_ptr(R, O, N) \
 712     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 713 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 714 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 715 #else
 716 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 717 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 718
 719 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 720 #define tcg_global_reg_new_ptr(R, N) \
 721     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 722 #define tcg_global_mem_new_ptr(R, O, N) \
 723     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 724 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 725 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 726 #endif
 727
 728 void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags,
 729                    int sizemask, TCGArg ret, int nargs, TCGArg *args);
 730
 731 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
 732                         int c, int right, int arith);
 733
 734 TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args,
 735                      TCGOpDef *tcg_op_def);
 736
 737 /* only used for debugging purposes */
 738 void tcg_dump_ops(TCGContext *s);
 739
 740 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 741 TCGv_i32 tcg_const_i32(int32_t val);
 742 TCGv_i64 tcg_const_i64(int64_t val);
 743 TCGv_i32 tcg_const_local_i32(int32_t val);
 744 TCGv_i64 tcg_const_local_i64(int64_t val);
 745
 746 /**
 747  * tcg_ptr_byte_diff
 748  * @a, @b: addresses to be differenced
 749  *
 750  * There are many places within the TCG backends where we need a byte
 751  * difference between two pointers.  While this can be accomplished
 752  * with local casting, it's easy to get wrong -- especially if one is
 753  * concerned with the signedness of the result.
 754  *
 755  * This version relies on GCC's void pointer arithmetic to get the
 756  * correct result.
 757  */
 758
 759 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 760 {
 761     return a - b;
 762 }
 763
 764 /**
 765  * tcg_pcrel_diff
 766  * @s: the tcg context
 767  * @target: address of the target
 768  *
 769  * Produce a pc-relative difference, from the current code_ptr
 770  * to the destination address.
 771  */
 772
 773 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 774 {
 775     return tcg_ptr_byte_diff(target, s->code_ptr);
 776 }
 777
 778 /**
 779  * tcg_current_code_size
 780  * @s: the tcg context
 781  *
 782  * Compute the current code size within the translation block.
 783  * This is used to fill in qemu's data structures for goto_tb.
 784  */
 785
 786 static inline size_t tcg_current_code_size(TCGContext *s)
 787 {
 788     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 789 }
 790
 791 /**
 792  * tcg_qemu_tb_exec:
 793  * @env: CPUArchState * for the CPU
 794  * @tb_ptr: address of generated code for the TB to execute
 795  *
 796  * Start executing code from a given translation block.
 797  * Where translation blocks have been linked, execution
 798  * may proceed from the given TB into successive ones.
 799  * Control eventually returns only when some action is needed
 800  * from the top-level loop: either control must pass to a TB
 801  * which has not yet been directly linked, or an asynchronous
 802  * event such as an interrupt needs handling.
 803  *
 804  * The return value is a pointer to the next TB to execute
 805  * (if known; otherwise zero). This pointer is assumed to be
 806  * 4-aligned, and the bottom two bits are used to return further
 807  * information:
 808  *  0, 1: the link between this TB and the next is via the specified
 809  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 810  *        of) "goto_tb <index>". The main loop uses this to determine
 811  *        how to link the TB just executed to the next.
 812  *  2:    we are using instruction counting code generation, and we
 813  *        did not start executing this TB because the instruction counter
 814  *        would hit zero midway through it. In this case the next-TB pointer
 815  *        returned is the TB we were about to execute, and the caller must
 816  *        arrange to execute the remaining count of instructions.
 817  *  3:    we stopped because the CPU's exit_request flag was set
 818  *        (usually meaning that there is an interrupt that needs to be
 819  *        handled). The next-TB pointer returned is the TB we were
 820  *        about to execute when we noticed the pending exit request.
 821  *
 822  * If the bottom two bits indicate an exit-via-index then the CPU
 823  * state is correctly synchronised and ready for execution of the next
 824  * TB (and in particular the guest PC is the address to execute next).
 825  * Otherwise, we gave up on execution of this TB before it started, and
 826  * the caller must fix up the CPU state by calling cpu_pc_from_tb()
 827  * with the next-TB pointer we return.
 828  *
 829  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 830  * to this default (which just calls the prologue.code emitted by
 831  * tcg_target_qemu_prologue()).
 832  */
 833 #define TB_EXIT_MASK 3
 834 #define TB_EXIT_IDX0 0
 835 #define TB_EXIT_IDX1 1
 836 #define TB_EXIT_ICOUNT_EXPIRED 2
 837 #define TB_EXIT_REQUESTED 3
 838
 839 #if !defined(tcg_qemu_tb_exec)
 840 # define tcg_qemu_tb_exec(env, tb_ptr) \
 841     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 842 #endif
 843
 844 void tcg_register_jit(void *buf, size_t buf_size);
 845
 846 /*
 847  * Memory helpers that will be used by TCG generated code.
 848  */
 849 #ifdef CONFIG_SOFTMMU
 850 /* Value zero-extended to tcg register size.  */
 851 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 852                                      int mmu_idx, uintptr_t retaddr);
 853 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 854                                     int mmu_idx, uintptr_t retaddr);
 855 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 856                                     int mmu_idx, uintptr_t retaddr);
 857 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 858                            int mmu_idx, uintptr_t retaddr);
 859 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 860                                     int mmu_idx, uintptr_t retaddr);
 861 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 862                                     int mmu_idx, uintptr_t retaddr);
 863 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 864                            int mmu_idx, uintptr_t retaddr);
 865
 866 /* Value sign-extended to tcg register size.  */
 867 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 868                                      int mmu_idx, uintptr_t retaddr);
 869 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 870                                     int mmu_idx, uintptr_t retaddr);
 871 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 872                                     int mmu_idx, uintptr_t retaddr);
 873 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 874                                     int mmu_idx, uintptr_t retaddr);
 875 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 876                                     int mmu_idx, uintptr_t retaddr);
 877
 878 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 879                         int mmu_idx, uintptr_t retaddr);
 880 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 881                        int mmu_idx, uintptr_t retaddr);
 882 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 883                        int mmu_idx, uintptr_t retaddr);
 884 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 885                        int mmu_idx, uintptr_t retaddr);
 886 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 887                        int mmu_idx, uintptr_t retaddr);
 888 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 889                        int mmu_idx, uintptr_t retaddr);
 890 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 891                        int mmu_idx, uintptr_t retaddr);
 892
 893 /* Temporary aliases until backends are converted.  */
 894 #ifdef TARGET_WORDS_BIGENDIAN
 895 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
 896 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
 897 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
 898 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
 899 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
 900 # define helper_ret_stw_mmu   helper_be_stw_mmu
 901 # define helper_ret_stl_mmu   helper_be_stl_mmu
 902 # define helper_ret_stq_mmu   helper_be_stq_mmu
 903 #else
 904 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
 905 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
 906 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
 907 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
 908 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
 909 # define helper_ret_stw_mmu   helper_le_stw_mmu
 910 # define helper_ret_stl_mmu   helper_le_stl_mmu
 911 # define helper_ret_stq_mmu   helper_le_stq_mmu
 912 #endif
 913
 914 uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 915 uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 916 uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 917 uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx);
 918
 919 void helper_stb_mmu(CPUArchState *env, target_ulong addr,
 920                     uint8_t val, int mmu_idx);
 921 void helper_stw_mmu(CPUArchState *env, target_ulong addr,
 922                     uint16_t val, int mmu_idx);
 923 void helper_stl_mmu(CPUArchState *env, target_ulong addr,
 924                     uint32_t val, int mmu_idx);
 925 void helper_stq_mmu(CPUArchState *env, target_ulong addr,
 926                     uint64_t val, int mmu_idx);
 927 #endif /* CONFIG_SOFTMMU */
 928
 929 #endif /* TCG_H */