hw/timer: Add ASPEED timer device model
[qemu/cris-port.git] / include / hw / timer / aspeed_timer.h
blob44dc2f89d5c64edeb07aa895aece9854cc716a66
1 /*
2 * ASPEED AST2400 Timer
4 * Andrew Jeffery <andrew@aj.id.au>
6 * Copyright (C) 2016 IBM Corp.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #ifndef ASPEED_TIMER_H
23 #define ASPEED_TIMER_H
25 #include "hw/ptimer.h"
27 #define ASPEED_TIMER(obj) \
28 OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
29 #define TYPE_ASPEED_TIMER "aspeed.timer"
30 #define ASPEED_TIMER_NR_TIMERS 8
32 typedef struct AspeedTimer {
33 qemu_irq irq;
35 uint8_t id;
37 /**
38 * Track the line level as the ASPEED timers implement edge triggered
39 * interrupts, signalling with both the rising and falling edge.
41 int32_t level;
42 ptimer_state *timer;
43 uint32_t reload;
44 uint32_t match[2];
45 } AspeedTimer;
47 typedef struct AspeedTimerCtrlState {
48 /*< private >*/
49 SysBusDevice parent;
51 /*< public >*/
52 MemoryRegion iomem;
54 uint32_t ctrl;
55 uint32_t ctrl2;
56 AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
57 } AspeedTimerCtrlState;
59 #endif /* ASPEED_TIMER_H */