4 * Copyright (c) 2006 Fabrice Bellard
5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
6 * VA Linux Systems Japan K.K.
7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 * This is based on acpi.c.
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "qapi/visitor.h"
28 #include "hw/i386/pc.h"
29 #include "hw/pci/pci.h"
30 #include "qemu/timer.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/acpi/acpi.h"
33 #include "sysemu/kvm.h"
34 #include "exec/address-spaces.h"
36 #include "hw/i386/ich9.h"
37 #include "hw/mem/pc-dimm.h"
42 #define ICH9_DEBUG(fmt, ...) \
43 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
45 #define ICH9_DEBUG(fmt, ...) do { } while (0)
48 static void ich9_pm_update_sci_fn(ACPIREGS
*regs
)
50 ICH9LPCPMRegs
*pm
= container_of(regs
, ICH9LPCPMRegs
, acpi_regs
);
51 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
54 static uint64_t ich9_gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
56 ICH9LPCPMRegs
*pm
= opaque
;
57 return acpi_gpe_ioport_readb(&pm
->acpi_regs
, addr
);
60 static void ich9_gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
63 ICH9LPCPMRegs
*pm
= opaque
;
64 acpi_gpe_ioport_writeb(&pm
->acpi_regs
, addr
, val
);
65 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
68 static const MemoryRegionOps ich9_gpe_ops
= {
69 .read
= ich9_gpe_readb
,
70 .write
= ich9_gpe_writeb
,
71 .valid
.min_access_size
= 1,
72 .valid
.max_access_size
= 4,
73 .impl
.min_access_size
= 1,
74 .impl
.max_access_size
= 1,
75 .endianness
= DEVICE_LITTLE_ENDIAN
,
78 static uint64_t ich9_smi_readl(void *opaque
, hwaddr addr
, unsigned width
)
80 ICH9LPCPMRegs
*pm
= opaque
;
91 static void ich9_smi_writel(void *opaque
, hwaddr addr
, uint64_t val
,
94 ICH9LPCPMRegs
*pm
= opaque
;
97 pm
->smi_en
&= ~pm
->smi_en_wmask
;
98 pm
->smi_en
|= (val
& pm
->smi_en_wmask
);
103 static const MemoryRegionOps ich9_smi_ops
= {
104 .read
= ich9_smi_readl
,
105 .write
= ich9_smi_writel
,
106 .valid
.min_access_size
= 4,
107 .valid
.max_access_size
= 4,
108 .endianness
= DEVICE_LITTLE_ENDIAN
,
111 void ich9_pm_iospace_update(ICH9LPCPMRegs
*pm
, uint32_t pm_io_base
)
113 ICH9_DEBUG("to 0x%x\n", pm_io_base
);
115 assert((pm_io_base
& ICH9_PMIO_MASK
) == 0);
117 pm
->pm_io_base
= pm_io_base
;
118 memory_region_transaction_begin();
119 memory_region_set_enabled(&pm
->io
, pm
->pm_io_base
!= 0);
120 memory_region_set_address(&pm
->io
, pm
->pm_io_base
);
121 memory_region_transaction_commit();
124 static int ich9_pm_post_load(void *opaque
, int version_id
)
126 ICH9LPCPMRegs
*pm
= opaque
;
127 uint32_t pm_io_base
= pm
->pm_io_base
;
129 ich9_pm_iospace_update(pm
, pm_io_base
);
133 #define VMSTATE_GPE_ARRAY(_field, _state) \
135 .name = (stringify(_field)), \
137 .num = ICH9_PMIO_GPE0_LEN, \
138 .info = &vmstate_info_uint8, \
139 .size = sizeof(uint8_t), \
140 .flags = VMS_ARRAY | VMS_POINTER, \
141 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
144 static bool vmstate_test_use_memhp(void *opaque
)
146 ICH9LPCPMRegs
*s
= opaque
;
147 return s
->acpi_memory_hotplug
.is_enabled
;
150 static const VMStateDescription vmstate_memhp_state
= {
151 .name
= "ich9_pm/memhp",
153 .minimum_version_id
= 1,
154 .minimum_version_id_old
= 1,
155 .needed
= vmstate_test_use_memhp
,
156 .fields
= (VMStateField
[]) {
157 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, ICH9LPCPMRegs
),
158 VMSTATE_END_OF_LIST()
162 const VMStateDescription vmstate_ich9_pm
= {
165 .minimum_version_id
= 1,
166 .post_load
= ich9_pm_post_load
,
167 .fields
= (VMStateField
[]) {
168 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.sts
, ICH9LPCPMRegs
),
169 VMSTATE_UINT16(acpi_regs
.pm1
.evt
.en
, ICH9LPCPMRegs
),
170 VMSTATE_UINT16(acpi_regs
.pm1
.cnt
.cnt
, ICH9LPCPMRegs
),
171 VMSTATE_TIMER_PTR(acpi_regs
.tmr
.timer
, ICH9LPCPMRegs
),
172 VMSTATE_INT64(acpi_regs
.tmr
.overflow_time
, ICH9LPCPMRegs
),
173 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.sts
, ICH9LPCPMRegs
),
174 VMSTATE_GPE_ARRAY(acpi_regs
.gpe
.en
, ICH9LPCPMRegs
),
175 VMSTATE_UINT32(smi_en
, ICH9LPCPMRegs
),
176 VMSTATE_UINT32(smi_sts
, ICH9LPCPMRegs
),
177 VMSTATE_END_OF_LIST()
179 .subsections
= (const VMStateDescription
*[]) {
180 &vmstate_memhp_state
,
185 static void pm_reset(void *opaque
)
187 ICH9LPCPMRegs
*pm
= opaque
;
188 ich9_pm_iospace_update(pm
, 0);
190 acpi_pm1_evt_reset(&pm
->acpi_regs
);
191 acpi_pm1_cnt_reset(&pm
->acpi_regs
);
192 acpi_pm_tmr_reset(&pm
->acpi_regs
);
193 acpi_gpe_reset(&pm
->acpi_regs
);
195 if (!pm
->smm_enabled
) {
196 /* Mark SMM as already inited to prevent SMM from running. KVM does not
197 * support SMM mode. */
198 pm
->smi_en
|= ICH9_PMIO_SMI_EN_APMC_EN
;
200 pm
->smi_en_wmask
= ~0;
202 acpi_update_sci(&pm
->acpi_regs
, pm
->irq
);
205 static void pm_powerdown_req(Notifier
*n
, void *opaque
)
207 ICH9LPCPMRegs
*pm
= container_of(n
, ICH9LPCPMRegs
, powerdown_notifier
);
209 acpi_pm1_evt_power_down(&pm
->acpi_regs
);
212 void ich9_pm_init(PCIDevice
*lpc_pci
, ICH9LPCPMRegs
*pm
, bool smm_enabled
,
215 memory_region_init(&pm
->io
, OBJECT(lpc_pci
), "ich9-pm", ICH9_PMIO_SIZE
);
216 memory_region_set_enabled(&pm
->io
, false);
217 memory_region_add_subregion(pci_address_space_io(lpc_pci
),
220 acpi_pm_tmr_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
221 acpi_pm1_evt_init(&pm
->acpi_regs
, ich9_pm_update_sci_fn
, &pm
->io
);
222 acpi_pm1_cnt_init(&pm
->acpi_regs
, &pm
->io
, pm
->disable_s3
, pm
->disable_s4
,
225 acpi_gpe_init(&pm
->acpi_regs
, ICH9_PMIO_GPE0_LEN
);
226 memory_region_init_io(&pm
->io_gpe
, OBJECT(lpc_pci
), &ich9_gpe_ops
, pm
,
227 "acpi-gpe0", ICH9_PMIO_GPE0_LEN
);
228 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_GPE0_STS
, &pm
->io_gpe
);
230 memory_region_init_io(&pm
->io_smi
, OBJECT(lpc_pci
), &ich9_smi_ops
, pm
,
232 memory_region_add_subregion(&pm
->io
, ICH9_PMIO_SMI_EN
, &pm
->io_smi
);
234 pm
->smm_enabled
= smm_enabled
;
236 qemu_register_reset(pm_reset
, pm
);
237 pm
->powerdown_notifier
.notify
= pm_powerdown_req
;
238 qemu_register_powerdown_notifier(&pm
->powerdown_notifier
);
240 acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci
), OBJECT(lpc_pci
),
241 &pm
->gpe_cpu
, ICH9_CPU_HOTPLUG_IO_BASE
);
243 if (pm
->acpi_memory_hotplug
.is_enabled
) {
244 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci
), OBJECT(lpc_pci
),
245 &pm
->acpi_memory_hotplug
);
249 static void ich9_pm_get_gpe0_blk(Object
*obj
, Visitor
*v
,
250 void *opaque
, const char *name
,
253 ICH9LPCPMRegs
*pm
= opaque
;
254 uint32_t value
= pm
->pm_io_base
+ ICH9_PMIO_GPE0_STS
;
256 visit_type_uint32(v
, &value
, name
, errp
);
259 static bool ich9_pm_get_memory_hotplug_support(Object
*obj
, Error
**errp
)
261 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
263 return s
->pm
.acpi_memory_hotplug
.is_enabled
;
266 static void ich9_pm_set_memory_hotplug_support(Object
*obj
, bool value
,
269 ICH9LPCState
*s
= ICH9_LPC_DEVICE(obj
);
271 s
->pm
.acpi_memory_hotplug
.is_enabled
= value
;
274 static void ich9_pm_get_disable_s3(Object
*obj
, Visitor
*v
,
275 void *opaque
, const char *name
,
278 ICH9LPCPMRegs
*pm
= opaque
;
279 uint8_t value
= pm
->disable_s3
;
281 visit_type_uint8(v
, &value
, name
, errp
);
284 static void ich9_pm_set_disable_s3(Object
*obj
, Visitor
*v
,
285 void *opaque
, const char *name
,
288 ICH9LPCPMRegs
*pm
= opaque
;
289 Error
*local_err
= NULL
;
292 visit_type_uint8(v
, &value
, name
, &local_err
);
296 pm
->disable_s3
= value
;
298 error_propagate(errp
, local_err
);
301 static void ich9_pm_get_disable_s4(Object
*obj
, Visitor
*v
,
302 void *opaque
, const char *name
,
305 ICH9LPCPMRegs
*pm
= opaque
;
306 uint8_t value
= pm
->disable_s4
;
308 visit_type_uint8(v
, &value
, name
, errp
);
311 static void ich9_pm_set_disable_s4(Object
*obj
, Visitor
*v
,
312 void *opaque
, const char *name
,
315 ICH9LPCPMRegs
*pm
= opaque
;
316 Error
*local_err
= NULL
;
319 visit_type_uint8(v
, &value
, name
, &local_err
);
323 pm
->disable_s4
= value
;
325 error_propagate(errp
, local_err
);
328 static void ich9_pm_get_s4_val(Object
*obj
, Visitor
*v
,
329 void *opaque
, const char *name
,
332 ICH9LPCPMRegs
*pm
= opaque
;
333 uint8_t value
= pm
->s4_val
;
335 visit_type_uint8(v
, &value
, name
, errp
);
338 static void ich9_pm_set_s4_val(Object
*obj
, Visitor
*v
,
339 void *opaque
, const char *name
,
342 ICH9LPCPMRegs
*pm
= opaque
;
343 Error
*local_err
= NULL
;
346 visit_type_uint8(v
, &value
, name
, &local_err
);
352 error_propagate(errp
, local_err
);
355 void ich9_pm_add_properties(Object
*obj
, ICH9LPCPMRegs
*pm
, Error
**errp
)
357 static const uint32_t gpe0_len
= ICH9_PMIO_GPE0_LEN
;
358 pm
->acpi_memory_hotplug
.is_enabled
= true;
363 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_PM_IO_BASE
,
364 &pm
->pm_io_base
, errp
);
365 object_property_add(obj
, ACPI_PM_PROP_GPE0_BLK
, "uint32",
366 ich9_pm_get_gpe0_blk
,
367 NULL
, NULL
, pm
, NULL
);
368 object_property_add_uint32_ptr(obj
, ACPI_PM_PROP_GPE0_BLK_LEN
,
370 object_property_add_bool(obj
, "memory-hotplug-support",
371 ich9_pm_get_memory_hotplug_support
,
372 ich9_pm_set_memory_hotplug_support
,
374 object_property_add(obj
, ACPI_PM_PROP_S3_DISABLED
, "uint8",
375 ich9_pm_get_disable_s3
,
376 ich9_pm_set_disable_s3
,
378 object_property_add(obj
, ACPI_PM_PROP_S4_DISABLED
, "uint8",
379 ich9_pm_get_disable_s4
,
380 ich9_pm_set_disable_s4
,
382 object_property_add(obj
, ACPI_PM_PROP_S4_VAL
, "uint8",
388 void ich9_pm_device_plug_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
, Error
**errp
)
390 if (pm
->acpi_memory_hotplug
.is_enabled
&&
391 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
392 acpi_memory_plug_cb(&pm
->acpi_regs
, pm
->irq
, &pm
->acpi_memory_hotplug
,
394 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
395 acpi_cpu_plug_cb(&pm
->acpi_regs
, pm
->irq
, &pm
->gpe_cpu
, dev
, errp
);
397 error_setg(errp
, "acpi: device plug request for not supported device"
398 " type: %s", object_get_typename(OBJECT(dev
)));
402 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
,
405 if (pm
->acpi_memory_hotplug
.is_enabled
&&
406 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
407 acpi_memory_unplug_request_cb(&pm
->acpi_regs
, pm
->irq
,
408 &pm
->acpi_memory_hotplug
, dev
, errp
);
410 error_setg(errp
, "acpi: device unplug request for not supported device"
411 " type: %s", object_get_typename(OBJECT(dev
)));
415 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs
*pm
, DeviceState
*dev
,
418 if (pm
->acpi_memory_hotplug
.is_enabled
&&
419 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
420 acpi_memory_unplug_cb(&pm
->acpi_memory_hotplug
, dev
, errp
);
422 error_setg(errp
, "acpi: device unplug for not supported device"
423 " type: %s", object_get_typename(OBJECT(dev
)));
427 void ich9_pm_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
429 ICH9LPCState
*s
= ICH9_LPC_DEVICE(adev
);
431 acpi_memory_ospm_status(&s
->pm
.acpi_memory_hotplug
, list
);