2 * CRIS virtual CPU header
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu-common.h"
25 #define TARGET_LONG_BITS 32
27 #define CPUArchState struct CPUCRISState
29 #include "exec/cpu-defs.h"
33 #define EXCP_BUSFAULT 3
37 /* CRIS-specific interrupt pending bits. */
38 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
40 /* CRUS CPU device objects interrupt lines. */
41 #define CRIS_CPU_IRQ 0
42 #define CRIS_CPU_NMI 1
44 /* Register aliases. R0 - R15 */
49 /* Support regs, P0 - P15 */
57 #define PR_PREFIX 6 /* On CRISv10 P6 is reserved, we use it as prefix. */
70 #define Q_FLAG 0x80000000
71 #define M_FLAG_V32 0x40000000
72 #define PFIX_FLAG 0x800 /* CRISv10 Only. */
73 #define F_FLAG_V10 0x400
74 #define P_FLAG_V10 0x200
78 #define M_FLAG_V10 0x80
86 #define ALU_FLAGS 0x1F
88 /* Condition codes. */
106 #define NB_MMU_MODES 2
113 typedef struct CPUCRISState
{
115 /* P0 - P15 are referred to as special registers in the docs. */
118 /* Pseudo register for the PC. Not directly accessible on CRIS. */
121 /* Pseudo register for the kernel stack. */
129 /* Condition flag tracking. */
135 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
137 /* X flag at the time of cc snapshot. */
140 /* CRIS has certain insns that lockout interrupts. */
142 int interrupt_vector
;
146 /* FIXME: add a check in the translator to avoid writing to support
147 register sets beyond the 4th. The ISA allows up to 256! but in
148 practice there is no core that implements more than 4.
150 Support function registers are used to control units close to the
151 core. Accesses do not pass down the normal hierarchy.
153 uint32_t sregs
[4][16];
155 /* Linear feedback shift reg in the mmu. Used to provide pseudo
156 randomness for the 'hint' the mmu gives to sw for choosing valid
157 sets on TLB refills. */
158 uint32_t mmu_rand_lfsr
;
161 * We just store the stores to the tlbset here for later evaluation
162 * when the hw needs access to them.
164 * One for I and another for D.
166 TLBSet tlbsets
[2][4][16];
170 /* Members from load_info on are preserved across resets. */
176 CRISCPU
*cpu_cris_init(const char *cpu_model
);
177 int cpu_cris_exec(CPUState
*cpu
);
178 /* you can call this signal handler from your SIGBUS and SIGSEGV
179 signal handlers to inform the virtual CPU of exceptions. non zero
180 is returned if the signal was handled by the virtual CPU. */
181 int cpu_cris_signal_handler(int host_signum
, void *pinfo
,
184 void cris_initialize_tcg(void);
185 void cris_initialize_crisv10_tcg(void);
188 CC_OP_DYNAMIC
, /* Use env->cc_op */
215 /* CRIS uses 8k pages. */
216 #define TARGET_PAGE_BITS 13
217 #define MMAP_SHIFT TARGET_PAGE_BITS
219 #define TARGET_PHYS_ADDR_SPACE_BITS 32
220 #define TARGET_VIRT_ADDR_SPACE_BITS 32
222 #define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
224 #define cpu_exec cpu_cris_exec
225 #define cpu_signal_handler cpu_cris_signal_handler
227 /* MMU modes definitions */
228 #define MMU_MODE0_SUFFIX _kernel
229 #define MMU_MODE1_SUFFIX _user
230 #define MMU_USER_IDX 1
231 static inline int cpu_mmu_index (CPUCRISState
*env
, bool ifetch
)
233 return !!(env
->pregs
[PR_CCS
] & U_FLAG
);
236 int cris_cpu_handle_mmu_fault(CPUState
*cpu
, vaddr address
, int rw
,
239 /* Support function regs. */
240 #define SFR_RW_GC_CFG 0][0
241 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
242 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1
243 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2
244 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3
245 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4
246 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
247 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
249 #include "exec/cpu-all.h"
251 static inline void cpu_get_tb_cpu_state(CPUCRISState
*env
, target_ulong
*pc
,
252 target_ulong
*cs_base
, int *flags
)
256 *flags
= env
->dslot
|
257 (env
->pregs
[PR_CCS
] & (S_FLAG
| P_FLAG
| U_FLAG
258 | X_FLAG
| PFIX_FLAG
));
261 #define cpu_list cris_cpu_list
262 void cris_cpu_list(FILE *f
, fprintf_function cpu_fprintf
);
264 #include "exec/exec-all.h"