target-cris/cpu.c

   1 /*
   2  * QEMU CRIS CPU
   3  *
   4  * Copyright (c) 2008 AXIS Communications AB
   5  * Written by Edgar E. Iglesias.
   6  *
   7  * Copyright (c) 2012 SUSE LINUX Products GmbH
   8  *
   9  * This library is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU Lesser General Public
  11  * License as published by the Free Software Foundation; either
  12  * version 2.1 of the License, or (at your option) any later version.
  13  *
  14  * This library is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * Lesser General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU Lesser General Public
  20  * License along with this library; if not, see
  21  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "cpu.h"
  26 #include "qemu-common.h"
  27 #include "mmu.h"
  28
  29
  30 static void cris_cpu_set_pc(CPUState *cs, vaddr value)
  31 {
  32     CRISCPU *cpu = CRIS_CPU(cs);
  33
  34     cpu->env.pc = value;
  35 }
  36
  37 static bool cris_cpu_has_work(CPUState *cs)
  38 {
  39     return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
  40 }
  41
  42 /* CPUClass::reset() */
  43 static void cris_cpu_reset(CPUState *s)
  44 {
  45     CRISCPU *cpu = CRIS_CPU(s);
  46     CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu);
  47     CPUCRISState *env = &cpu->env;
  48     uint32_t vr;
  49
  50     ccc->parent_reset(s);
  51
  52     vr = env->pregs[PR_VR];
  53     memset(env, 0, offsetof(CPUCRISState, load_info));
  54     env->pregs[PR_VR] = vr;
  55     tlb_flush(s, 1);
  56
  57 #if defined(CONFIG_USER_ONLY)
  58     /* start in user mode with interrupts enabled.  */
  59     env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
  60 #else
  61     cris_mmu_init(env);
  62     env->pregs[PR_CCS] = 0;
  63 #endif
  64 }
  65
  66 static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
  67 {
  68     ObjectClass *oc;
  69     char *typename;
  70
  71     if (cpu_model == NULL) {
  72         return NULL;
  73     }
  74
  75 #if defined(CONFIG_USER_ONLY)
  76     if (strcasecmp(cpu_model, "any") == 0) {
  77         return object_class_by_name("crisv32-" TYPE_CRIS_CPU);
  78     }
  79 #endif
  80
  81     typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
  82     oc = object_class_by_name(typename);
  83     g_free(typename);
  84     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
  85                        object_class_is_abstract(oc))) {
  86         oc = NULL;
  87     }
  88     return oc;
  89 }
  90
  91 CRISCPU *cpu_cris_init(const char *cpu_model)
  92 {
  93     return CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
  94 }
  95
  96 /* Sort alphabetically by VR. */
  97 static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
  98 {
  99     CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a);
 100     CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b);
 101
 102     /*  */
 103     if (ccc_a->vr > ccc_b->vr) {
 104         return 1;
 105     } else if (ccc_a->vr < ccc_b->vr) {
 106         return -1;
 107     } else {
 108         return 0;
 109     }
 110 }
 111
 112 static void cris_cpu_list_entry(gpointer data, gpointer user_data)
 113 {
 114     ObjectClass *oc = data;
 115     CPUListState *s = user_data;
 116     const char *typename = object_class_get_name(oc);
 117     char *name;
 118
 119     name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
 120     (*s->cpu_fprintf)(s->file, "  %s\n", name);
 121     g_free(name);
 122 }
 123
 124 void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
 125 {
 126     CPUListState s = {
 127         .file = f,
 128         .cpu_fprintf = cpu_fprintf,
 129     };
 130     GSList *list;
 131
 132     list = object_class_get_list(TYPE_CRIS_CPU, false);
 133     list = g_slist_sort(list, cris_cpu_list_compare);
 134     (*cpu_fprintf)(f, "Available CPUs:\n");
 135     g_slist_foreach(list, cris_cpu_list_entry, &s);
 136     g_slist_free(list);
 137 }
 138
 139 static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
 140 {
 141     CPUState *cs = CPU(dev);
 142     CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
 143
 144     cpu_reset(cs);
 145     qemu_init_vcpu(cs);
 146
 147     ccc->parent_realize(dev, errp);
 148 }
 149
 150 #ifndef CONFIG_USER_ONLY
 151 static void cris_cpu_set_irq(void *opaque, int irq, int level)
 152 {
 153     CRISCPU *cpu = opaque;
 154     CPUState *cs = CPU(cpu);
 155     int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
 156
 157     if (level) {
 158         cpu_interrupt(cs, type);
 159     } else {
 160         cpu_reset_interrupt(cs, type);
 161     }
 162 }
 163 #endif
 164
 165 static void cris_disas_set_info(CPUState *cpu, disassemble_info *info)
 166 {
 167     CRISCPU *cc = CRIS_CPU(cpu);
 168     CPUCRISState *env = &cc->env;
 169
 170     if (env->pregs[PR_VR] != 32) {
 171         info->mach = bfd_mach_cris_v0_v10;
 172         info->print_insn = print_insn_crisv10;
 173     } else {
 174         info->mach = bfd_mach_cris_v32;
 175         info->print_insn = print_insn_crisv32;
 176     }
 177 }
 178
 179 static void cris_cpu_initfn(Object *obj)
 180 {
 181     CPUState *cs = CPU(obj);
 182     CRISCPU *cpu = CRIS_CPU(obj);
 183     CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj);
 184     CPUCRISState *env = &cpu->env;
 185     static bool tcg_initialized;
 186
 187     cs->env_ptr = env;
 188     cpu_exec_init(cs, &error_abort);
 189
 190     env->pregs[PR_VR] = ccc->vr;
 191
 192 #ifndef CONFIG_USER_ONLY
 193     /* IRQ and NMI lines.  */
 194     qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
 195 #endif
 196
 197     if (tcg_enabled() && !tcg_initialized) {
 198         tcg_initialized = true;
 199         if (env->pregs[PR_VR] < 32) {
 200             cris_initialize_crisv10_tcg();
 201         } else {
 202             cris_initialize_tcg();
 203         }
 204     }
 205 }
 206
 207 static void crisv8_cpu_class_init(ObjectClass *oc, void *data)
 208 {
 209     CPUClass *cc = CPU_CLASS(oc);
 210     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 211
 212     ccc->vr = 8;
 213     cc->do_interrupt = crisv10_cpu_do_interrupt;
 214     cc->gdb_read_register = crisv10_cpu_gdb_read_register;
 215 }
 216
 217 static void crisv9_cpu_class_init(ObjectClass *oc, void *data)
 218 {
 219     CPUClass *cc = CPU_CLASS(oc);
 220     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 221
 222     ccc->vr = 9;
 223     cc->do_interrupt = crisv10_cpu_do_interrupt;
 224     cc->gdb_read_register = crisv10_cpu_gdb_read_register;
 225 }
 226
 227 static void crisv10_cpu_class_init(ObjectClass *oc, void *data)
 228 {
 229     CPUClass *cc = CPU_CLASS(oc);
 230     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 231
 232     ccc->vr = 10;
 233     cc->do_interrupt = crisv10_cpu_do_interrupt;
 234     cc->gdb_read_register = crisv10_cpu_gdb_read_register;
 235 }
 236
 237 static void crisv11_cpu_class_init(ObjectClass *oc, void *data)
 238 {
 239     CPUClass *cc = CPU_CLASS(oc);
 240     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 241
 242     ccc->vr = 11;
 243     cc->do_interrupt = crisv10_cpu_do_interrupt;
 244     cc->gdb_read_register = crisv10_cpu_gdb_read_register;
 245 }
 246
 247 static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
 248 {
 249     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 250
 251     ccc->vr = 32;
 252 }
 253
 254 #define TYPE(model) model "-" TYPE_CRIS_CPU
 255
 256 static const TypeInfo cris_cpu_model_type_infos[] = {
 257     {
 258         .name = TYPE("crisv8"),
 259         .parent = TYPE_CRIS_CPU,
 260         .class_init = crisv8_cpu_class_init,
 261     }, {
 262         .name = TYPE("crisv9"),
 263         .parent = TYPE_CRIS_CPU,
 264         .class_init = crisv9_cpu_class_init,
 265     }, {
 266         .name = TYPE("crisv10"),
 267         .parent = TYPE_CRIS_CPU,
 268         .class_init = crisv10_cpu_class_init,
 269     }, {
 270         .name = TYPE("crisv11"),
 271         .parent = TYPE_CRIS_CPU,
 272         .class_init = crisv11_cpu_class_init,
 273     }, {
 274         .name = TYPE("crisv32"),
 275         .parent = TYPE_CRIS_CPU,
 276         .class_init = crisv32_cpu_class_init,
 277     }
 278 };
 279
 280 #undef TYPE
 281
 282 static void cris_cpu_class_init(ObjectClass *oc, void *data)
 283 {
 284     DeviceClass *dc = DEVICE_CLASS(oc);
 285     CPUClass *cc = CPU_CLASS(oc);
 286     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 287
 288     ccc->parent_realize = dc->realize;
 289     dc->realize = cris_cpu_realizefn;
 290
 291     ccc->parent_reset = cc->reset;
 292     cc->reset = cris_cpu_reset;
 293
 294     cc->class_by_name = cris_cpu_class_by_name;
 295     cc->has_work = cris_cpu_has_work;
 296     cc->do_interrupt = cris_cpu_do_interrupt;
 297     cc->cpu_exec_interrupt = cris_cpu_exec_interrupt;
 298     cc->dump_state = cris_cpu_dump_state;
 299     cc->set_pc = cris_cpu_set_pc;
 300     cc->gdb_read_register = cris_cpu_gdb_read_register;
 301     cc->gdb_write_register = cris_cpu_gdb_write_register;
 302 #ifdef CONFIG_USER_ONLY
 303     cc->handle_mmu_fault = cris_cpu_handle_mmu_fault;
 304 #else
 305     cc->get_phys_page_debug = cris_cpu_get_phys_page_debug;
 306     dc->vmsd = &vmstate_cris_cpu;
 307 #endif
 308
 309     cc->gdb_num_core_regs = 49;
 310     cc->gdb_stop_before_watchpoint = true;
 311
 312     cc->disas_set_info = cris_disas_set_info;
 313
 314     /*
 315      * Reason: cris_cpu_initfn() calls cpu_exec_init(), which saves
 316      * the object in cpus -> dangling pointer after final
 317      * object_unref().
 318      */
 319     dc->cannot_destroy_with_object_finalize_yet = true;
 320 }
 321
 322 static const TypeInfo cris_cpu_type_info = {
 323     .name = TYPE_CRIS_CPU,
 324     .parent = TYPE_CPU,
 325     .instance_size = sizeof(CRISCPU),
 326     .instance_init = cris_cpu_initfn,
 327     .abstract = true,
 328     .class_size = sizeof(CRISCPUClass),
 329     .class_init = cris_cpu_class_init,
 330 };
 331
 332 static void cris_cpu_register_types(void)
 333 {
 334     int i;
 335
 336     type_register_static(&cris_cpu_type_info);
 337     for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
 338         type_register_static(&cris_cpu_model_type_infos[i]);
 339     }
 340 }
 341
 342 type_init(cris_cpu_register_types)