hw/ppc/mac_oldworld.c

   1
   2 /*
   3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4  *
   5  * Copyright (c) 2004-2007 Fabrice Bellard
   6  * Copyright (c) 2007 Jocelyn Mayer
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26 #include "hw/hw.h"
  27 #include "hw/ppc/ppc.h"
  28 #include "mac.h"
  29 #include "hw/input/adb.h"
  30 #include "hw/timer/m48t59.h"
  31 #include "sysemu/sysemu.h"
  32 #include "net/net.h"
  33 #include "hw/isa/isa.h"
  34 #include "hw/pci/pci.h"
  35 #include "hw/boards.h"
  36 #include "hw/nvram/fw_cfg.h"
  37 #include "hw/char/escc.h"
  38 #include "hw/ide.h"
  39 #include "hw/loader.h"
  40 #include "elf.h"
  41 #include "sysemu/kvm.h"
  42 #include "kvm_ppc.h"
  43 #include "sysemu/blockdev.h"
  44 #include "exec/address-spaces.h"
  45
  46 #define MAX_IDE_BUS 2
  47 #define CFG_ADDR 0xf0000510
  48 #define TBFREQ 16600000UL
  49 #define CLOCKFREQ 266000000UL
  50 #define BUSFREQ 66000000UL
  51
  52 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
  53 {
  54     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  55     return 0;
  56 }
  57
  58
  59 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  60 {
  61     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  62 }
  63
  64 static hwaddr round_page(hwaddr addr)
  65 {
  66     return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
  67 }
  68
  69 static void ppc_heathrow_reset(void *opaque)
  70 {
  71     PowerPCCPU *cpu = opaque;
  72
  73     cpu_reset(CPU(cpu));
  74 }
  75
  76 static void ppc_heathrow_init(MachineState *machine)
  77 {
  78     ram_addr_t ram_size = machine->ram_size;
  79     const char *cpu_model = machine->cpu_model;
  80     const char *kernel_filename = machine->kernel_filename;
  81     const char *kernel_cmdline = machine->kernel_cmdline;
  82     const char *initrd_filename = machine->initrd_filename;
  83     const char *boot_device = machine->boot_order;
  84     MemoryRegion *sysmem = get_system_memory();
  85     PowerPCCPU *cpu = NULL;
  86     CPUPPCState *env = NULL;
  87     char *filename;
  88     qemu_irq *pic, **heathrow_irqs;
  89     int linux_boot, i;
  90     MemoryRegion *ram = g_new(MemoryRegion, 1);
  91     MemoryRegion *bios = g_new(MemoryRegion, 1);
  92     MemoryRegion *isa = g_new(MemoryRegion, 1);
  93     uint32_t kernel_base, initrd_base, cmdline_base = 0;
  94     int32_t kernel_size, initrd_size;
  95     PCIBus *pci_bus;
  96     PCIDevice *macio;
  97     MACIOIDEState *macio_ide;
  98     DeviceState *dev;
  99     BusState *adb_bus;
 100     int bios_size;
 101     MemoryRegion *pic_mem;
 102     MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
 103     uint16_t ppc_boot_device;
 104     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 105     void *fw_cfg;
 106     uint64_t tbfreq;
 107
 108     linux_boot = (kernel_filename != NULL);
 109
 110     /* init CPUs */
 111     if (cpu_model == NULL)
 112         cpu_model = "G3";
 113     for (i = 0; i < smp_cpus; i++) {
 114         cpu = cpu_ppc_init(cpu_model);
 115         if (cpu == NULL) {
 116             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 117             exit(1);
 118         }
 119         env = &cpu->env;
 120
 121         /* Set time-base frequency to 16.6 Mhz */
 122         cpu_ppc_tb_init(env,  TBFREQ);
 123         qemu_register_reset(ppc_heathrow_reset, cpu);
 124     }
 125
 126     /* allocate RAM */
 127     if (ram_size > (2047 << 20)) {
 128         fprintf(stderr,
 129                 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
 130                 ((unsigned int)ram_size / (1 << 20)));
 131         exit(1);
 132     }
 133
 134     memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
 135                                          ram_size);
 136     memory_region_add_subregion(sysmem, 0, ram);
 137
 138     /* allocate and load BIOS */
 139     memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
 140     vmstate_register_ram_global(bios);
 141
 142     if (bios_name == NULL)
 143         bios_name = PROM_FILENAME;
 144     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 145     memory_region_set_readonly(bios, true);
 146     memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 147
 148     /* Load OpenBIOS (ELF) */
 149     if (filename) {
 150         bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
 151                              1, ELF_MACHINE, 0);
 152         g_free(filename);
 153     } else {
 154         bios_size = -1;
 155     }
 156     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 157         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 158         exit(1);
 159     }
 160
 161     if (linux_boot) {
 162         uint64_t lowaddr = 0;
 163         int bswap_needed;
 164
 165 #ifdef BSWAP_NEEDED
 166         bswap_needed = 1;
 167 #else
 168         bswap_needed = 0;
 169 #endif
 170         kernel_base = KERNEL_LOAD_ADDR;
 171         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 172                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 173         if (kernel_size < 0)
 174             kernel_size = load_aout(kernel_filename, kernel_base,
 175                                     ram_size - kernel_base, bswap_needed,
 176                                     TARGET_PAGE_SIZE);
 177         if (kernel_size < 0)
 178             kernel_size = load_image_targphys(kernel_filename,
 179                                               kernel_base,
 180                                               ram_size - kernel_base);
 181         if (kernel_size < 0) {
 182             hw_error("qemu: could not load kernel '%s'\n",
 183                       kernel_filename);
 184             exit(1);
 185         }
 186         /* load initrd */
 187         if (initrd_filename) {
 188             initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 189             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 190                                               ram_size - initrd_base);
 191             if (initrd_size < 0) {
 192                 hw_error("qemu: could not load initial ram disk '%s'\n",
 193                          initrd_filename);
 194                 exit(1);
 195             }
 196             cmdline_base = round_page(initrd_base + initrd_size);
 197         } else {
 198             initrd_base = 0;
 199             initrd_size = 0;
 200             cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 201         }
 202         ppc_boot_device = 'm';
 203     } else {
 204         kernel_base = 0;
 205         kernel_size = 0;
 206         initrd_base = 0;
 207         initrd_size = 0;
 208         ppc_boot_device = '\0';
 209         for (i = 0; boot_device[i] != '\0'; i++) {
 210             /* TOFIX: for now, the second IDE channel is not properly
 211              *        used by OHW. The Mac floppy disk are not emulated.
 212              *        For now, OHW cannot boot from the network.
 213              */
 214 #if 0
 215             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 216                 ppc_boot_device = boot_device[i];
 217                 break;
 218             }
 219 #else
 220             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 221                 ppc_boot_device = boot_device[i];
 222                 break;
 223             }
 224 #endif
 225         }
 226         if (ppc_boot_device == '\0') {
 227             fprintf(stderr, "No valid boot device for G3 Beige machine\n");
 228             exit(1);
 229         }
 230     }
 231
 232     /* Register 2 MB of ISA IO space */
 233     memory_region_init_alias(isa, NULL, "isa_mmio",
 234                              get_system_io(), 0, 0x00200000);
 235     memory_region_add_subregion(sysmem, 0xfe000000, isa);
 236
 237     /* XXX: we register only 1 output pin for heathrow PIC */
 238     heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 239     heathrow_irqs[0] =
 240         g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
 241     /* Connect the heathrow PIC outputs to the 6xx bus */
 242     for (i = 0; i < smp_cpus; i++) {
 243         switch (PPC_INPUT(env)) {
 244         case PPC_FLAGS_INPUT_6xx:
 245             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 246             heathrow_irqs[i][0] =
 247                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 248             break;
 249         default:
 250             hw_error("Bus model not supported on OldWorld Mac machine\n");
 251         }
 252     }
 253
 254     /* Timebase Frequency */
 255     if (kvm_enabled()) {
 256         tbfreq = kvmppc_get_tbfreq();
 257     } else {
 258         tbfreq = TBFREQ;
 259     }
 260
 261     /* init basic PC hardware */
 262     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 263         hw_error("Only 6xx bus is supported on heathrow machine\n");
 264     }
 265     pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
 266     pci_bus = pci_grackle_init(0xfec00000, pic,
 267                                get_system_memory(),
 268                                get_system_io());
 269     pci_vga_init(pci_bus);
 270
 271     escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
 272                                serial_hds[1], ESCC_CLOCK, 4);
 273     memory_region_init_alias(escc_bar, NULL, "escc-bar",
 274                              escc_mem, 0, memory_region_size(escc_mem));
 275
 276     for(i = 0; i < nb_nics; i++)
 277         pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
 278
 279
 280     ide_drive_get(hd, MAX_IDE_BUS);
 281
 282     macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
 283     dev = DEVICE(macio);
 284     qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
 285     qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */
 286     qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */
 287     qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */
 288     qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */
 289     qdev_prop_set_uint64(dev, "frequency", tbfreq);
 290     macio_init(macio, pic_mem, escc_bar);
 291
 292     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 293                                                         "ide[0]"));
 294     macio_ide_init_drives(macio_ide, hd);
 295
 296     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 297                                                         "ide[1]"));
 298     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 299
 300     dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 301     adb_bus = qdev_get_child_bus(dev, "adb.0");
 302     dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 303     qdev_init_nofail(dev);
 304     dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 305     qdev_init_nofail(dev);
 306
 307     if (usb_enabled(false)) {
 308         pci_create_simple(pci_bus, -1, "pci-ohci");
 309     }
 310
 311     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 312         graphic_depth = 15;
 313
 314     /* No PCI init: the BIOS will do it */
 315
 316     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 317     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 318     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 319     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 320     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 321     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 322     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 323     if (kernel_cmdline) {
 324         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 325         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 326     } else {
 327         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 328     }
 329     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 330     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 331     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 332
 333     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 334     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 335     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 336
 337     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 338     if (kvm_enabled()) {
 339 #ifdef CONFIG_KVM
 340         uint8_t *hypercall;
 341
 342         hypercall = g_malloc(16);
 343         kvmppc_get_hypercall(env, hypercall, 16);
 344         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 345         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 346 #endif
 347     }
 348     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 349     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 350     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 351     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 352
 353     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 354 }
 355
 356 static int heathrow_kvm_type(const char *arg)
 357 {
 358     /* Always force PR KVM */
 359     return 2;
 360 }
 361
 362 static QEMUMachine heathrow_machine = {
 363     .name = "g3beige",
 364     .desc = "Heathrow based PowerMAC",
 365     .init = ppc_heathrow_init,
 366     .max_cpus = MAX_CPUS,
 367 #ifndef TARGET_PPC64
 368     .is_default = 1,
 369 #endif
 370     .default_boot_order = "cd", /* TOFIX "cad" when Mac floppy is implemented */
 371     .kvm_type = heathrow_kvm_type,
 372 };
 373
 374 static void heathrow_machine_init(void)
 375 {
 376     qemu_register_machine(&heathrow_machine);
 377 }
 378
 379 machine_init(heathrow_machine_init);