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vga: Remove some "should be done in BIOS" comments
[qemu/cris-port.git] / memory.c
blob30f77b2a6aad5c55b21332e7f1686caac3631d4c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 static unsigned memory_region_transaction_depth;
32 static bool memory_region_update_pending;
33 static bool ioeventfd_update_pending;
34 static bool global_dirty_log = false;
35
36 /* flat_view_mutex is taken around reading as->current_map; the critical
37 * section is extremely short, so I'm using a single mutex for every AS.
38 * We could also RCU for the read-side.
39 *
40 * The BQL is taken around transaction commits, hence both locks are taken
41 * while writing to as->current_map (with the BQL taken outside).
42 */
43 static QemuMutex flat_view_mutex;
44
45 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static void memory_init(void)
52 {
53 qemu_mutex_init(&flat_view_mutex);
54 }
55
56 typedef struct AddrRange AddrRange;
57
58 /*
59 * Note that signed integers are needed for negative offsetting in aliases
60 * (large MemoryRegion::alias_offset).
61 */
62 struct AddrRange {
63 Int128 start;
64 Int128 size;
65 };
66
67 static AddrRange addrrange_make(Int128 start, Int128 size)
68 {
69 return (AddrRange) { start, size };
70 }
71
72 static bool addrrange_equal(AddrRange r1, AddrRange r2)
73 {
74 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
75 }
76
77 static Int128 addrrange_end(AddrRange r)
78 {
79 return int128_add(r.start, r.size);
80 }
81
82 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
83 {
84 int128_addto(&range.start, delta);
85 return range;
86 }
87
88 static bool addrrange_contains(AddrRange range, Int128 addr)
89 {
90 return int128_ge(addr, range.start)
91 && int128_lt(addr, addrrange_end(range));
92 }
93
94 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
95 {
96 return addrrange_contains(r1, r2.start)
97 || addrrange_contains(r2, r1.start);
98 }
99
100 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
101 {
102 Int128 start = int128_max(r1.start, r2.start);
103 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
104 return addrrange_make(start, int128_sub(end, start));
105 }
106
107 enum ListenerDirection { Forward, Reverse };
108
109 static bool memory_listener_match(MemoryListener *listener,
110 MemoryRegionSection *section)
111 {
112 return !listener->address_space_filter
113 || listener->address_space_filter == section->address_space;
114 }
115
116 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
117 do { \
118 MemoryListener *_listener; \
119 \
120 switch (_direction) { \
121 case Forward: \
122 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
126 } \
127 break; \
128 case Reverse: \
129 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
130 memory_listeners, link) { \
131 if (_listener->_callback) { \
132 _listener->_callback(_listener, ##_args); \
133 } \
134 } \
135 break; \
136 default: \
137 abort(); \
138 } \
139 } while (0)
140
141 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
142 do { \
143 MemoryListener *_listener; \
144 \
145 switch (_direction) { \
146 case Forward: \
147 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 case Reverse: \
155 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
156 memory_listeners, link) { \
157 if (_listener->_callback \
158 && memory_listener_match(_listener, _section)) { \
159 _listener->_callback(_listener, _section, ##_args); \
160 } \
161 } \
162 break; \
163 default: \
164 abort(); \
165 } \
166 } while (0)
167
168 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
169 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
170 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
171 .mr = (fr)->mr, \
172 .address_space = (as), \
173 .offset_within_region = (fr)->offset_in_region, \
174 .size = (fr)->addr.size, \
175 .offset_within_address_space = int128_get64((fr)->addr.start), \
176 .readonly = (fr)->readonly, \
177 }))
178
179 struct CoalescedMemoryRange {
180 AddrRange addr;
181 QTAILQ_ENTRY(CoalescedMemoryRange) link;
182 };
183
184 struct MemoryRegionIoeventfd {
185 AddrRange addr;
186 bool match_data;
187 uint64_t data;
188 EventNotifier *e;
189 };
190
191 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
192 MemoryRegionIoeventfd b)
193 {
194 if (int128_lt(a.addr.start, b.addr.start)) {
195 return true;
196 } else if (int128_gt(a.addr.start, b.addr.start)) {
197 return false;
198 } else if (int128_lt(a.addr.size, b.addr.size)) {
199 return true;
200 } else if (int128_gt(a.addr.size, b.addr.size)) {
201 return false;
202 } else if (a.match_data < b.match_data) {
203 return true;
204 } else if (a.match_data > b.match_data) {
205 return false;
206 } else if (a.match_data) {
207 if (a.data < b.data) {
208 return true;
209 } else if (a.data > b.data) {
210 return false;
211 }
212 }
213 if (a.e < b.e) {
214 return true;
215 } else if (a.e > b.e) {
216 return false;
217 }
218 return false;
219 }
220
221 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
222 MemoryRegionIoeventfd b)
223 {
224 return !memory_region_ioeventfd_before(a, b)
225 && !memory_region_ioeventfd_before(b, a);
226 }
227
228 typedef struct FlatRange FlatRange;
229 typedef struct FlatView FlatView;
230
231 /* Range of memory in the global map. Addresses are absolute. */
232 struct FlatRange {
233 MemoryRegion *mr;
234 hwaddr offset_in_region;
235 AddrRange addr;
236 uint8_t dirty_log_mask;
237 bool romd_mode;
238 bool readonly;
239 };
240
241 /* Flattened global view of current active memory hierarchy. Kept in sorted
242 * order.
243 */
244 struct FlatView {
245 unsigned ref;
246 FlatRange *ranges;
247 unsigned nr;
248 unsigned nr_allocated;
249 };
250
251 typedef struct AddressSpaceOps AddressSpaceOps;
252
253 #define FOR_EACH_FLAT_RANGE(var, view) \
254 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
255
256 static bool flatrange_equal(FlatRange *a, FlatRange *b)
257 {
258 return a->mr == b->mr
259 && addrrange_equal(a->addr, b->addr)
260 && a->offset_in_region == b->offset_in_region
261 && a->romd_mode == b->romd_mode
262 && a->readonly == b->readonly;
263 }
264
265 static void flatview_init(FlatView *view)
266 {
267 view->ref = 1;
268 view->ranges = NULL;
269 view->nr = 0;
270 view->nr_allocated = 0;
271 }
272
273 /* Insert a range into a given position. Caller is responsible for maintaining
274 * sorting order.
275 */
276 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
277 {
278 if (view->nr == view->nr_allocated) {
279 view->nr_allocated = MAX(2 * view->nr, 10);
280 view->ranges = g_realloc(view->ranges,
281 view->nr_allocated * sizeof(*view->ranges));
282 }
283 memmove(view->ranges + pos + 1, view->ranges + pos,
284 (view->nr - pos) * sizeof(FlatRange));
285 view->ranges[pos] = *range;
286 memory_region_ref(range->mr);
287 ++view->nr;
288 }
289
290 static void flatview_destroy(FlatView *view)
291 {
292 int i;
293
294 for (i = 0; i < view->nr; i++) {
295 memory_region_unref(view->ranges[i].mr);
296 }
297 g_free(view->ranges);
298 g_free(view);
299 }
300
301 static void flatview_ref(FlatView *view)
302 {
303 atomic_inc(&view->ref);
304 }
305
306 static void flatview_unref(FlatView *view)
307 {
308 if (atomic_fetch_dec(&view->ref) == 1) {
309 flatview_destroy(view);
310 }
311 }
312
313 static bool can_merge(FlatRange *r1, FlatRange *r2)
314 {
315 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
316 && r1->mr == r2->mr
317 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
318 r1->addr.size),
319 int128_make64(r2->offset_in_region))
320 && r1->dirty_log_mask == r2->dirty_log_mask
321 && r1->romd_mode == r2->romd_mode
322 && r1->readonly == r2->readonly;
323 }
324
325 /* Attempt to simplify a view by merging adjacent ranges */
326 static void flatview_simplify(FlatView *view)
327 {
328 unsigned i, j;
329
330 i = 0;
331 while (i < view->nr) {
332 j = i + 1;
333 while (j < view->nr
334 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
335 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
336 ++j;
337 }
338 ++i;
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static bool memory_region_wrong_endianness(MemoryRegion *mr)
355 {
356 #ifdef TARGET_WORDS_BIGENDIAN
357 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
358 #else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360 #endif
361 }
362
363 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
364 {
365 if (memory_region_wrong_endianness(mr)) {
366 switch (size) {
367 case 1:
368 break;
369 case 2:
370 *data = bswap16(*data);
371 break;
372 case 4:
373 *data = bswap32(*data);
374 break;
375 case 8:
376 *data = bswap64(*data);
377 break;
378 default:
379 abort();
380 }
381 }
382 }
383
384 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
385 hwaddr addr,
386 uint64_t *value,
387 unsigned size,
388 unsigned shift,
389 uint64_t mask)
390 {
391 uint64_t tmp;
392
393 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
394 trace_memory_region_ops_read(mr, addr, tmp, size);
395 *value |= (tmp & mask) << shift;
396 }
397
398 static void memory_region_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask)
404 {
405 uint64_t tmp;
406
407 if (mr->flush_coalesced_mmio) {
408 qemu_flush_coalesced_mmio_buffer();
409 }
410 tmp = mr->ops->read(mr->opaque, addr, size);
411 trace_memory_region_ops_read(mr, addr, tmp, size);
412 *value |= (tmp & mask) << shift;
413 }
414
415 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
416 hwaddr addr,
417 uint64_t *value,
418 unsigned size,
419 unsigned shift,
420 uint64_t mask)
421 {
422 uint64_t tmp;
423
424 tmp = (*value >> shift) & mask;
425 trace_memory_region_ops_write(mr, addr, tmp, size);
426 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
427 }
428
429 static void memory_region_write_accessor(MemoryRegion *mr,
430 hwaddr addr,
431 uint64_t *value,
432 unsigned size,
433 unsigned shift,
434 uint64_t mask)
435 {
436 uint64_t tmp;
437
438 if (mr->flush_coalesced_mmio) {
439 qemu_flush_coalesced_mmio_buffer();
440 }
441 tmp = (*value >> shift) & mask;
442 trace_memory_region_ops_write(mr, addr, tmp, size);
443 mr->ops->write(mr->opaque, addr, tmp, size);
444 }
445
446 static void access_with_adjusted_size(hwaddr addr,
447 uint64_t *value,
448 unsigned size,
449 unsigned access_size_min,
450 unsigned access_size_max,
451 void (*access)(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask),
457 MemoryRegion *mr)
458 {
459 uint64_t access_mask;
460 unsigned access_size;
461 unsigned i;
462
463 if (!access_size_min) {
464 access_size_min = 1;
465 }
466 if (!access_size_max) {
467 access_size_max = 4;
468 }
469
470 /* FIXME: support unaligned access? */
471 access_size = MAX(MIN(size, access_size_max), access_size_min);
472 access_mask = -1ULL >> (64 - access_size * 8);
473 if (memory_region_big_endian(mr)) {
474 for (i = 0; i < size; i += access_size) {
475 access(mr, addr + i, value, access_size,
476 (size - access_size - i) * 8, access_mask);
477 }
478 } else {
479 for (i = 0; i < size; i += access_size) {
480 access(mr, addr + i, value, access_size, i * 8, access_mask);
481 }
482 }
483 }
484
485 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
486 {
487 AddressSpace *as;
488
489 while (mr->container) {
490 mr = mr->container;
491 }
492 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
493 if (mr == as->root) {
494 return as;
495 }
496 }
497 return NULL;
498 }
499
500 /* Render a memory region into the global view. Ranges in @view obscure
501 * ranges in @mr.
502 */
503 static void render_memory_region(FlatView *view,
504 MemoryRegion *mr,
505 Int128 base,
506 AddrRange clip,
507 bool readonly)
508 {
509 MemoryRegion *subregion;
510 unsigned i;
511 hwaddr offset_in_region;
512 Int128 remain;
513 Int128 now;
514 FlatRange fr;
515 AddrRange tmp;
516
517 if (!mr->enabled) {
518 return;
519 }
520
521 int128_addto(&base, int128_make64(mr->addr));
522 readonly |= mr->readonly;
523
524 tmp = addrrange_make(base, mr->size);
525
526 if (!addrrange_intersects(tmp, clip)) {
527 return;
528 }
529
530 clip = addrrange_intersection(tmp, clip);
531
532 if (mr->alias) {
533 int128_subfrom(&base, int128_make64(mr->alias->addr));
534 int128_subfrom(&base, int128_make64(mr->alias_offset));
535 render_memory_region(view, mr->alias, base, clip, readonly);
536 return;
537 }
538
539 /* Render subregions in priority order. */
540 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
541 render_memory_region(view, subregion, base, clip, readonly);
542 }
543
544 if (!mr->terminates) {
545 return;
546 }
547
548 offset_in_region = int128_get64(int128_sub(clip.start, base));
549 base = clip.start;
550 remain = clip.size;
551
552 fr.mr = mr;
553 fr.dirty_log_mask = mr->dirty_log_mask;
554 fr.romd_mode = mr->romd_mode;
555 fr.readonly = readonly;
556
557 /* Render the region itself into any gaps left by the current view. */
558 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
559 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
560 continue;
561 }
562 if (int128_lt(base, view->ranges[i].addr.start)) {
563 now = int128_min(remain,
564 int128_sub(view->ranges[i].addr.start, base));
565 fr.offset_in_region = offset_in_region;
566 fr.addr = addrrange_make(base, now);
567 flatview_insert(view, i, &fr);
568 ++i;
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
572 }
573 now = int128_sub(int128_min(int128_add(base, remain),
574 addrrange_end(view->ranges[i].addr)),
575 base);
576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
579 }
580 if (int128_nz(remain)) {
581 fr.offset_in_region = offset_in_region;
582 fr.addr = addrrange_make(base, remain);
583 flatview_insert(view, i, &fr);
584 }
585 }
586
587 /* Render a memory topology into a list of disjoint absolute ranges. */
588 static FlatView *generate_memory_topology(MemoryRegion *mr)
589 {
590 FlatView *view;
591
592 view = g_new(FlatView, 1);
593 flatview_init(view);
594
595 if (mr) {
596 render_memory_region(view, mr, int128_zero(),
597 addrrange_make(int128_zero(), int128_2_64()), false);
598 }
599 flatview_simplify(view);
600
601 return view;
602 }
603
604 static void address_space_add_del_ioeventfds(AddressSpace *as,
605 MemoryRegionIoeventfd *fds_new,
606 unsigned fds_new_nb,
607 MemoryRegionIoeventfd *fds_old,
608 unsigned fds_old_nb)
609 {
610 unsigned iold, inew;
611 MemoryRegionIoeventfd *fd;
612 MemoryRegionSection section;
613
614 /* Generate a symmetric difference of the old and new fd sets, adding
615 * and deleting as necessary.
616 */
617
618 iold = inew = 0;
619 while (iold < fds_old_nb || inew < fds_new_nb) {
620 if (iold < fds_old_nb
621 && (inew == fds_new_nb
622 || memory_region_ioeventfd_before(fds_old[iold],
623 fds_new[inew]))) {
624 fd = &fds_old[iold];
625 section = (MemoryRegionSection) {
626 .address_space = as,
627 .offset_within_address_space = int128_get64(fd->addr.start),
628 .size = fd->addr.size,
629 };
630 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
631 fd->match_data, fd->data, fd->e);
632 ++iold;
633 } else if (inew < fds_new_nb
634 && (iold == fds_old_nb
635 || memory_region_ioeventfd_before(fds_new[inew],
636 fds_old[iold]))) {
637 fd = &fds_new[inew];
638 section = (MemoryRegionSection) {
639 .address_space = as,
640 .offset_within_address_space = int128_get64(fd->addr.start),
641 .size = fd->addr.size,
642 };
643 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
644 fd->match_data, fd->data, fd->e);
645 ++inew;
646 } else {
647 ++iold;
648 ++inew;
649 }
650 }
651 }
652
653 static FlatView *address_space_get_flatview(AddressSpace *as)
654 {
655 FlatView *view;
656
657 qemu_mutex_lock(&flat_view_mutex);
658 view = as->current_map;
659 flatview_ref(view);
660 qemu_mutex_unlock(&flat_view_mutex);
661 return view;
662 }
663
664 static void address_space_update_ioeventfds(AddressSpace *as)
665 {
666 FlatView *view;
667 FlatRange *fr;
668 unsigned ioeventfd_nb = 0;
669 MemoryRegionIoeventfd *ioeventfds = NULL;
670 AddrRange tmp;
671 unsigned i;
672
673 view = address_space_get_flatview(as);
674 FOR_EACH_FLAT_RANGE(fr, view) {
675 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
676 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
677 int128_sub(fr->addr.start,
678 int128_make64(fr->offset_in_region)));
679 if (addrrange_intersects(fr->addr, tmp)) {
680 ++ioeventfd_nb;
681 ioeventfds = g_realloc(ioeventfds,
682 ioeventfd_nb * sizeof(*ioeventfds));
683 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
684 ioeventfds[ioeventfd_nb-1].addr = tmp;
685 }
686 }
687 }
688
689 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
690 as->ioeventfds, as->ioeventfd_nb);
691
692 g_free(as->ioeventfds);
693 as->ioeventfds = ioeventfds;
694 as->ioeventfd_nb = ioeventfd_nb;
695 flatview_unref(view);
696 }
697
698 static void address_space_update_topology_pass(AddressSpace *as,
699 const FlatView *old_view,
700 const FlatView *new_view,
701 bool adding)
702 {
703 unsigned iold, inew;
704 FlatRange *frold, *frnew;
705
706 /* Generate a symmetric difference of the old and new memory maps.
707 * Kill ranges in the old map, and instantiate ranges in the new map.
708 */
709 iold = inew = 0;
710 while (iold < old_view->nr || inew < new_view->nr) {
711 if (iold < old_view->nr) {
712 frold = &old_view->ranges[iold];
713 } else {
714 frold = NULL;
715 }
716 if (inew < new_view->nr) {
717 frnew = &new_view->ranges[inew];
718 } else {
719 frnew = NULL;
720 }
721
722 if (frold
723 && (!frnew
724 || int128_lt(frold->addr.start, frnew->addr.start)
725 || (int128_eq(frold->addr.start, frnew->addr.start)
726 && !flatrange_equal(frold, frnew)))) {
727 /* In old but not in new, or in both but attributes changed. */
728
729 if (!adding) {
730 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
731 }
732
733 ++iold;
734 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
735 /* In both and unchanged (except logging may have changed) */
736
737 if (adding) {
738 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
739 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
740 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
741 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
742 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
743 }
744 }
745
746 ++iold;
747 ++inew;
748 } else {
749 /* In new */
750
751 if (adding) {
752 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
753 }
754
755 ++inew;
756 }
757 }
758 }
759
760
761 static void address_space_update_topology(AddressSpace *as)
762 {
763 FlatView *old_view = address_space_get_flatview(as);
764 FlatView *new_view = generate_memory_topology(as->root);
765
766 address_space_update_topology_pass(as, old_view, new_view, false);
767 address_space_update_topology_pass(as, old_view, new_view, true);
768
769 qemu_mutex_lock(&flat_view_mutex);
770 flatview_unref(as->current_map);
771 as->current_map = new_view;
772 qemu_mutex_unlock(&flat_view_mutex);
773
774 /* Note that all the old MemoryRegions are still alive up to this
775 * point. This relieves most MemoryListeners from the need to
776 * ref/unref the MemoryRegions they get---unless they use them
777 * outside the iothread mutex, in which case precise reference
778 * counting is necessary.
779 */
780 flatview_unref(old_view);
781
782 address_space_update_ioeventfds(as);
783 }
784
785 void memory_region_transaction_begin(void)
786 {
787 qemu_flush_coalesced_mmio_buffer();
788 ++memory_region_transaction_depth;
789 }
790
791 static void memory_region_clear_pending(void)
792 {
793 memory_region_update_pending = false;
794 ioeventfd_update_pending = false;
795 }
796
797 void memory_region_transaction_commit(void)
798 {
799 AddressSpace *as;
800
801 assert(memory_region_transaction_depth);
802 --memory_region_transaction_depth;
803 if (!memory_region_transaction_depth) {
804 if (memory_region_update_pending) {
805 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
806
807 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
808 address_space_update_topology(as);
809 }
810
811 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
812 } else if (ioeventfd_update_pending) {
813 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
814 address_space_update_ioeventfds(as);
815 }
816 }
817 memory_region_clear_pending();
818 }
819 }
820
821 static void memory_region_destructor_none(MemoryRegion *mr)
822 {
823 }
824
825 static void memory_region_destructor_ram(MemoryRegion *mr)
826 {
827 qemu_ram_free(mr->ram_addr);
828 }
829
830 static void memory_region_destructor_alias(MemoryRegion *mr)
831 {
832 memory_region_unref(mr->alias);
833 }
834
835 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
836 {
837 qemu_ram_free_from_ptr(mr->ram_addr);
838 }
839
840 static void memory_region_destructor_rom_device(MemoryRegion *mr)
841 {
842 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
843 }
844
845 static bool memory_region_need_escape(char c)
846 {
847 return c == '/' || c == '[' || c == '\\' || c == ']';
848 }
849
850 static char *memory_region_escape_name(const char *name)
851 {
852 const char *p;
853 char *escaped, *q;
854 uint8_t c;
855 size_t bytes = 0;
856
857 for (p = name; *p; p++) {
858 bytes += memory_region_need_escape(*p) ? 4 : 1;
859 }
860 if (bytes == p - name) {
861 return g_memdup(name, bytes + 1);
862 }
863
864 escaped = g_malloc(bytes + 1);
865 for (p = name, q = escaped; *p; p++) {
866 c = *p;
867 if (unlikely(memory_region_need_escape(c))) {
868 *q++ = '\\';
869 *q++ = 'x';
870 *q++ = "0123456789abcdef"[c >> 4];
871 c = "0123456789abcdef"[c & 15];
872 }
873 *q++ = c;
874 }
875 *q = 0;
876 return escaped;
877 }
878
879 void memory_region_init(MemoryRegion *mr,
880 Object *owner,
881 const char *name,
882 uint64_t size)
883 {
884 if (!owner) {
885 owner = qdev_get_machine();
886 }
887
888 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
889 mr->size = int128_make64(size);
890 if (size == UINT64_MAX) {
891 mr->size = int128_2_64();
892 }
893 mr->name = g_strdup(name);
894
895 if (name) {
896 char *escaped_name = memory_region_escape_name(name);
897 char *name_array = g_strdup_printf("%s[*]", escaped_name);
898 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
899 object_unref(OBJECT(mr));
900 g_free(name_array);
901 g_free(escaped_name);
902 }
903 }
904
905 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
906 const char *name, Error **errp)
907 {
908 MemoryRegion *mr = MEMORY_REGION(obj);
909 uint64_t value = mr->addr;
910
911 visit_type_uint64(v, &value, name, errp);
912 }
913
914 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
915 const char *name, Error **errp)
916 {
917 MemoryRegion *mr = MEMORY_REGION(obj);
918 gchar *path = (gchar *)"";
919
920 if (mr->container) {
921 path = object_get_canonical_path(OBJECT(mr->container));
922 }
923 visit_type_str(v, &path, name, errp);
924 if (mr->container) {
925 g_free(path);
926 }
927 }
928
929 static Object *memory_region_resolve_container(Object *obj, void *opaque,
930 const char *part)
931 {
932 MemoryRegion *mr = MEMORY_REGION(obj);
933
934 return OBJECT(mr->container);
935 }
936
937 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
938 const char *name, Error **errp)
939 {
940 MemoryRegion *mr = MEMORY_REGION(obj);
941 int32_t value = mr->priority;
942
943 visit_type_int32(v, &value, name, errp);
944 }
945
946 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
947 {
948 MemoryRegion *mr = MEMORY_REGION(obj);
949
950 return mr->may_overlap;
951 }
952
953 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
954 const char *name, Error **errp)
955 {
956 MemoryRegion *mr = MEMORY_REGION(obj);
957 uint64_t value = memory_region_size(mr);
958
959 visit_type_uint64(v, &value, name, errp);
960 }
961
962 static void memory_region_initfn(Object *obj)
963 {
964 MemoryRegion *mr = MEMORY_REGION(obj);
965 ObjectProperty *op;
966
967 mr->ops = &unassigned_mem_ops;
968 mr->enabled = true;
969 mr->romd_mode = true;
970 mr->destructor = memory_region_destructor_none;
971 QTAILQ_INIT(&mr->subregions);
972 QTAILQ_INIT(&mr->coalesced);
973
974 op = object_property_add(OBJECT(mr), "container",
975 "link<" TYPE_MEMORY_REGION ">",
976 memory_region_get_container,
977 NULL, /* memory_region_set_container */
978 NULL, NULL, &error_abort);
979 op->resolve = memory_region_resolve_container;
980
981 object_property_add(OBJECT(mr), "addr", "uint64",
982 memory_region_get_addr,
983 NULL, /* memory_region_set_addr */
984 NULL, NULL, &error_abort);
985 object_property_add(OBJECT(mr), "priority", "uint32",
986 memory_region_get_priority,
987 NULL, /* memory_region_set_priority */
988 NULL, NULL, &error_abort);
989 object_property_add_bool(OBJECT(mr), "may-overlap",
990 memory_region_get_may_overlap,
991 NULL, /* memory_region_set_may_overlap */
992 &error_abort);
993 object_property_add(OBJECT(mr), "size", "uint64",
994 memory_region_get_size,
995 NULL, /* memory_region_set_size, */
996 NULL, NULL, &error_abort);
997 }
998
999 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1000 unsigned size)
1001 {
1002 #ifdef DEBUG_UNASSIGNED
1003 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1004 #endif
1005 if (current_cpu != NULL) {
1006 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1007 }
1008 return 0;
1009 }
1010
1011 static void unassigned_mem_write(void *opaque, hwaddr addr,
1012 uint64_t val, unsigned size)
1013 {
1014 #ifdef DEBUG_UNASSIGNED
1015 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1016 #endif
1017 if (current_cpu != NULL) {
1018 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1019 }
1020 }
1021
1022 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1023 unsigned size, bool is_write)
1024 {
1025 return false;
1026 }
1027
1028 const MemoryRegionOps unassigned_mem_ops = {
1029 .valid.accepts = unassigned_mem_accepts,
1030 .endianness = DEVICE_NATIVE_ENDIAN,
1031 };
1032
1033 bool memory_region_access_valid(MemoryRegion *mr,
1034 hwaddr addr,
1035 unsigned size,
1036 bool is_write)
1037 {
1038 int access_size_min, access_size_max;
1039 int access_size, i;
1040
1041 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1042 return false;
1043 }
1044
1045 if (!mr->ops->valid.accepts) {
1046 return true;
1047 }
1048
1049 access_size_min = mr->ops->valid.min_access_size;
1050 if (!mr->ops->valid.min_access_size) {
1051 access_size_min = 1;
1052 }
1053
1054 access_size_max = mr->ops->valid.max_access_size;
1055 if (!mr->ops->valid.max_access_size) {
1056 access_size_max = 4;
1057 }
1058
1059 access_size = MAX(MIN(size, access_size_max), access_size_min);
1060 for (i = 0; i < size; i += access_size) {
1061 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1062 is_write)) {
1063 return false;
1064 }
1065 }
1066
1067 return true;
1068 }
1069
1070 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
1071 hwaddr addr,
1072 unsigned size)
1073 {
1074 uint64_t data = 0;
1075
1076 if (mr->ops->read) {
1077 access_with_adjusted_size(addr, &data, size,
1078 mr->ops->impl.min_access_size,
1079 mr->ops->impl.max_access_size,
1080 memory_region_read_accessor, mr);
1081 } else {
1082 access_with_adjusted_size(addr, &data, size, 1, 4,
1083 memory_region_oldmmio_read_accessor, mr);
1084 }
1085
1086 return data;
1087 }
1088
1089 static bool memory_region_dispatch_read(MemoryRegion *mr,
1090 hwaddr addr,
1091 uint64_t *pval,
1092 unsigned size)
1093 {
1094 if (!memory_region_access_valid(mr, addr, size, false)) {
1095 *pval = unassigned_mem_read(mr, addr, size);
1096 return true;
1097 }
1098
1099 *pval = memory_region_dispatch_read1(mr, addr, size);
1100 adjust_endianness(mr, pval, size);
1101 return false;
1102 }
1103
1104 static bool memory_region_dispatch_write(MemoryRegion *mr,
1105 hwaddr addr,
1106 uint64_t data,
1107 unsigned size)
1108 {
1109 if (!memory_region_access_valid(mr, addr, size, true)) {
1110 unassigned_mem_write(mr, addr, data, size);
1111 return true;
1112 }
1113
1114 adjust_endianness(mr, &data, size);
1115
1116 if (mr->ops->write) {
1117 access_with_adjusted_size(addr, &data, size,
1118 mr->ops->impl.min_access_size,
1119 mr->ops->impl.max_access_size,
1120 memory_region_write_accessor, mr);
1121 } else {
1122 access_with_adjusted_size(addr, &data, size, 1, 4,
1123 memory_region_oldmmio_write_accessor, mr);
1124 }
1125 return false;
1126 }
1127
1128 void memory_region_init_io(MemoryRegion *mr,
1129 Object *owner,
1130 const MemoryRegionOps *ops,
1131 void *opaque,
1132 const char *name,
1133 uint64_t size)
1134 {
1135 memory_region_init(mr, owner, name, size);
1136 mr->ops = ops;
1137 mr->opaque = opaque;
1138 mr->terminates = true;
1139 mr->ram_addr = ~(ram_addr_t)0;
1140 }
1141
1142 void memory_region_init_ram(MemoryRegion *mr,
1143 Object *owner,
1144 const char *name,
1145 uint64_t size,
1146 Error **errp)
1147 {
1148 memory_region_init(mr, owner, name, size);
1149 mr->ram = true;
1150 mr->terminates = true;
1151 mr->destructor = memory_region_destructor_ram;
1152 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1153 }
1154
1155 #ifdef __linux__
1156 void memory_region_init_ram_from_file(MemoryRegion *mr,
1157 struct Object *owner,
1158 const char *name,
1159 uint64_t size,
1160 bool share,
1161 const char *path,
1162 Error **errp)
1163 {
1164 memory_region_init(mr, owner, name, size);
1165 mr->ram = true;
1166 mr->terminates = true;
1167 mr->destructor = memory_region_destructor_ram;
1168 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1169 }
1170 #endif
1171
1172 void memory_region_init_ram_ptr(MemoryRegion *mr,
1173 Object *owner,
1174 const char *name,
1175 uint64_t size,
1176 void *ptr)
1177 {
1178 memory_region_init(mr, owner, name, size);
1179 mr->ram = true;
1180 mr->terminates = true;
1181 mr->destructor = memory_region_destructor_ram_from_ptr;
1182
1183 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1184 assert(ptr != NULL);
1185 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1186 }
1187
1188 void memory_region_init_alias(MemoryRegion *mr,
1189 Object *owner,
1190 const char *name,
1191 MemoryRegion *orig,
1192 hwaddr offset,
1193 uint64_t size)
1194 {
1195 memory_region_init(mr, owner, name, size);
1196 memory_region_ref(orig);
1197 mr->destructor = memory_region_destructor_alias;
1198 mr->alias = orig;
1199 mr->alias_offset = offset;
1200 }
1201
1202 void memory_region_init_rom_device(MemoryRegion *mr,
1203 Object *owner,
1204 const MemoryRegionOps *ops,
1205 void *opaque,
1206 const char *name,
1207 uint64_t size,
1208 Error **errp)
1209 {
1210 memory_region_init(mr, owner, name, size);
1211 mr->ops = ops;
1212 mr->opaque = opaque;
1213 mr->terminates = true;
1214 mr->rom_device = true;
1215 mr->destructor = memory_region_destructor_rom_device;
1216 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1217 }
1218
1219 void memory_region_init_iommu(MemoryRegion *mr,
1220 Object *owner,
1221 const MemoryRegionIOMMUOps *ops,
1222 const char *name,
1223 uint64_t size)
1224 {
1225 memory_region_init(mr, owner, name, size);
1226 mr->iommu_ops = ops,
1227 mr->terminates = true; /* then re-forwards */
1228 notifier_list_init(&mr->iommu_notify);
1229 }
1230
1231 void memory_region_init_reservation(MemoryRegion *mr,
1232 Object *owner,
1233 const char *name,
1234 uint64_t size)
1235 {
1236 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1237 }
1238
1239 static void memory_region_finalize(Object *obj)
1240 {
1241 MemoryRegion *mr = MEMORY_REGION(obj);
1242
1243 assert(QTAILQ_EMPTY(&mr->subregions));
1244 assert(memory_region_transaction_depth == 0);
1245 mr->destructor(mr);
1246 memory_region_clear_coalescing(mr);
1247 g_free((char *)mr->name);
1248 g_free(mr->ioeventfds);
1249 }
1250
1251 Object *memory_region_owner(MemoryRegion *mr)
1252 {
1253 Object *obj = OBJECT(mr);
1254 return obj->parent;
1255 }
1256
1257 void memory_region_ref(MemoryRegion *mr)
1258 {
1259 /* MMIO callbacks most likely will access data that belongs
1260 * to the owner, hence the need to ref/unref the owner whenever
1261 * the memory region is in use.
1262 *
1263 * The memory region is a child of its owner. As long as the
1264 * owner doesn't call unparent itself on the memory region,
1265 * ref-ing the owner will also keep the memory region alive.
1266 * Memory regions without an owner are supposed to never go away,
1267 * but we still ref/unref them for debugging purposes.
1268 */
1269 Object *obj = OBJECT(mr);
1270 if (obj && obj->parent) {
1271 object_ref(obj->parent);
1272 } else {
1273 object_ref(obj);
1274 }
1275 }
1276
1277 void memory_region_unref(MemoryRegion *mr)
1278 {
1279 Object *obj = OBJECT(mr);
1280 if (obj && obj->parent) {
1281 object_unref(obj->parent);
1282 } else {
1283 object_unref(obj);
1284 }
1285 }
1286
1287 uint64_t memory_region_size(MemoryRegion *mr)
1288 {
1289 if (int128_eq(mr->size, int128_2_64())) {
1290 return UINT64_MAX;
1291 }
1292 return int128_get64(mr->size);
1293 }
1294
1295 const char *memory_region_name(const MemoryRegion *mr)
1296 {
1297 if (!mr->name) {
1298 ((MemoryRegion *)mr)->name =
1299 object_get_canonical_path_component(OBJECT(mr));
1300 }
1301 return mr->name;
1302 }
1303
1304 bool memory_region_is_ram(MemoryRegion *mr)
1305 {
1306 return mr->ram;
1307 }
1308
1309 bool memory_region_is_logging(MemoryRegion *mr)
1310 {
1311 return mr->dirty_log_mask;
1312 }
1313
1314 bool memory_region_is_rom(MemoryRegion *mr)
1315 {
1316 return mr->ram && mr->readonly;
1317 }
1318
1319 bool memory_region_is_iommu(MemoryRegion *mr)
1320 {
1321 return mr->iommu_ops;
1322 }
1323
1324 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1325 {
1326 notifier_list_add(&mr->iommu_notify, n);
1327 }
1328
1329 void memory_region_unregister_iommu_notifier(Notifier *n)
1330 {
1331 notifier_remove(n);
1332 }
1333
1334 void memory_region_notify_iommu(MemoryRegion *mr,
1335 IOMMUTLBEntry entry)
1336 {
1337 assert(memory_region_is_iommu(mr));
1338 notifier_list_notify(&mr->iommu_notify, &entry);
1339 }
1340
1341 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1342 {
1343 uint8_t mask = 1 << client;
1344
1345 memory_region_transaction_begin();
1346 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1347 memory_region_update_pending |= mr->enabled;
1348 memory_region_transaction_commit();
1349 }
1350
1351 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1352 hwaddr size, unsigned client)
1353 {
1354 assert(mr->terminates);
1355 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1356 }
1357
1358 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1359 hwaddr size)
1360 {
1361 assert(mr->terminates);
1362 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1363 }
1364
1365 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1366 hwaddr size, unsigned client)
1367 {
1368 bool ret;
1369 assert(mr->terminates);
1370 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1371 if (ret) {
1372 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1373 }
1374 return ret;
1375 }
1376
1377
1378 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1379 {
1380 AddressSpace *as;
1381 FlatRange *fr;
1382
1383 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1384 FlatView *view = address_space_get_flatview(as);
1385 FOR_EACH_FLAT_RANGE(fr, view) {
1386 if (fr->mr == mr) {
1387 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1388 }
1389 }
1390 flatview_unref(view);
1391 }
1392 }
1393
1394 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1395 {
1396 if (mr->readonly != readonly) {
1397 memory_region_transaction_begin();
1398 mr->readonly = readonly;
1399 memory_region_update_pending |= mr->enabled;
1400 memory_region_transaction_commit();
1401 }
1402 }
1403
1404 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1405 {
1406 if (mr->romd_mode != romd_mode) {
1407 memory_region_transaction_begin();
1408 mr->romd_mode = romd_mode;
1409 memory_region_update_pending |= mr->enabled;
1410 memory_region_transaction_commit();
1411 }
1412 }
1413
1414 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1415 hwaddr size, unsigned client)
1416 {
1417 assert(mr->terminates);
1418 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1419 }
1420
1421 int memory_region_get_fd(MemoryRegion *mr)
1422 {
1423 if (mr->alias) {
1424 return memory_region_get_fd(mr->alias);
1425 }
1426
1427 assert(mr->terminates);
1428
1429 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1430 }
1431
1432 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1433 {
1434 if (mr->alias) {
1435 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1436 }
1437
1438 assert(mr->terminates);
1439
1440 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1441 }
1442
1443 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1444 {
1445 FlatView *view;
1446 FlatRange *fr;
1447 CoalescedMemoryRange *cmr;
1448 AddrRange tmp;
1449 MemoryRegionSection section;
1450
1451 view = address_space_get_flatview(as);
1452 FOR_EACH_FLAT_RANGE(fr, view) {
1453 if (fr->mr == mr) {
1454 section = (MemoryRegionSection) {
1455 .address_space = as,
1456 .offset_within_address_space = int128_get64(fr->addr.start),
1457 .size = fr->addr.size,
1458 };
1459
1460 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1461 int128_get64(fr->addr.start),
1462 int128_get64(fr->addr.size));
1463 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1464 tmp = addrrange_shift(cmr->addr,
1465 int128_sub(fr->addr.start,
1466 int128_make64(fr->offset_in_region)));
1467 if (!addrrange_intersects(tmp, fr->addr)) {
1468 continue;
1469 }
1470 tmp = addrrange_intersection(tmp, fr->addr);
1471 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1472 int128_get64(tmp.start),
1473 int128_get64(tmp.size));
1474 }
1475 }
1476 }
1477 flatview_unref(view);
1478 }
1479
1480 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1481 {
1482 AddressSpace *as;
1483
1484 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1485 memory_region_update_coalesced_range_as(mr, as);
1486 }
1487 }
1488
1489 void memory_region_set_coalescing(MemoryRegion *mr)
1490 {
1491 memory_region_clear_coalescing(mr);
1492 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1493 }
1494
1495 void memory_region_add_coalescing(MemoryRegion *mr,
1496 hwaddr offset,
1497 uint64_t size)
1498 {
1499 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1500
1501 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1502 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1503 memory_region_update_coalesced_range(mr);
1504 memory_region_set_flush_coalesced(mr);
1505 }
1506
1507 void memory_region_clear_coalescing(MemoryRegion *mr)
1508 {
1509 CoalescedMemoryRange *cmr;
1510 bool updated = false;
1511
1512 qemu_flush_coalesced_mmio_buffer();
1513 mr->flush_coalesced_mmio = false;
1514
1515 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1516 cmr = QTAILQ_FIRST(&mr->coalesced);
1517 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1518 g_free(cmr);
1519 updated = true;
1520 }
1521
1522 if (updated) {
1523 memory_region_update_coalesced_range(mr);
1524 }
1525 }
1526
1527 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1528 {
1529 mr->flush_coalesced_mmio = true;
1530 }
1531
1532 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1533 {
1534 qemu_flush_coalesced_mmio_buffer();
1535 if (QTAILQ_EMPTY(&mr->coalesced)) {
1536 mr->flush_coalesced_mmio = false;
1537 }
1538 }
1539
1540 void memory_region_add_eventfd(MemoryRegion *mr,
1541 hwaddr addr,
1542 unsigned size,
1543 bool match_data,
1544 uint64_t data,
1545 EventNotifier *e)
1546 {
1547 MemoryRegionIoeventfd mrfd = {
1548 .addr.start = int128_make64(addr),
1549 .addr.size = int128_make64(size),
1550 .match_data = match_data,
1551 .data = data,
1552 .e = e,
1553 };
1554 unsigned i;
1555
1556 adjust_endianness(mr, &mrfd.data, size);
1557 memory_region_transaction_begin();
1558 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1559 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1560 break;
1561 }
1562 }
1563 ++mr->ioeventfd_nb;
1564 mr->ioeventfds = g_realloc(mr->ioeventfds,
1565 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1566 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1567 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1568 mr->ioeventfds[i] = mrfd;
1569 ioeventfd_update_pending |= mr->enabled;
1570 memory_region_transaction_commit();
1571 }
1572
1573 void memory_region_del_eventfd(MemoryRegion *mr,
1574 hwaddr addr,
1575 unsigned size,
1576 bool match_data,
1577 uint64_t data,
1578 EventNotifier *e)
1579 {
1580 MemoryRegionIoeventfd mrfd = {
1581 .addr.start = int128_make64(addr),
1582 .addr.size = int128_make64(size),
1583 .match_data = match_data,
1584 .data = data,
1585 .e = e,
1586 };
1587 unsigned i;
1588
1589 adjust_endianness(mr, &mrfd.data, size);
1590 memory_region_transaction_begin();
1591 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1592 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1593 break;
1594 }
1595 }
1596 assert(i != mr->ioeventfd_nb);
1597 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1598 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1599 --mr->ioeventfd_nb;
1600 mr->ioeventfds = g_realloc(mr->ioeventfds,
1601 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1602 ioeventfd_update_pending |= mr->enabled;
1603 memory_region_transaction_commit();
1604 }
1605
1606 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1607 {
1608 hwaddr offset = subregion->addr;
1609 MemoryRegion *mr = subregion->container;
1610 MemoryRegion *other;
1611
1612 memory_region_transaction_begin();
1613
1614 memory_region_ref(subregion);
1615 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1616 if (subregion->may_overlap || other->may_overlap) {
1617 continue;
1618 }
1619 if (int128_ge(int128_make64(offset),
1620 int128_add(int128_make64(other->addr), other->size))
1621 || int128_le(int128_add(int128_make64(offset), subregion->size),
1622 int128_make64(other->addr))) {
1623 continue;
1624 }
1625 #if 0
1626 printf("warning: subregion collision %llx/%llx (%s) "
1627 "vs %llx/%llx (%s)\n",
1628 (unsigned long long)offset,
1629 (unsigned long long)int128_get64(subregion->size),
1630 subregion->name,
1631 (unsigned long long)other->addr,
1632 (unsigned long long)int128_get64(other->size),
1633 other->name);
1634 #endif
1635 }
1636 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1637 if (subregion->priority >= other->priority) {
1638 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1639 goto done;
1640 }
1641 }
1642 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1643 done:
1644 memory_region_update_pending |= mr->enabled && subregion->enabled;
1645 memory_region_transaction_commit();
1646 }
1647
1648 static void memory_region_add_subregion_common(MemoryRegion *mr,
1649 hwaddr offset,
1650 MemoryRegion *subregion)
1651 {
1652 assert(!subregion->container);
1653 subregion->container = mr;
1654 subregion->addr = offset;
1655 memory_region_update_container_subregions(subregion);
1656 }
1657
1658 void memory_region_add_subregion(MemoryRegion *mr,
1659 hwaddr offset,
1660 MemoryRegion *subregion)
1661 {
1662 subregion->may_overlap = false;
1663 subregion->priority = 0;
1664 memory_region_add_subregion_common(mr, offset, subregion);
1665 }
1666
1667 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1668 hwaddr offset,
1669 MemoryRegion *subregion,
1670 int priority)
1671 {
1672 subregion->may_overlap = true;
1673 subregion->priority = priority;
1674 memory_region_add_subregion_common(mr, offset, subregion);
1675 }
1676
1677 void memory_region_del_subregion(MemoryRegion *mr,
1678 MemoryRegion *subregion)
1679 {
1680 memory_region_transaction_begin();
1681 assert(subregion->container == mr);
1682 subregion->container = NULL;
1683 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1684 memory_region_unref(subregion);
1685 memory_region_update_pending |= mr->enabled && subregion->enabled;
1686 memory_region_transaction_commit();
1687 }
1688
1689 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1690 {
1691 if (enabled == mr->enabled) {
1692 return;
1693 }
1694 memory_region_transaction_begin();
1695 mr->enabled = enabled;
1696 memory_region_update_pending = true;
1697 memory_region_transaction_commit();
1698 }
1699
1700 static void memory_region_readd_subregion(MemoryRegion *mr)
1701 {
1702 MemoryRegion *container = mr->container;
1703
1704 if (container) {
1705 memory_region_transaction_begin();
1706 memory_region_ref(mr);
1707 memory_region_del_subregion(container, mr);
1708 mr->container = container;
1709 memory_region_update_container_subregions(mr);
1710 memory_region_unref(mr);
1711 memory_region_transaction_commit();
1712 }
1713 }
1714
1715 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1716 {
1717 if (addr != mr->addr) {
1718 mr->addr = addr;
1719 memory_region_readd_subregion(mr);
1720 }
1721 }
1722
1723 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1724 {
1725 assert(mr->alias);
1726
1727 if (offset == mr->alias_offset) {
1728 return;
1729 }
1730
1731 memory_region_transaction_begin();
1732 mr->alias_offset = offset;
1733 memory_region_update_pending |= mr->enabled;
1734 memory_region_transaction_commit();
1735 }
1736
1737 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1738 {
1739 return mr->ram_addr;
1740 }
1741
1742 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1743 {
1744 const AddrRange *addr = addr_;
1745 const FlatRange *fr = fr_;
1746
1747 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1748 return -1;
1749 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1750 return 1;
1751 }
1752 return 0;
1753 }
1754
1755 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1756 {
1757 return bsearch(&addr, view->ranges, view->nr,
1758 sizeof(FlatRange), cmp_flatrange_addr);
1759 }
1760
1761 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1762 {
1763 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1764 if (!mr || (mr == container)) {
1765 return false;
1766 }
1767 memory_region_unref(mr);
1768 return true;
1769 }
1770
1771 bool memory_region_is_mapped(MemoryRegion *mr)
1772 {
1773 return mr->container ? true : false;
1774 }
1775
1776 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1777 hwaddr addr, uint64_t size)
1778 {
1779 MemoryRegionSection ret = { .mr = NULL };
1780 MemoryRegion *root;
1781 AddressSpace *as;
1782 AddrRange range;
1783 FlatView *view;
1784 FlatRange *fr;
1785
1786 addr += mr->addr;
1787 for (root = mr; root->container; ) {
1788 root = root->container;
1789 addr += root->addr;
1790 }
1791
1792 as = memory_region_to_address_space(root);
1793 if (!as) {
1794 return ret;
1795 }
1796 range = addrrange_make(int128_make64(addr), int128_make64(size));
1797
1798 view = address_space_get_flatview(as);
1799 fr = flatview_lookup(view, range);
1800 if (!fr) {
1801 flatview_unref(view);
1802 return ret;
1803 }
1804
1805 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1806 --fr;
1807 }
1808
1809 ret.mr = fr->mr;
1810 ret.address_space = as;
1811 range = addrrange_intersection(range, fr->addr);
1812 ret.offset_within_region = fr->offset_in_region;
1813 ret.offset_within_region += int128_get64(int128_sub(range.start,
1814 fr->addr.start));
1815 ret.size = range.size;
1816 ret.offset_within_address_space = int128_get64(range.start);
1817 ret.readonly = fr->readonly;
1818 memory_region_ref(ret.mr);
1819
1820 flatview_unref(view);
1821 return ret;
1822 }
1823
1824 void address_space_sync_dirty_bitmap(AddressSpace *as)
1825 {
1826 FlatView *view;
1827 FlatRange *fr;
1828
1829 view = address_space_get_flatview(as);
1830 FOR_EACH_FLAT_RANGE(fr, view) {
1831 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1832 }
1833 flatview_unref(view);
1834 }
1835
1836 void memory_global_dirty_log_start(void)
1837 {
1838 global_dirty_log = true;
1839 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1840 }
1841
1842 void memory_global_dirty_log_stop(void)
1843 {
1844 global_dirty_log = false;
1845 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1846 }
1847
1848 static void listener_add_address_space(MemoryListener *listener,
1849 AddressSpace *as)
1850 {
1851 FlatView *view;
1852 FlatRange *fr;
1853
1854 if (listener->address_space_filter
1855 && listener->address_space_filter != as) {
1856 return;
1857 }
1858
1859 if (global_dirty_log) {
1860 if (listener->log_global_start) {
1861 listener->log_global_start(listener);
1862 }
1863 }
1864
1865 view = address_space_get_flatview(as);
1866 FOR_EACH_FLAT_RANGE(fr, view) {
1867 MemoryRegionSection section = {
1868 .mr = fr->mr,
1869 .address_space = as,
1870 .offset_within_region = fr->offset_in_region,
1871 .size = fr->addr.size,
1872 .offset_within_address_space = int128_get64(fr->addr.start),
1873 .readonly = fr->readonly,
1874 };
1875 if (listener->region_add) {
1876 listener->region_add(listener, &section);
1877 }
1878 }
1879 flatview_unref(view);
1880 }
1881
1882 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1883 {
1884 MemoryListener *other = NULL;
1885 AddressSpace *as;
1886
1887 listener->address_space_filter = filter;
1888 if (QTAILQ_EMPTY(&memory_listeners)
1889 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1890 memory_listeners)->priority) {
1891 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1892 } else {
1893 QTAILQ_FOREACH(other, &memory_listeners, link) {
1894 if (listener->priority < other->priority) {
1895 break;
1896 }
1897 }
1898 QTAILQ_INSERT_BEFORE(other, listener, link);
1899 }
1900
1901 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1902 listener_add_address_space(listener, as);
1903 }
1904 }
1905
1906 void memory_listener_unregister(MemoryListener *listener)
1907 {
1908 QTAILQ_REMOVE(&memory_listeners, listener, link);
1909 }
1910
1911 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1912 {
1913 if (QTAILQ_EMPTY(&address_spaces)) {
1914 memory_init();
1915 }
1916
1917 memory_region_transaction_begin();
1918 as->root = root;
1919 as->current_map = g_new(FlatView, 1);
1920 flatview_init(as->current_map);
1921 as->ioeventfd_nb = 0;
1922 as->ioeventfds = NULL;
1923 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1924 as->name = g_strdup(name ? name : "anonymous");
1925 address_space_init_dispatch(as);
1926 memory_region_update_pending |= root->enabled;
1927 memory_region_transaction_commit();
1928 }
1929
1930 void address_space_destroy(AddressSpace *as)
1931 {
1932 MemoryListener *listener;
1933
1934 /* Flush out anything from MemoryListeners listening in on this */
1935 memory_region_transaction_begin();
1936 as->root = NULL;
1937 memory_region_transaction_commit();
1938 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1939 address_space_destroy_dispatch(as);
1940
1941 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1942 assert(listener->address_space_filter != as);
1943 }
1944
1945 flatview_unref(as->current_map);
1946 g_free(as->name);
1947 g_free(as->ioeventfds);
1948 }
1949
1950 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1951 {
1952 return memory_region_dispatch_read(mr, addr, pval, size);
1953 }
1954
1955 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1956 uint64_t val, unsigned size)
1957 {
1958 return memory_region_dispatch_write(mr, addr, val, size);
1959 }
1960
1961 typedef struct MemoryRegionList MemoryRegionList;
1962
1963 struct MemoryRegionList {
1964 const MemoryRegion *mr;
1965 QTAILQ_ENTRY(MemoryRegionList) queue;
1966 };
1967
1968 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1969
1970 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1971 const MemoryRegion *mr, unsigned int level,
1972 hwaddr base,
1973 MemoryRegionListHead *alias_print_queue)
1974 {
1975 MemoryRegionList *new_ml, *ml, *next_ml;
1976 MemoryRegionListHead submr_print_queue;
1977 const MemoryRegion *submr;
1978 unsigned int i;
1979
1980 if (!mr || !mr->enabled) {
1981 return;
1982 }
1983
1984 for (i = 0; i < level; i++) {
1985 mon_printf(f, " ");
1986 }
1987
1988 if (mr->alias) {
1989 MemoryRegionList *ml;
1990 bool found = false;
1991
1992 /* check if the alias is already in the queue */
1993 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1994 if (ml->mr == mr->alias) {
1995 found = true;
1996 }
1997 }
1998
1999 if (!found) {
2000 ml = g_new(MemoryRegionList, 1);
2001 ml->mr = mr->alias;
2002 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2003 }
2004 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2005 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2006 "-" TARGET_FMT_plx "\n",
2007 base + mr->addr,
2008 base + mr->addr
2009 + (int128_nz(mr->size) ?
2010 (hwaddr)int128_get64(int128_sub(mr->size,
2011 int128_one())) : 0),
2012 mr->priority,
2013 mr->romd_mode ? 'R' : '-',
2014 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2015 : '-',
2016 memory_region_name(mr),
2017 memory_region_name(mr->alias),
2018 mr->alias_offset,
2019 mr->alias_offset
2020 + (int128_nz(mr->size) ?
2021 (hwaddr)int128_get64(int128_sub(mr->size,
2022 int128_one())) : 0));
2023 } else {
2024 mon_printf(f,
2025 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
2026 base + mr->addr,
2027 base + mr->addr
2028 + (int128_nz(mr->size) ?
2029 (hwaddr)int128_get64(int128_sub(mr->size,
2030 int128_one())) : 0),
2031 mr->priority,
2032 mr->romd_mode ? 'R' : '-',
2033 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2034 : '-',
2035 memory_region_name(mr));
2036 }
2037
2038 QTAILQ_INIT(&submr_print_queue);
2039
2040 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2041 new_ml = g_new(MemoryRegionList, 1);
2042 new_ml->mr = submr;
2043 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2044 if (new_ml->mr->addr < ml->mr->addr ||
2045 (new_ml->mr->addr == ml->mr->addr &&
2046 new_ml->mr->priority > ml->mr->priority)) {
2047 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2048 new_ml = NULL;
2049 break;
2050 }
2051 }
2052 if (new_ml) {
2053 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2054 }
2055 }
2056
2057 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2058 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2059 alias_print_queue);
2060 }
2061
2062 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2063 g_free(ml);
2064 }
2065 }
2066
2067 void mtree_info(fprintf_function mon_printf, void *f)
2068 {
2069 MemoryRegionListHead ml_head;
2070 MemoryRegionList *ml, *ml2;
2071 AddressSpace *as;
2072
2073 QTAILQ_INIT(&ml_head);
2074
2075 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2076 mon_printf(f, "%s\n", as->name);
2077 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
2078 }
2079
2080 mon_printf(f, "aliases\n");
2081 /* print aliased regions */
2082 QTAILQ_FOREACH(ml, &ml_head, queue) {
2083 mon_printf(f, "%s\n", memory_region_name(ml->mr));
2084 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
2085 }
2086
2087 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2088 g_free(ml);
2089 }
2090 }
2091
2092 static const TypeInfo memory_region_info = {
2093 .parent = TYPE_OBJECT,
2094 .name = TYPE_MEMORY_REGION,
2095 .instance_size = sizeof(MemoryRegion),
2096 .instance_init = memory_region_initfn,
2097 .instance_finalize = memory_region_finalize,
2098 };
2099
2100 static void memory_register_types(void)
2101 {
2102 type_register_static(&memory_region_info);
2103 }
2104
2105 type_init(memory_register_types)
CRIS target port of Qemu