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raspi: fix SD card with recent sdhci changes
[qemu/cris-port.git] / memory.c
blob0dd9695aec5a58cd9e6adf7ad4dc33017f8ca0bc
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "exec/memory.h"
18 #include "exec/address-spaces.h"
19 #include "exec/ioport.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qom/object.h"
24 #include "trace.h"
25
26 #include "exec/memory-internal.h"
27 #include "exec/ram_addr.h"
28 #include "sysemu/kvm.h"
29 #include "sysemu/sysemu.h"
30
31 //#define DEBUG_UNASSIGNED
32
33 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
35 static unsigned memory_region_transaction_depth;
36 static bool memory_region_update_pending;
37 static bool ioeventfd_update_pending;
38 static bool global_dirty_log = false;
39
40 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
42
43 static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
46 typedef struct AddrRange AddrRange;
47
48 /*
49 * Note that signed integers are needed for negative offsetting in aliases
50 * (large MemoryRegion::alias_offset).
51 */
52 struct AddrRange {
53 Int128 start;
54 Int128 size;
55 };
56
57 static AddrRange addrrange_make(Int128 start, Int128 size)
58 {
59 return (AddrRange) { start, size };
60 }
61
62 static bool addrrange_equal(AddrRange r1, AddrRange r2)
63 {
64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
65 }
66
67 static Int128 addrrange_end(AddrRange r)
68 {
69 return int128_add(r.start, r.size);
70 }
71
72 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
73 {
74 int128_addto(&range.start, delta);
75 return range;
76 }
77
78 static bool addrrange_contains(AddrRange range, Int128 addr)
79 {
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82 }
83
84 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85 {
86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
88 }
89
90 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91 {
92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
95 }
96
97 enum ListenerDirection { Forward, Reverse };
98
99 static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101 {
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104 }
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
158 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
159 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
161 .mr = (fr)->mr, \
162 .address_space = (as), \
163 .offset_within_region = (fr)->offset_in_region, \
164 .size = (fr)->addr.size, \
165 .offset_within_address_space = int128_get64((fr)->addr.start), \
166 .readonly = (fr)->readonly, \
167 }), ##_args)
168
169 struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172 };
173
174 struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
178 EventNotifier *e;
179 };
180
181 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183 {
184 if (int128_lt(a.addr.start, b.addr.start)) {
185 return true;
186 } else if (int128_gt(a.addr.start, b.addr.start)) {
187 return false;
188 } else if (int128_lt(a.addr.size, b.addr.size)) {
189 return true;
190 } else if (int128_gt(a.addr.size, b.addr.size)) {
191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
203 if (a.e < b.e) {
204 return true;
205 } else if (a.e > b.e) {
206 return false;
207 }
208 return false;
209 }
210
211 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213 {
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216 }
217
218 typedef struct FlatRange FlatRange;
219 typedef struct FlatView FlatView;
220
221 /* Range of memory in the global map. Addresses are absolute. */
222 struct FlatRange {
223 MemoryRegion *mr;
224 hwaddr offset_in_region;
225 AddrRange addr;
226 uint8_t dirty_log_mask;
227 bool romd_mode;
228 bool readonly;
229 };
230
231 /* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234 struct FlatView {
235 struct rcu_head rcu;
236 unsigned ref;
237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240 };
241
242 typedef struct AddressSpaceOps AddressSpaceOps;
243
244 #define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly;
254 }
255
256 static void flatview_init(FlatView *view)
257 {
258 view->ref = 1;
259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
288 g_free(view->ranges);
289 g_free(view);
290 }
291
292 static void flatview_ref(FlatView *view)
293 {
294 atomic_inc(&view->ref);
295 }
296
297 static void flatview_unref(FlatView *view)
298 {
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302 }
303
304 static bool can_merge(FlatRange *r1, FlatRange *r2)
305 {
306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
307 && r1->mr == r2->mr
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
311 && r1->dirty_log_mask == r2->dirty_log_mask
312 && r1->romd_mode == r2->romd_mode
313 && r1->readonly == r2->readonly;
314 }
315
316 /* Attempt to simplify a view by merging adjacent ranges */
317 static void flatview_simplify(FlatView *view)
318 {
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334 }
335
336 static bool memory_region_big_endian(MemoryRegion *mr)
337 {
338 #ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340 #else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342 #endif
343 }
344
345 static bool memory_region_wrong_endianness(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355 {
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373 }
374
375 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
376 hwaddr addr,
377 uint64_t *value,
378 unsigned size,
379 unsigned shift,
380 uint64_t mask,
381 MemTxAttrs attrs)
382 {
383 uint64_t tmp;
384
385 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
386 trace_memory_region_ops_read(mr, addr, tmp, size);
387 *value |= (tmp & mask) << shift;
388 return MEMTX_OK;
389 }
390
391 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
392 hwaddr addr,
393 uint64_t *value,
394 unsigned size,
395 unsigned shift,
396 uint64_t mask,
397 MemTxAttrs attrs)
398 {
399 uint64_t tmp;
400
401 tmp = mr->ops->read(mr->opaque, addr, size);
402 trace_memory_region_ops_read(mr, addr, tmp, size);
403 *value |= (tmp & mask) << shift;
404 return MEMTX_OK;
405 }
406
407 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
408 hwaddr addr,
409 uint64_t *value,
410 unsigned size,
411 unsigned shift,
412 uint64_t mask,
413 MemTxAttrs attrs)
414 {
415 uint64_t tmp = 0;
416 MemTxResult r;
417
418 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
419 trace_memory_region_ops_read(mr, addr, tmp, size);
420 *value |= (tmp & mask) << shift;
421 return r;
422 }
423
424 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = (*value >> shift) & mask;
435 trace_memory_region_ops_write(mr, addr, tmp, size);
436 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
437 return MEMTX_OK;
438 }
439
440 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
441 hwaddr addr,
442 uint64_t *value,
443 unsigned size,
444 unsigned shift,
445 uint64_t mask,
446 MemTxAttrs attrs)
447 {
448 uint64_t tmp;
449
450 tmp = (*value >> shift) & mask;
451 trace_memory_region_ops_write(mr, addr, tmp, size);
452 mr->ops->write(mr->opaque, addr, tmp, size);
453 return MEMTX_OK;
454 }
455
456 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
457 hwaddr addr,
458 uint64_t *value,
459 unsigned size,
460 unsigned shift,
461 uint64_t mask,
462 MemTxAttrs attrs)
463 {
464 uint64_t tmp;
465
466 tmp = (*value >> shift) & mask;
467 trace_memory_region_ops_write(mr, addr, tmp, size);
468 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
469 }
470
471 static MemTxResult access_with_adjusted_size(hwaddr addr,
472 uint64_t *value,
473 unsigned size,
474 unsigned access_size_min,
475 unsigned access_size_max,
476 MemTxResult (*access)(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs),
483 MemoryRegion *mr,
484 MemTxAttrs attrs)
485 {
486 uint64_t access_mask;
487 unsigned access_size;
488 unsigned i;
489 MemTxResult r = MEMTX_OK;
490
491 if (!access_size_min) {
492 access_size_min = 1;
493 }
494 if (!access_size_max) {
495 access_size_max = 4;
496 }
497
498 /* FIXME: support unaligned access? */
499 access_size = MAX(MIN(size, access_size_max), access_size_min);
500 access_mask = -1ULL >> (64 - access_size * 8);
501 if (memory_region_big_endian(mr)) {
502 for (i = 0; i < size; i += access_size) {
503 r |= access(mr, addr + i, value, access_size,
504 (size - access_size - i) * 8, access_mask, attrs);
505 }
506 } else {
507 for (i = 0; i < size; i += access_size) {
508 r |= access(mr, addr + i, value, access_size, i * 8,
509 access_mask, attrs);
510 }
511 }
512 return r;
513 }
514
515 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
516 {
517 AddressSpace *as;
518
519 while (mr->container) {
520 mr = mr->container;
521 }
522 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
523 if (mr == as->root) {
524 return as;
525 }
526 }
527 return NULL;
528 }
529
530 /* Render a memory region into the global view. Ranges in @view obscure
531 * ranges in @mr.
532 */
533 static void render_memory_region(FlatView *view,
534 MemoryRegion *mr,
535 Int128 base,
536 AddrRange clip,
537 bool readonly)
538 {
539 MemoryRegion *subregion;
540 unsigned i;
541 hwaddr offset_in_region;
542 Int128 remain;
543 Int128 now;
544 FlatRange fr;
545 AddrRange tmp;
546
547 if (!mr->enabled) {
548 return;
549 }
550
551 int128_addto(&base, int128_make64(mr->addr));
552 readonly |= mr->readonly;
553
554 tmp = addrrange_make(base, mr->size);
555
556 if (!addrrange_intersects(tmp, clip)) {
557 return;
558 }
559
560 clip = addrrange_intersection(tmp, clip);
561
562 if (mr->alias) {
563 int128_subfrom(&base, int128_make64(mr->alias->addr));
564 int128_subfrom(&base, int128_make64(mr->alias_offset));
565 render_memory_region(view, mr->alias, base, clip, readonly);
566 return;
567 }
568
569 /* Render subregions in priority order. */
570 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
571 render_memory_region(view, subregion, base, clip, readonly);
572 }
573
574 if (!mr->terminates) {
575 return;
576 }
577
578 offset_in_region = int128_get64(int128_sub(clip.start, base));
579 base = clip.start;
580 remain = clip.size;
581
582 fr.mr = mr;
583 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
584 fr.romd_mode = mr->romd_mode;
585 fr.readonly = readonly;
586
587 /* Render the region itself into any gaps left by the current view. */
588 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
589 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
590 continue;
591 }
592 if (int128_lt(base, view->ranges[i].addr.start)) {
593 now = int128_min(remain,
594 int128_sub(view->ranges[i].addr.start, base));
595 fr.offset_in_region = offset_in_region;
596 fr.addr = addrrange_make(base, now);
597 flatview_insert(view, i, &fr);
598 ++i;
599 int128_addto(&base, now);
600 offset_in_region += int128_get64(now);
601 int128_subfrom(&remain, now);
602 }
603 now = int128_sub(int128_min(int128_add(base, remain),
604 addrrange_end(view->ranges[i].addr)),
605 base);
606 int128_addto(&base, now);
607 offset_in_region += int128_get64(now);
608 int128_subfrom(&remain, now);
609 }
610 if (int128_nz(remain)) {
611 fr.offset_in_region = offset_in_region;
612 fr.addr = addrrange_make(base, remain);
613 flatview_insert(view, i, &fr);
614 }
615 }
616
617 /* Render a memory topology into a list of disjoint absolute ranges. */
618 static FlatView *generate_memory_topology(MemoryRegion *mr)
619 {
620 FlatView *view;
621
622 view = g_new(FlatView, 1);
623 flatview_init(view);
624
625 if (mr) {
626 render_memory_region(view, mr, int128_zero(),
627 addrrange_make(int128_zero(), int128_2_64()), false);
628 }
629 flatview_simplify(view);
630
631 return view;
632 }
633
634 static void address_space_add_del_ioeventfds(AddressSpace *as,
635 MemoryRegionIoeventfd *fds_new,
636 unsigned fds_new_nb,
637 MemoryRegionIoeventfd *fds_old,
638 unsigned fds_old_nb)
639 {
640 unsigned iold, inew;
641 MemoryRegionIoeventfd *fd;
642 MemoryRegionSection section;
643
644 /* Generate a symmetric difference of the old and new fd sets, adding
645 * and deleting as necessary.
646 */
647
648 iold = inew = 0;
649 while (iold < fds_old_nb || inew < fds_new_nb) {
650 if (iold < fds_old_nb
651 && (inew == fds_new_nb
652 || memory_region_ioeventfd_before(fds_old[iold],
653 fds_new[inew]))) {
654 fd = &fds_old[iold];
655 section = (MemoryRegionSection) {
656 .address_space = as,
657 .offset_within_address_space = int128_get64(fd->addr.start),
658 .size = fd->addr.size,
659 };
660 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
661 fd->match_data, fd->data, fd->e);
662 ++iold;
663 } else if (inew < fds_new_nb
664 && (iold == fds_old_nb
665 || memory_region_ioeventfd_before(fds_new[inew],
666 fds_old[iold]))) {
667 fd = &fds_new[inew];
668 section = (MemoryRegionSection) {
669 .address_space = as,
670 .offset_within_address_space = int128_get64(fd->addr.start),
671 .size = fd->addr.size,
672 };
673 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
674 fd->match_data, fd->data, fd->e);
675 ++inew;
676 } else {
677 ++iold;
678 ++inew;
679 }
680 }
681 }
682
683 static FlatView *address_space_get_flatview(AddressSpace *as)
684 {
685 FlatView *view;
686
687 rcu_read_lock();
688 view = atomic_rcu_read(&as->current_map);
689 flatview_ref(view);
690 rcu_read_unlock();
691 return view;
692 }
693
694 static void address_space_update_ioeventfds(AddressSpace *as)
695 {
696 FlatView *view;
697 FlatRange *fr;
698 unsigned ioeventfd_nb = 0;
699 MemoryRegionIoeventfd *ioeventfds = NULL;
700 AddrRange tmp;
701 unsigned i;
702
703 view = address_space_get_flatview(as);
704 FOR_EACH_FLAT_RANGE(fr, view) {
705 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
706 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
707 int128_sub(fr->addr.start,
708 int128_make64(fr->offset_in_region)));
709 if (addrrange_intersects(fr->addr, tmp)) {
710 ++ioeventfd_nb;
711 ioeventfds = g_realloc(ioeventfds,
712 ioeventfd_nb * sizeof(*ioeventfds));
713 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
714 ioeventfds[ioeventfd_nb-1].addr = tmp;
715 }
716 }
717 }
718
719 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
720 as->ioeventfds, as->ioeventfd_nb);
721
722 g_free(as->ioeventfds);
723 as->ioeventfds = ioeventfds;
724 as->ioeventfd_nb = ioeventfd_nb;
725 flatview_unref(view);
726 }
727
728 static void address_space_update_topology_pass(AddressSpace *as,
729 const FlatView *old_view,
730 const FlatView *new_view,
731 bool adding)
732 {
733 unsigned iold, inew;
734 FlatRange *frold, *frnew;
735
736 /* Generate a symmetric difference of the old and new memory maps.
737 * Kill ranges in the old map, and instantiate ranges in the new map.
738 */
739 iold = inew = 0;
740 while (iold < old_view->nr || inew < new_view->nr) {
741 if (iold < old_view->nr) {
742 frold = &old_view->ranges[iold];
743 } else {
744 frold = NULL;
745 }
746 if (inew < new_view->nr) {
747 frnew = &new_view->ranges[inew];
748 } else {
749 frnew = NULL;
750 }
751
752 if (frold
753 && (!frnew
754 || int128_lt(frold->addr.start, frnew->addr.start)
755 || (int128_eq(frold->addr.start, frnew->addr.start)
756 && !flatrange_equal(frold, frnew)))) {
757 /* In old but not in new, or in both but attributes changed. */
758
759 if (!adding) {
760 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
761 }
762
763 ++iold;
764 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
765 /* In both and unchanged (except logging may have changed) */
766
767 if (adding) {
768 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
769 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
770 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
771 frold->dirty_log_mask,
772 frnew->dirty_log_mask);
773 }
774 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
775 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
776 frold->dirty_log_mask,
777 frnew->dirty_log_mask);
778 }
779 }
780
781 ++iold;
782 ++inew;
783 } else {
784 /* In new */
785
786 if (adding) {
787 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
788 }
789
790 ++inew;
791 }
792 }
793 }
794
795
796 static void address_space_update_topology(AddressSpace *as)
797 {
798 FlatView *old_view = address_space_get_flatview(as);
799 FlatView *new_view = generate_memory_topology(as->root);
800
801 address_space_update_topology_pass(as, old_view, new_view, false);
802 address_space_update_topology_pass(as, old_view, new_view, true);
803
804 /* Writes are protected by the BQL. */
805 atomic_rcu_set(&as->current_map, new_view);
806 call_rcu(old_view, flatview_unref, rcu);
807
808 /* Note that all the old MemoryRegions are still alive up to this
809 * point. This relieves most MemoryListeners from the need to
810 * ref/unref the MemoryRegions they get---unless they use them
811 * outside the iothread mutex, in which case precise reference
812 * counting is necessary.
813 */
814 flatview_unref(old_view);
815
816 address_space_update_ioeventfds(as);
817 }
818
819 void memory_region_transaction_begin(void)
820 {
821 qemu_flush_coalesced_mmio_buffer();
822 ++memory_region_transaction_depth;
823 }
824
825 static void memory_region_clear_pending(void)
826 {
827 memory_region_update_pending = false;
828 ioeventfd_update_pending = false;
829 }
830
831 void memory_region_transaction_commit(void)
832 {
833 AddressSpace *as;
834
835 assert(memory_region_transaction_depth);
836 --memory_region_transaction_depth;
837 if (!memory_region_transaction_depth) {
838 if (memory_region_update_pending) {
839 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
840
841 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
842 address_space_update_topology(as);
843 }
844
845 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
846 } else if (ioeventfd_update_pending) {
847 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
848 address_space_update_ioeventfds(as);
849 }
850 }
851 memory_region_clear_pending();
852 }
853 }
854
855 static void memory_region_destructor_none(MemoryRegion *mr)
856 {
857 }
858
859 static void memory_region_destructor_ram(MemoryRegion *mr)
860 {
861 qemu_ram_free(mr->ram_addr);
862 }
863
864 static void memory_region_destructor_rom_device(MemoryRegion *mr)
865 {
866 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
867 }
868
869 static bool memory_region_need_escape(char c)
870 {
871 return c == '/' || c == '[' || c == '\\' || c == ']';
872 }
873
874 static char *memory_region_escape_name(const char *name)
875 {
876 const char *p;
877 char *escaped, *q;
878 uint8_t c;
879 size_t bytes = 0;
880
881 for (p = name; *p; p++) {
882 bytes += memory_region_need_escape(*p) ? 4 : 1;
883 }
884 if (bytes == p - name) {
885 return g_memdup(name, bytes + 1);
886 }
887
888 escaped = g_malloc(bytes + 1);
889 for (p = name, q = escaped; *p; p++) {
890 c = *p;
891 if (unlikely(memory_region_need_escape(c))) {
892 *q++ = '\\';
893 *q++ = 'x';
894 *q++ = "0123456789abcdef"[c >> 4];
895 c = "0123456789abcdef"[c & 15];
896 }
897 *q++ = c;
898 }
899 *q = 0;
900 return escaped;
901 }
902
903 void memory_region_init(MemoryRegion *mr,
904 Object *owner,
905 const char *name,
906 uint64_t size)
907 {
908 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
909 mr->size = int128_make64(size);
910 if (size == UINT64_MAX) {
911 mr->size = int128_2_64();
912 }
913 mr->name = g_strdup(name);
914 mr->owner = owner;
915 mr->ram_block = NULL;
916
917 if (name) {
918 char *escaped_name = memory_region_escape_name(name);
919 char *name_array = g_strdup_printf("%s[*]", escaped_name);
920
921 if (!owner) {
922 owner = container_get(qdev_get_machine(), "/unattached");
923 }
924
925 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
926 object_unref(OBJECT(mr));
927 g_free(name_array);
928 g_free(escaped_name);
929 }
930 }
931
932 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
933 void *opaque, Error **errp)
934 {
935 MemoryRegion *mr = MEMORY_REGION(obj);
936 uint64_t value = mr->addr;
937
938 visit_type_uint64(v, name, &value, errp);
939 }
940
941 static void memory_region_get_container(Object *obj, Visitor *v,
942 const char *name, void *opaque,
943 Error **errp)
944 {
945 MemoryRegion *mr = MEMORY_REGION(obj);
946 gchar *path = (gchar *)"";
947
948 if (mr->container) {
949 path = object_get_canonical_path(OBJECT(mr->container));
950 }
951 visit_type_str(v, name, &path, errp);
952 if (mr->container) {
953 g_free(path);
954 }
955 }
956
957 static Object *memory_region_resolve_container(Object *obj, void *opaque,
958 const char *part)
959 {
960 MemoryRegion *mr = MEMORY_REGION(obj);
961
962 return OBJECT(mr->container);
963 }
964
965 static void memory_region_get_priority(Object *obj, Visitor *v,
966 const char *name, void *opaque,
967 Error **errp)
968 {
969 MemoryRegion *mr = MEMORY_REGION(obj);
970 int32_t value = mr->priority;
971
972 visit_type_int32(v, name, &value, errp);
973 }
974
975 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
976 {
977 MemoryRegion *mr = MEMORY_REGION(obj);
978
979 return mr->may_overlap;
980 }
981
982 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
983 void *opaque, Error **errp)
984 {
985 MemoryRegion *mr = MEMORY_REGION(obj);
986 uint64_t value = memory_region_size(mr);
987
988 visit_type_uint64(v, name, &value, errp);
989 }
990
991 static void memory_region_initfn(Object *obj)
992 {
993 MemoryRegion *mr = MEMORY_REGION(obj);
994 ObjectProperty *op;
995
996 mr->ops = &unassigned_mem_ops;
997 mr->ram_addr = RAM_ADDR_INVALID;
998 mr->enabled = true;
999 mr->romd_mode = true;
1000 mr->global_locking = true;
1001 mr->destructor = memory_region_destructor_none;
1002 QTAILQ_INIT(&mr->subregions);
1003 QTAILQ_INIT(&mr->coalesced);
1004
1005 op = object_property_add(OBJECT(mr), "container",
1006 "link<" TYPE_MEMORY_REGION ">",
1007 memory_region_get_container,
1008 NULL, /* memory_region_set_container */
1009 NULL, NULL, &error_abort);
1010 op->resolve = memory_region_resolve_container;
1011
1012 object_property_add(OBJECT(mr), "addr", "uint64",
1013 memory_region_get_addr,
1014 NULL, /* memory_region_set_addr */
1015 NULL, NULL, &error_abort);
1016 object_property_add(OBJECT(mr), "priority", "uint32",
1017 memory_region_get_priority,
1018 NULL, /* memory_region_set_priority */
1019 NULL, NULL, &error_abort);
1020 object_property_add_bool(OBJECT(mr), "may-overlap",
1021 memory_region_get_may_overlap,
1022 NULL, /* memory_region_set_may_overlap */
1023 &error_abort);
1024 object_property_add(OBJECT(mr), "size", "uint64",
1025 memory_region_get_size,
1026 NULL, /* memory_region_set_size, */
1027 NULL, NULL, &error_abort);
1028 }
1029
1030 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1031 unsigned size)
1032 {
1033 #ifdef DEBUG_UNASSIGNED
1034 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1035 #endif
1036 if (current_cpu != NULL) {
1037 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1038 }
1039 return 0;
1040 }
1041
1042 static void unassigned_mem_write(void *opaque, hwaddr addr,
1043 uint64_t val, unsigned size)
1044 {
1045 #ifdef DEBUG_UNASSIGNED
1046 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1047 #endif
1048 if (current_cpu != NULL) {
1049 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1050 }
1051 }
1052
1053 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1054 unsigned size, bool is_write)
1055 {
1056 return false;
1057 }
1058
1059 const MemoryRegionOps unassigned_mem_ops = {
1060 .valid.accepts = unassigned_mem_accepts,
1061 .endianness = DEVICE_NATIVE_ENDIAN,
1062 };
1063
1064 bool memory_region_access_valid(MemoryRegion *mr,
1065 hwaddr addr,
1066 unsigned size,
1067 bool is_write)
1068 {
1069 int access_size_min, access_size_max;
1070 int access_size, i;
1071
1072 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1073 return false;
1074 }
1075
1076 if (!mr->ops->valid.accepts) {
1077 return true;
1078 }
1079
1080 access_size_min = mr->ops->valid.min_access_size;
1081 if (!mr->ops->valid.min_access_size) {
1082 access_size_min = 1;
1083 }
1084
1085 access_size_max = mr->ops->valid.max_access_size;
1086 if (!mr->ops->valid.max_access_size) {
1087 access_size_max = 4;
1088 }
1089
1090 access_size = MAX(MIN(size, access_size_max), access_size_min);
1091 for (i = 0; i < size; i += access_size) {
1092 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1093 is_write)) {
1094 return false;
1095 }
1096 }
1097
1098 return true;
1099 }
1100
1101 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1102 hwaddr addr,
1103 uint64_t *pval,
1104 unsigned size,
1105 MemTxAttrs attrs)
1106 {
1107 *pval = 0;
1108
1109 if (mr->ops->read) {
1110 return access_with_adjusted_size(addr, pval, size,
1111 mr->ops->impl.min_access_size,
1112 mr->ops->impl.max_access_size,
1113 memory_region_read_accessor,
1114 mr, attrs);
1115 } else if (mr->ops->read_with_attrs) {
1116 return access_with_adjusted_size(addr, pval, size,
1117 mr->ops->impl.min_access_size,
1118 mr->ops->impl.max_access_size,
1119 memory_region_read_with_attrs_accessor,
1120 mr, attrs);
1121 } else {
1122 return access_with_adjusted_size(addr, pval, size, 1, 4,
1123 memory_region_oldmmio_read_accessor,
1124 mr, attrs);
1125 }
1126 }
1127
1128 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1129 hwaddr addr,
1130 uint64_t *pval,
1131 unsigned size,
1132 MemTxAttrs attrs)
1133 {
1134 MemTxResult r;
1135
1136 if (!memory_region_access_valid(mr, addr, size, false)) {
1137 *pval = unassigned_mem_read(mr, addr, size);
1138 return MEMTX_DECODE_ERROR;
1139 }
1140
1141 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1142 adjust_endianness(mr, pval, size);
1143 return r;
1144 }
1145
1146 /* Return true if an eventfd was signalled */
1147 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1148 hwaddr addr,
1149 uint64_t data,
1150 unsigned size,
1151 MemTxAttrs attrs)
1152 {
1153 MemoryRegionIoeventfd ioeventfd = {
1154 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1155 .data = data,
1156 };
1157 unsigned i;
1158
1159 for (i = 0; i < mr->ioeventfd_nb; i++) {
1160 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1161 ioeventfd.e = mr->ioeventfds[i].e;
1162
1163 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1164 event_notifier_set(ioeventfd.e);
1165 return true;
1166 }
1167 }
1168
1169 return false;
1170 }
1171
1172 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1173 hwaddr addr,
1174 uint64_t data,
1175 unsigned size,
1176 MemTxAttrs attrs)
1177 {
1178 if (!memory_region_access_valid(mr, addr, size, true)) {
1179 unassigned_mem_write(mr, addr, data, size);
1180 return MEMTX_DECODE_ERROR;
1181 }
1182
1183 adjust_endianness(mr, &data, size);
1184
1185 if ((!kvm_eventfds_enabled()) &&
1186 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1187 return MEMTX_OK;
1188 }
1189
1190 if (mr->ops->write) {
1191 return access_with_adjusted_size(addr, &data, size,
1192 mr->ops->impl.min_access_size,
1193 mr->ops->impl.max_access_size,
1194 memory_region_write_accessor, mr,
1195 attrs);
1196 } else if (mr->ops->write_with_attrs) {
1197 return
1198 access_with_adjusted_size(addr, &data, size,
1199 mr->ops->impl.min_access_size,
1200 mr->ops->impl.max_access_size,
1201 memory_region_write_with_attrs_accessor,
1202 mr, attrs);
1203 } else {
1204 return access_with_adjusted_size(addr, &data, size, 1, 4,
1205 memory_region_oldmmio_write_accessor,
1206 mr, attrs);
1207 }
1208 }
1209
1210 void memory_region_init_io(MemoryRegion *mr,
1211 Object *owner,
1212 const MemoryRegionOps *ops,
1213 void *opaque,
1214 const char *name,
1215 uint64_t size)
1216 {
1217 memory_region_init(mr, owner, name, size);
1218 mr->ops = ops ? ops : &unassigned_mem_ops;
1219 mr->opaque = opaque;
1220 mr->terminates = true;
1221 }
1222
1223 void memory_region_init_ram(MemoryRegion *mr,
1224 Object *owner,
1225 const char *name,
1226 uint64_t size,
1227 Error **errp)
1228 {
1229 memory_region_init(mr, owner, name, size);
1230 mr->ram = true;
1231 mr->terminates = true;
1232 mr->destructor = memory_region_destructor_ram;
1233 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1234 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1235 }
1236
1237 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1238 Object *owner,
1239 const char *name,
1240 uint64_t size,
1241 uint64_t max_size,
1242 void (*resized)(const char*,
1243 uint64_t length,
1244 void *host),
1245 Error **errp)
1246 {
1247 memory_region_init(mr, owner, name, size);
1248 mr->ram = true;
1249 mr->terminates = true;
1250 mr->destructor = memory_region_destructor_ram;
1251 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1252 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1253 }
1254
1255 #ifdef __linux__
1256 void memory_region_init_ram_from_file(MemoryRegion *mr,
1257 struct Object *owner,
1258 const char *name,
1259 uint64_t size,
1260 bool share,
1261 const char *path,
1262 Error **errp)
1263 {
1264 memory_region_init(mr, owner, name, size);
1265 mr->ram = true;
1266 mr->terminates = true;
1267 mr->destructor = memory_region_destructor_ram;
1268 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1269 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1270 }
1271 #endif
1272
1273 void memory_region_init_ram_ptr(MemoryRegion *mr,
1274 Object *owner,
1275 const char *name,
1276 uint64_t size,
1277 void *ptr)
1278 {
1279 memory_region_init(mr, owner, name, size);
1280 mr->ram = true;
1281 mr->terminates = true;
1282 mr->destructor = memory_region_destructor_ram;
1283 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1284
1285 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1286 assert(ptr != NULL);
1287 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1288 }
1289
1290 void memory_region_set_skip_dump(MemoryRegion *mr)
1291 {
1292 mr->skip_dump = true;
1293 }
1294
1295 void memory_region_init_alias(MemoryRegion *mr,
1296 Object *owner,
1297 const char *name,
1298 MemoryRegion *orig,
1299 hwaddr offset,
1300 uint64_t size)
1301 {
1302 memory_region_init(mr, owner, name, size);
1303 mr->alias = orig;
1304 mr->alias_offset = offset;
1305 }
1306
1307 void memory_region_init_rom_device(MemoryRegion *mr,
1308 Object *owner,
1309 const MemoryRegionOps *ops,
1310 void *opaque,
1311 const char *name,
1312 uint64_t size,
1313 Error **errp)
1314 {
1315 memory_region_init(mr, owner, name, size);
1316 mr->ops = ops;
1317 mr->opaque = opaque;
1318 mr->terminates = true;
1319 mr->rom_device = true;
1320 mr->destructor = memory_region_destructor_rom_device;
1321 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1322 }
1323
1324 void memory_region_init_iommu(MemoryRegion *mr,
1325 Object *owner,
1326 const MemoryRegionIOMMUOps *ops,
1327 const char *name,
1328 uint64_t size)
1329 {
1330 memory_region_init(mr, owner, name, size);
1331 mr->iommu_ops = ops,
1332 mr->terminates = true; /* then re-forwards */
1333 notifier_list_init(&mr->iommu_notify);
1334 }
1335
1336 static void memory_region_finalize(Object *obj)
1337 {
1338 MemoryRegion *mr = MEMORY_REGION(obj);
1339
1340 assert(!mr->container);
1341
1342 /* We know the region is not visible in any address space (it
1343 * does not have a container and cannot be a root either because
1344 * it has no references, so we can blindly clear mr->enabled.
1345 * memory_region_set_enabled instead could trigger a transaction
1346 * and cause an infinite loop.
1347 */
1348 mr->enabled = false;
1349 memory_region_transaction_begin();
1350 while (!QTAILQ_EMPTY(&mr->subregions)) {
1351 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1352 memory_region_del_subregion(mr, subregion);
1353 }
1354 memory_region_transaction_commit();
1355
1356 mr->destructor(mr);
1357 memory_region_clear_coalescing(mr);
1358 g_free((char *)mr->name);
1359 g_free(mr->ioeventfds);
1360 }
1361
1362 Object *memory_region_owner(MemoryRegion *mr)
1363 {
1364 Object *obj = OBJECT(mr);
1365 return obj->parent;
1366 }
1367
1368 void memory_region_ref(MemoryRegion *mr)
1369 {
1370 /* MMIO callbacks most likely will access data that belongs
1371 * to the owner, hence the need to ref/unref the owner whenever
1372 * the memory region is in use.
1373 *
1374 * The memory region is a child of its owner. As long as the
1375 * owner doesn't call unparent itself on the memory region,
1376 * ref-ing the owner will also keep the memory region alive.
1377 * Memory regions without an owner are supposed to never go away;
1378 * we do not ref/unref them because it slows down DMA sensibly.
1379 */
1380 if (mr && mr->owner) {
1381 object_ref(mr->owner);
1382 }
1383 }
1384
1385 void memory_region_unref(MemoryRegion *mr)
1386 {
1387 if (mr && mr->owner) {
1388 object_unref(mr->owner);
1389 }
1390 }
1391
1392 uint64_t memory_region_size(MemoryRegion *mr)
1393 {
1394 if (int128_eq(mr->size, int128_2_64())) {
1395 return UINT64_MAX;
1396 }
1397 return int128_get64(mr->size);
1398 }
1399
1400 const char *memory_region_name(const MemoryRegion *mr)
1401 {
1402 if (!mr->name) {
1403 ((MemoryRegion *)mr)->name =
1404 object_get_canonical_path_component(OBJECT(mr));
1405 }
1406 return mr->name;
1407 }
1408
1409 bool memory_region_is_skip_dump(MemoryRegion *mr)
1410 {
1411 return mr->skip_dump;
1412 }
1413
1414 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1415 {
1416 uint8_t mask = mr->dirty_log_mask;
1417 if (global_dirty_log) {
1418 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1419 }
1420 return mask;
1421 }
1422
1423 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1424 {
1425 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1426 }
1427
1428 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1429 {
1430 notifier_list_add(&mr->iommu_notify, n);
1431 }
1432
1433 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1434 hwaddr granularity, bool is_write)
1435 {
1436 hwaddr addr;
1437 IOMMUTLBEntry iotlb;
1438
1439 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1440 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1441 if (iotlb.perm != IOMMU_NONE) {
1442 n->notify(n, &iotlb);
1443 }
1444
1445 /* if (2^64 - MR size) < granularity, it's possible to get an
1446 * infinite loop here. This should catch such a wraparound */
1447 if ((addr + granularity) < addr) {
1448 break;
1449 }
1450 }
1451 }
1452
1453 void memory_region_unregister_iommu_notifier(Notifier *n)
1454 {
1455 notifier_remove(n);
1456 }
1457
1458 void memory_region_notify_iommu(MemoryRegion *mr,
1459 IOMMUTLBEntry entry)
1460 {
1461 assert(memory_region_is_iommu(mr));
1462 notifier_list_notify(&mr->iommu_notify, &entry);
1463 }
1464
1465 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1466 {
1467 uint8_t mask = 1 << client;
1468 uint8_t old_logging;
1469
1470 assert(client == DIRTY_MEMORY_VGA);
1471 old_logging = mr->vga_logging_count;
1472 mr->vga_logging_count += log ? 1 : -1;
1473 if (!!old_logging == !!mr->vga_logging_count) {
1474 return;
1475 }
1476
1477 memory_region_transaction_begin();
1478 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1479 memory_region_update_pending |= mr->enabled;
1480 memory_region_transaction_commit();
1481 }
1482
1483 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1484 hwaddr size, unsigned client)
1485 {
1486 assert(mr->ram_addr != RAM_ADDR_INVALID);
1487 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1488 }
1489
1490 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1491 hwaddr size)
1492 {
1493 assert(mr->ram_addr != RAM_ADDR_INVALID);
1494 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1495 memory_region_get_dirty_log_mask(mr));
1496 }
1497
1498 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1499 hwaddr size, unsigned client)
1500 {
1501 assert(mr->ram_addr != RAM_ADDR_INVALID);
1502 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1503 size, client);
1504 }
1505
1506
1507 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1508 {
1509 AddressSpace *as;
1510 FlatRange *fr;
1511
1512 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1513 FlatView *view = address_space_get_flatview(as);
1514 FOR_EACH_FLAT_RANGE(fr, view) {
1515 if (fr->mr == mr) {
1516 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1517 }
1518 }
1519 flatview_unref(view);
1520 }
1521 }
1522
1523 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1524 {
1525 if (mr->readonly != readonly) {
1526 memory_region_transaction_begin();
1527 mr->readonly = readonly;
1528 memory_region_update_pending |= mr->enabled;
1529 memory_region_transaction_commit();
1530 }
1531 }
1532
1533 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1534 {
1535 if (mr->romd_mode != romd_mode) {
1536 memory_region_transaction_begin();
1537 mr->romd_mode = romd_mode;
1538 memory_region_update_pending |= mr->enabled;
1539 memory_region_transaction_commit();
1540 }
1541 }
1542
1543 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1544 hwaddr size, unsigned client)
1545 {
1546 assert(mr->ram_addr != RAM_ADDR_INVALID);
1547 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1548 client);
1549 }
1550
1551 int memory_region_get_fd(MemoryRegion *mr)
1552 {
1553 if (mr->alias) {
1554 return memory_region_get_fd(mr->alias);
1555 }
1556
1557 assert(mr->ram_addr != RAM_ADDR_INVALID);
1558
1559 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1560 }
1561
1562 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1563 {
1564 void *ptr;
1565 uint64_t offset = 0;
1566
1567 rcu_read_lock();
1568 while (mr->alias) {
1569 offset += mr->alias_offset;
1570 mr = mr->alias;
1571 }
1572 assert(mr->ram_addr != RAM_ADDR_INVALID);
1573 ptr = qemu_get_ram_ptr(mr->ram_block, mr->ram_addr & TARGET_PAGE_MASK);
1574 rcu_read_unlock();
1575
1576 return ptr + offset;
1577 }
1578
1579 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1580 {
1581 assert(mr->ram_addr != RAM_ADDR_INVALID);
1582
1583 qemu_ram_resize(mr->ram_addr, newsize, errp);
1584 }
1585
1586 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1587 {
1588 FlatView *view;
1589 FlatRange *fr;
1590 CoalescedMemoryRange *cmr;
1591 AddrRange tmp;
1592 MemoryRegionSection section;
1593
1594 view = address_space_get_flatview(as);
1595 FOR_EACH_FLAT_RANGE(fr, view) {
1596 if (fr->mr == mr) {
1597 section = (MemoryRegionSection) {
1598 .address_space = as,
1599 .offset_within_address_space = int128_get64(fr->addr.start),
1600 .size = fr->addr.size,
1601 };
1602
1603 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1604 int128_get64(fr->addr.start),
1605 int128_get64(fr->addr.size));
1606 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1607 tmp = addrrange_shift(cmr->addr,
1608 int128_sub(fr->addr.start,
1609 int128_make64(fr->offset_in_region)));
1610 if (!addrrange_intersects(tmp, fr->addr)) {
1611 continue;
1612 }
1613 tmp = addrrange_intersection(tmp, fr->addr);
1614 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1615 int128_get64(tmp.start),
1616 int128_get64(tmp.size));
1617 }
1618 }
1619 }
1620 flatview_unref(view);
1621 }
1622
1623 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1624 {
1625 AddressSpace *as;
1626
1627 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1628 memory_region_update_coalesced_range_as(mr, as);
1629 }
1630 }
1631
1632 void memory_region_set_coalescing(MemoryRegion *mr)
1633 {
1634 memory_region_clear_coalescing(mr);
1635 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1636 }
1637
1638 void memory_region_add_coalescing(MemoryRegion *mr,
1639 hwaddr offset,
1640 uint64_t size)
1641 {
1642 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1643
1644 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1645 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1646 memory_region_update_coalesced_range(mr);
1647 memory_region_set_flush_coalesced(mr);
1648 }
1649
1650 void memory_region_clear_coalescing(MemoryRegion *mr)
1651 {
1652 CoalescedMemoryRange *cmr;
1653 bool updated = false;
1654
1655 qemu_flush_coalesced_mmio_buffer();
1656 mr->flush_coalesced_mmio = false;
1657
1658 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1659 cmr = QTAILQ_FIRST(&mr->coalesced);
1660 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1661 g_free(cmr);
1662 updated = true;
1663 }
1664
1665 if (updated) {
1666 memory_region_update_coalesced_range(mr);
1667 }
1668 }
1669
1670 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1671 {
1672 mr->flush_coalesced_mmio = true;
1673 }
1674
1675 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1676 {
1677 qemu_flush_coalesced_mmio_buffer();
1678 if (QTAILQ_EMPTY(&mr->coalesced)) {
1679 mr->flush_coalesced_mmio = false;
1680 }
1681 }
1682
1683 void memory_region_set_global_locking(MemoryRegion *mr)
1684 {
1685 mr->global_locking = true;
1686 }
1687
1688 void memory_region_clear_global_locking(MemoryRegion *mr)
1689 {
1690 mr->global_locking = false;
1691 }
1692
1693 static bool userspace_eventfd_warning;
1694
1695 void memory_region_add_eventfd(MemoryRegion *mr,
1696 hwaddr addr,
1697 unsigned size,
1698 bool match_data,
1699 uint64_t data,
1700 EventNotifier *e)
1701 {
1702 MemoryRegionIoeventfd mrfd = {
1703 .addr.start = int128_make64(addr),
1704 .addr.size = int128_make64(size),
1705 .match_data = match_data,
1706 .data = data,
1707 .e = e,
1708 };
1709 unsigned i;
1710
1711 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1712 userspace_eventfd_warning))) {
1713 userspace_eventfd_warning = true;
1714 error_report("Using eventfd without MMIO binding in KVM. "
1715 "Suboptimal performance expected");
1716 }
1717
1718 if (size) {
1719 adjust_endianness(mr, &mrfd.data, size);
1720 }
1721 memory_region_transaction_begin();
1722 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1723 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1724 break;
1725 }
1726 }
1727 ++mr->ioeventfd_nb;
1728 mr->ioeventfds = g_realloc(mr->ioeventfds,
1729 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1730 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1731 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1732 mr->ioeventfds[i] = mrfd;
1733 ioeventfd_update_pending |= mr->enabled;
1734 memory_region_transaction_commit();
1735 }
1736
1737 void memory_region_del_eventfd(MemoryRegion *mr,
1738 hwaddr addr,
1739 unsigned size,
1740 bool match_data,
1741 uint64_t data,
1742 EventNotifier *e)
1743 {
1744 MemoryRegionIoeventfd mrfd = {
1745 .addr.start = int128_make64(addr),
1746 .addr.size = int128_make64(size),
1747 .match_data = match_data,
1748 .data = data,
1749 .e = e,
1750 };
1751 unsigned i;
1752
1753 if (size) {
1754 adjust_endianness(mr, &mrfd.data, size);
1755 }
1756 memory_region_transaction_begin();
1757 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1758 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1759 break;
1760 }
1761 }
1762 assert(i != mr->ioeventfd_nb);
1763 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1764 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1765 --mr->ioeventfd_nb;
1766 mr->ioeventfds = g_realloc(mr->ioeventfds,
1767 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1768 ioeventfd_update_pending |= mr->enabled;
1769 memory_region_transaction_commit();
1770 }
1771
1772 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1773 {
1774 hwaddr offset = subregion->addr;
1775 MemoryRegion *mr = subregion->container;
1776 MemoryRegion *other;
1777
1778 memory_region_transaction_begin();
1779
1780 memory_region_ref(subregion);
1781 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1782 if (subregion->may_overlap || other->may_overlap) {
1783 continue;
1784 }
1785 if (int128_ge(int128_make64(offset),
1786 int128_add(int128_make64(other->addr), other->size))
1787 || int128_le(int128_add(int128_make64(offset), subregion->size),
1788 int128_make64(other->addr))) {
1789 continue;
1790 }
1791 #if 0
1792 printf("warning: subregion collision %llx/%llx (%s) "
1793 "vs %llx/%llx (%s)\n",
1794 (unsigned long long)offset,
1795 (unsigned long long)int128_get64(subregion->size),
1796 subregion->name,
1797 (unsigned long long)other->addr,
1798 (unsigned long long)int128_get64(other->size),
1799 other->name);
1800 #endif
1801 }
1802 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1803 if (subregion->priority >= other->priority) {
1804 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1805 goto done;
1806 }
1807 }
1808 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1809 done:
1810 memory_region_update_pending |= mr->enabled && subregion->enabled;
1811 memory_region_transaction_commit();
1812 }
1813
1814 static void memory_region_add_subregion_common(MemoryRegion *mr,
1815 hwaddr offset,
1816 MemoryRegion *subregion)
1817 {
1818 assert(!subregion->container);
1819 subregion->container = mr;
1820 subregion->addr = offset;
1821 memory_region_update_container_subregions(subregion);
1822 }
1823
1824 void memory_region_add_subregion(MemoryRegion *mr,
1825 hwaddr offset,
1826 MemoryRegion *subregion)
1827 {
1828 subregion->may_overlap = false;
1829 subregion->priority = 0;
1830 memory_region_add_subregion_common(mr, offset, subregion);
1831 }
1832
1833 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1834 hwaddr offset,
1835 MemoryRegion *subregion,
1836 int priority)
1837 {
1838 subregion->may_overlap = true;
1839 subregion->priority = priority;
1840 memory_region_add_subregion_common(mr, offset, subregion);
1841 }
1842
1843 void memory_region_del_subregion(MemoryRegion *mr,
1844 MemoryRegion *subregion)
1845 {
1846 memory_region_transaction_begin();
1847 assert(subregion->container == mr);
1848 subregion->container = NULL;
1849 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1850 memory_region_unref(subregion);
1851 memory_region_update_pending |= mr->enabled && subregion->enabled;
1852 memory_region_transaction_commit();
1853 }
1854
1855 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1856 {
1857 if (enabled == mr->enabled) {
1858 return;
1859 }
1860 memory_region_transaction_begin();
1861 mr->enabled = enabled;
1862 memory_region_update_pending = true;
1863 memory_region_transaction_commit();
1864 }
1865
1866 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1867 {
1868 Int128 s = int128_make64(size);
1869
1870 if (size == UINT64_MAX) {
1871 s = int128_2_64();
1872 }
1873 if (int128_eq(s, mr->size)) {
1874 return;
1875 }
1876 memory_region_transaction_begin();
1877 mr->size = s;
1878 memory_region_update_pending = true;
1879 memory_region_transaction_commit();
1880 }
1881
1882 static void memory_region_readd_subregion(MemoryRegion *mr)
1883 {
1884 MemoryRegion *container = mr->container;
1885
1886 if (container) {
1887 memory_region_transaction_begin();
1888 memory_region_ref(mr);
1889 memory_region_del_subregion(container, mr);
1890 mr->container = container;
1891 memory_region_update_container_subregions(mr);
1892 memory_region_unref(mr);
1893 memory_region_transaction_commit();
1894 }
1895 }
1896
1897 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1898 {
1899 if (addr != mr->addr) {
1900 mr->addr = addr;
1901 memory_region_readd_subregion(mr);
1902 }
1903 }
1904
1905 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1906 {
1907 assert(mr->alias);
1908
1909 if (offset == mr->alias_offset) {
1910 return;
1911 }
1912
1913 memory_region_transaction_begin();
1914 mr->alias_offset = offset;
1915 memory_region_update_pending |= mr->enabled;
1916 memory_region_transaction_commit();
1917 }
1918
1919 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1920 {
1921 return mr->align;
1922 }
1923
1924 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1925 {
1926 const AddrRange *addr = addr_;
1927 const FlatRange *fr = fr_;
1928
1929 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1930 return -1;
1931 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1932 return 1;
1933 }
1934 return 0;
1935 }
1936
1937 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1938 {
1939 return bsearch(&addr, view->ranges, view->nr,
1940 sizeof(FlatRange), cmp_flatrange_addr);
1941 }
1942
1943 bool memory_region_is_mapped(MemoryRegion *mr)
1944 {
1945 return mr->container ? true : false;
1946 }
1947
1948 /* Same as memory_region_find, but it does not add a reference to the
1949 * returned region. It must be called from an RCU critical section.
1950 */
1951 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1952 hwaddr addr, uint64_t size)
1953 {
1954 MemoryRegionSection ret = { .mr = NULL };
1955 MemoryRegion *root;
1956 AddressSpace *as;
1957 AddrRange range;
1958 FlatView *view;
1959 FlatRange *fr;
1960
1961 addr += mr->addr;
1962 for (root = mr; root->container; ) {
1963 root = root->container;
1964 addr += root->addr;
1965 }
1966
1967 as = memory_region_to_address_space(root);
1968 if (!as) {
1969 return ret;
1970 }
1971 range = addrrange_make(int128_make64(addr), int128_make64(size));
1972
1973 view = atomic_rcu_read(&as->current_map);
1974 fr = flatview_lookup(view, range);
1975 if (!fr) {
1976 return ret;
1977 }
1978
1979 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1980 --fr;
1981 }
1982
1983 ret.mr = fr->mr;
1984 ret.address_space = as;
1985 range = addrrange_intersection(range, fr->addr);
1986 ret.offset_within_region = fr->offset_in_region;
1987 ret.offset_within_region += int128_get64(int128_sub(range.start,
1988 fr->addr.start));
1989 ret.size = range.size;
1990 ret.offset_within_address_space = int128_get64(range.start);
1991 ret.readonly = fr->readonly;
1992 return ret;
1993 }
1994
1995 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1996 hwaddr addr, uint64_t size)
1997 {
1998 MemoryRegionSection ret;
1999 rcu_read_lock();
2000 ret = memory_region_find_rcu(mr, addr, size);
2001 if (ret.mr) {
2002 memory_region_ref(ret.mr);
2003 }
2004 rcu_read_unlock();
2005 return ret;
2006 }
2007
2008 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2009 {
2010 MemoryRegion *mr;
2011
2012 rcu_read_lock();
2013 mr = memory_region_find_rcu(container, addr, 1).mr;
2014 rcu_read_unlock();
2015 return mr && mr != container;
2016 }
2017
2018 void address_space_sync_dirty_bitmap(AddressSpace *as)
2019 {
2020 FlatView *view;
2021 FlatRange *fr;
2022
2023 view = address_space_get_flatview(as);
2024 FOR_EACH_FLAT_RANGE(fr, view) {
2025 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2026 }
2027 flatview_unref(view);
2028 }
2029
2030 void memory_global_dirty_log_start(void)
2031 {
2032 global_dirty_log = true;
2033
2034 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2035
2036 /* Refresh DIRTY_LOG_MIGRATION bit. */
2037 memory_region_transaction_begin();
2038 memory_region_update_pending = true;
2039 memory_region_transaction_commit();
2040 }
2041
2042 void memory_global_dirty_log_stop(void)
2043 {
2044 global_dirty_log = false;
2045
2046 /* Refresh DIRTY_LOG_MIGRATION bit. */
2047 memory_region_transaction_begin();
2048 memory_region_update_pending = true;
2049 memory_region_transaction_commit();
2050
2051 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2052 }
2053
2054 static void listener_add_address_space(MemoryListener *listener,
2055 AddressSpace *as)
2056 {
2057 FlatView *view;
2058 FlatRange *fr;
2059
2060 if (listener->address_space_filter
2061 && listener->address_space_filter != as) {
2062 return;
2063 }
2064
2065 if (listener->begin) {
2066 listener->begin(listener);
2067 }
2068 if (global_dirty_log) {
2069 if (listener->log_global_start) {
2070 listener->log_global_start(listener);
2071 }
2072 }
2073
2074 view = address_space_get_flatview(as);
2075 FOR_EACH_FLAT_RANGE(fr, view) {
2076 MemoryRegionSection section = {
2077 .mr = fr->mr,
2078 .address_space = as,
2079 .offset_within_region = fr->offset_in_region,
2080 .size = fr->addr.size,
2081 .offset_within_address_space = int128_get64(fr->addr.start),
2082 .readonly = fr->readonly,
2083 };
2084 if (fr->dirty_log_mask && listener->log_start) {
2085 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2086 }
2087 if (listener->region_add) {
2088 listener->region_add(listener, &section);
2089 }
2090 }
2091 if (listener->commit) {
2092 listener->commit(listener);
2093 }
2094 flatview_unref(view);
2095 }
2096
2097 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2098 {
2099 MemoryListener *other = NULL;
2100 AddressSpace *as;
2101
2102 listener->address_space_filter = filter;
2103 if (QTAILQ_EMPTY(&memory_listeners)
2104 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2105 memory_listeners)->priority) {
2106 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2107 } else {
2108 QTAILQ_FOREACH(other, &memory_listeners, link) {
2109 if (listener->priority < other->priority) {
2110 break;
2111 }
2112 }
2113 QTAILQ_INSERT_BEFORE(other, listener, link);
2114 }
2115
2116 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2117 listener_add_address_space(listener, as);
2118 }
2119 }
2120
2121 void memory_listener_unregister(MemoryListener *listener)
2122 {
2123 QTAILQ_REMOVE(&memory_listeners, listener, link);
2124 }
2125
2126 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2127 {
2128 memory_region_ref(root);
2129 memory_region_transaction_begin();
2130 as->ref_count = 1;
2131 as->root = root;
2132 as->malloced = false;
2133 as->current_map = g_new(FlatView, 1);
2134 flatview_init(as->current_map);
2135 as->ioeventfd_nb = 0;
2136 as->ioeventfds = NULL;
2137 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2138 as->name = g_strdup(name ? name : "anonymous");
2139 address_space_init_dispatch(as);
2140 memory_region_update_pending |= root->enabled;
2141 memory_region_transaction_commit();
2142 }
2143
2144 static void do_address_space_destroy(AddressSpace *as)
2145 {
2146 MemoryListener *listener;
2147 bool do_free = as->malloced;
2148
2149 address_space_destroy_dispatch(as);
2150
2151 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2152 assert(listener->address_space_filter != as);
2153 }
2154
2155 flatview_unref(as->current_map);
2156 g_free(as->name);
2157 g_free(as->ioeventfds);
2158 memory_region_unref(as->root);
2159 if (do_free) {
2160 g_free(as);
2161 }
2162 }
2163
2164 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2165 {
2166 AddressSpace *as;
2167
2168 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2169 if (root == as->root && as->malloced) {
2170 as->ref_count++;
2171 return as;
2172 }
2173 }
2174
2175 as = g_malloc0(sizeof *as);
2176 address_space_init(as, root, name);
2177 as->malloced = true;
2178 return as;
2179 }
2180
2181 void address_space_destroy(AddressSpace *as)
2182 {
2183 MemoryRegion *root = as->root;
2184
2185 as->ref_count--;
2186 if (as->ref_count) {
2187 return;
2188 }
2189 /* Flush out anything from MemoryListeners listening in on this */
2190 memory_region_transaction_begin();
2191 as->root = NULL;
2192 memory_region_transaction_commit();
2193 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2194 address_space_unregister(as);
2195
2196 /* At this point, as->dispatch and as->current_map are dummy
2197 * entries that the guest should never use. Wait for the old
2198 * values to expire before freeing the data.
2199 */
2200 as->root = root;
2201 call_rcu(as, do_address_space_destroy, rcu);
2202 }
2203
2204 typedef struct MemoryRegionList MemoryRegionList;
2205
2206 struct MemoryRegionList {
2207 const MemoryRegion *mr;
2208 QTAILQ_ENTRY(MemoryRegionList) queue;
2209 };
2210
2211 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2212
2213 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2214 const MemoryRegion *mr, unsigned int level,
2215 hwaddr base,
2216 MemoryRegionListHead *alias_print_queue)
2217 {
2218 MemoryRegionList *new_ml, *ml, *next_ml;
2219 MemoryRegionListHead submr_print_queue;
2220 const MemoryRegion *submr;
2221 unsigned int i;
2222
2223 if (!mr) {
2224 return;
2225 }
2226
2227 for (i = 0; i < level; i++) {
2228 mon_printf(f, " ");
2229 }
2230
2231 if (mr->alias) {
2232 MemoryRegionList *ml;
2233 bool found = false;
2234
2235 /* check if the alias is already in the queue */
2236 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2237 if (ml->mr == mr->alias) {
2238 found = true;
2239 }
2240 }
2241
2242 if (!found) {
2243 ml = g_new(MemoryRegionList, 1);
2244 ml->mr = mr->alias;
2245 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2246 }
2247 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2248 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2249 "-" TARGET_FMT_plx "%s\n",
2250 base + mr->addr,
2251 base + mr->addr
2252 + (int128_nz(mr->size) ?
2253 (hwaddr)int128_get64(int128_sub(mr->size,
2254 int128_one())) : 0),
2255 mr->priority,
2256 mr->romd_mode ? 'R' : '-',
2257 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2258 : '-',
2259 memory_region_name(mr),
2260 memory_region_name(mr->alias),
2261 mr->alias_offset,
2262 mr->alias_offset
2263 + (int128_nz(mr->size) ?
2264 (hwaddr)int128_get64(int128_sub(mr->size,
2265 int128_one())) : 0),
2266 mr->enabled ? "" : " [disabled]");
2267 } else {
2268 mon_printf(f,
2269 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2270 base + mr->addr,
2271 base + mr->addr
2272 + (int128_nz(mr->size) ?
2273 (hwaddr)int128_get64(int128_sub(mr->size,
2274 int128_one())) : 0),
2275 mr->priority,
2276 mr->romd_mode ? 'R' : '-',
2277 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2278 : '-',
2279 memory_region_name(mr),
2280 mr->enabled ? "" : " [disabled]");
2281 }
2282
2283 QTAILQ_INIT(&submr_print_queue);
2284
2285 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2286 new_ml = g_new(MemoryRegionList, 1);
2287 new_ml->mr = submr;
2288 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2289 if (new_ml->mr->addr < ml->mr->addr ||
2290 (new_ml->mr->addr == ml->mr->addr &&
2291 new_ml->mr->priority > ml->mr->priority)) {
2292 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2293 new_ml = NULL;
2294 break;
2295 }
2296 }
2297 if (new_ml) {
2298 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2299 }
2300 }
2301
2302 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2303 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2304 alias_print_queue);
2305 }
2306
2307 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2308 g_free(ml);
2309 }
2310 }
2311
2312 void mtree_info(fprintf_function mon_printf, void *f)
2313 {
2314 MemoryRegionListHead ml_head;
2315 MemoryRegionList *ml, *ml2;
2316 AddressSpace *as;
2317
2318 QTAILQ_INIT(&ml_head);
2319
2320 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2321 mon_printf(f, "address-space: %s\n", as->name);
2322 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2323 mon_printf(f, "\n");
2324 }
2325
2326 /* print aliased regions */
2327 QTAILQ_FOREACH(ml, &ml_head, queue) {
2328 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2329 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2330 mon_printf(f, "\n");
2331 }
2332
2333 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2334 g_free(ml);
2335 }
2336 }
2337
2338 static const TypeInfo memory_region_info = {
2339 .parent = TYPE_OBJECT,
2340 .name = TYPE_MEMORY_REGION,
2341 .instance_size = sizeof(MemoryRegion),
2342 .instance_init = memory_region_initfn,
2343 .instance_finalize = memory_region_finalize,
2344 };
2345
2346 static void memory_register_types(void)
2347 {
2348 type_register_static(&memory_region_info);
2349 }
2350
2351 type_init(memory_register_types)
CRIS target port of Qemu