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target-arm: Fix warn about implicit conversion
[qemu/cris-port.git] / hw / virtio / virtio-pci.c
blob755f9218b77dc9167bd8adc49981870b0c22abc1
1 /*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19
20 #include "standard-headers/linux/virtio_pci.h"
21 #include "hw/virtio/virtio.h"
22 #include "hw/virtio/virtio-blk.h"
23 #include "hw/virtio/virtio-net.h"
24 #include "hw/virtio/virtio-serial.h"
25 #include "hw/virtio/virtio-scsi.h"
26 #include "hw/virtio/virtio-balloon.h"
27 #include "hw/virtio/virtio-input.h"
28 #include "hw/pci/pci.h"
29 #include "qapi/error.h"
30 #include "qemu/error-report.h"
31 #include "hw/pci/msi.h"
32 #include "hw/pci/msix.h"
33 #include "hw/loader.h"
34 #include "sysemu/kvm.h"
35 #include "sysemu/block-backend.h"
36 #include "virtio-pci.h"
37 #include "qemu/range.h"
38 #include "hw/virtio/virtio-bus.h"
39 #include "qapi/visitor.h"
40
41 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
42
43 #undef VIRTIO_PCI_CONFIG
44
45 /* The remaining space is defined by each driver as the per-driver
46 * configuration space */
47 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
48
49 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
50 VirtIOPCIProxy *dev);
51 static void virtio_pci_reset(DeviceState *qdev);
52
53 /* virtio device */
54 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
55 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
56 {
57 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
58 }
59
60 /* DeviceState to VirtIOPCIProxy. Note: used on datapath,
61 * be careful and test performance if you change this.
62 */
63 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
64 {
65 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
66 }
67
68 static void virtio_pci_notify(DeviceState *d, uint16_t vector)
69 {
70 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
71
72 if (msix_enabled(&proxy->pci_dev))
73 msix_notify(&proxy->pci_dev, vector);
74 else {
75 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
76 pci_set_irq(&proxy->pci_dev, vdev->isr & 1);
77 }
78 }
79
80 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
81 {
82 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
83 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
84
85 pci_device_save(&proxy->pci_dev, f);
86 msix_save(&proxy->pci_dev, f);
87 if (msix_present(&proxy->pci_dev))
88 qemu_put_be16(f, vdev->config_vector);
89 }
90
91 static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq,
92 QEMUFile *f)
93 {
94 vq->num = qemu_get_be16(f);
95 vq->enabled = qemu_get_be16(f);
96 vq->desc[0] = qemu_get_be32(f);
97 vq->desc[1] = qemu_get_be32(f);
98 vq->avail[0] = qemu_get_be32(f);
99 vq->avail[1] = qemu_get_be32(f);
100 vq->used[0] = qemu_get_be32(f);
101 vq->used[1] = qemu_get_be32(f);
102 }
103
104 static bool virtio_pci_has_extra_state(DeviceState *d)
105 {
106 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
107
108 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
109 }
110
111 static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
112 {
113 VirtIOPCIProxy *proxy = pv;
114 int i;
115
116 proxy->dfselect = qemu_get_be32(f);
117 proxy->gfselect = qemu_get_be32(f);
118 proxy->guest_features[0] = qemu_get_be32(f);
119 proxy->guest_features[1] = qemu_get_be32(f);
120 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
121 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f);
122 }
123
124 return 0;
125 }
126
127 static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq,
128 QEMUFile *f)
129 {
130 qemu_put_be16(f, vq->num);
131 qemu_put_be16(f, vq->enabled);
132 qemu_put_be32(f, vq->desc[0]);
133 qemu_put_be32(f, vq->desc[1]);
134 qemu_put_be32(f, vq->avail[0]);
135 qemu_put_be32(f, vq->avail[1]);
136 qemu_put_be32(f, vq->used[0]);
137 qemu_put_be32(f, vq->used[1]);
138 }
139
140 static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size)
141 {
142 VirtIOPCIProxy *proxy = pv;
143 int i;
144
145 qemu_put_be32(f, proxy->dfselect);
146 qemu_put_be32(f, proxy->gfselect);
147 qemu_put_be32(f, proxy->guest_features[0]);
148 qemu_put_be32(f, proxy->guest_features[1]);
149 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
150 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f);
151 }
152 }
153
154 static const VMStateInfo vmstate_info_virtio_pci_modern_state = {
155 .name = "virtqueue_state",
156 .get = get_virtio_pci_modern_state,
157 .put = put_virtio_pci_modern_state,
158 };
159
160 static bool virtio_pci_modern_state_needed(void *opaque)
161 {
162 VirtIOPCIProxy *proxy = opaque;
163
164 return virtio_pci_modern(proxy);
165 }
166
167 static const VMStateDescription vmstate_virtio_pci_modern_state = {
168 .name = "virtio_pci/modern_state",
169 .version_id = 1,
170 .minimum_version_id = 1,
171 .needed = &virtio_pci_modern_state_needed,
172 .fields = (VMStateField[]) {
173 {
174 .name = "modern_state",
175 .version_id = 0,
176 .field_exists = NULL,
177 .size = 0,
178 .info = &vmstate_info_virtio_pci_modern_state,
179 .flags = VMS_SINGLE,
180 .offset = 0,
181 },
182 VMSTATE_END_OF_LIST()
183 }
184 };
185
186 static const VMStateDescription vmstate_virtio_pci = {
187 .name = "virtio_pci",
188 .version_id = 1,
189 .minimum_version_id = 1,
190 .minimum_version_id_old = 1,
191 .fields = (VMStateField[]) {
192 VMSTATE_END_OF_LIST()
193 },
194 .subsections = (const VMStateDescription*[]) {
195 &vmstate_virtio_pci_modern_state,
196 NULL
197 }
198 };
199
200 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
201 {
202 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
203
204 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
205 }
206
207 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
208 {
209 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
210
211 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
212 }
213
214 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
215 {
216 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
217 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
218
219 if (msix_present(&proxy->pci_dev))
220 qemu_put_be16(f, virtio_queue_vector(vdev, n));
221 }
222
223 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
224 {
225 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
226 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
227
228 int ret;
229 ret = pci_device_load(&proxy->pci_dev, f);
230 if (ret) {
231 return ret;
232 }
233 msix_unuse_all_vectors(&proxy->pci_dev);
234 msix_load(&proxy->pci_dev, f);
235 if (msix_present(&proxy->pci_dev)) {
236 qemu_get_be16s(f, &vdev->config_vector);
237 } else {
238 vdev->config_vector = VIRTIO_NO_VECTOR;
239 }
240 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
241 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
242 }
243 return 0;
244 }
245
246 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
247 {
248 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
249 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
250
251 uint16_t vector;
252 if (msix_present(&proxy->pci_dev)) {
253 qemu_get_be16s(f, &vector);
254 } else {
255 vector = VIRTIO_NO_VECTOR;
256 }
257 virtio_queue_set_vector(vdev, n, vector);
258 if (vector != VIRTIO_NO_VECTOR) {
259 return msix_vector_use(&proxy->pci_dev, vector);
260 }
261
262 return 0;
263 }
264
265 static bool virtio_pci_ioeventfd_started(DeviceState *d)
266 {
267 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
268
269 return proxy->ioeventfd_started;
270 }
271
272 static void virtio_pci_ioeventfd_set_started(DeviceState *d, bool started,
273 bool err)
274 {
275 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
276
277 proxy->ioeventfd_started = started;
278 }
279
280 static bool virtio_pci_ioeventfd_disabled(DeviceState *d)
281 {
282 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
283
284 return proxy->ioeventfd_disabled ||
285 !(proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD);
286 }
287
288 static void virtio_pci_ioeventfd_set_disabled(DeviceState *d, bool disabled)
289 {
290 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
291
292 proxy->ioeventfd_disabled = disabled;
293 }
294
295 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
296
297 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
298 int n, bool assign)
299 {
300 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
301 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
302 VirtQueue *vq = virtio_get_queue(vdev, n);
303 bool legacy = virtio_pci_legacy(proxy);
304 bool modern = virtio_pci_modern(proxy);
305 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
306 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
307 MemoryRegion *modern_mr = &proxy->notify.mr;
308 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
309 MemoryRegion *legacy_mr = &proxy->bar;
310 hwaddr modern_addr = QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
311 virtio_get_queue_index(vq);
312 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
313
314 if (assign) {
315 if (modern) {
316 if (fast_mmio) {
317 memory_region_add_eventfd(modern_mr, modern_addr, 0,
318 false, n, notifier);
319 } else {
320 memory_region_add_eventfd(modern_mr, modern_addr, 2,
321 false, n, notifier);
322 }
323 if (modern_pio) {
324 memory_region_add_eventfd(modern_notify_mr, 0, 2,
325 true, n, notifier);
326 }
327 }
328 if (legacy) {
329 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
330 true, n, notifier);
331 }
332 } else {
333 if (modern) {
334 if (fast_mmio) {
335 memory_region_del_eventfd(modern_mr, modern_addr, 0,
336 false, n, notifier);
337 } else {
338 memory_region_del_eventfd(modern_mr, modern_addr, 2,
339 false, n, notifier);
340 }
341 if (modern_pio) {
342 memory_region_del_eventfd(modern_notify_mr, 0, 2,
343 true, n, notifier);
344 }
345 }
346 if (legacy) {
347 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
348 true, n, notifier);
349 }
350 }
351 return 0;
352 }
353
354 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
355 {
356 virtio_bus_start_ioeventfd(&proxy->bus);
357 }
358
359 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
360 {
361 virtio_bus_stop_ioeventfd(&proxy->bus);
362 }
363
364 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
365 {
366 VirtIOPCIProxy *proxy = opaque;
367 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
368 hwaddr pa;
369
370 switch (addr) {
371 case VIRTIO_PCI_GUEST_FEATURES:
372 /* Guest does not negotiate properly? We have to assume nothing. */
373 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
374 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
375 }
376 virtio_set_features(vdev, val);
377 break;
378 case VIRTIO_PCI_QUEUE_PFN:
379 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
380 if (pa == 0) {
381 virtio_pci_reset(DEVICE(proxy));
382 }
383 else
384 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
385 break;
386 case VIRTIO_PCI_QUEUE_SEL:
387 if (val < VIRTIO_QUEUE_MAX)
388 vdev->queue_sel = val;
389 break;
390 case VIRTIO_PCI_QUEUE_NOTIFY:
391 if (val < VIRTIO_QUEUE_MAX) {
392 virtio_queue_notify(vdev, val);
393 }
394 break;
395 case VIRTIO_PCI_STATUS:
396 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
397 virtio_pci_stop_ioeventfd(proxy);
398 }
399
400 virtio_set_status(vdev, val & 0xFF);
401
402 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
403 virtio_pci_start_ioeventfd(proxy);
404 }
405
406 if (vdev->status == 0) {
407 virtio_pci_reset(DEVICE(proxy));
408 }
409
410 /* Linux before 2.6.34 drives the device without enabling
411 the PCI device bus master bit. Enable it automatically
412 for the guest. This is a PCI spec violation but so is
413 initiating DMA with bus master bit clear. */
414 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
415 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
416 proxy->pci_dev.config[PCI_COMMAND] |
417 PCI_COMMAND_MASTER, 1);
418 }
419 break;
420 case VIRTIO_MSI_CONFIG_VECTOR:
421 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
422 /* Make it possible for guest to discover an error took place. */
423 if (msix_vector_use(&proxy->pci_dev, val) < 0)
424 val = VIRTIO_NO_VECTOR;
425 vdev->config_vector = val;
426 break;
427 case VIRTIO_MSI_QUEUE_VECTOR:
428 msix_vector_unuse(&proxy->pci_dev,
429 virtio_queue_vector(vdev, vdev->queue_sel));
430 /* Make it possible for guest to discover an error took place. */
431 if (msix_vector_use(&proxy->pci_dev, val) < 0)
432 val = VIRTIO_NO_VECTOR;
433 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
434 break;
435 default:
436 error_report("%s: unexpected address 0x%x value 0x%x",
437 __func__, addr, val);
438 break;
439 }
440 }
441
442 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
443 {
444 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
445 uint32_t ret = 0xFFFFFFFF;
446
447 switch (addr) {
448 case VIRTIO_PCI_HOST_FEATURES:
449 ret = vdev->host_features;
450 break;
451 case VIRTIO_PCI_GUEST_FEATURES:
452 ret = vdev->guest_features;
453 break;
454 case VIRTIO_PCI_QUEUE_PFN:
455 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
456 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
457 break;
458 case VIRTIO_PCI_QUEUE_NUM:
459 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
460 break;
461 case VIRTIO_PCI_QUEUE_SEL:
462 ret = vdev->queue_sel;
463 break;
464 case VIRTIO_PCI_STATUS:
465 ret = vdev->status;
466 break;
467 case VIRTIO_PCI_ISR:
468 /* reading from the ISR also clears it. */
469 ret = vdev->isr;
470 vdev->isr = 0;
471 pci_irq_deassert(&proxy->pci_dev);
472 break;
473 case VIRTIO_MSI_CONFIG_VECTOR:
474 ret = vdev->config_vector;
475 break;
476 case VIRTIO_MSI_QUEUE_VECTOR:
477 ret = virtio_queue_vector(vdev, vdev->queue_sel);
478 break;
479 default:
480 break;
481 }
482
483 return ret;
484 }
485
486 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
487 unsigned size)
488 {
489 VirtIOPCIProxy *proxy = opaque;
490 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
491 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
492 uint64_t val = 0;
493 if (addr < config) {
494 return virtio_ioport_read(proxy, addr);
495 }
496 addr -= config;
497
498 switch (size) {
499 case 1:
500 val = virtio_config_readb(vdev, addr);
501 break;
502 case 2:
503 val = virtio_config_readw(vdev, addr);
504 if (virtio_is_big_endian(vdev)) {
505 val = bswap16(val);
506 }
507 break;
508 case 4:
509 val = virtio_config_readl(vdev, addr);
510 if (virtio_is_big_endian(vdev)) {
511 val = bswap32(val);
512 }
513 break;
514 }
515 return val;
516 }
517
518 static void virtio_pci_config_write(void *opaque, hwaddr addr,
519 uint64_t val, unsigned size)
520 {
521 VirtIOPCIProxy *proxy = opaque;
522 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
523 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
524 if (addr < config) {
525 virtio_ioport_write(proxy, addr, val);
526 return;
527 }
528 addr -= config;
529 /*
530 * Virtio-PCI is odd. Ioports are LE but config space is target native
531 * endian.
532 */
533 switch (size) {
534 case 1:
535 virtio_config_writeb(vdev, addr, val);
536 break;
537 case 2:
538 if (virtio_is_big_endian(vdev)) {
539 val = bswap16(val);
540 }
541 virtio_config_writew(vdev, addr, val);
542 break;
543 case 4:
544 if (virtio_is_big_endian(vdev)) {
545 val = bswap32(val);
546 }
547 virtio_config_writel(vdev, addr, val);
548 break;
549 }
550 }
551
552 static const MemoryRegionOps virtio_pci_config_ops = {
553 .read = virtio_pci_config_read,
554 .write = virtio_pci_config_write,
555 .impl = {
556 .min_access_size = 1,
557 .max_access_size = 4,
558 },
559 .endianness = DEVICE_LITTLE_ENDIAN,
560 };
561
562 /* Below are generic functions to do memcpy from/to an address space,
563 * without byteswaps, with input validation.
564 *
565 * As regular address_space_* APIs all do some kind of byteswap at least for
566 * some host/target combinations, we are forced to explicitly convert to a
567 * known-endianness integer value.
568 * It doesn't really matter which endian format to go through, so the code
569 * below selects the endian that causes the least amount of work on the given
570 * host.
571 *
572 * Note: host pointer must be aligned.
573 */
574 static
575 void virtio_address_space_write(AddressSpace *as, hwaddr addr,
576 const uint8_t *buf, int len)
577 {
578 uint32_t val;
579
580 /* address_space_* APIs assume an aligned address.
581 * As address is under guest control, handle illegal values.
582 */
583 addr &= ~(len - 1);
584
585 /* Make sure caller aligned buf properly */
586 assert(!(((uintptr_t)buf) & (len - 1)));
587
588 switch (len) {
589 case 1:
590 val = pci_get_byte(buf);
591 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
592 break;
593 case 2:
594 val = pci_get_word(buf);
595 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
596 break;
597 case 4:
598 val = pci_get_long(buf);
599 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
600 break;
601 default:
602 /* As length is under guest control, handle illegal values. */
603 break;
604 }
605 }
606
607 static void
608 virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len)
609 {
610 uint32_t val;
611
612 /* address_space_* APIs assume an aligned address.
613 * As address is under guest control, handle illegal values.
614 */
615 addr &= ~(len - 1);
616
617 /* Make sure caller aligned buf properly */
618 assert(!(((uintptr_t)buf) & (len - 1)));
619
620 switch (len) {
621 case 1:
622 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
623 pci_set_byte(buf, val);
624 break;
625 case 2:
626 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
627 pci_set_word(buf, val);
628 break;
629 case 4:
630 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
631 pci_set_long(buf, val);
632 break;
633 default:
634 /* As length is under guest control, handle illegal values. */
635 break;
636 }
637 }
638
639 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
640 uint32_t val, int len)
641 {
642 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
643 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
644 struct virtio_pci_cfg_cap *cfg;
645
646 pci_default_write_config(pci_dev, address, val, len);
647
648 if (range_covers_byte(address, len, PCI_COMMAND) &&
649 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
650 virtio_pci_stop_ioeventfd(proxy);
651 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
652 }
653
654 if (proxy->config_cap &&
655 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
656 pci_cfg_data),
657 sizeof cfg->pci_cfg_data)) {
658 uint32_t off;
659 uint32_t len;
660
661 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
662 off = le32_to_cpu(cfg->cap.offset);
663 len = le32_to_cpu(cfg->cap.length);
664
665 if (len == 1 || len == 2 || len == 4) {
666 assert(len <= sizeof cfg->pci_cfg_data);
667 virtio_address_space_write(&proxy->modern_as, off,
668 cfg->pci_cfg_data, len);
669 }
670 }
671 }
672
673 static uint32_t virtio_read_config(PCIDevice *pci_dev,
674 uint32_t address, int len)
675 {
676 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
677 struct virtio_pci_cfg_cap *cfg;
678
679 if (proxy->config_cap &&
680 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
681 pci_cfg_data),
682 sizeof cfg->pci_cfg_data)) {
683 uint32_t off;
684 uint32_t len;
685
686 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
687 off = le32_to_cpu(cfg->cap.offset);
688 len = le32_to_cpu(cfg->cap.length);
689
690 if (len == 1 || len == 2 || len == 4) {
691 assert(len <= sizeof cfg->pci_cfg_data);
692 virtio_address_space_read(&proxy->modern_as, off,
693 cfg->pci_cfg_data, len);
694 }
695 }
696
697 return pci_default_read_config(pci_dev, address, len);
698 }
699
700 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
701 unsigned int queue_no,
702 unsigned int vector)
703 {
704 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
705 int ret;
706
707 if (irqfd->users == 0) {
708 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
709 if (ret < 0) {
710 return ret;
711 }
712 irqfd->virq = ret;
713 }
714 irqfd->users++;
715 return 0;
716 }
717
718 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
719 unsigned int vector)
720 {
721 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
722 if (--irqfd->users == 0) {
723 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
724 }
725 }
726
727 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
728 unsigned int queue_no,
729 unsigned int vector)
730 {
731 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
732 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
733 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
734 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
735 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
736 }
737
738 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
739 unsigned int queue_no,
740 unsigned int vector)
741 {
742 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
743 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
744 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
745 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
746 int ret;
747
748 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
749 assert(ret == 0);
750 }
751
752 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
753 {
754 PCIDevice *dev = &proxy->pci_dev;
755 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
756 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
757 unsigned int vector;
758 int ret, queue_no;
759
760 for (queue_no = 0; queue_no < nvqs; queue_no++) {
761 if (!virtio_queue_get_num(vdev, queue_no)) {
762 break;
763 }
764 vector = virtio_queue_vector(vdev, queue_no);
765 if (vector >= msix_nr_vectors_allocated(dev)) {
766 continue;
767 }
768 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
769 if (ret < 0) {
770 goto undo;
771 }
772 /* If guest supports masking, set up irqfd now.
773 * Otherwise, delay until unmasked in the frontend.
774 */
775 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
776 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
777 if (ret < 0) {
778 kvm_virtio_pci_vq_vector_release(proxy, vector);
779 goto undo;
780 }
781 }
782 }
783 return 0;
784
785 undo:
786 while (--queue_no >= 0) {
787 vector = virtio_queue_vector(vdev, queue_no);
788 if (vector >= msix_nr_vectors_allocated(dev)) {
789 continue;
790 }
791 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
792 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
793 }
794 kvm_virtio_pci_vq_vector_release(proxy, vector);
795 }
796 return ret;
797 }
798
799 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
800 {
801 PCIDevice *dev = &proxy->pci_dev;
802 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
803 unsigned int vector;
804 int queue_no;
805 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
806
807 for (queue_no = 0; queue_no < nvqs; queue_no++) {
808 if (!virtio_queue_get_num(vdev, queue_no)) {
809 break;
810 }
811 vector = virtio_queue_vector(vdev, queue_no);
812 if (vector >= msix_nr_vectors_allocated(dev)) {
813 continue;
814 }
815 /* If guest supports masking, clean up irqfd now.
816 * Otherwise, it was cleaned when masked in the frontend.
817 */
818 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
819 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
820 }
821 kvm_virtio_pci_vq_vector_release(proxy, vector);
822 }
823 }
824
825 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
826 unsigned int queue_no,
827 unsigned int vector,
828 MSIMessage msg)
829 {
830 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
831 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
832 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
833 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
834 VirtIOIRQFD *irqfd;
835 int ret = 0;
836
837 if (proxy->vector_irqfd) {
838 irqfd = &proxy->vector_irqfd[vector];
839 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
840 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
841 &proxy->pci_dev);
842 if (ret < 0) {
843 return ret;
844 }
845 kvm_irqchip_commit_routes(kvm_state);
846 }
847 }
848
849 /* If guest supports masking, irqfd is already setup, unmask it.
850 * Otherwise, set it up now.
851 */
852 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
853 k->guest_notifier_mask(vdev, queue_no, false);
854 /* Test after unmasking to avoid losing events. */
855 if (k->guest_notifier_pending &&
856 k->guest_notifier_pending(vdev, queue_no)) {
857 event_notifier_set(n);
858 }
859 } else {
860 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
861 }
862 return ret;
863 }
864
865 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
866 unsigned int queue_no,
867 unsigned int vector)
868 {
869 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
870 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
871
872 /* If guest supports masking, keep irqfd but mask it.
873 * Otherwise, clean it up now.
874 */
875 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
876 k->guest_notifier_mask(vdev, queue_no, true);
877 } else {
878 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
879 }
880 }
881
882 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
883 MSIMessage msg)
884 {
885 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
886 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
887 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
888 int ret, index, unmasked = 0;
889
890 while (vq) {
891 index = virtio_get_queue_index(vq);
892 if (!virtio_queue_get_num(vdev, index)) {
893 break;
894 }
895 if (index < proxy->nvqs_with_notifiers) {
896 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
897 if (ret < 0) {
898 goto undo;
899 }
900 ++unmasked;
901 }
902 vq = virtio_vector_next_queue(vq);
903 }
904
905 return 0;
906
907 undo:
908 vq = virtio_vector_first_queue(vdev, vector);
909 while (vq && unmasked >= 0) {
910 index = virtio_get_queue_index(vq);
911 if (index < proxy->nvqs_with_notifiers) {
912 virtio_pci_vq_vector_mask(proxy, index, vector);
913 --unmasked;
914 }
915 vq = virtio_vector_next_queue(vq);
916 }
917 return ret;
918 }
919
920 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
921 {
922 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
923 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
924 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
925 int index;
926
927 while (vq) {
928 index = virtio_get_queue_index(vq);
929 if (!virtio_queue_get_num(vdev, index)) {
930 break;
931 }
932 if (index < proxy->nvqs_with_notifiers) {
933 virtio_pci_vq_vector_mask(proxy, index, vector);
934 }
935 vq = virtio_vector_next_queue(vq);
936 }
937 }
938
939 static void virtio_pci_vector_poll(PCIDevice *dev,
940 unsigned int vector_start,
941 unsigned int vector_end)
942 {
943 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
944 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
945 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
946 int queue_no;
947 unsigned int vector;
948 EventNotifier *notifier;
949 VirtQueue *vq;
950
951 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
952 if (!virtio_queue_get_num(vdev, queue_no)) {
953 break;
954 }
955 vector = virtio_queue_vector(vdev, queue_no);
956 if (vector < vector_start || vector >= vector_end ||
957 !msix_is_masked(dev, vector)) {
958 continue;
959 }
960 vq = virtio_get_queue(vdev, queue_no);
961 notifier = virtio_queue_get_guest_notifier(vq);
962 if (k->guest_notifier_pending) {
963 if (k->guest_notifier_pending(vdev, queue_no)) {
964 msix_set_pending(dev, vector);
965 }
966 } else if (event_notifier_test_and_clear(notifier)) {
967 msix_set_pending(dev, vector);
968 }
969 }
970 }
971
972 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
973 bool with_irqfd)
974 {
975 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
976 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
977 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
978 VirtQueue *vq = virtio_get_queue(vdev, n);
979 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
980
981 if (assign) {
982 int r = event_notifier_init(notifier, 0);
983 if (r < 0) {
984 return r;
985 }
986 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
987 } else {
988 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
989 event_notifier_cleanup(notifier);
990 }
991
992 if (!msix_enabled(&proxy->pci_dev) &&
993 vdev->use_guest_notifier_mask &&
994 vdc->guest_notifier_mask) {
995 vdc->guest_notifier_mask(vdev, n, !assign);
996 }
997
998 return 0;
999 }
1000
1001 static bool virtio_pci_query_guest_notifiers(DeviceState *d)
1002 {
1003 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1004 return msix_enabled(&proxy->pci_dev);
1005 }
1006
1007 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
1008 {
1009 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1010 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1011 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1012 int r, n;
1013 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1014 kvm_msi_via_irqfd_enabled();
1015
1016 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
1017
1018 /* When deassigning, pass a consistent nvqs value
1019 * to avoid leaking notifiers.
1020 */
1021 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1022
1023 proxy->nvqs_with_notifiers = nvqs;
1024
1025 /* Must unset vector notifier while guest notifier is still assigned */
1026 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
1027 msix_unset_vector_notifiers(&proxy->pci_dev);
1028 if (proxy->vector_irqfd) {
1029 kvm_virtio_pci_vector_release(proxy, nvqs);
1030 g_free(proxy->vector_irqfd);
1031 proxy->vector_irqfd = NULL;
1032 }
1033 }
1034
1035 for (n = 0; n < nvqs; n++) {
1036 if (!virtio_queue_get_num(vdev, n)) {
1037 break;
1038 }
1039
1040 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
1041 if (r < 0) {
1042 goto assign_error;
1043 }
1044 }
1045
1046 /* Must set vector notifier after guest notifier has been assigned */
1047 if ((with_irqfd || k->guest_notifier_mask) && assign) {
1048 if (with_irqfd) {
1049 proxy->vector_irqfd =
1050 g_malloc0(sizeof(*proxy->vector_irqfd) *
1051 msix_nr_vectors_allocated(&proxy->pci_dev));
1052 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1053 if (r < 0) {
1054 goto assign_error;
1055 }
1056 }
1057 r = msix_set_vector_notifiers(&proxy->pci_dev,
1058 virtio_pci_vector_unmask,
1059 virtio_pci_vector_mask,
1060 virtio_pci_vector_poll);
1061 if (r < 0) {
1062 goto notifiers_error;
1063 }
1064 }
1065
1066 return 0;
1067
1068 notifiers_error:
1069 if (with_irqfd) {
1070 assert(assign);
1071 kvm_virtio_pci_vector_release(proxy, nvqs);
1072 }
1073
1074 assign_error:
1075 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
1076 assert(assign);
1077 while (--n >= 0) {
1078 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1079 }
1080 return r;
1081 }
1082
1083 static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1084 {
1085 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1086 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1087
1088 if (running) {
1089 /* Old QEMU versions did not set bus master enable on status write.
1090 * Detect DRIVER set and enable it.
1091 */
1092 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1093 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1094 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1095 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1096 proxy->pci_dev.config[PCI_COMMAND] |
1097 PCI_COMMAND_MASTER, 1);
1098 }
1099 virtio_pci_start_ioeventfd(proxy);
1100 } else {
1101 virtio_pci_stop_ioeventfd(proxy);
1102 }
1103 }
1104
1105 #ifdef CONFIG_VIRTFS
1106 static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
1107 {
1108 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev);
1109 DeviceState *vdev = DEVICE(&dev->vdev);
1110
1111 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
1112 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
1113 }
1114
1115 static Property virtio_9p_pci_properties[] = {
1116 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1117 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1118 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
1119 DEFINE_PROP_END_OF_LIST(),
1120 };
1121
1122 static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
1123 {
1124 DeviceClass *dc = DEVICE_CLASS(klass);
1125 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1126 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1127
1128 k->realize = virtio_9p_pci_realize;
1129 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1130 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
1131 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1132 pcidev_k->class_id = 0x2;
1133 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
1134 dc->props = virtio_9p_pci_properties;
1135 }
1136
1137 static void virtio_9p_pci_instance_init(Object *obj)
1138 {
1139 V9fsPCIState *dev = VIRTIO_9P_PCI(obj);
1140
1141 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1142 TYPE_VIRTIO_9P);
1143 }
1144
1145 static const TypeInfo virtio_9p_pci_info = {
1146 .name = TYPE_VIRTIO_9P_PCI,
1147 .parent = TYPE_VIRTIO_PCI,
1148 .instance_size = sizeof(V9fsPCIState),
1149 .instance_init = virtio_9p_pci_instance_init,
1150 .class_init = virtio_9p_pci_class_init,
1151 };
1152 #endif /* CONFIG_VIRTFS */
1153
1154 /*
1155 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1156 */
1157
1158 static int virtio_pci_query_nvectors(DeviceState *d)
1159 {
1160 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1161
1162 return proxy->nvectors;
1163 }
1164
1165 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1166 struct virtio_pci_cap *cap)
1167 {
1168 PCIDevice *dev = &proxy->pci_dev;
1169 int offset;
1170
1171 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len);
1172 assert(offset > 0);
1173
1174 assert(cap->cap_len >= sizeof *cap);
1175 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1176 cap->cap_len - PCI_CAP_FLAGS);
1177
1178 return offset;
1179 }
1180
1181 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1182 unsigned size)
1183 {
1184 VirtIOPCIProxy *proxy = opaque;
1185 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1186 uint32_t val = 0;
1187 int i;
1188
1189 switch (addr) {
1190 case VIRTIO_PCI_COMMON_DFSELECT:
1191 val = proxy->dfselect;
1192 break;
1193 case VIRTIO_PCI_COMMON_DF:
1194 if (proxy->dfselect <= 1) {
1195 val = (vdev->host_features & ~VIRTIO_LEGACY_FEATURES) >>
1196 (32 * proxy->dfselect);
1197 }
1198 break;
1199 case VIRTIO_PCI_COMMON_GFSELECT:
1200 val = proxy->gfselect;
1201 break;
1202 case VIRTIO_PCI_COMMON_GF:
1203 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1204 val = proxy->guest_features[proxy->gfselect];
1205 }
1206 break;
1207 case VIRTIO_PCI_COMMON_MSIX:
1208 val = vdev->config_vector;
1209 break;
1210 case VIRTIO_PCI_COMMON_NUMQ:
1211 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1212 if (virtio_queue_get_num(vdev, i)) {
1213 val = i + 1;
1214 }
1215 }
1216 break;
1217 case VIRTIO_PCI_COMMON_STATUS:
1218 val = vdev->status;
1219 break;
1220 case VIRTIO_PCI_COMMON_CFGGENERATION:
1221 val = vdev->generation;
1222 break;
1223 case VIRTIO_PCI_COMMON_Q_SELECT:
1224 val = vdev->queue_sel;
1225 break;
1226 case VIRTIO_PCI_COMMON_Q_SIZE:
1227 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1228 break;
1229 case VIRTIO_PCI_COMMON_Q_MSIX:
1230 val = virtio_queue_vector(vdev, vdev->queue_sel);
1231 break;
1232 case VIRTIO_PCI_COMMON_Q_ENABLE:
1233 val = proxy->vqs[vdev->queue_sel].enabled;
1234 break;
1235 case VIRTIO_PCI_COMMON_Q_NOFF:
1236 /* Simply map queues in order */
1237 val = vdev->queue_sel;
1238 break;
1239 case VIRTIO_PCI_COMMON_Q_DESCLO:
1240 val = proxy->vqs[vdev->queue_sel].desc[0];
1241 break;
1242 case VIRTIO_PCI_COMMON_Q_DESCHI:
1243 val = proxy->vqs[vdev->queue_sel].desc[1];
1244 break;
1245 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1246 val = proxy->vqs[vdev->queue_sel].avail[0];
1247 break;
1248 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1249 val = proxy->vqs[vdev->queue_sel].avail[1];
1250 break;
1251 case VIRTIO_PCI_COMMON_Q_USEDLO:
1252 val = proxy->vqs[vdev->queue_sel].used[0];
1253 break;
1254 case VIRTIO_PCI_COMMON_Q_USEDHI:
1255 val = proxy->vqs[vdev->queue_sel].used[1];
1256 break;
1257 default:
1258 val = 0;
1259 }
1260
1261 return val;
1262 }
1263
1264 static void virtio_pci_common_write(void *opaque, hwaddr addr,
1265 uint64_t val, unsigned size)
1266 {
1267 VirtIOPCIProxy *proxy = opaque;
1268 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1269
1270 switch (addr) {
1271 case VIRTIO_PCI_COMMON_DFSELECT:
1272 proxy->dfselect = val;
1273 break;
1274 case VIRTIO_PCI_COMMON_GFSELECT:
1275 proxy->gfselect = val;
1276 break;
1277 case VIRTIO_PCI_COMMON_GF:
1278 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1279 proxy->guest_features[proxy->gfselect] = val;
1280 virtio_set_features(vdev,
1281 (((uint64_t)proxy->guest_features[1]) << 32) |
1282 proxy->guest_features[0]);
1283 }
1284 break;
1285 case VIRTIO_PCI_COMMON_MSIX:
1286 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1287 /* Make it possible for guest to discover an error took place. */
1288 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1289 val = VIRTIO_NO_VECTOR;
1290 }
1291 vdev->config_vector = val;
1292 break;
1293 case VIRTIO_PCI_COMMON_STATUS:
1294 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1295 virtio_pci_stop_ioeventfd(proxy);
1296 }
1297
1298 virtio_set_status(vdev, val & 0xFF);
1299
1300 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1301 virtio_pci_start_ioeventfd(proxy);
1302 }
1303
1304 if (vdev->status == 0) {
1305 virtio_pci_reset(DEVICE(proxy));
1306 }
1307
1308 break;
1309 case VIRTIO_PCI_COMMON_Q_SELECT:
1310 if (val < VIRTIO_QUEUE_MAX) {
1311 vdev->queue_sel = val;
1312 }
1313 break;
1314 case VIRTIO_PCI_COMMON_Q_SIZE:
1315 proxy->vqs[vdev->queue_sel].num = val;
1316 break;
1317 case VIRTIO_PCI_COMMON_Q_MSIX:
1318 msix_vector_unuse(&proxy->pci_dev,
1319 virtio_queue_vector(vdev, vdev->queue_sel));
1320 /* Make it possible for guest to discover an error took place. */
1321 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1322 val = VIRTIO_NO_VECTOR;
1323 }
1324 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1325 break;
1326 case VIRTIO_PCI_COMMON_Q_ENABLE:
1327 /* TODO: need a way to put num back on reset. */
1328 virtio_queue_set_num(vdev, vdev->queue_sel,
1329 proxy->vqs[vdev->queue_sel].num);
1330 virtio_queue_set_rings(vdev, vdev->queue_sel,
1331 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1332 proxy->vqs[vdev->queue_sel].desc[0],
1333 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1334 proxy->vqs[vdev->queue_sel].avail[0],
1335 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1336 proxy->vqs[vdev->queue_sel].used[0]);
1337 proxy->vqs[vdev->queue_sel].enabled = 1;
1338 break;
1339 case VIRTIO_PCI_COMMON_Q_DESCLO:
1340 proxy->vqs[vdev->queue_sel].desc[0] = val;
1341 break;
1342 case VIRTIO_PCI_COMMON_Q_DESCHI:
1343 proxy->vqs[vdev->queue_sel].desc[1] = val;
1344 break;
1345 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1346 proxy->vqs[vdev->queue_sel].avail[0] = val;
1347 break;
1348 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1349 proxy->vqs[vdev->queue_sel].avail[1] = val;
1350 break;
1351 case VIRTIO_PCI_COMMON_Q_USEDLO:
1352 proxy->vqs[vdev->queue_sel].used[0] = val;
1353 break;
1354 case VIRTIO_PCI_COMMON_Q_USEDHI:
1355 proxy->vqs[vdev->queue_sel].used[1] = val;
1356 break;
1357 default:
1358 break;
1359 }
1360 }
1361
1362
1363 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1364 unsigned size)
1365 {
1366 return 0;
1367 }
1368
1369 static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1370 uint64_t val, unsigned size)
1371 {
1372 VirtIODevice *vdev = opaque;
1373 unsigned queue = addr / QEMU_VIRTIO_PCI_QUEUE_MEM_MULT;
1374
1375 if (queue < VIRTIO_QUEUE_MAX) {
1376 virtio_queue_notify(vdev, queue);
1377 }
1378 }
1379
1380 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1381 uint64_t val, unsigned size)
1382 {
1383 VirtIODevice *vdev = opaque;
1384 unsigned queue = val;
1385
1386 if (queue < VIRTIO_QUEUE_MAX) {
1387 virtio_queue_notify(vdev, queue);
1388 }
1389 }
1390
1391 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1392 unsigned size)
1393 {
1394 VirtIOPCIProxy *proxy = opaque;
1395 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1396 uint64_t val = vdev->isr;
1397
1398 vdev->isr = 0;
1399 pci_irq_deassert(&proxy->pci_dev);
1400
1401 return val;
1402 }
1403
1404 static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1405 uint64_t val, unsigned size)
1406 {
1407 }
1408
1409 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1410 unsigned size)
1411 {
1412 VirtIODevice *vdev = opaque;
1413 uint64_t val = 0;
1414
1415 switch (size) {
1416 case 1:
1417 val = virtio_config_modern_readb(vdev, addr);
1418 break;
1419 case 2:
1420 val = virtio_config_modern_readw(vdev, addr);
1421 break;
1422 case 4:
1423 val = virtio_config_modern_readl(vdev, addr);
1424 break;
1425 }
1426 return val;
1427 }
1428
1429 static void virtio_pci_device_write(void *opaque, hwaddr addr,
1430 uint64_t val, unsigned size)
1431 {
1432 VirtIODevice *vdev = opaque;
1433 switch (size) {
1434 case 1:
1435 virtio_config_modern_writeb(vdev, addr, val);
1436 break;
1437 case 2:
1438 virtio_config_modern_writew(vdev, addr, val);
1439 break;
1440 case 4:
1441 virtio_config_modern_writel(vdev, addr, val);
1442 break;
1443 }
1444 }
1445
1446 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1447 {
1448 static const MemoryRegionOps common_ops = {
1449 .read = virtio_pci_common_read,
1450 .write = virtio_pci_common_write,
1451 .impl = {
1452 .min_access_size = 1,
1453 .max_access_size = 4,
1454 },
1455 .endianness = DEVICE_LITTLE_ENDIAN,
1456 };
1457 static const MemoryRegionOps isr_ops = {
1458 .read = virtio_pci_isr_read,
1459 .write = virtio_pci_isr_write,
1460 .impl = {
1461 .min_access_size = 1,
1462 .max_access_size = 4,
1463 },
1464 .endianness = DEVICE_LITTLE_ENDIAN,
1465 };
1466 static const MemoryRegionOps device_ops = {
1467 .read = virtio_pci_device_read,
1468 .write = virtio_pci_device_write,
1469 .impl = {
1470 .min_access_size = 1,
1471 .max_access_size = 4,
1472 },
1473 .endianness = DEVICE_LITTLE_ENDIAN,
1474 };
1475 static const MemoryRegionOps notify_ops = {
1476 .read = virtio_pci_notify_read,
1477 .write = virtio_pci_notify_write,
1478 .impl = {
1479 .min_access_size = 1,
1480 .max_access_size = 4,
1481 },
1482 .endianness = DEVICE_LITTLE_ENDIAN,
1483 };
1484 static const MemoryRegionOps notify_pio_ops = {
1485 .read = virtio_pci_notify_read,
1486 .write = virtio_pci_notify_write_pio,
1487 .impl = {
1488 .min_access_size = 1,
1489 .max_access_size = 4,
1490 },
1491 .endianness = DEVICE_LITTLE_ENDIAN,
1492 };
1493
1494
1495 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1496 &common_ops,
1497 proxy,
1498 "virtio-pci-common",
1499 proxy->common.size);
1500
1501 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1502 &isr_ops,
1503 proxy,
1504 "virtio-pci-isr",
1505 proxy->isr.size);
1506
1507 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1508 &device_ops,
1509 virtio_bus_get_device(&proxy->bus),
1510 "virtio-pci-device",
1511 proxy->device.size);
1512
1513 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1514 &notify_ops,
1515 virtio_bus_get_device(&proxy->bus),
1516 "virtio-pci-notify",
1517 proxy->notify.size);
1518
1519 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1520 &notify_pio_ops,
1521 virtio_bus_get_device(&proxy->bus),
1522 "virtio-pci-notify-pio",
1523 proxy->notify.size);
1524 }
1525
1526 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
1527 VirtIOPCIRegion *region,
1528 struct virtio_pci_cap *cap,
1529 MemoryRegion *mr,
1530 uint8_t bar)
1531 {
1532 memory_region_add_subregion(mr, region->offset, &region->mr);
1533
1534 cap->cfg_type = region->type;
1535 cap->bar = bar;
1536 cap->offset = cpu_to_le32(region->offset);
1537 cap->length = cpu_to_le32(region->size);
1538 virtio_pci_add_mem_cap(proxy, cap);
1539
1540 }
1541
1542 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1543 VirtIOPCIRegion *region,
1544 struct virtio_pci_cap *cap)
1545 {
1546 virtio_pci_modern_region_map(proxy, region, cap,
1547 &proxy->modern_bar, proxy->modern_mem_bar);
1548 }
1549
1550 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1551 VirtIOPCIRegion *region,
1552 struct virtio_pci_cap *cap)
1553 {
1554 virtio_pci_modern_region_map(proxy, region, cap,
1555 &proxy->io_bar, proxy->modern_io_bar);
1556 }
1557
1558 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1559 VirtIOPCIRegion *region)
1560 {
1561 memory_region_del_subregion(&proxy->modern_bar,
1562 &region->mr);
1563 }
1564
1565 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1566 VirtIOPCIRegion *region)
1567 {
1568 memory_region_del_subregion(&proxy->io_bar,
1569 &region->mr);
1570 }
1571
1572 /* This is called by virtio-bus just after the device is plugged. */
1573 static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
1574 {
1575 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1576 VirtioBusState *bus = &proxy->bus;
1577 bool legacy = virtio_pci_legacy(proxy);
1578 bool modern = virtio_pci_modern(proxy);
1579 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1580 uint8_t *config;
1581 uint32_t size;
1582 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1583
1584 config = proxy->pci_dev.config;
1585 if (proxy->class_code) {
1586 pci_config_set_class(config, proxy->class_code);
1587 }
1588
1589 if (legacy) {
1590 /* legacy and transitional */
1591 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID,
1592 pci_get_word(config + PCI_VENDOR_ID));
1593 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1594 } else {
1595 /* pure virtio-1.0 */
1596 pci_set_word(config + PCI_VENDOR_ID,
1597 PCI_VENDOR_ID_REDHAT_QUMRANET);
1598 pci_set_word(config + PCI_DEVICE_ID,
1599 0x1040 + virtio_bus_get_vdev_id(bus));
1600 pci_config_set_revision(config, 1);
1601 }
1602 config[PCI_INTERRUPT_PIN] = 1;
1603
1604
1605 if (modern) {
1606 struct virtio_pci_cap cap = {
1607 .cap_len = sizeof cap,
1608 };
1609 struct virtio_pci_notify_cap notify = {
1610 .cap.cap_len = sizeof notify,
1611 .notify_off_multiplier =
1612 cpu_to_le32(QEMU_VIRTIO_PCI_QUEUE_MEM_MULT),
1613 };
1614 struct virtio_pci_cfg_cap cfg = {
1615 .cap.cap_len = sizeof cfg,
1616 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1617 };
1618 struct virtio_pci_notify_cap notify_pio = {
1619 .cap.cap_len = sizeof notify,
1620 .notify_off_multiplier = cpu_to_le32(0x0),
1621 };
1622
1623 struct virtio_pci_cfg_cap *cfg_mask;
1624
1625 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1626 virtio_pci_modern_regions_init(proxy);
1627
1628 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1629 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1630 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1631 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1632
1633 if (modern_pio) {
1634 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1635 "virtio-pci-io", 0x4);
1636
1637 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar,
1638 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1639
1640 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1641 &notify_pio.cap);
1642 }
1643
1644 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar,
1645 PCI_BASE_ADDRESS_SPACE_MEMORY |
1646 PCI_BASE_ADDRESS_MEM_PREFETCH |
1647 PCI_BASE_ADDRESS_MEM_TYPE_64,
1648 &proxy->modern_bar);
1649
1650 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1651 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1652 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1653 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1654 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1655 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
1656 }
1657
1658 if (proxy->nvectors) {
1659 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1660 proxy->msix_bar);
1661 if (err) {
1662 /* Notice when a system that supports MSIx can't initialize it. */
1663 if (err != -ENOTSUP) {
1664 error_report("unable to init msix vectors to %" PRIu32,
1665 proxy->nvectors);
1666 }
1667 proxy->nvectors = 0;
1668 }
1669 }
1670
1671 proxy->pci_dev.config_write = virtio_write_config;
1672 proxy->pci_dev.config_read = virtio_read_config;
1673
1674 if (legacy) {
1675 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1676 + virtio_bus_get_vdev_config_len(bus);
1677 size = pow2ceil(size);
1678
1679 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1680 &virtio_pci_config_ops,
1681 proxy, "virtio-pci", size);
1682
1683 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar,
1684 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
1685 }
1686
1687 if (!kvm_has_many_ioeventfds()) {
1688 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1689 }
1690
1691 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1692 }
1693
1694 static void virtio_pci_device_unplugged(DeviceState *d)
1695 {
1696 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1697 bool modern = virtio_pci_modern(proxy);
1698 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1699
1700 virtio_pci_stop_ioeventfd(proxy);
1701
1702 if (modern) {
1703 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1704 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1705 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1706 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1707 if (modern_pio) {
1708 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1709 }
1710 }
1711 }
1712
1713 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
1714 {
1715 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1716 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
1717 bool pcie_port = pci_bus_is_express(pci_dev->bus) &&
1718 !pci_bus_is_root(pci_dev->bus);
1719
1720 /*
1721 * virtio pci bar layout used by default.
1722 * subclasses can re-arrange things if needed.
1723 *
1724 * region 0 -- virtio legacy io bar
1725 * region 1 -- msi-x bar
1726 * region 4+5 -- virtio modern memory (64bit) bar
1727 *
1728 */
1729 proxy->legacy_io_bar = 0;
1730 proxy->msix_bar = 1;
1731 proxy->modern_io_bar = 2;
1732 proxy->modern_mem_bar = 4;
1733
1734 proxy->common.offset = 0x0;
1735 proxy->common.size = 0x1000;
1736 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1737
1738 proxy->isr.offset = 0x1000;
1739 proxy->isr.size = 0x1000;
1740 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1741
1742 proxy->device.offset = 0x2000;
1743 proxy->device.size = 0x1000;
1744 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1745
1746 proxy->notify.offset = 0x3000;
1747 proxy->notify.size =
1748 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT * VIRTIO_QUEUE_MAX;
1749 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1750
1751 proxy->notify_pio.offset = 0x0;
1752 proxy->notify_pio.size = 0x4;
1753 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1754
1755 /* subclasses can enforce modern, so do this unconditionally */
1756 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
1757 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
1758 VIRTIO_QUEUE_MAX);
1759
1760 memory_region_init_alias(&proxy->modern_cfg,
1761 OBJECT(proxy),
1762 "virtio-pci-cfg",
1763 &proxy->modern_bar,
1764 0,
1765 memory_region_size(&proxy->modern_bar));
1766
1767 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as");
1768
1769 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
1770 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
1771 }
1772
1773 if (pcie_port && pci_is_express(pci_dev)) {
1774 int pos;
1775
1776 pos = pcie_endpoint_cap_init(pci_dev, 0);
1777 assert(pos > 0);
1778
1779 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
1780 assert(pos > 0);
1781
1782 /*
1783 * Indicates that this function complies with revision 1.2 of the
1784 * PCI Power Management Interface Specification.
1785 */
1786 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
1787 } else {
1788 /*
1789 * make future invocations of pci_is_express() return false
1790 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
1791 */
1792 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1793 }
1794
1795 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
1796 if (k->realize) {
1797 k->realize(proxy, errp);
1798 }
1799 }
1800
1801 static void virtio_pci_exit(PCIDevice *pci_dev)
1802 {
1803 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1804
1805 msix_uninit_exclusive_bar(pci_dev);
1806 address_space_destroy(&proxy->modern_as);
1807 }
1808
1809 static void virtio_pci_reset(DeviceState *qdev)
1810 {
1811 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1812 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
1813 int i;
1814
1815 virtio_pci_stop_ioeventfd(proxy);
1816 virtio_bus_reset(bus);
1817 msix_unuse_all_vectors(&proxy->pci_dev);
1818
1819 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1820 proxy->vqs[i].enabled = 0;
1821 }
1822 }
1823
1824 static Property virtio_pci_properties[] = {
1825 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1826 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
1827 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
1828 ON_OFF_AUTO_AUTO),
1829 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
1830 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1831 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
1832 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1833 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1834 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1835 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
1836 DEFINE_PROP_END_OF_LIST(),
1837 };
1838
1839 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1840 {
1841 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1842 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1843 PCIDevice *pci_dev = &proxy->pci_dev;
1844
1845 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
1846 virtio_pci_modern(proxy)) {
1847 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1848 }
1849
1850 vpciklass->parent_dc_realize(qdev, errp);
1851 }
1852
1853 static void virtio_pci_class_init(ObjectClass *klass, void *data)
1854 {
1855 DeviceClass *dc = DEVICE_CLASS(klass);
1856 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1857 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
1858
1859 dc->props = virtio_pci_properties;
1860 k->realize = virtio_pci_realize;
1861 k->exit = virtio_pci_exit;
1862 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1863 k->revision = VIRTIO_PCI_ABI_VERSION;
1864 k->class_id = PCI_CLASS_OTHERS;
1865 vpciklass->parent_dc_realize = dc->realize;
1866 dc->realize = virtio_pci_dc_realize;
1867 dc->reset = virtio_pci_reset;
1868 }
1869
1870 static const TypeInfo virtio_pci_info = {
1871 .name = TYPE_VIRTIO_PCI,
1872 .parent = TYPE_PCI_DEVICE,
1873 .instance_size = sizeof(VirtIOPCIProxy),
1874 .class_init = virtio_pci_class_init,
1875 .class_size = sizeof(VirtioPCIClass),
1876 .abstract = true,
1877 };
1878
1879 /* virtio-blk-pci */
1880
1881 static Property virtio_blk_pci_properties[] = {
1882 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
1883 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1884 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1885 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
1886 DEFINE_PROP_END_OF_LIST(),
1887 };
1888
1889 static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
1890 {
1891 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
1892 DeviceState *vdev = DEVICE(&dev->vdev);
1893
1894 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
1895 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
1896 }
1897
1898 static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
1899 {
1900 DeviceClass *dc = DEVICE_CLASS(klass);
1901 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1902 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1903
1904 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
1905 dc->props = virtio_blk_pci_properties;
1906 k->realize = virtio_blk_pci_realize;
1907 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1908 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
1909 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
1910 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1911 }
1912
1913 static void virtio_blk_pci_instance_init(Object *obj)
1914 {
1915 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
1916
1917 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1918 TYPE_VIRTIO_BLK);
1919 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread",
1920 &error_abort);
1921 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
1922 "bootindex", &error_abort);
1923 }
1924
1925 static const TypeInfo virtio_blk_pci_info = {
1926 .name = TYPE_VIRTIO_BLK_PCI,
1927 .parent = TYPE_VIRTIO_PCI,
1928 .instance_size = sizeof(VirtIOBlkPCI),
1929 .instance_init = virtio_blk_pci_instance_init,
1930 .class_init = virtio_blk_pci_class_init,
1931 };
1932
1933 /* virtio-scsi-pci */
1934
1935 static Property virtio_scsi_pci_properties[] = {
1936 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
1937 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
1938 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
1939 DEV_NVECTORS_UNSPECIFIED),
1940 DEFINE_PROP_END_OF_LIST(),
1941 };
1942
1943 static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
1944 {
1945 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
1946 DeviceState *vdev = DEVICE(&dev->vdev);
1947 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
1948 DeviceState *proxy = DEVICE(vpci_dev);
1949 char *bus_name;
1950
1951 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
1952 vpci_dev->nvectors = vs->conf.num_queues + 3;
1953 }
1954
1955 /*
1956 * For command line compatibility, this sets the virtio-scsi-device bus
1957 * name as before.
1958 */
1959 if (proxy->id) {
1960 bus_name = g_strdup_printf("%s.0", proxy->id);
1961 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
1962 g_free(bus_name);
1963 }
1964
1965 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
1966 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
1967 }
1968
1969 static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
1970 {
1971 DeviceClass *dc = DEVICE_CLASS(klass);
1972 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
1973 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
1974
1975 k->realize = virtio_scsi_pci_realize;
1976 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
1977 dc->props = virtio_scsi_pci_properties;
1978 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1979 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
1980 pcidev_k->revision = 0x00;
1981 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
1982 }
1983
1984 static void virtio_scsi_pci_instance_init(Object *obj)
1985 {
1986 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj);
1987
1988 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
1989 TYPE_VIRTIO_SCSI);
1990 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread",
1991 &error_abort);
1992 }
1993
1994 static const TypeInfo virtio_scsi_pci_info = {
1995 .name = TYPE_VIRTIO_SCSI_PCI,
1996 .parent = TYPE_VIRTIO_PCI,
1997 .instance_size = sizeof(VirtIOSCSIPCI),
1998 .instance_init = virtio_scsi_pci_instance_init,
1999 .class_init = virtio_scsi_pci_class_init,
2000 };
2001
2002 /* vhost-scsi-pci */
2003
2004 #ifdef CONFIG_VHOST_SCSI
2005 static Property vhost_scsi_pci_properties[] = {
2006 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
2007 DEV_NVECTORS_UNSPECIFIED),
2008 DEFINE_PROP_END_OF_LIST(),
2009 };
2010
2011 static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2012 {
2013 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev);
2014 DeviceState *vdev = DEVICE(&dev->vdev);
2015 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev);
2016
2017 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2018 vpci_dev->nvectors = vs->conf.num_queues + 3;
2019 }
2020
2021 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2022 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2023 }
2024
2025 static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
2026 {
2027 DeviceClass *dc = DEVICE_CLASS(klass);
2028 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2029 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2030 k->realize = vhost_scsi_pci_realize;
2031 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2032 dc->props = vhost_scsi_pci_properties;
2033 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2034 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI;
2035 pcidev_k->revision = 0x00;
2036 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
2037 }
2038
2039 static void vhost_scsi_pci_instance_init(Object *obj)
2040 {
2041 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj);
2042
2043 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2044 TYPE_VHOST_SCSI);
2045 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2046 "bootindex", &error_abort);
2047 }
2048
2049 static const TypeInfo vhost_scsi_pci_info = {
2050 .name = TYPE_VHOST_SCSI_PCI,
2051 .parent = TYPE_VIRTIO_PCI,
2052 .instance_size = sizeof(VHostSCSIPCI),
2053 .instance_init = vhost_scsi_pci_instance_init,
2054 .class_init = vhost_scsi_pci_class_init,
2055 };
2056 #endif
2057
2058 /* virtio-balloon-pci */
2059
2060 static Property virtio_balloon_pci_properties[] = {
2061 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
2062 DEFINE_PROP_END_OF_LIST(),
2063 };
2064
2065 static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2066 {
2067 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev);
2068 DeviceState *vdev = DEVICE(&dev->vdev);
2069
2070 if (vpci_dev->class_code != PCI_CLASS_OTHERS &&
2071 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */
2072 vpci_dev->class_code = PCI_CLASS_OTHERS;
2073 }
2074
2075 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2076 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2077 }
2078
2079 static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
2080 {
2081 DeviceClass *dc = DEVICE_CLASS(klass);
2082 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2083 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2084 k->realize = virtio_balloon_pci_realize;
2085 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2086 dc->props = virtio_balloon_pci_properties;
2087 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2088 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON;
2089 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2090 pcidev_k->class_id = PCI_CLASS_OTHERS;
2091 }
2092
2093 static void virtio_balloon_pci_instance_init(Object *obj)
2094 {
2095 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj);
2096
2097 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2098 TYPE_VIRTIO_BALLOON);
2099 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev),
2100 "guest-stats", &error_abort);
2101 object_property_add_alias(obj, "guest-stats-polling-interval",
2102 OBJECT(&dev->vdev),
2103 "guest-stats-polling-interval", &error_abort);
2104 }
2105
2106 static const TypeInfo virtio_balloon_pci_info = {
2107 .name = TYPE_VIRTIO_BALLOON_PCI,
2108 .parent = TYPE_VIRTIO_PCI,
2109 .instance_size = sizeof(VirtIOBalloonPCI),
2110 .instance_init = virtio_balloon_pci_instance_init,
2111 .class_init = virtio_balloon_pci_class_init,
2112 };
2113
2114 /* virtio-serial-pci */
2115
2116 static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2117 {
2118 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev);
2119 DeviceState *vdev = DEVICE(&dev->vdev);
2120 DeviceState *proxy = DEVICE(vpci_dev);
2121 char *bus_name;
2122
2123 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
2124 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
2125 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */
2126 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER;
2127 }
2128
2129 /* backwards-compatibility with machines that were created with
2130 DEV_NVECTORS_UNSPECIFIED */
2131 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
2132 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1;
2133 }
2134
2135 /*
2136 * For command line compatibility, this sets the virtio-serial-device bus
2137 * name as before.
2138 */
2139 if (proxy->id) {
2140 bus_name = g_strdup_printf("%s.0", proxy->id);
2141 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name);
2142 g_free(bus_name);
2143 }
2144
2145 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2146 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2147 }
2148
2149 static Property virtio_serial_pci_properties[] = {
2150 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2151 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
2152 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
2153 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
2154 DEFINE_PROP_END_OF_LIST(),
2155 };
2156
2157 static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
2158 {
2159 DeviceClass *dc = DEVICE_CLASS(klass);
2160 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2161 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2162 k->realize = virtio_serial_pci_realize;
2163 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
2164 dc->props = virtio_serial_pci_properties;
2165 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2166 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE;
2167 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2168 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER;
2169 }
2170
2171 static void virtio_serial_pci_instance_init(Object *obj)
2172 {
2173 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj);
2174
2175 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2176 TYPE_VIRTIO_SERIAL);
2177 }
2178
2179 static const TypeInfo virtio_serial_pci_info = {
2180 .name = TYPE_VIRTIO_SERIAL_PCI,
2181 .parent = TYPE_VIRTIO_PCI,
2182 .instance_size = sizeof(VirtIOSerialPCI),
2183 .instance_init = virtio_serial_pci_instance_init,
2184 .class_init = virtio_serial_pci_class_init,
2185 };
2186
2187 /* virtio-net-pci */
2188
2189 static Property virtio_net_properties[] = {
2190 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
2191 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false),
2192 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
2193 DEFINE_PROP_END_OF_LIST(),
2194 };
2195
2196 static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2197 {
2198 DeviceState *qdev = DEVICE(vpci_dev);
2199 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev);
2200 DeviceState *vdev = DEVICE(&dev->vdev);
2201
2202 virtio_net_set_netclient_name(&dev->vdev, qdev->id,
2203 object_get_typename(OBJECT(qdev)));
2204 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2205 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2206 }
2207
2208 static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
2209 {
2210 DeviceClass *dc = DEVICE_CLASS(klass);
2211 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2212 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2213
2214 k->romfile = "efi-virtio.rom";
2215 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2216 k->device_id = PCI_DEVICE_ID_VIRTIO_NET;
2217 k->revision = VIRTIO_PCI_ABI_VERSION;
2218 k->class_id = PCI_CLASS_NETWORK_ETHERNET;
2219 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
2220 dc->props = virtio_net_properties;
2221 vpciklass->realize = virtio_net_pci_realize;
2222 }
2223
2224 static void virtio_net_pci_instance_init(Object *obj)
2225 {
2226 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj);
2227
2228 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2229 TYPE_VIRTIO_NET);
2230 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
2231 "bootindex", &error_abort);
2232 }
2233
2234 static const TypeInfo virtio_net_pci_info = {
2235 .name = TYPE_VIRTIO_NET_PCI,
2236 .parent = TYPE_VIRTIO_PCI,
2237 .instance_size = sizeof(VirtIONetPCI),
2238 .instance_init = virtio_net_pci_instance_init,
2239 .class_init = virtio_net_pci_class_init,
2240 };
2241
2242 /* virtio-rng-pci */
2243
2244 static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2245 {
2246 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
2247 DeviceState *vdev = DEVICE(&vrng->vdev);
2248 Error *err = NULL;
2249
2250 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2251 object_property_set_bool(OBJECT(vdev), true, "realized", &err);
2252 if (err) {
2253 error_propagate(errp, err);
2254 return;
2255 }
2256
2257 object_property_set_link(OBJECT(vrng),
2258 OBJECT(vrng->vdev.conf.rng), "rng",
2259 NULL);
2260 }
2261
2262 static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
2263 {
2264 DeviceClass *dc = DEVICE_CLASS(klass);
2265 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2266 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2267
2268 k->realize = virtio_rng_pci_realize;
2269 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2270
2271 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2272 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
2273 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
2274 pcidev_k->class_id = PCI_CLASS_OTHERS;
2275 }
2276
2277 static void virtio_rng_initfn(Object *obj)
2278 {
2279 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj);
2280
2281 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2282 TYPE_VIRTIO_RNG);
2283 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng",
2284 &error_abort);
2285 }
2286
2287 static const TypeInfo virtio_rng_pci_info = {
2288 .name = TYPE_VIRTIO_RNG_PCI,
2289 .parent = TYPE_VIRTIO_PCI,
2290 .instance_size = sizeof(VirtIORngPCI),
2291 .instance_init = virtio_rng_initfn,
2292 .class_init = virtio_rng_pci_class_init,
2293 };
2294
2295 /* virtio-input-pci */
2296
2297 static Property virtio_input_pci_properties[] = {
2298 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
2299 DEFINE_PROP_END_OF_LIST(),
2300 };
2301
2302 static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
2303 {
2304 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev);
2305 DeviceState *vdev = DEVICE(&vinput->vdev);
2306
2307 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
2308 virtio_pci_force_virtio_1(vpci_dev);
2309 object_property_set_bool(OBJECT(vdev), true, "realized", errp);
2310 }
2311
2312 static void virtio_input_pci_class_init(ObjectClass *klass, void *data)
2313 {
2314 DeviceClass *dc = DEVICE_CLASS(klass);
2315 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
2316 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2317
2318 dc->props = virtio_input_pci_properties;
2319 k->realize = virtio_input_pci_realize;
2320 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
2321
2322 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER;
2323 }
2324
2325 static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data)
2326 {
2327 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2328
2329 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD;
2330 }
2331
2332 static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass,
2333 void *data)
2334 {
2335 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
2336
2337 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE;
2338 }
2339
2340 static void virtio_keyboard_initfn(Object *obj)
2341 {
2342 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
2343
2344 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2345 TYPE_VIRTIO_KEYBOARD);
2346 }
2347
2348 static void virtio_mouse_initfn(Object *obj)
2349 {
2350 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
2351
2352 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2353 TYPE_VIRTIO_MOUSE);
2354 }
2355
2356 static void virtio_tablet_initfn(Object *obj)
2357 {
2358 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj);
2359
2360 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2361 TYPE_VIRTIO_TABLET);
2362 }
2363
2364 static const TypeInfo virtio_input_pci_info = {
2365 .name = TYPE_VIRTIO_INPUT_PCI,
2366 .parent = TYPE_VIRTIO_PCI,
2367 .instance_size = sizeof(VirtIOInputPCI),
2368 .class_init = virtio_input_pci_class_init,
2369 .abstract = true,
2370 };
2371
2372 static const TypeInfo virtio_input_hid_pci_info = {
2373 .name = TYPE_VIRTIO_INPUT_HID_PCI,
2374 .parent = TYPE_VIRTIO_INPUT_PCI,
2375 .instance_size = sizeof(VirtIOInputHIDPCI),
2376 .abstract = true,
2377 };
2378
2379 static const TypeInfo virtio_keyboard_pci_info = {
2380 .name = TYPE_VIRTIO_KEYBOARD_PCI,
2381 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2382 .class_init = virtio_input_hid_kbd_pci_class_init,
2383 .instance_size = sizeof(VirtIOInputHIDPCI),
2384 .instance_init = virtio_keyboard_initfn,
2385 };
2386
2387 static const TypeInfo virtio_mouse_pci_info = {
2388 .name = TYPE_VIRTIO_MOUSE_PCI,
2389 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2390 .class_init = virtio_input_hid_mouse_pci_class_init,
2391 .instance_size = sizeof(VirtIOInputHIDPCI),
2392 .instance_init = virtio_mouse_initfn,
2393 };
2394
2395 static const TypeInfo virtio_tablet_pci_info = {
2396 .name = TYPE_VIRTIO_TABLET_PCI,
2397 .parent = TYPE_VIRTIO_INPUT_HID_PCI,
2398 .instance_size = sizeof(VirtIOInputHIDPCI),
2399 .instance_init = virtio_tablet_initfn,
2400 };
2401
2402 #ifdef CONFIG_LINUX
2403 static void virtio_host_initfn(Object *obj)
2404 {
2405 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj);
2406
2407 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
2408 TYPE_VIRTIO_INPUT_HOST);
2409 }
2410
2411 static const TypeInfo virtio_host_pci_info = {
2412 .name = TYPE_VIRTIO_INPUT_HOST_PCI,
2413 .parent = TYPE_VIRTIO_INPUT_PCI,
2414 .instance_size = sizeof(VirtIOInputHostPCI),
2415 .instance_init = virtio_host_initfn,
2416 };
2417 #endif
2418
2419 /* virtio-pci-bus */
2420
2421 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2422 VirtIOPCIProxy *dev)
2423 {
2424 DeviceState *qdev = DEVICE(dev);
2425 char virtio_bus_name[] = "virtio-bus";
2426
2427 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
2428 virtio_bus_name);
2429 }
2430
2431 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2432 {
2433 BusClass *bus_class = BUS_CLASS(klass);
2434 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2435 bus_class->max_dev = 1;
2436 k->notify = virtio_pci_notify;
2437 k->save_config = virtio_pci_save_config;
2438 k->load_config = virtio_pci_load_config;
2439 k->save_queue = virtio_pci_save_queue;
2440 k->load_queue = virtio_pci_load_queue;
2441 k->save_extra_state = virtio_pci_save_extra_state;
2442 k->load_extra_state = virtio_pci_load_extra_state;
2443 k->has_extra_state = virtio_pci_has_extra_state;
2444 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2445 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2446 k->vmstate_change = virtio_pci_vmstate_change;
2447 k->device_plugged = virtio_pci_device_plugged;
2448 k->device_unplugged = virtio_pci_device_unplugged;
2449 k->query_nvectors = virtio_pci_query_nvectors;
2450 k->ioeventfd_started = virtio_pci_ioeventfd_started;
2451 k->ioeventfd_set_started = virtio_pci_ioeventfd_set_started;
2452 k->ioeventfd_disabled = virtio_pci_ioeventfd_disabled;
2453 k->ioeventfd_set_disabled = virtio_pci_ioeventfd_set_disabled;
2454 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2455 }
2456
2457 static const TypeInfo virtio_pci_bus_info = {
2458 .name = TYPE_VIRTIO_PCI_BUS,
2459 .parent = TYPE_VIRTIO_BUS,
2460 .instance_size = sizeof(VirtioPCIBusState),
2461 .class_init = virtio_pci_bus_class_init,
2462 };
2463
2464 static void virtio_pci_register_types(void)
2465 {
2466 type_register_static(&virtio_rng_pci_info);
2467 type_register_static(&virtio_input_pci_info);
2468 type_register_static(&virtio_input_hid_pci_info);
2469 type_register_static(&virtio_keyboard_pci_info);
2470 type_register_static(&virtio_mouse_pci_info);
2471 type_register_static(&virtio_tablet_pci_info);
2472 #ifdef CONFIG_LINUX
2473 type_register_static(&virtio_host_pci_info);
2474 #endif
2475 type_register_static(&virtio_pci_bus_info);
2476 type_register_static(&virtio_pci_info);
2477 #ifdef CONFIG_VIRTFS
2478 type_register_static(&virtio_9p_pci_info);
2479 #endif
2480 type_register_static(&virtio_blk_pci_info);
2481 type_register_static(&virtio_scsi_pci_info);
2482 type_register_static(&virtio_balloon_pci_info);
2483 type_register_static(&virtio_serial_pci_info);
2484 type_register_static(&virtio_net_pci_info);
2485 #ifdef CONFIG_VHOST_SCSI
2486 type_register_static(&vhost_scsi_pci_info);
2487 #endif
2488 }
2489
2490 type_init(virtio_pci_register_types)
CRIS target port of Qemu