3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "hw/ppc/ppc.h"
29 #include "hw/input/adb.h"
30 #include "hw/timer/m48t59.h"
31 #include "sysemu/sysemu.h"
33 #include "hw/isa/isa.h"
34 #include "hw/pci/pci.h"
35 #include "hw/boards.h"
36 #include "hw/nvram/fw_cfg.h"
37 #include "hw/char/escc.h"
39 #include "hw/loader.h"
41 #include "sysemu/kvm.h"
43 #include "sysemu/blockdev.h"
44 #include "exec/address-spaces.h"
47 #define CFG_ADDR 0xf0000510
48 #define TBFREQ 16600000UL
50 static int fw_cfg_boot_set(void *opaque
, const char *boot_device
)
52 fw_cfg_add_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
57 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
59 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
62 static hwaddr
round_page(hwaddr addr
)
64 return (addr
+ TARGET_PAGE_SIZE
- 1) & TARGET_PAGE_MASK
;
67 static void ppc_heathrow_reset(void *opaque
)
69 PowerPCCPU
*cpu
= opaque
;
74 static void ppc_heathrow_init(QEMUMachineInitArgs
*args
)
76 ram_addr_t ram_size
= args
->ram_size
;
77 const char *cpu_model
= args
->cpu_model
;
78 const char *kernel_filename
= args
->kernel_filename
;
79 const char *kernel_cmdline
= args
->kernel_cmdline
;
80 const char *initrd_filename
= args
->initrd_filename
;
81 const char *boot_device
= args
->boot_order
;
82 MemoryRegion
*sysmem
= get_system_memory();
83 PowerPCCPU
*cpu
= NULL
;
84 CPUPPCState
*env
= NULL
;
86 qemu_irq
*pic
, **heathrow_irqs
;
88 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
89 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
90 MemoryRegion
*isa
= g_new(MemoryRegion
, 1);
91 uint32_t kernel_base
, initrd_base
, cmdline_base
= 0;
92 int32_t kernel_size
, initrd_size
;
95 MACIOIDEState
*macio_ide
;
99 MemoryRegion
*pic_mem
;
100 MemoryRegion
*escc_mem
, *escc_bar
= g_new(MemoryRegion
, 1);
101 uint16_t ppc_boot_device
;
102 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
105 linux_boot
= (kernel_filename
!= NULL
);
108 if (cpu_model
== NULL
)
110 for (i
= 0; i
< smp_cpus
; i
++) {
111 cpu
= cpu_ppc_init(cpu_model
);
113 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
118 /* Set time-base frequency to 16.6 Mhz */
119 cpu_ppc_tb_init(env
, TBFREQ
);
120 qemu_register_reset(ppc_heathrow_reset
, cpu
);
124 if (ram_size
> (2047 << 20)) {
126 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
127 ((unsigned int)ram_size
/ (1 << 20)));
131 memory_region_init_ram(ram
, NULL
, "ppc_heathrow.ram", ram_size
);
132 vmstate_register_ram_global(ram
);
133 memory_region_add_subregion(sysmem
, 0, ram
);
135 /* allocate and load BIOS */
136 memory_region_init_ram(bios
, NULL
, "ppc_heathrow.bios", BIOS_SIZE
);
137 vmstate_register_ram_global(bios
);
138 if (bios_name
== NULL
)
139 bios_name
= PROM_FILENAME
;
140 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
141 memory_region_set_readonly(bios
, true);
142 memory_region_add_subregion(sysmem
, PROM_ADDR
, bios
);
144 /* Load OpenBIOS (ELF) */
146 bios_size
= load_elf(filename
, 0, NULL
, NULL
, NULL
, NULL
,
152 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
153 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name
);
158 uint64_t lowaddr
= 0;
166 kernel_base
= KERNEL_LOAD_ADDR
;
167 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
168 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
170 kernel_size
= load_aout(kernel_filename
, kernel_base
,
171 ram_size
- kernel_base
, bswap_needed
,
174 kernel_size
= load_image_targphys(kernel_filename
,
176 ram_size
- kernel_base
);
177 if (kernel_size
< 0) {
178 hw_error("qemu: could not load kernel '%s'\n",
183 if (initrd_filename
) {
184 initrd_base
= round_page(kernel_base
+ kernel_size
+ KERNEL_GAP
);
185 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
186 ram_size
- initrd_base
);
187 if (initrd_size
< 0) {
188 hw_error("qemu: could not load initial ram disk '%s'\n",
192 cmdline_base
= round_page(initrd_base
+ initrd_size
);
196 cmdline_base
= round_page(kernel_base
+ kernel_size
+ KERNEL_GAP
);
198 ppc_boot_device
= 'm';
204 ppc_boot_device
= '\0';
205 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
206 /* TOFIX: for now, the second IDE channel is not properly
207 * used by OHW. The Mac floppy disk are not emulated.
208 * For now, OHW cannot boot from the network.
211 if (boot_device
[i
] >= 'a' && boot_device
[i
] <= 'f') {
212 ppc_boot_device
= boot_device
[i
];
216 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'd') {
217 ppc_boot_device
= boot_device
[i
];
222 if (ppc_boot_device
== '\0') {
223 fprintf(stderr
, "No valid boot device for G3 Beige machine\n");
228 /* Register 2 MB of ISA IO space */
229 memory_region_init_alias(isa
, NULL
, "isa_mmio",
230 get_system_io(), 0, 0x00200000);
231 memory_region_add_subregion(sysmem
, 0xfe000000, isa
);
233 /* XXX: we register only 1 output pin for heathrow PIC */
234 heathrow_irqs
= g_malloc0(smp_cpus
* sizeof(qemu_irq
*));
236 g_malloc0(smp_cpus
* sizeof(qemu_irq
) * 1);
237 /* Connect the heathrow PIC outputs to the 6xx bus */
238 for (i
= 0; i
< smp_cpus
; i
++) {
239 switch (PPC_INPUT(env
)) {
240 case PPC_FLAGS_INPUT_6xx
:
241 heathrow_irqs
[i
] = heathrow_irqs
[0] + (i
* 1);
242 heathrow_irqs
[i
][0] =
243 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
246 hw_error("Bus model not supported on OldWorld Mac machine\n");
250 /* init basic PC hardware */
251 if (PPC_INPUT(env
) != PPC_FLAGS_INPUT_6xx
) {
252 hw_error("Only 6xx bus is supported on heathrow machine\n");
254 pic
= heathrow_pic_init(&pic_mem
, 1, heathrow_irqs
);
255 pci_bus
= pci_grackle_init(0xfec00000, pic
,
258 pci_vga_init(pci_bus
);
260 escc_mem
= escc_init(0, pic
[0x0f], pic
[0x10], serial_hds
[0],
261 serial_hds
[1], ESCC_CLOCK
, 4);
262 memory_region_init_alias(escc_bar
, NULL
, "escc-bar",
263 escc_mem
, 0, memory_region_size(escc_mem
));
265 for(i
= 0; i
< nb_nics
; i
++)
266 pci_nic_init_nofail(&nd_table
[i
], pci_bus
, "ne2k_pci", NULL
);
269 ide_drive_get(hd
, MAX_IDE_BUS
);
271 macio
= pci_create(pci_bus
, -1, TYPE_OLDWORLD_MACIO
);
273 qdev_connect_gpio_out(dev
, 0, pic
[0x12]); /* CUDA */
274 qdev_connect_gpio_out(dev
, 1, pic
[0x0D]); /* IDE-0 */
275 qdev_connect_gpio_out(dev
, 2, pic
[0x02]); /* IDE-0 DMA */
276 qdev_connect_gpio_out(dev
, 3, pic
[0x0E]); /* IDE-1 */
277 qdev_connect_gpio_out(dev
, 4, pic
[0x03]); /* IDE-1 DMA */
278 macio_init(macio
, pic_mem
, escc_bar
);
280 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
282 macio_ide_init_drives(macio_ide
, hd
);
284 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
286 macio_ide_init_drives(macio_ide
, &hd
[MAX_IDE_DEVS
]);
288 dev
= DEVICE(object_resolve_path_component(OBJECT(macio
), "cuda"));
289 adb_bus
= qdev_get_child_bus(dev
, "adb.0");
290 dev
= qdev_create(adb_bus
, TYPE_ADB_KEYBOARD
);
291 qdev_init_nofail(dev
);
292 dev
= qdev_create(adb_bus
, TYPE_ADB_MOUSE
);
293 qdev_init_nofail(dev
);
295 if (usb_enabled(false)) {
296 pci_create_simple(pci_bus
, -1, "pci-ohci");
299 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
302 /* No PCI init: the BIOS will do it */
304 fw_cfg
= fw_cfg_init(0, 0, CFG_ADDR
, CFG_ADDR
+ 2);
305 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)max_cpus
);
306 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
307 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
308 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, ARCH_HEATHROW
);
309 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
310 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
311 if (kernel_cmdline
) {
312 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, cmdline_base
);
313 pstrcpy_targphys("cmdline", cmdline_base
, TARGET_PAGE_SIZE
, kernel_cmdline
);
315 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
317 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
318 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
319 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
321 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_WIDTH
, graphic_width
);
322 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_HEIGHT
, graphic_height
);
323 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_DEPTH
, graphic_depth
);
325 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_IS_KVM
, kvm_enabled());
330 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, kvmppc_get_tbfreq());
331 hypercall
= g_malloc(16);
332 kvmppc_get_hypercall(env
, hypercall
, 16);
333 fw_cfg_add_bytes(fw_cfg
, FW_CFG_PPC_KVM_HC
, hypercall
, 16);
334 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_KVM_PID
, getpid());
337 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, TBFREQ
);
339 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
340 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_CLOCKFREQ
, 266000000);
342 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
345 static QEMUMachine heathrow_machine
= {
347 .desc
= "Heathrow based PowerMAC",
348 .init
= ppc_heathrow_init
,
349 .max_cpus
= MAX_CPUS
,
353 .default_boot_order
= "cd", /* TOFIX "cad" when Mac floppy is implemented */
356 static void heathrow_machine_init(void)
358 qemu_register_machine(&heathrow_machine
);
361 machine_init(heathrow_machine_init
);