hw/intc/arm_gicv3_kvm.c

   1 /*
   2  * ARM Generic Interrupt Controller using KVM in-kernel support
   3  *
   4  * Copyright (c) 2015 Samsung Electronics Co., Ltd.
   5  * Written by Pavel Fedin
   6  * Based on vGICv2 code by Peter Maydell
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qapi/error.h"
  24 #include "hw/intc/arm_gicv3_common.h"
  25 #include "hw/sysbus.h"
  26 #include "sysemu/kvm.h"
  27 #include "kvm_arm.h"
  28 #include "vgic_common.h"
  29
  30 #ifdef DEBUG_GICV3_KVM
  31 #define DPRINTF(fmt, ...) \
  32     do { fprintf(stderr, "kvm_gicv3: " fmt, ## __VA_ARGS__); } while (0)
  33 #else
  34 #define DPRINTF(fmt, ...) \
  35     do { } while (0)
  36 #endif
  37
  38 #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3"
  39 #define KVM_ARM_GICV3(obj) \
  40      OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3)
  41 #define KVM_ARM_GICV3_CLASS(klass) \
  42      OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3)
  43 #define KVM_ARM_GICV3_GET_CLASS(obj) \
  44      OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3)
  45
  46 typedef struct KVMARMGICv3Class {
  47     ARMGICv3CommonClass parent_class;
  48     DeviceRealize parent_realize;
  49     void (*parent_reset)(DeviceState *dev);
  50 } KVMARMGICv3Class;
  51
  52 static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
  53 {
  54     GICv3State *s = (GICv3State *)opaque;
  55
  56     kvm_arm_gic_set_irq(s->num_irq, irq, level);
  57 }
  58
  59 static void kvm_arm_gicv3_put(GICv3State *s)
  60 {
  61     /* TODO */
  62     DPRINTF("Cannot put kernel gic state, no kernel interface\n");
  63 }
  64
  65 static void kvm_arm_gicv3_get(GICv3State *s)
  66 {
  67     /* TODO */
  68     DPRINTF("Cannot get kernel gic state, no kernel interface\n");
  69 }
  70
  71 static void kvm_arm_gicv3_reset(DeviceState *dev)
  72 {
  73     GICv3State *s = ARM_GICV3_COMMON(dev);
  74     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  75
  76     DPRINTF("Reset\n");
  77
  78     kgc->parent_reset(dev);
  79     kvm_arm_gicv3_put(s);
  80 }
  81
  82 static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
  83 {
  84     GICv3State *s = KVM_ARM_GICV3(dev);
  85     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  86     Error *local_err = NULL;
  87
  88     DPRINTF("kvm_arm_gicv3_realize\n");
  89
  90     kgc->parent_realize(dev, &local_err);
  91     if (local_err) {
  92         error_propagate(errp, local_err);
  93         return;
  94     }
  95
  96     if (s->security_extn) {
  97         error_setg(errp, "the in-kernel VGICv3 does not implement the "
  98                    "security extensions");
  99         return;
 100     }
 101
 102     gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL);
 103
 104     /* Try to create the device via the device control API */
 105     s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_V3, false);
 106     if (s->dev_fd < 0) {
 107         error_setg_errno(errp, -s->dev_fd, "error creating in-kernel VGIC");
 108         return;
 109     }
 110
 111     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS,
 112                       0, &s->num_irq, true);
 113
 114     /* Tell the kernel to complete VGIC initialization now */
 115     kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
 116                       KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);
 117
 118     kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 119                             KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd);
 120     kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 121                             KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd);
 122 }
 123
 124 static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
 125 {
 126     DeviceClass *dc = DEVICE_CLASS(klass);
 127     ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
 128     KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
 129
 130     agcc->pre_save = kvm_arm_gicv3_get;
 131     agcc->post_load = kvm_arm_gicv3_put;
 132     kgc->parent_realize = dc->realize;
 133     kgc->parent_reset = dc->reset;
 134     dc->realize = kvm_arm_gicv3_realize;
 135     dc->reset = kvm_arm_gicv3_reset;
 136 }
 137
 138 static const TypeInfo kvm_arm_gicv3_info = {
 139     .name = TYPE_KVM_ARM_GICV3,
 140     .parent = TYPE_ARM_GICV3_COMMON,
 141     .instance_size = sizeof(GICv3State),
 142     .class_init = kvm_arm_gicv3_class_init,
 143     .class_size = sizeof(KVMARMGICv3Class),
 144 };
 145
 146 static void kvm_arm_gicv3_register_types(void)
 147 {
 148     type_register_static(&kvm_arm_gicv3_info);
 149 }
 150
 151 type_init(kvm_arm_gicv3_register_types)