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Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-06-18' into staging
[qemu/cris-port.git] / memory.c
blob3ac0bd20d2567d300db8c37dc16c8303d0882a69
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
32
33 static unsigned memory_region_transaction_depth;
34 static bool memory_region_update_pending;
35 static bool ioeventfd_update_pending;
36 static bool global_dirty_log = false;
37
38 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
39 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
40
41 static QTAILQ_HEAD(, AddressSpace) address_spaces
42 = QTAILQ_HEAD_INITIALIZER(address_spaces);
43
44 typedef struct AddrRange AddrRange;
45
46 /*
47 * Note that signed integers are needed for negative offsetting in aliases
48 * (large MemoryRegion::alias_offset).
49 */
50 struct AddrRange {
51 Int128 start;
52 Int128 size;
53 };
54
55 static AddrRange addrrange_make(Int128 start, Int128 size)
56 {
57 return (AddrRange) { start, size };
58 }
59
60 static bool addrrange_equal(AddrRange r1, AddrRange r2)
61 {
62 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
63 }
64
65 static Int128 addrrange_end(AddrRange r)
66 {
67 return int128_add(r.start, r.size);
68 }
69
70 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
71 {
72 int128_addto(&range.start, delta);
73 return range;
74 }
75
76 static bool addrrange_contains(AddrRange range, Int128 addr)
77 {
78 return int128_ge(addr, range.start)
79 && int128_lt(addr, addrrange_end(range));
80 }
81
82 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
83 {
84 return addrrange_contains(r1, r2.start)
85 || addrrange_contains(r2, r1.start);
86 }
87
88 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
89 {
90 Int128 start = int128_max(r1.start, r2.start);
91 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
92 return addrrange_make(start, int128_sub(end, start));
93 }
94
95 enum ListenerDirection { Forward, Reverse };
96
97 static bool memory_listener_match(MemoryListener *listener,
98 MemoryRegionSection *section)
99 {
100 return !listener->address_space_filter
101 || listener->address_space_filter == section->address_space;
102 }
103
104 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
105 do { \
106 MemoryListener *_listener; \
107 \
108 switch (_direction) { \
109 case Forward: \
110 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
114 } \
115 break; \
116 case Reverse: \
117 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
118 memory_listeners, link) { \
119 if (_listener->_callback) { \
120 _listener->_callback(_listener, ##_args); \
121 } \
122 } \
123 break; \
124 default: \
125 abort(); \
126 } \
127 } while (0)
128
129 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
130 do { \
131 MemoryListener *_listener; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
136 if (_listener->_callback \
137 && memory_listener_match(_listener, _section)) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
144 memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
157 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
159 .mr = (fr)->mr, \
160 .address_space = (as), \
161 .offset_within_region = (fr)->offset_in_region, \
162 .size = (fr)->addr.size, \
163 .offset_within_address_space = int128_get64((fr)->addr.start), \
164 .readonly = (fr)->readonly, \
165 }), ##_args)
166
167 struct CoalescedMemoryRange {
168 AddrRange addr;
169 QTAILQ_ENTRY(CoalescedMemoryRange) link;
170 };
171
172 struct MemoryRegionIoeventfd {
173 AddrRange addr;
174 bool match_data;
175 uint64_t data;
176 EventNotifier *e;
177 };
178
179 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
180 MemoryRegionIoeventfd b)
181 {
182 if (int128_lt(a.addr.start, b.addr.start)) {
183 return true;
184 } else if (int128_gt(a.addr.start, b.addr.start)) {
185 return false;
186 } else if (int128_lt(a.addr.size, b.addr.size)) {
187 return true;
188 } else if (int128_gt(a.addr.size, b.addr.size)) {
189 return false;
190 } else if (a.match_data < b.match_data) {
191 return true;
192 } else if (a.match_data > b.match_data) {
193 return false;
194 } else if (a.match_data) {
195 if (a.data < b.data) {
196 return true;
197 } else if (a.data > b.data) {
198 return false;
199 }
200 }
201 if (a.e < b.e) {
202 return true;
203 } else if (a.e > b.e) {
204 return false;
205 }
206 return false;
207 }
208
209 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
210 MemoryRegionIoeventfd b)
211 {
212 return !memory_region_ioeventfd_before(a, b)
213 && !memory_region_ioeventfd_before(b, a);
214 }
215
216 typedef struct FlatRange FlatRange;
217 typedef struct FlatView FlatView;
218
219 /* Range of memory in the global map. Addresses are absolute. */
220 struct FlatRange {
221 MemoryRegion *mr;
222 hwaddr offset_in_region;
223 AddrRange addr;
224 uint8_t dirty_log_mask;
225 bool romd_mode;
226 bool readonly;
227 };
228
229 /* Flattened global view of current active memory hierarchy. Kept in sorted
230 * order.
231 */
232 struct FlatView {
233 struct rcu_head rcu;
234 unsigned ref;
235 FlatRange *ranges;
236 unsigned nr;
237 unsigned nr_allocated;
238 };
239
240 typedef struct AddressSpaceOps AddressSpaceOps;
241
242 #define FOR_EACH_FLAT_RANGE(var, view) \
243 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
244
245 static bool flatrange_equal(FlatRange *a, FlatRange *b)
246 {
247 return a->mr == b->mr
248 && addrrange_equal(a->addr, b->addr)
249 && a->offset_in_region == b->offset_in_region
250 && a->romd_mode == b->romd_mode
251 && a->readonly == b->readonly;
252 }
253
254 static void flatview_init(FlatView *view)
255 {
256 view->ref = 1;
257 view->ranges = NULL;
258 view->nr = 0;
259 view->nr_allocated = 0;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 for (i = 0; i < view->nr; i++) {
284 memory_region_unref(view->ranges[i].mr);
285 }
286 g_free(view->ranges);
287 g_free(view);
288 }
289
290 static void flatview_ref(FlatView *view)
291 {
292 atomic_inc(&view->ref);
293 }
294
295 static void flatview_unref(FlatView *view)
296 {
297 if (atomic_fetch_dec(&view->ref) == 1) {
298 flatview_destroy(view);
299 }
300 }
301
302 static bool can_merge(FlatRange *r1, FlatRange *r2)
303 {
304 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
305 && r1->mr == r2->mr
306 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
307 r1->addr.size),
308 int128_make64(r2->offset_in_region))
309 && r1->dirty_log_mask == r2->dirty_log_mask
310 && r1->romd_mode == r2->romd_mode
311 && r1->readonly == r2->readonly;
312 }
313
314 /* Attempt to simplify a view by merging adjacent ranges */
315 static void flatview_simplify(FlatView *view)
316 {
317 unsigned i, j;
318
319 i = 0;
320 while (i < view->nr) {
321 j = i + 1;
322 while (j < view->nr
323 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
324 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
325 ++j;
326 }
327 ++i;
328 memmove(&view->ranges[i], &view->ranges[j],
329 (view->nr - j) * sizeof(view->ranges[j]));
330 view->nr -= j - i;
331 }
332 }
333
334 static bool memory_region_big_endian(MemoryRegion *mr)
335 {
336 #ifdef TARGET_WORDS_BIGENDIAN
337 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
338 #else
339 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
340 #endif
341 }
342
343 static bool memory_region_wrong_endianness(MemoryRegion *mr)
344 {
345 #ifdef TARGET_WORDS_BIGENDIAN
346 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
347 #else
348 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
349 #endif
350 }
351
352 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
353 {
354 if (memory_region_wrong_endianness(mr)) {
355 switch (size) {
356 case 1:
357 break;
358 case 2:
359 *data = bswap16(*data);
360 break;
361 case 4:
362 *data = bswap32(*data);
363 break;
364 case 8:
365 *data = bswap64(*data);
366 break;
367 default:
368 abort();
369 }
370 }
371 }
372
373 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask,
379 MemTxAttrs attrs)
380 {
381 uint64_t tmp;
382
383 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
384 trace_memory_region_ops_read(mr, addr, tmp, size);
385 *value |= (tmp & mask) << shift;
386 return MEMTX_OK;
387 }
388
389 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
390 hwaddr addr,
391 uint64_t *value,
392 unsigned size,
393 unsigned shift,
394 uint64_t mask,
395 MemTxAttrs attrs)
396 {
397 uint64_t tmp;
398
399 if (mr->flush_coalesced_mmio) {
400 qemu_flush_coalesced_mmio_buffer();
401 }
402 tmp = mr->ops->read(mr->opaque, addr, size);
403 trace_memory_region_ops_read(mr, addr, tmp, size);
404 *value |= (tmp & mask) << shift;
405 return MEMTX_OK;
406 }
407
408 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
409 hwaddr addr,
410 uint64_t *value,
411 unsigned size,
412 unsigned shift,
413 uint64_t mask,
414 MemTxAttrs attrs)
415 {
416 uint64_t tmp = 0;
417 MemTxResult r;
418
419 if (mr->flush_coalesced_mmio) {
420 qemu_flush_coalesced_mmio_buffer();
421 }
422 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
423 trace_memory_region_ops_read(mr, addr, tmp, size);
424 *value |= (tmp & mask) << shift;
425 return r;
426 }
427
428 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
429 hwaddr addr,
430 uint64_t *value,
431 unsigned size,
432 unsigned shift,
433 uint64_t mask,
434 MemTxAttrs attrs)
435 {
436 uint64_t tmp;
437
438 tmp = (*value >> shift) & mask;
439 trace_memory_region_ops_write(mr, addr, tmp, size);
440 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
441 return MEMTX_OK;
442 }
443
444 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
445 hwaddr addr,
446 uint64_t *value,
447 unsigned size,
448 unsigned shift,
449 uint64_t mask,
450 MemTxAttrs attrs)
451 {
452 uint64_t tmp;
453
454 if (mr->flush_coalesced_mmio) {
455 qemu_flush_coalesced_mmio_buffer();
456 }
457 tmp = (*value >> shift) & mask;
458 trace_memory_region_ops_write(mr, addr, tmp, size);
459 mr->ops->write(mr->opaque, addr, tmp, size);
460 return MEMTX_OK;
461 }
462
463 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
464 hwaddr addr,
465 uint64_t *value,
466 unsigned size,
467 unsigned shift,
468 uint64_t mask,
469 MemTxAttrs attrs)
470 {
471 uint64_t tmp;
472
473 if (mr->flush_coalesced_mmio) {
474 qemu_flush_coalesced_mmio_buffer();
475 }
476 tmp = (*value >> shift) & mask;
477 trace_memory_region_ops_write(mr, addr, tmp, size);
478 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
479 }
480
481 static MemTxResult access_with_adjusted_size(hwaddr addr,
482 uint64_t *value,
483 unsigned size,
484 unsigned access_size_min,
485 unsigned access_size_max,
486 MemTxResult (*access)(MemoryRegion *mr,
487 hwaddr addr,
488 uint64_t *value,
489 unsigned size,
490 unsigned shift,
491 uint64_t mask,
492 MemTxAttrs attrs),
493 MemoryRegion *mr,
494 MemTxAttrs attrs)
495 {
496 uint64_t access_mask;
497 unsigned access_size;
498 unsigned i;
499 MemTxResult r = MEMTX_OK;
500
501 if (!access_size_min) {
502 access_size_min = 1;
503 }
504 if (!access_size_max) {
505 access_size_max = 4;
506 }
507
508 /* FIXME: support unaligned access? */
509 access_size = MAX(MIN(size, access_size_max), access_size_min);
510 access_mask = -1ULL >> (64 - access_size * 8);
511 if (memory_region_big_endian(mr)) {
512 for (i = 0; i < size; i += access_size) {
513 r |= access(mr, addr + i, value, access_size,
514 (size - access_size - i) * 8, access_mask, attrs);
515 }
516 } else {
517 for (i = 0; i < size; i += access_size) {
518 r |= access(mr, addr + i, value, access_size, i * 8,
519 access_mask, attrs);
520 }
521 }
522 return r;
523 }
524
525 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
526 {
527 AddressSpace *as;
528
529 while (mr->container) {
530 mr = mr->container;
531 }
532 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
533 if (mr == as->root) {
534 return as;
535 }
536 }
537 return NULL;
538 }
539
540 /* Render a memory region into the global view. Ranges in @view obscure
541 * ranges in @mr.
542 */
543 static void render_memory_region(FlatView *view,
544 MemoryRegion *mr,
545 Int128 base,
546 AddrRange clip,
547 bool readonly)
548 {
549 MemoryRegion *subregion;
550 unsigned i;
551 hwaddr offset_in_region;
552 Int128 remain;
553 Int128 now;
554 FlatRange fr;
555 AddrRange tmp;
556
557 if (!mr->enabled) {
558 return;
559 }
560
561 int128_addto(&base, int128_make64(mr->addr));
562 readonly |= mr->readonly;
563
564 tmp = addrrange_make(base, mr->size);
565
566 if (!addrrange_intersects(tmp, clip)) {
567 return;
568 }
569
570 clip = addrrange_intersection(tmp, clip);
571
572 if (mr->alias) {
573 int128_subfrom(&base, int128_make64(mr->alias->addr));
574 int128_subfrom(&base, int128_make64(mr->alias_offset));
575 render_memory_region(view, mr->alias, base, clip, readonly);
576 return;
577 }
578
579 /* Render subregions in priority order. */
580 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
581 render_memory_region(view, subregion, base, clip, readonly);
582 }
583
584 if (!mr->terminates) {
585 return;
586 }
587
588 offset_in_region = int128_get64(int128_sub(clip.start, base));
589 base = clip.start;
590 remain = clip.size;
591
592 fr.mr = mr;
593 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
594 fr.romd_mode = mr->romd_mode;
595 fr.readonly = readonly;
596
597 /* Render the region itself into any gaps left by the current view. */
598 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
599 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
600 continue;
601 }
602 if (int128_lt(base, view->ranges[i].addr.start)) {
603 now = int128_min(remain,
604 int128_sub(view->ranges[i].addr.start, base));
605 fr.offset_in_region = offset_in_region;
606 fr.addr = addrrange_make(base, now);
607 flatview_insert(view, i, &fr);
608 ++i;
609 int128_addto(&base, now);
610 offset_in_region += int128_get64(now);
611 int128_subfrom(&remain, now);
612 }
613 now = int128_sub(int128_min(int128_add(base, remain),
614 addrrange_end(view->ranges[i].addr)),
615 base);
616 int128_addto(&base, now);
617 offset_in_region += int128_get64(now);
618 int128_subfrom(&remain, now);
619 }
620 if (int128_nz(remain)) {
621 fr.offset_in_region = offset_in_region;
622 fr.addr = addrrange_make(base, remain);
623 flatview_insert(view, i, &fr);
624 }
625 }
626
627 /* Render a memory topology into a list of disjoint absolute ranges. */
628 static FlatView *generate_memory_topology(MemoryRegion *mr)
629 {
630 FlatView *view;
631
632 view = g_new(FlatView, 1);
633 flatview_init(view);
634
635 if (mr) {
636 render_memory_region(view, mr, int128_zero(),
637 addrrange_make(int128_zero(), int128_2_64()), false);
638 }
639 flatview_simplify(view);
640
641 return view;
642 }
643
644 static void address_space_add_del_ioeventfds(AddressSpace *as,
645 MemoryRegionIoeventfd *fds_new,
646 unsigned fds_new_nb,
647 MemoryRegionIoeventfd *fds_old,
648 unsigned fds_old_nb)
649 {
650 unsigned iold, inew;
651 MemoryRegionIoeventfd *fd;
652 MemoryRegionSection section;
653
654 /* Generate a symmetric difference of the old and new fd sets, adding
655 * and deleting as necessary.
656 */
657
658 iold = inew = 0;
659 while (iold < fds_old_nb || inew < fds_new_nb) {
660 if (iold < fds_old_nb
661 && (inew == fds_new_nb
662 || memory_region_ioeventfd_before(fds_old[iold],
663 fds_new[inew]))) {
664 fd = &fds_old[iold];
665 section = (MemoryRegionSection) {
666 .address_space = as,
667 .offset_within_address_space = int128_get64(fd->addr.start),
668 .size = fd->addr.size,
669 };
670 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
671 fd->match_data, fd->data, fd->e);
672 ++iold;
673 } else if (inew < fds_new_nb
674 && (iold == fds_old_nb
675 || memory_region_ioeventfd_before(fds_new[inew],
676 fds_old[iold]))) {
677 fd = &fds_new[inew];
678 section = (MemoryRegionSection) {
679 .address_space = as,
680 .offset_within_address_space = int128_get64(fd->addr.start),
681 .size = fd->addr.size,
682 };
683 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
684 fd->match_data, fd->data, fd->e);
685 ++inew;
686 } else {
687 ++iold;
688 ++inew;
689 }
690 }
691 }
692
693 static FlatView *address_space_get_flatview(AddressSpace *as)
694 {
695 FlatView *view;
696
697 rcu_read_lock();
698 view = atomic_rcu_read(&as->current_map);
699 flatview_ref(view);
700 rcu_read_unlock();
701 return view;
702 }
703
704 static void address_space_update_ioeventfds(AddressSpace *as)
705 {
706 FlatView *view;
707 FlatRange *fr;
708 unsigned ioeventfd_nb = 0;
709 MemoryRegionIoeventfd *ioeventfds = NULL;
710 AddrRange tmp;
711 unsigned i;
712
713 view = address_space_get_flatview(as);
714 FOR_EACH_FLAT_RANGE(fr, view) {
715 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
716 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
717 int128_sub(fr->addr.start,
718 int128_make64(fr->offset_in_region)));
719 if (addrrange_intersects(fr->addr, tmp)) {
720 ++ioeventfd_nb;
721 ioeventfds = g_realloc(ioeventfds,
722 ioeventfd_nb * sizeof(*ioeventfds));
723 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
724 ioeventfds[ioeventfd_nb-1].addr = tmp;
725 }
726 }
727 }
728
729 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
730 as->ioeventfds, as->ioeventfd_nb);
731
732 g_free(as->ioeventfds);
733 as->ioeventfds = ioeventfds;
734 as->ioeventfd_nb = ioeventfd_nb;
735 flatview_unref(view);
736 }
737
738 static void address_space_update_topology_pass(AddressSpace *as,
739 const FlatView *old_view,
740 const FlatView *new_view,
741 bool adding)
742 {
743 unsigned iold, inew;
744 FlatRange *frold, *frnew;
745
746 /* Generate a symmetric difference of the old and new memory maps.
747 * Kill ranges in the old map, and instantiate ranges in the new map.
748 */
749 iold = inew = 0;
750 while (iold < old_view->nr || inew < new_view->nr) {
751 if (iold < old_view->nr) {
752 frold = &old_view->ranges[iold];
753 } else {
754 frold = NULL;
755 }
756 if (inew < new_view->nr) {
757 frnew = &new_view->ranges[inew];
758 } else {
759 frnew = NULL;
760 }
761
762 if (frold
763 && (!frnew
764 || int128_lt(frold->addr.start, frnew->addr.start)
765 || (int128_eq(frold->addr.start, frnew->addr.start)
766 && !flatrange_equal(frold, frnew)))) {
767 /* In old but not in new, or in both but attributes changed. */
768
769 if (!adding) {
770 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
771 }
772
773 ++iold;
774 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
775 /* In both and unchanged (except logging may have changed) */
776
777 if (adding) {
778 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
779 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
780 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
781 frold->dirty_log_mask,
782 frnew->dirty_log_mask);
783 }
784 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
785 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
786 frold->dirty_log_mask,
787 frnew->dirty_log_mask);
788 }
789 }
790
791 ++iold;
792 ++inew;
793 } else {
794 /* In new */
795
796 if (adding) {
797 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
798 }
799
800 ++inew;
801 }
802 }
803 }
804
805
806 static void address_space_update_topology(AddressSpace *as)
807 {
808 FlatView *old_view = address_space_get_flatview(as);
809 FlatView *new_view = generate_memory_topology(as->root);
810
811 address_space_update_topology_pass(as, old_view, new_view, false);
812 address_space_update_topology_pass(as, old_view, new_view, true);
813
814 /* Writes are protected by the BQL. */
815 atomic_rcu_set(&as->current_map, new_view);
816 call_rcu(old_view, flatview_unref, rcu);
817
818 /* Note that all the old MemoryRegions are still alive up to this
819 * point. This relieves most MemoryListeners from the need to
820 * ref/unref the MemoryRegions they get---unless they use them
821 * outside the iothread mutex, in which case precise reference
822 * counting is necessary.
823 */
824 flatview_unref(old_view);
825
826 address_space_update_ioeventfds(as);
827 }
828
829 void memory_region_transaction_begin(void)
830 {
831 qemu_flush_coalesced_mmio_buffer();
832 ++memory_region_transaction_depth;
833 }
834
835 static void memory_region_clear_pending(void)
836 {
837 memory_region_update_pending = false;
838 ioeventfd_update_pending = false;
839 }
840
841 void memory_region_transaction_commit(void)
842 {
843 AddressSpace *as;
844
845 assert(memory_region_transaction_depth);
846 --memory_region_transaction_depth;
847 if (!memory_region_transaction_depth) {
848 if (memory_region_update_pending) {
849 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
850
851 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
852 address_space_update_topology(as);
853 }
854
855 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
856 } else if (ioeventfd_update_pending) {
857 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
858 address_space_update_ioeventfds(as);
859 }
860 }
861 memory_region_clear_pending();
862 }
863 }
864
865 static void memory_region_destructor_none(MemoryRegion *mr)
866 {
867 }
868
869 static void memory_region_destructor_ram(MemoryRegion *mr)
870 {
871 qemu_ram_free(mr->ram_addr);
872 }
873
874 static void memory_region_destructor_alias(MemoryRegion *mr)
875 {
876 memory_region_unref(mr->alias);
877 }
878
879 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
880 {
881 qemu_ram_free_from_ptr(mr->ram_addr);
882 }
883
884 static void memory_region_destructor_rom_device(MemoryRegion *mr)
885 {
886 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
887 }
888
889 static bool memory_region_need_escape(char c)
890 {
891 return c == '/' || c == '[' || c == '\\' || c == ']';
892 }
893
894 static char *memory_region_escape_name(const char *name)
895 {
896 const char *p;
897 char *escaped, *q;
898 uint8_t c;
899 size_t bytes = 0;
900
901 for (p = name; *p; p++) {
902 bytes += memory_region_need_escape(*p) ? 4 : 1;
903 }
904 if (bytes == p - name) {
905 return g_memdup(name, bytes + 1);
906 }
907
908 escaped = g_malloc(bytes + 1);
909 for (p = name, q = escaped; *p; p++) {
910 c = *p;
911 if (unlikely(memory_region_need_escape(c))) {
912 *q++ = '\\';
913 *q++ = 'x';
914 *q++ = "0123456789abcdef"[c >> 4];
915 c = "0123456789abcdef"[c & 15];
916 }
917 *q++ = c;
918 }
919 *q = 0;
920 return escaped;
921 }
922
923 void memory_region_init(MemoryRegion *mr,
924 Object *owner,
925 const char *name,
926 uint64_t size)
927 {
928 if (!owner) {
929 owner = container_get(qdev_get_machine(), "/unattached");
930 }
931
932 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
933 mr->size = int128_make64(size);
934 if (size == UINT64_MAX) {
935 mr->size = int128_2_64();
936 }
937 mr->name = g_strdup(name);
938
939 if (name) {
940 char *escaped_name = memory_region_escape_name(name);
941 char *name_array = g_strdup_printf("%s[*]", escaped_name);
942 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
943 object_unref(OBJECT(mr));
944 g_free(name_array);
945 g_free(escaped_name);
946 }
947 }
948
949 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
950 const char *name, Error **errp)
951 {
952 MemoryRegion *mr = MEMORY_REGION(obj);
953 uint64_t value = mr->addr;
954
955 visit_type_uint64(v, &value, name, errp);
956 }
957
958 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
959 const char *name, Error **errp)
960 {
961 MemoryRegion *mr = MEMORY_REGION(obj);
962 gchar *path = (gchar *)"";
963
964 if (mr->container) {
965 path = object_get_canonical_path(OBJECT(mr->container));
966 }
967 visit_type_str(v, &path, name, errp);
968 if (mr->container) {
969 g_free(path);
970 }
971 }
972
973 static Object *memory_region_resolve_container(Object *obj, void *opaque,
974 const char *part)
975 {
976 MemoryRegion *mr = MEMORY_REGION(obj);
977
978 return OBJECT(mr->container);
979 }
980
981 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
982 const char *name, Error **errp)
983 {
984 MemoryRegion *mr = MEMORY_REGION(obj);
985 int32_t value = mr->priority;
986
987 visit_type_int32(v, &value, name, errp);
988 }
989
990 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
991 {
992 MemoryRegion *mr = MEMORY_REGION(obj);
993
994 return mr->may_overlap;
995 }
996
997 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
998 const char *name, Error **errp)
999 {
1000 MemoryRegion *mr = MEMORY_REGION(obj);
1001 uint64_t value = memory_region_size(mr);
1002
1003 visit_type_uint64(v, &value, name, errp);
1004 }
1005
1006 static void memory_region_initfn(Object *obj)
1007 {
1008 MemoryRegion *mr = MEMORY_REGION(obj);
1009 ObjectProperty *op;
1010
1011 mr->ops = &unassigned_mem_ops;
1012 mr->ram_addr = RAM_ADDR_INVALID;
1013 mr->enabled = true;
1014 mr->romd_mode = true;
1015 mr->destructor = memory_region_destructor_none;
1016 QTAILQ_INIT(&mr->subregions);
1017 QTAILQ_INIT(&mr->coalesced);
1018
1019 op = object_property_add(OBJECT(mr), "container",
1020 "link<" TYPE_MEMORY_REGION ">",
1021 memory_region_get_container,
1022 NULL, /* memory_region_set_container */
1023 NULL, NULL, &error_abort);
1024 op->resolve = memory_region_resolve_container;
1025
1026 object_property_add(OBJECT(mr), "addr", "uint64",
1027 memory_region_get_addr,
1028 NULL, /* memory_region_set_addr */
1029 NULL, NULL, &error_abort);
1030 object_property_add(OBJECT(mr), "priority", "uint32",
1031 memory_region_get_priority,
1032 NULL, /* memory_region_set_priority */
1033 NULL, NULL, &error_abort);
1034 object_property_add_bool(OBJECT(mr), "may-overlap",
1035 memory_region_get_may_overlap,
1036 NULL, /* memory_region_set_may_overlap */
1037 &error_abort);
1038 object_property_add(OBJECT(mr), "size", "uint64",
1039 memory_region_get_size,
1040 NULL, /* memory_region_set_size, */
1041 NULL, NULL, &error_abort);
1042 }
1043
1044 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1045 unsigned size)
1046 {
1047 #ifdef DEBUG_UNASSIGNED
1048 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1049 #endif
1050 if (current_cpu != NULL) {
1051 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1052 }
1053 return 0;
1054 }
1055
1056 static void unassigned_mem_write(void *opaque, hwaddr addr,
1057 uint64_t val, unsigned size)
1058 {
1059 #ifdef DEBUG_UNASSIGNED
1060 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1061 #endif
1062 if (current_cpu != NULL) {
1063 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1064 }
1065 }
1066
1067 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1068 unsigned size, bool is_write)
1069 {
1070 return false;
1071 }
1072
1073 const MemoryRegionOps unassigned_mem_ops = {
1074 .valid.accepts = unassigned_mem_accepts,
1075 .endianness = DEVICE_NATIVE_ENDIAN,
1076 };
1077
1078 bool memory_region_access_valid(MemoryRegion *mr,
1079 hwaddr addr,
1080 unsigned size,
1081 bool is_write)
1082 {
1083 int access_size_min, access_size_max;
1084 int access_size, i;
1085
1086 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1087 return false;
1088 }
1089
1090 if (!mr->ops->valid.accepts) {
1091 return true;
1092 }
1093
1094 access_size_min = mr->ops->valid.min_access_size;
1095 if (!mr->ops->valid.min_access_size) {
1096 access_size_min = 1;
1097 }
1098
1099 access_size_max = mr->ops->valid.max_access_size;
1100 if (!mr->ops->valid.max_access_size) {
1101 access_size_max = 4;
1102 }
1103
1104 access_size = MAX(MIN(size, access_size_max), access_size_min);
1105 for (i = 0; i < size; i += access_size) {
1106 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1107 is_write)) {
1108 return false;
1109 }
1110 }
1111
1112 return true;
1113 }
1114
1115 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1116 hwaddr addr,
1117 uint64_t *pval,
1118 unsigned size,
1119 MemTxAttrs attrs)
1120 {
1121 *pval = 0;
1122
1123 if (mr->ops->read) {
1124 return access_with_adjusted_size(addr, pval, size,
1125 mr->ops->impl.min_access_size,
1126 mr->ops->impl.max_access_size,
1127 memory_region_read_accessor,
1128 mr, attrs);
1129 } else if (mr->ops->read_with_attrs) {
1130 return access_with_adjusted_size(addr, pval, size,
1131 mr->ops->impl.min_access_size,
1132 mr->ops->impl.max_access_size,
1133 memory_region_read_with_attrs_accessor,
1134 mr, attrs);
1135 } else {
1136 return access_with_adjusted_size(addr, pval, size, 1, 4,
1137 memory_region_oldmmio_read_accessor,
1138 mr, attrs);
1139 }
1140 }
1141
1142 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1143 hwaddr addr,
1144 uint64_t *pval,
1145 unsigned size,
1146 MemTxAttrs attrs)
1147 {
1148 MemTxResult r;
1149
1150 if (!memory_region_access_valid(mr, addr, size, false)) {
1151 *pval = unassigned_mem_read(mr, addr, size);
1152 return MEMTX_DECODE_ERROR;
1153 }
1154
1155 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1156 adjust_endianness(mr, pval, size);
1157 return r;
1158 }
1159
1160 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1161 hwaddr addr,
1162 uint64_t data,
1163 unsigned size,
1164 MemTxAttrs attrs)
1165 {
1166 if (!memory_region_access_valid(mr, addr, size, true)) {
1167 unassigned_mem_write(mr, addr, data, size);
1168 return MEMTX_DECODE_ERROR;
1169 }
1170
1171 adjust_endianness(mr, &data, size);
1172
1173 if (mr->ops->write) {
1174 return access_with_adjusted_size(addr, &data, size,
1175 mr->ops->impl.min_access_size,
1176 mr->ops->impl.max_access_size,
1177 memory_region_write_accessor, mr,
1178 attrs);
1179 } else if (mr->ops->write_with_attrs) {
1180 return
1181 access_with_adjusted_size(addr, &data, size,
1182 mr->ops->impl.min_access_size,
1183 mr->ops->impl.max_access_size,
1184 memory_region_write_with_attrs_accessor,
1185 mr, attrs);
1186 } else {
1187 return access_with_adjusted_size(addr, &data, size, 1, 4,
1188 memory_region_oldmmio_write_accessor,
1189 mr, attrs);
1190 }
1191 }
1192
1193 void memory_region_init_io(MemoryRegion *mr,
1194 Object *owner,
1195 const MemoryRegionOps *ops,
1196 void *opaque,
1197 const char *name,
1198 uint64_t size)
1199 {
1200 memory_region_init(mr, owner, name, size);
1201 mr->ops = ops;
1202 mr->opaque = opaque;
1203 mr->terminates = true;
1204 }
1205
1206 void memory_region_init_ram(MemoryRegion *mr,
1207 Object *owner,
1208 const char *name,
1209 uint64_t size,
1210 Error **errp)
1211 {
1212 memory_region_init(mr, owner, name, size);
1213 mr->ram = true;
1214 mr->terminates = true;
1215 mr->destructor = memory_region_destructor_ram;
1216 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1217 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1218 }
1219
1220 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1221 Object *owner,
1222 const char *name,
1223 uint64_t size,
1224 uint64_t max_size,
1225 void (*resized)(const char*,
1226 uint64_t length,
1227 void *host),
1228 Error **errp)
1229 {
1230 memory_region_init(mr, owner, name, size);
1231 mr->ram = true;
1232 mr->terminates = true;
1233 mr->destructor = memory_region_destructor_ram;
1234 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1235 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1236 }
1237
1238 #ifdef __linux__
1239 void memory_region_init_ram_from_file(MemoryRegion *mr,
1240 struct Object *owner,
1241 const char *name,
1242 uint64_t size,
1243 bool share,
1244 const char *path,
1245 Error **errp)
1246 {
1247 memory_region_init(mr, owner, name, size);
1248 mr->ram = true;
1249 mr->terminates = true;
1250 mr->destructor = memory_region_destructor_ram;
1251 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1252 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1253 }
1254 #endif
1255
1256 void memory_region_init_ram_ptr(MemoryRegion *mr,
1257 Object *owner,
1258 const char *name,
1259 uint64_t size,
1260 void *ptr)
1261 {
1262 memory_region_init(mr, owner, name, size);
1263 mr->ram = true;
1264 mr->terminates = true;
1265 mr->destructor = memory_region_destructor_ram_from_ptr;
1266 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1267
1268 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1269 assert(ptr != NULL);
1270 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1271 }
1272
1273 void memory_region_set_skip_dump(MemoryRegion *mr)
1274 {
1275 mr->skip_dump = true;
1276 }
1277
1278 void memory_region_init_alias(MemoryRegion *mr,
1279 Object *owner,
1280 const char *name,
1281 MemoryRegion *orig,
1282 hwaddr offset,
1283 uint64_t size)
1284 {
1285 memory_region_init(mr, owner, name, size);
1286 memory_region_ref(orig);
1287 mr->destructor = memory_region_destructor_alias;
1288 mr->alias = orig;
1289 mr->alias_offset = offset;
1290 }
1291
1292 void memory_region_init_rom_device(MemoryRegion *mr,
1293 Object *owner,
1294 const MemoryRegionOps *ops,
1295 void *opaque,
1296 const char *name,
1297 uint64_t size,
1298 Error **errp)
1299 {
1300 memory_region_init(mr, owner, name, size);
1301 mr->ops = ops;
1302 mr->opaque = opaque;
1303 mr->terminates = true;
1304 mr->rom_device = true;
1305 mr->destructor = memory_region_destructor_rom_device;
1306 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1307 }
1308
1309 void memory_region_init_iommu(MemoryRegion *mr,
1310 Object *owner,
1311 const MemoryRegionIOMMUOps *ops,
1312 const char *name,
1313 uint64_t size)
1314 {
1315 memory_region_init(mr, owner, name, size);
1316 mr->iommu_ops = ops,
1317 mr->terminates = true; /* then re-forwards */
1318 notifier_list_init(&mr->iommu_notify);
1319 }
1320
1321 void memory_region_init_reservation(MemoryRegion *mr,
1322 Object *owner,
1323 const char *name,
1324 uint64_t size)
1325 {
1326 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1327 }
1328
1329 static void memory_region_finalize(Object *obj)
1330 {
1331 MemoryRegion *mr = MEMORY_REGION(obj);
1332
1333 assert(QTAILQ_EMPTY(&mr->subregions));
1334 mr->destructor(mr);
1335 memory_region_clear_coalescing(mr);
1336 g_free((char *)mr->name);
1337 g_free(mr->ioeventfds);
1338 }
1339
1340 Object *memory_region_owner(MemoryRegion *mr)
1341 {
1342 Object *obj = OBJECT(mr);
1343 return obj->parent;
1344 }
1345
1346 void memory_region_ref(MemoryRegion *mr)
1347 {
1348 /* MMIO callbacks most likely will access data that belongs
1349 * to the owner, hence the need to ref/unref the owner whenever
1350 * the memory region is in use.
1351 *
1352 * The memory region is a child of its owner. As long as the
1353 * owner doesn't call unparent itself on the memory region,
1354 * ref-ing the owner will also keep the memory region alive.
1355 * Memory regions without an owner are supposed to never go away,
1356 * but we still ref/unref them for debugging purposes.
1357 */
1358 Object *obj = OBJECT(mr);
1359 if (obj && obj->parent) {
1360 object_ref(obj->parent);
1361 } else {
1362 object_ref(obj);
1363 }
1364 }
1365
1366 void memory_region_unref(MemoryRegion *mr)
1367 {
1368 Object *obj = OBJECT(mr);
1369 if (obj && obj->parent) {
1370 object_unref(obj->parent);
1371 } else {
1372 object_unref(obj);
1373 }
1374 }
1375
1376 uint64_t memory_region_size(MemoryRegion *mr)
1377 {
1378 if (int128_eq(mr->size, int128_2_64())) {
1379 return UINT64_MAX;
1380 }
1381 return int128_get64(mr->size);
1382 }
1383
1384 const char *memory_region_name(const MemoryRegion *mr)
1385 {
1386 if (!mr->name) {
1387 ((MemoryRegion *)mr)->name =
1388 object_get_canonical_path_component(OBJECT(mr));
1389 }
1390 return mr->name;
1391 }
1392
1393 bool memory_region_is_ram(MemoryRegion *mr)
1394 {
1395 return mr->ram;
1396 }
1397
1398 bool memory_region_is_skip_dump(MemoryRegion *mr)
1399 {
1400 return mr->skip_dump;
1401 }
1402
1403 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1404 {
1405 uint8_t mask = mr->dirty_log_mask;
1406 if (global_dirty_log) {
1407 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1408 }
1409 return mask;
1410 }
1411
1412 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1413 {
1414 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1415 }
1416
1417 bool memory_region_is_rom(MemoryRegion *mr)
1418 {
1419 return mr->ram && mr->readonly;
1420 }
1421
1422 bool memory_region_is_iommu(MemoryRegion *mr)
1423 {
1424 return mr->iommu_ops;
1425 }
1426
1427 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1428 {
1429 notifier_list_add(&mr->iommu_notify, n);
1430 }
1431
1432 void memory_region_unregister_iommu_notifier(Notifier *n)
1433 {
1434 notifier_remove(n);
1435 }
1436
1437 void memory_region_notify_iommu(MemoryRegion *mr,
1438 IOMMUTLBEntry entry)
1439 {
1440 assert(memory_region_is_iommu(mr));
1441 notifier_list_notify(&mr->iommu_notify, &entry);
1442 }
1443
1444 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1445 {
1446 uint8_t mask = 1 << client;
1447
1448 assert(client == DIRTY_MEMORY_VGA);
1449 memory_region_transaction_begin();
1450 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1451 memory_region_update_pending |= mr->enabled;
1452 memory_region_transaction_commit();
1453 }
1454
1455 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1456 hwaddr size, unsigned client)
1457 {
1458 assert(mr->ram_addr != RAM_ADDR_INVALID);
1459 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1460 }
1461
1462 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1463 hwaddr size)
1464 {
1465 assert(mr->ram_addr != RAM_ADDR_INVALID);
1466 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1467 memory_region_get_dirty_log_mask(mr));
1468 }
1469
1470 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1471 hwaddr size, unsigned client)
1472 {
1473 assert(mr->ram_addr != RAM_ADDR_INVALID);
1474 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1475 size, client);
1476 }
1477
1478
1479 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1480 {
1481 AddressSpace *as;
1482 FlatRange *fr;
1483
1484 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1485 FlatView *view = address_space_get_flatview(as);
1486 FOR_EACH_FLAT_RANGE(fr, view) {
1487 if (fr->mr == mr) {
1488 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1489 }
1490 }
1491 flatview_unref(view);
1492 }
1493 }
1494
1495 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1496 {
1497 if (mr->readonly != readonly) {
1498 memory_region_transaction_begin();
1499 mr->readonly = readonly;
1500 memory_region_update_pending |= mr->enabled;
1501 memory_region_transaction_commit();
1502 }
1503 }
1504
1505 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1506 {
1507 if (mr->romd_mode != romd_mode) {
1508 memory_region_transaction_begin();
1509 mr->romd_mode = romd_mode;
1510 memory_region_update_pending |= mr->enabled;
1511 memory_region_transaction_commit();
1512 }
1513 }
1514
1515 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1516 hwaddr size, unsigned client)
1517 {
1518 assert(mr->ram_addr != RAM_ADDR_INVALID);
1519 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1520 client);
1521 }
1522
1523 int memory_region_get_fd(MemoryRegion *mr)
1524 {
1525 if (mr->alias) {
1526 return memory_region_get_fd(mr->alias);
1527 }
1528
1529 assert(mr->ram_addr != RAM_ADDR_INVALID);
1530
1531 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1532 }
1533
1534 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1535 {
1536 if (mr->alias) {
1537 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1538 }
1539
1540 assert(mr->ram_addr != RAM_ADDR_INVALID);
1541
1542 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1543 }
1544
1545 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1546 {
1547 assert(mr->ram_addr != RAM_ADDR_INVALID);
1548
1549 qemu_ram_resize(mr->ram_addr, newsize, errp);
1550 }
1551
1552 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1553 {
1554 FlatView *view;
1555 FlatRange *fr;
1556 CoalescedMemoryRange *cmr;
1557 AddrRange tmp;
1558 MemoryRegionSection section;
1559
1560 view = address_space_get_flatview(as);
1561 FOR_EACH_FLAT_RANGE(fr, view) {
1562 if (fr->mr == mr) {
1563 section = (MemoryRegionSection) {
1564 .address_space = as,
1565 .offset_within_address_space = int128_get64(fr->addr.start),
1566 .size = fr->addr.size,
1567 };
1568
1569 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1570 int128_get64(fr->addr.start),
1571 int128_get64(fr->addr.size));
1572 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1573 tmp = addrrange_shift(cmr->addr,
1574 int128_sub(fr->addr.start,
1575 int128_make64(fr->offset_in_region)));
1576 if (!addrrange_intersects(tmp, fr->addr)) {
1577 continue;
1578 }
1579 tmp = addrrange_intersection(tmp, fr->addr);
1580 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1581 int128_get64(tmp.start),
1582 int128_get64(tmp.size));
1583 }
1584 }
1585 }
1586 flatview_unref(view);
1587 }
1588
1589 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1590 {
1591 AddressSpace *as;
1592
1593 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1594 memory_region_update_coalesced_range_as(mr, as);
1595 }
1596 }
1597
1598 void memory_region_set_coalescing(MemoryRegion *mr)
1599 {
1600 memory_region_clear_coalescing(mr);
1601 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1602 }
1603
1604 void memory_region_add_coalescing(MemoryRegion *mr,
1605 hwaddr offset,
1606 uint64_t size)
1607 {
1608 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1609
1610 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1611 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1612 memory_region_update_coalesced_range(mr);
1613 memory_region_set_flush_coalesced(mr);
1614 }
1615
1616 void memory_region_clear_coalescing(MemoryRegion *mr)
1617 {
1618 CoalescedMemoryRange *cmr;
1619 bool updated = false;
1620
1621 qemu_flush_coalesced_mmio_buffer();
1622 mr->flush_coalesced_mmio = false;
1623
1624 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1625 cmr = QTAILQ_FIRST(&mr->coalesced);
1626 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1627 g_free(cmr);
1628 updated = true;
1629 }
1630
1631 if (updated) {
1632 memory_region_update_coalesced_range(mr);
1633 }
1634 }
1635
1636 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1637 {
1638 mr->flush_coalesced_mmio = true;
1639 }
1640
1641 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1642 {
1643 qemu_flush_coalesced_mmio_buffer();
1644 if (QTAILQ_EMPTY(&mr->coalesced)) {
1645 mr->flush_coalesced_mmio = false;
1646 }
1647 }
1648
1649 void memory_region_add_eventfd(MemoryRegion *mr,
1650 hwaddr addr,
1651 unsigned size,
1652 bool match_data,
1653 uint64_t data,
1654 EventNotifier *e)
1655 {
1656 MemoryRegionIoeventfd mrfd = {
1657 .addr.start = int128_make64(addr),
1658 .addr.size = int128_make64(size),
1659 .match_data = match_data,
1660 .data = data,
1661 .e = e,
1662 };
1663 unsigned i;
1664
1665 adjust_endianness(mr, &mrfd.data, size);
1666 memory_region_transaction_begin();
1667 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1668 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1669 break;
1670 }
1671 }
1672 ++mr->ioeventfd_nb;
1673 mr->ioeventfds = g_realloc(mr->ioeventfds,
1674 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1675 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1676 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1677 mr->ioeventfds[i] = mrfd;
1678 ioeventfd_update_pending |= mr->enabled;
1679 memory_region_transaction_commit();
1680 }
1681
1682 void memory_region_del_eventfd(MemoryRegion *mr,
1683 hwaddr addr,
1684 unsigned size,
1685 bool match_data,
1686 uint64_t data,
1687 EventNotifier *e)
1688 {
1689 MemoryRegionIoeventfd mrfd = {
1690 .addr.start = int128_make64(addr),
1691 .addr.size = int128_make64(size),
1692 .match_data = match_data,
1693 .data = data,
1694 .e = e,
1695 };
1696 unsigned i;
1697
1698 adjust_endianness(mr, &mrfd.data, size);
1699 memory_region_transaction_begin();
1700 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1701 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1702 break;
1703 }
1704 }
1705 assert(i != mr->ioeventfd_nb);
1706 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1707 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1708 --mr->ioeventfd_nb;
1709 mr->ioeventfds = g_realloc(mr->ioeventfds,
1710 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1711 ioeventfd_update_pending |= mr->enabled;
1712 memory_region_transaction_commit();
1713 }
1714
1715 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1716 {
1717 hwaddr offset = subregion->addr;
1718 MemoryRegion *mr = subregion->container;
1719 MemoryRegion *other;
1720
1721 memory_region_transaction_begin();
1722
1723 memory_region_ref(subregion);
1724 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1725 if (subregion->may_overlap || other->may_overlap) {
1726 continue;
1727 }
1728 if (int128_ge(int128_make64(offset),
1729 int128_add(int128_make64(other->addr), other->size))
1730 || int128_le(int128_add(int128_make64(offset), subregion->size),
1731 int128_make64(other->addr))) {
1732 continue;
1733 }
1734 #if 0
1735 printf("warning: subregion collision %llx/%llx (%s) "
1736 "vs %llx/%llx (%s)\n",
1737 (unsigned long long)offset,
1738 (unsigned long long)int128_get64(subregion->size),
1739 subregion->name,
1740 (unsigned long long)other->addr,
1741 (unsigned long long)int128_get64(other->size),
1742 other->name);
1743 #endif
1744 }
1745 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1746 if (subregion->priority >= other->priority) {
1747 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1748 goto done;
1749 }
1750 }
1751 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1752 done:
1753 memory_region_update_pending |= mr->enabled && subregion->enabled;
1754 memory_region_transaction_commit();
1755 }
1756
1757 static void memory_region_add_subregion_common(MemoryRegion *mr,
1758 hwaddr offset,
1759 MemoryRegion *subregion)
1760 {
1761 assert(!subregion->container);
1762 subregion->container = mr;
1763 subregion->addr = offset;
1764 memory_region_update_container_subregions(subregion);
1765 }
1766
1767 void memory_region_add_subregion(MemoryRegion *mr,
1768 hwaddr offset,
1769 MemoryRegion *subregion)
1770 {
1771 subregion->may_overlap = false;
1772 subregion->priority = 0;
1773 memory_region_add_subregion_common(mr, offset, subregion);
1774 }
1775
1776 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1777 hwaddr offset,
1778 MemoryRegion *subregion,
1779 int priority)
1780 {
1781 subregion->may_overlap = true;
1782 subregion->priority = priority;
1783 memory_region_add_subregion_common(mr, offset, subregion);
1784 }
1785
1786 void memory_region_del_subregion(MemoryRegion *mr,
1787 MemoryRegion *subregion)
1788 {
1789 memory_region_transaction_begin();
1790 assert(subregion->container == mr);
1791 subregion->container = NULL;
1792 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1793 memory_region_unref(subregion);
1794 memory_region_update_pending |= mr->enabled && subregion->enabled;
1795 memory_region_transaction_commit();
1796 }
1797
1798 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1799 {
1800 if (enabled == mr->enabled) {
1801 return;
1802 }
1803 memory_region_transaction_begin();
1804 mr->enabled = enabled;
1805 memory_region_update_pending = true;
1806 memory_region_transaction_commit();
1807 }
1808
1809 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1810 {
1811 Int128 s = int128_make64(size);
1812
1813 if (size == UINT64_MAX) {
1814 s = int128_2_64();
1815 }
1816 if (int128_eq(s, mr->size)) {
1817 return;
1818 }
1819 memory_region_transaction_begin();
1820 mr->size = s;
1821 memory_region_update_pending = true;
1822 memory_region_transaction_commit();
1823 }
1824
1825 static void memory_region_readd_subregion(MemoryRegion *mr)
1826 {
1827 MemoryRegion *container = mr->container;
1828
1829 if (container) {
1830 memory_region_transaction_begin();
1831 memory_region_ref(mr);
1832 memory_region_del_subregion(container, mr);
1833 mr->container = container;
1834 memory_region_update_container_subregions(mr);
1835 memory_region_unref(mr);
1836 memory_region_transaction_commit();
1837 }
1838 }
1839
1840 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1841 {
1842 if (addr != mr->addr) {
1843 mr->addr = addr;
1844 memory_region_readd_subregion(mr);
1845 }
1846 }
1847
1848 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1849 {
1850 assert(mr->alias);
1851
1852 if (offset == mr->alias_offset) {
1853 return;
1854 }
1855
1856 memory_region_transaction_begin();
1857 mr->alias_offset = offset;
1858 memory_region_update_pending |= mr->enabled;
1859 memory_region_transaction_commit();
1860 }
1861
1862 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1863 {
1864 return mr->ram_addr;
1865 }
1866
1867 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1868 {
1869 return mr->align;
1870 }
1871
1872 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1873 {
1874 const AddrRange *addr = addr_;
1875 const FlatRange *fr = fr_;
1876
1877 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1878 return -1;
1879 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1880 return 1;
1881 }
1882 return 0;
1883 }
1884
1885 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1886 {
1887 return bsearch(&addr, view->ranges, view->nr,
1888 sizeof(FlatRange), cmp_flatrange_addr);
1889 }
1890
1891 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1892 {
1893 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1894 if (!mr || (mr == container)) {
1895 return false;
1896 }
1897 memory_region_unref(mr);
1898 return true;
1899 }
1900
1901 bool memory_region_is_mapped(MemoryRegion *mr)
1902 {
1903 return mr->container ? true : false;
1904 }
1905
1906 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1907 hwaddr addr, uint64_t size)
1908 {
1909 MemoryRegionSection ret = { .mr = NULL };
1910 MemoryRegion *root;
1911 AddressSpace *as;
1912 AddrRange range;
1913 FlatView *view;
1914 FlatRange *fr;
1915
1916 addr += mr->addr;
1917 for (root = mr; root->container; ) {
1918 root = root->container;
1919 addr += root->addr;
1920 }
1921
1922 as = memory_region_to_address_space(root);
1923 if (!as) {
1924 return ret;
1925 }
1926 range = addrrange_make(int128_make64(addr), int128_make64(size));
1927
1928 rcu_read_lock();
1929 view = atomic_rcu_read(&as->current_map);
1930 fr = flatview_lookup(view, range);
1931 if (!fr) {
1932 goto out;
1933 }
1934
1935 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1936 --fr;
1937 }
1938
1939 ret.mr = fr->mr;
1940 ret.address_space = as;
1941 range = addrrange_intersection(range, fr->addr);
1942 ret.offset_within_region = fr->offset_in_region;
1943 ret.offset_within_region += int128_get64(int128_sub(range.start,
1944 fr->addr.start));
1945 ret.size = range.size;
1946 ret.offset_within_address_space = int128_get64(range.start);
1947 ret.readonly = fr->readonly;
1948 memory_region_ref(ret.mr);
1949 out:
1950 rcu_read_unlock();
1951 return ret;
1952 }
1953
1954 void address_space_sync_dirty_bitmap(AddressSpace *as)
1955 {
1956 FlatView *view;
1957 FlatRange *fr;
1958
1959 view = address_space_get_flatview(as);
1960 FOR_EACH_FLAT_RANGE(fr, view) {
1961 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1962 }
1963 flatview_unref(view);
1964 }
1965
1966 void memory_global_dirty_log_start(void)
1967 {
1968 global_dirty_log = true;
1969
1970 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1971
1972 /* Refresh DIRTY_LOG_MIGRATION bit. */
1973 memory_region_transaction_begin();
1974 memory_region_update_pending = true;
1975 memory_region_transaction_commit();
1976 }
1977
1978 void memory_global_dirty_log_stop(void)
1979 {
1980 global_dirty_log = false;
1981
1982 /* Refresh DIRTY_LOG_MIGRATION bit. */
1983 memory_region_transaction_begin();
1984 memory_region_update_pending = true;
1985 memory_region_transaction_commit();
1986
1987 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1988 }
1989
1990 static void listener_add_address_space(MemoryListener *listener,
1991 AddressSpace *as)
1992 {
1993 FlatView *view;
1994 FlatRange *fr;
1995
1996 if (listener->address_space_filter
1997 && listener->address_space_filter != as) {
1998 return;
1999 }
2000
2001 if (global_dirty_log) {
2002 if (listener->log_global_start) {
2003 listener->log_global_start(listener);
2004 }
2005 }
2006
2007 view = address_space_get_flatview(as);
2008 FOR_EACH_FLAT_RANGE(fr, view) {
2009 MemoryRegionSection section = {
2010 .mr = fr->mr,
2011 .address_space = as,
2012 .offset_within_region = fr->offset_in_region,
2013 .size = fr->addr.size,
2014 .offset_within_address_space = int128_get64(fr->addr.start),
2015 .readonly = fr->readonly,
2016 };
2017 if (listener->region_add) {
2018 listener->region_add(listener, &section);
2019 }
2020 }
2021 flatview_unref(view);
2022 }
2023
2024 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2025 {
2026 MemoryListener *other = NULL;
2027 AddressSpace *as;
2028
2029 listener->address_space_filter = filter;
2030 if (QTAILQ_EMPTY(&memory_listeners)
2031 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2032 memory_listeners)->priority) {
2033 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2034 } else {
2035 QTAILQ_FOREACH(other, &memory_listeners, link) {
2036 if (listener->priority < other->priority) {
2037 break;
2038 }
2039 }
2040 QTAILQ_INSERT_BEFORE(other, listener, link);
2041 }
2042
2043 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2044 listener_add_address_space(listener, as);
2045 }
2046 }
2047
2048 void memory_listener_unregister(MemoryListener *listener)
2049 {
2050 QTAILQ_REMOVE(&memory_listeners, listener, link);
2051 }
2052
2053 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2054 {
2055 memory_region_ref(root);
2056 memory_region_transaction_begin();
2057 as->root = root;
2058 as->current_map = g_new(FlatView, 1);
2059 flatview_init(as->current_map);
2060 as->ioeventfd_nb = 0;
2061 as->ioeventfds = NULL;
2062 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2063 as->name = g_strdup(name ? name : "anonymous");
2064 address_space_init_dispatch(as);
2065 memory_region_update_pending |= root->enabled;
2066 memory_region_transaction_commit();
2067 }
2068
2069 static void do_address_space_destroy(AddressSpace *as)
2070 {
2071 MemoryListener *listener;
2072
2073 address_space_destroy_dispatch(as);
2074
2075 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2076 assert(listener->address_space_filter != as);
2077 }
2078
2079 flatview_unref(as->current_map);
2080 g_free(as->name);
2081 g_free(as->ioeventfds);
2082 memory_region_unref(as->root);
2083 }
2084
2085 void address_space_destroy(AddressSpace *as)
2086 {
2087 MemoryRegion *root = as->root;
2088
2089 /* Flush out anything from MemoryListeners listening in on this */
2090 memory_region_transaction_begin();
2091 as->root = NULL;
2092 memory_region_transaction_commit();
2093 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2094 address_space_unregister(as);
2095
2096 /* At this point, as->dispatch and as->current_map are dummy
2097 * entries that the guest should never use. Wait for the old
2098 * values to expire before freeing the data.
2099 */
2100 as->root = root;
2101 call_rcu(as, do_address_space_destroy, rcu);
2102 }
2103
2104 typedef struct MemoryRegionList MemoryRegionList;
2105
2106 struct MemoryRegionList {
2107 const MemoryRegion *mr;
2108 QTAILQ_ENTRY(MemoryRegionList) queue;
2109 };
2110
2111 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2112
2113 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2114 const MemoryRegion *mr, unsigned int level,
2115 hwaddr base,
2116 MemoryRegionListHead *alias_print_queue)
2117 {
2118 MemoryRegionList *new_ml, *ml, *next_ml;
2119 MemoryRegionListHead submr_print_queue;
2120 const MemoryRegion *submr;
2121 unsigned int i;
2122
2123 if (!mr) {
2124 return;
2125 }
2126
2127 for (i = 0; i < level; i++) {
2128 mon_printf(f, " ");
2129 }
2130
2131 if (mr->alias) {
2132 MemoryRegionList *ml;
2133 bool found = false;
2134
2135 /* check if the alias is already in the queue */
2136 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2137 if (ml->mr == mr->alias) {
2138 found = true;
2139 }
2140 }
2141
2142 if (!found) {
2143 ml = g_new(MemoryRegionList, 1);
2144 ml->mr = mr->alias;
2145 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2146 }
2147 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2148 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2149 "-" TARGET_FMT_plx "%s\n",
2150 base + mr->addr,
2151 base + mr->addr
2152 + (int128_nz(mr->size) ?
2153 (hwaddr)int128_get64(int128_sub(mr->size,
2154 int128_one())) : 0),
2155 mr->priority,
2156 mr->romd_mode ? 'R' : '-',
2157 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2158 : '-',
2159 memory_region_name(mr),
2160 memory_region_name(mr->alias),
2161 mr->alias_offset,
2162 mr->alias_offset
2163 + (int128_nz(mr->size) ?
2164 (hwaddr)int128_get64(int128_sub(mr->size,
2165 int128_one())) : 0),
2166 mr->enabled ? "" : " [disabled]");
2167 } else {
2168 mon_printf(f,
2169 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2170 base + mr->addr,
2171 base + mr->addr
2172 + (int128_nz(mr->size) ?
2173 (hwaddr)int128_get64(int128_sub(mr->size,
2174 int128_one())) : 0),
2175 mr->priority,
2176 mr->romd_mode ? 'R' : '-',
2177 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2178 : '-',
2179 memory_region_name(mr),
2180 mr->enabled ? "" : " [disabled]");
2181 }
2182
2183 QTAILQ_INIT(&submr_print_queue);
2184
2185 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2186 new_ml = g_new(MemoryRegionList, 1);
2187 new_ml->mr = submr;
2188 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2189 if (new_ml->mr->addr < ml->mr->addr ||
2190 (new_ml->mr->addr == ml->mr->addr &&
2191 new_ml->mr->priority > ml->mr->priority)) {
2192 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2193 new_ml = NULL;
2194 break;
2195 }
2196 }
2197 if (new_ml) {
2198 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2199 }
2200 }
2201
2202 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2203 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2204 alias_print_queue);
2205 }
2206
2207 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2208 g_free(ml);
2209 }
2210 }
2211
2212 void mtree_info(fprintf_function mon_printf, void *f)
2213 {
2214 MemoryRegionListHead ml_head;
2215 MemoryRegionList *ml, *ml2;
2216 AddressSpace *as;
2217
2218 QTAILQ_INIT(&ml_head);
2219
2220 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2221 mon_printf(f, "address-space: %s\n", as->name);
2222 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2223 mon_printf(f, "\n");
2224 }
2225
2226 /* print aliased regions */
2227 QTAILQ_FOREACH(ml, &ml_head, queue) {
2228 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2229 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2230 mon_printf(f, "\n");
2231 }
2232
2233 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2234 g_free(ml);
2235 }
2236 }
2237
2238 static const TypeInfo memory_region_info = {
2239 .parent = TYPE_OBJECT,
2240 .name = TYPE_MEMORY_REGION,
2241 .instance_size = sizeof(MemoryRegion),
2242 .instance_init = memory_region_initfn,
2243 .instance_finalize = memory_region_finalize,
2244 };
2245
2246 static void memory_register_types(void)
2247 {
2248 type_register_static(&memory_region_info);
2249 }
2250
2251 type_init(memory_register_types)
CRIS target port of Qemu