target-ppc/timebase_helper.c

   1 /*
   2  *  PowerPC emulation helpers for QEMU.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "cpu.h"
  21 #include "exec/helper-proto.h"
  22
  23 /*****************************************************************************/
  24 /* SPR accesses */
  25
  26 target_ulong helper_load_tbl(CPUPPCState *env)
  27 {
  28     return (target_ulong)cpu_ppc_load_tbl(env);
  29 }
  30
  31 target_ulong helper_load_tbu(CPUPPCState *env)
  32 {
  33     return cpu_ppc_load_tbu(env);
  34 }
  35
  36 target_ulong helper_load_atbl(CPUPPCState *env)
  37 {
  38     return (target_ulong)cpu_ppc_load_atbl(env);
  39 }
  40
  41 target_ulong helper_load_atbu(CPUPPCState *env)
  42 {
  43     return cpu_ppc_load_atbu(env);
  44 }
  45
  46 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
  47 target_ulong helper_load_purr(CPUPPCState *env)
  48 {
  49     return (target_ulong)cpu_ppc_load_purr(env);
  50 }
  51 #endif
  52
  53 target_ulong helper_load_601_rtcl(CPUPPCState *env)
  54 {
  55     return cpu_ppc601_load_rtcl(env);
  56 }
  57
  58 target_ulong helper_load_601_rtcu(CPUPPCState *env)
  59 {
  60     return cpu_ppc601_load_rtcu(env);
  61 }
  62
  63 #if !defined(CONFIG_USER_ONLY)
  64 void helper_store_tbl(CPUPPCState *env, target_ulong val)
  65 {
  66     cpu_ppc_store_tbl(env, val);
  67 }
  68
  69 void helper_store_tbu(CPUPPCState *env, target_ulong val)
  70 {
  71     cpu_ppc_store_tbu(env, val);
  72 }
  73
  74 void helper_store_atbl(CPUPPCState *env, target_ulong val)
  75 {
  76     cpu_ppc_store_atbl(env, val);
  77 }
  78
  79 void helper_store_atbu(CPUPPCState *env, target_ulong val)
  80 {
  81     cpu_ppc_store_atbu(env, val);
  82 }
  83
  84 void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
  85 {
  86     cpu_ppc601_store_rtcl(env, val);
  87 }
  88
  89 void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
  90 {
  91     cpu_ppc601_store_rtcu(env, val);
  92 }
  93
  94 target_ulong helper_load_decr(CPUPPCState *env)
  95 {
  96     return cpu_ppc_load_decr(env);
  97 }
  98
  99 void helper_store_decr(CPUPPCState *env, target_ulong val)
 100 {
 101     cpu_ppc_store_decr(env, val);
 102 }
 103
 104 target_ulong helper_load_40x_pit(CPUPPCState *env)
 105 {
 106     return load_40x_pit(env);
 107 }
 108
 109 void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
 110 {
 111     store_40x_pit(env, val);
 112 }
 113
 114 void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
 115 {
 116     store_booke_tcr(env, val);
 117 }
 118
 119 void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
 120 {
 121     store_booke_tsr(env, val);
 122 }
 123 #endif
 124
 125 /*****************************************************************************/
 126 /* Embedded PowerPC specific helpers */
 127
 128 /* XXX: to be improved to check access rights when in user-mode */
 129 target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
 130 {
 131     uint32_t val = 0;
 132
 133     if (unlikely(env->dcr_env == NULL)) {
 134         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 135         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 136                                    POWERPC_EXCP_INVAL |
 137                                    POWERPC_EXCP_INVAL_INVAL);
 138     } else if (unlikely(ppc_dcr_read(env->dcr_env,
 139                                      (uint32_t)dcrn, &val) != 0)) {
 140         qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
 141                       (uint32_t)dcrn, (uint32_t)dcrn);
 142         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 143                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 144     }
 145     return val;
 146 }
 147
 148 void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
 149 {
 150     if (unlikely(env->dcr_env == NULL)) {
 151         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 152         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 153                                    POWERPC_EXCP_INVAL |
 154                                    POWERPC_EXCP_INVAL_INVAL);
 155     } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
 156                                       (uint32_t)val) != 0)) {
 157         qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
 158                       (uint32_t)dcrn, (uint32_t)dcrn);
 159         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 160                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 161     }
 162 }