Microblaze: Convert Microblaze-pic handling to GPIOs
[qemu/cris-port.git] / target-arm / kvm.c
blob1d2688dda72850e17f890985f36b1ec77562660f
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include <stdio.h>
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
14 #include <sys/mman.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "kvm_arm.h"
23 #include "cpu.h"
24 #include "hw/arm/arm.h"
26 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
27 KVM_CAP_LAST_INFO
30 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
31 int *fdarray,
32 struct kvm_vcpu_init *init)
34 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
36 kvmfd = qemu_open("/dev/kvm", O_RDWR);
37 if (kvmfd < 0) {
38 goto err;
40 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
41 if (vmfd < 0) {
42 goto err;
44 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
45 if (cpufd < 0) {
46 goto err;
49 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
50 if (ret >= 0) {
51 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
52 if (ret < 0) {
53 goto err;
55 } else {
56 /* Old kernel which doesn't know about the
57 * PREFERRED_TARGET ioctl: we know it will only support
58 * creating one kind of guest CPU which is its preferred
59 * CPU type.
61 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
62 init->target = *cpus_to_try++;
63 memset(init->features, 0, sizeof(init->features));
64 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
65 if (ret >= 0) {
66 break;
69 if (ret < 0) {
70 goto err;
74 fdarray[0] = kvmfd;
75 fdarray[1] = vmfd;
76 fdarray[2] = cpufd;
78 return true;
80 err:
81 if (cpufd >= 0) {
82 close(cpufd);
84 if (vmfd >= 0) {
85 close(vmfd);
87 if (kvmfd >= 0) {
88 close(kvmfd);
91 return false;
94 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
96 int i;
98 for (i = 2; i >= 0; i--) {
99 close(fdarray[i]);
103 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
105 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
107 /* All we really need to set up for the 'host' CPU
108 * is the feature bits -- we rely on the fact that the
109 * various ID register values in ARMCPU are only used for
110 * TCG CPUs.
112 if (!kvm_arm_get_host_cpu_features(ahcc)) {
113 fprintf(stderr, "Failed to retrieve host CPU features!\n");
114 abort();
118 static void kvm_arm_host_cpu_initfn(Object *obj)
120 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
121 ARMCPU *cpu = ARM_CPU(obj);
122 CPUARMState *env = &cpu->env;
124 cpu->kvm_target = ahcc->target;
125 cpu->dtb_compatible = ahcc->dtb_compatible;
126 env->features = ahcc->features;
129 static const TypeInfo host_arm_cpu_type_info = {
130 .name = TYPE_ARM_HOST_CPU,
131 #ifdef TARGET_AARCH64
132 .parent = TYPE_AARCH64_CPU,
133 #else
134 .parent = TYPE_ARM_CPU,
135 #endif
136 .instance_init = kvm_arm_host_cpu_initfn,
137 .class_init = kvm_arm_host_cpu_class_init,
138 .class_size = sizeof(ARMHostCPUClass),
141 int kvm_arch_init(KVMState *s)
143 /* For ARM interrupt delivery is always asynchronous,
144 * whether we are using an in-kernel VGIC or not.
146 kvm_async_interrupts_allowed = true;
148 type_register_static(&host_arm_cpu_type_info);
150 return 0;
153 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
155 return cpu->cpu_index;
158 /* We track all the KVM devices which need their memory addresses
159 * passing to the kernel in a list of these structures.
160 * When board init is complete we run through the list and
161 * tell the kernel the base addresses of the memory regions.
162 * We use a MemoryListener to track mapping and unmapping of
163 * the regions during board creation, so the board models don't
164 * need to do anything special for the KVM case.
166 typedef struct KVMDevice {
167 struct kvm_arm_device_addr kda;
168 MemoryRegion *mr;
169 QSLIST_ENTRY(KVMDevice) entries;
170 } KVMDevice;
172 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
174 static void kvm_arm_devlistener_add(MemoryListener *listener,
175 MemoryRegionSection *section)
177 KVMDevice *kd;
179 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
180 if (section->mr == kd->mr) {
181 kd->kda.addr = section->offset_within_address_space;
186 static void kvm_arm_devlistener_del(MemoryListener *listener,
187 MemoryRegionSection *section)
189 KVMDevice *kd;
191 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
192 if (section->mr == kd->mr) {
193 kd->kda.addr = -1;
198 static MemoryListener devlistener = {
199 .region_add = kvm_arm_devlistener_add,
200 .region_del = kvm_arm_devlistener_del,
203 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
205 KVMDevice *kd, *tkd;
207 memory_listener_unregister(&devlistener);
208 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
209 if (kd->kda.addr != -1) {
210 if (kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR,
211 &kd->kda) < 0) {
212 fprintf(stderr, "KVM_ARM_SET_DEVICE_ADDRESS failed: %s\n",
213 strerror(errno));
214 abort();
217 memory_region_unref(kd->mr);
218 g_free(kd);
222 static Notifier notify = {
223 .notify = kvm_arm_machine_init_done,
226 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid)
228 KVMDevice *kd;
230 if (!kvm_irqchip_in_kernel()) {
231 return;
234 if (QSLIST_EMPTY(&kvm_devices_head)) {
235 memory_listener_register(&devlistener, NULL);
236 qemu_add_machine_init_done_notifier(&notify);
238 kd = g_new0(KVMDevice, 1);
239 kd->mr = mr;
240 kd->kda.id = devid;
241 kd->kda.addr = -1;
242 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
243 memory_region_ref(kd->mr);
246 bool write_kvmstate_to_list(ARMCPU *cpu)
248 CPUState *cs = CPU(cpu);
249 int i;
250 bool ok = true;
252 for (i = 0; i < cpu->cpreg_array_len; i++) {
253 struct kvm_one_reg r;
254 uint64_t regidx = cpu->cpreg_indexes[i];
255 uint32_t v32;
256 int ret;
258 r.id = regidx;
260 switch (regidx & KVM_REG_SIZE_MASK) {
261 case KVM_REG_SIZE_U32:
262 r.addr = (uintptr_t)&v32;
263 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
264 if (!ret) {
265 cpu->cpreg_values[i] = v32;
267 break;
268 case KVM_REG_SIZE_U64:
269 r.addr = (uintptr_t)(cpu->cpreg_values + i);
270 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
271 break;
272 default:
273 abort();
275 if (ret) {
276 ok = false;
279 return ok;
282 bool write_list_to_kvmstate(ARMCPU *cpu)
284 CPUState *cs = CPU(cpu);
285 int i;
286 bool ok = true;
288 for (i = 0; i < cpu->cpreg_array_len; i++) {
289 struct kvm_one_reg r;
290 uint64_t regidx = cpu->cpreg_indexes[i];
291 uint32_t v32;
292 int ret;
294 r.id = regidx;
295 switch (regidx & KVM_REG_SIZE_MASK) {
296 case KVM_REG_SIZE_U32:
297 v32 = cpu->cpreg_values[i];
298 r.addr = (uintptr_t)&v32;
299 break;
300 case KVM_REG_SIZE_U64:
301 r.addr = (uintptr_t)(cpu->cpreg_values + i);
302 break;
303 default:
304 abort();
306 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
307 if (ret) {
308 /* We might fail for "unknown register" and also for
309 * "you tried to set a register which is constant with
310 * a different value from what it actually contains".
312 ok = false;
315 return ok;
318 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
322 void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
326 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
328 return 0;
331 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
333 return true;
336 int kvm_arch_process_async_events(CPUState *cs)
338 return 0;
341 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
343 return 1;
346 int kvm_arch_on_sigbus(int code, void *addr)
348 return 1;
351 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
353 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
356 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
357 struct kvm_sw_breakpoint *bp)
359 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
360 return -EINVAL;
363 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
364 target_ulong len, int type)
366 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
367 return -EINVAL;
370 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
371 target_ulong len, int type)
373 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
374 return -EINVAL;
377 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
378 struct kvm_sw_breakpoint *bp)
380 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
381 return -EINVAL;
384 void kvm_arch_remove_all_hw_breakpoints(void)
386 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
389 void kvm_arch_init_irq_routing(KVMState *s)