2 * Inter-VM Shared Memory PCI device.
5 * Cam Macdonell <cam@cs.ualberta.ca>
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
12 * Copyright (c) 2006 Igor Kovalenko
14 * This code is licensed under the GNU GPL v2.
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #include "qemu/cutils.h"
23 #include "hw/i386/pc.h"
24 #include "hw/pci/pci.h"
25 #include "hw/pci/msi.h"
26 #include "hw/pci/msix.h"
27 #include "sysemu/kvm.h"
28 #include "migration/migration.h"
29 #include "qemu/error-report.h"
30 #include "qemu/event_notifier.h"
31 #include "qom/object_interfaces.h"
32 #include "sysemu/char.h"
33 #include "sysemu/hostmem.h"
34 #include "sysemu/qtest.h"
35 #include "qapi/visitor.h"
36 #include "exec/ram_addr.h"
38 #include "hw/misc/ivshmem.h"
42 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
43 #define PCI_DEVICE_ID_IVSHMEM 0x1110
45 #define IVSHMEM_MAX_PEERS UINT16_MAX
46 #define IVSHMEM_IOEVENTFD 0
49 #define IVSHMEM_REG_BAR_SIZE 0x100
51 #define IVSHMEM_DEBUG 0
52 #define IVSHMEM_DPRINTF(fmt, ...) \
54 if (IVSHMEM_DEBUG) { \
55 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \
59 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
60 #define IVSHMEM_COMMON(obj) \
61 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
63 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain"
64 #define IVSHMEM_PLAIN(obj) \
65 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN)
67 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell"
68 #define IVSHMEM_DOORBELL(obj) \
69 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL)
71 #define TYPE_IVSHMEM "ivshmem"
72 #define IVSHMEM(obj) \
73 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
77 EventNotifier
*eventfds
;
80 typedef struct MSIVector
{
85 typedef struct IVShmemState
{
92 /* exactly one of these two may be set */
93 HostMemoryBackend
*hostmem
; /* with interrupts */
94 CharDriverState
*server_chr
; /* without interrupts */
102 MemoryRegion ivshmem_mmio
; /* BAR 0 (registers) */
103 MemoryRegion
*ivshmem_bar2
; /* BAR 2 (shared memory) */
104 MemoryRegion server_bar2
; /* used with server_chr */
106 /* interrupt support */
108 int nb_peers
; /* space in @peers[] */
110 MSIVector
*msi_vectors
;
111 uint64_t msg_buf
; /* buffer for receiving server messages */
112 int msg_buffered_bytes
; /* #bytes in @msg_buf */
114 /* migration stuff */
116 Error
*migration_blocker
;
123 uint32_t not_legacy_32bit
;
126 /* registers for the Inter-VM shared memory device */
127 enum ivshmem_registers
{
134 static inline uint32_t ivshmem_has_feature(IVShmemState
*ivs
,
135 unsigned int feature
) {
136 return (ivs
->features
& (1 << feature
));
139 static inline bool ivshmem_is_master(IVShmemState
*s
)
141 assert(s
->master
!= ON_OFF_AUTO_AUTO
);
142 return s
->master
== ON_OFF_AUTO_ON
;
145 static void ivshmem_update_irq(IVShmemState
*s
)
147 PCIDevice
*d
= PCI_DEVICE(s
);
148 uint32_t isr
= s
->intrstatus
& s
->intrmask
;
151 * Do nothing unless the device actually uses INTx. Here's how
152 * the device variants signal interrupts, what they put in PCI
154 * Device variant Interrupt Interrupt Pin MSI-X cap.
155 * ivshmem-plain none 0 no
156 * ivshmem-doorbell MSI-X 1 yes(1)
157 * ivshmem,msi=off INTx 1 no
158 * ivshmem,msi=on MSI-X 1(2) yes(1)
159 * (1) if guest enabled MSI-X
160 * (2) the device lies
161 * Leads to the condition for doing nothing:
163 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)
164 || !d
->config
[PCI_INTERRUPT_PIN
]) {
168 /* don't print ISR resets */
170 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
171 isr
? 1 : 0, s
->intrstatus
, s
->intrmask
);
174 pci_set_irq(d
, isr
!= 0);
177 static void ivshmem_IntrMask_write(IVShmemState
*s
, uint32_t val
)
179 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val
);
182 ivshmem_update_irq(s
);
185 static uint32_t ivshmem_IntrMask_read(IVShmemState
*s
)
187 uint32_t ret
= s
->intrmask
;
189 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret
);
193 static void ivshmem_IntrStatus_write(IVShmemState
*s
, uint32_t val
)
195 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val
);
198 ivshmem_update_irq(s
);
201 static uint32_t ivshmem_IntrStatus_read(IVShmemState
*s
)
203 uint32_t ret
= s
->intrstatus
;
205 /* reading ISR clears all interrupts */
207 ivshmem_update_irq(s
);
211 static void ivshmem_io_write(void *opaque
, hwaddr addr
,
212 uint64_t val
, unsigned size
)
214 IVShmemState
*s
= opaque
;
216 uint16_t dest
= val
>> 16;
217 uint16_t vector
= val
& 0xff;
221 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx
"\n", addr
);
225 ivshmem_IntrMask_write(s
, val
);
229 ivshmem_IntrStatus_write(s
, val
);
233 /* check that dest VM ID is reasonable */
234 if (dest
>= s
->nb_peers
) {
235 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest
);
239 /* check doorbell range */
240 if (vector
< s
->peers
[dest
].nb_eventfds
) {
241 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest
, vector
);
242 event_notifier_set(&s
->peers
[dest
].eventfds
[vector
]);
244 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
249 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx
"\n", addr
);
253 static uint64_t ivshmem_io_read(void *opaque
, hwaddr addr
,
257 IVShmemState
*s
= opaque
;
263 ret
= ivshmem_IntrMask_read(s
);
267 ret
= ivshmem_IntrStatus_read(s
);
275 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx
"\n", addr
);
282 static const MemoryRegionOps ivshmem_mmio_ops
= {
283 .read
= ivshmem_io_read
,
284 .write
= ivshmem_io_write
,
285 .endianness
= DEVICE_NATIVE_ENDIAN
,
287 .min_access_size
= 4,
288 .max_access_size
= 4,
292 static void ivshmem_vector_notify(void *opaque
)
294 MSIVector
*entry
= opaque
;
295 PCIDevice
*pdev
= entry
->pdev
;
296 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
297 int vector
= entry
- s
->msi_vectors
;
298 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
300 if (!event_notifier_test_and_clear(n
)) {
304 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev
, vector
);
305 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
306 if (msix_enabled(pdev
)) {
307 msix_notify(pdev
, vector
);
310 ivshmem_IntrStatus_write(s
, 1);
314 static int ivshmem_vector_unmask(PCIDevice
*dev
, unsigned vector
,
317 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
318 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
319 MSIVector
*v
= &s
->msi_vectors
[vector
];
322 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev
, vector
);
324 ret
= kvm_irqchip_update_msi_route(kvm_state
, v
->virq
, msg
, dev
);
329 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
, v
->virq
);
332 static void ivshmem_vector_mask(PCIDevice
*dev
, unsigned vector
)
334 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
335 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
338 IVSHMEM_DPRINTF("vector mask %p %d\n", dev
, vector
);
340 ret
= kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, n
,
341 s
->msi_vectors
[vector
].virq
);
343 error_report("remove_irqfd_notifier_gsi failed");
347 static void ivshmem_vector_poll(PCIDevice
*dev
,
348 unsigned int vector_start
,
349 unsigned int vector_end
)
351 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
354 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev
, vector_start
, vector_end
);
356 vector_end
= MIN(vector_end
, s
->vectors
);
358 for (vector
= vector_start
; vector
< vector_end
; vector
++) {
359 EventNotifier
*notifier
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
361 if (!msix_is_masked(dev
, vector
)) {
365 if (event_notifier_test_and_clear(notifier
)) {
366 msix_set_pending(dev
, vector
);
371 static void watch_vector_notifier(IVShmemState
*s
, EventNotifier
*n
,
374 int eventfd
= event_notifier_get_fd(n
);
376 assert(!s
->msi_vectors
[vector
].pdev
);
377 s
->msi_vectors
[vector
].pdev
= PCI_DEVICE(s
);
379 qemu_set_fd_handler(eventfd
, ivshmem_vector_notify
,
380 NULL
, &s
->msi_vectors
[vector
]);
383 static void ivshmem_add_eventfd(IVShmemState
*s
, int posn
, int i
)
385 memory_region_add_eventfd(&s
->ivshmem_mmio
,
390 &s
->peers
[posn
].eventfds
[i
]);
393 static void ivshmem_del_eventfd(IVShmemState
*s
, int posn
, int i
)
395 memory_region_del_eventfd(&s
->ivshmem_mmio
,
400 &s
->peers
[posn
].eventfds
[i
]);
403 static void close_peer_eventfds(IVShmemState
*s
, int posn
)
407 assert(posn
>= 0 && posn
< s
->nb_peers
);
408 n
= s
->peers
[posn
].nb_eventfds
;
410 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
411 memory_region_transaction_begin();
412 for (i
= 0; i
< n
; i
++) {
413 ivshmem_del_eventfd(s
, posn
, i
);
415 memory_region_transaction_commit();
418 for (i
= 0; i
< n
; i
++) {
419 event_notifier_cleanup(&s
->peers
[posn
].eventfds
[i
]);
422 g_free(s
->peers
[posn
].eventfds
);
423 s
->peers
[posn
].nb_eventfds
= 0;
426 static void resize_peers(IVShmemState
*s
, int nb_peers
)
428 int old_nb_peers
= s
->nb_peers
;
431 assert(nb_peers
> old_nb_peers
);
432 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers
);
434 s
->peers
= g_realloc(s
->peers
, nb_peers
* sizeof(Peer
));
435 s
->nb_peers
= nb_peers
;
437 for (i
= old_nb_peers
; i
< nb_peers
; i
++) {
438 s
->peers
[i
].eventfds
= g_new0(EventNotifier
, s
->vectors
);
439 s
->peers
[i
].nb_eventfds
= 0;
443 static void ivshmem_add_kvm_msi_virq(IVShmemState
*s
, int vector
,
446 PCIDevice
*pdev
= PCI_DEVICE(s
);
447 MSIMessage msg
= msix_get_message(pdev
, vector
);
450 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector
);
451 assert(!s
->msi_vectors
[vector
].pdev
);
453 ret
= kvm_irqchip_add_msi_route(kvm_state
, msg
, pdev
);
455 error_setg(errp
, "kvm_irqchip_add_msi_route failed");
459 s
->msi_vectors
[vector
].virq
= ret
;
460 s
->msi_vectors
[vector
].pdev
= pdev
;
463 static void setup_interrupt(IVShmemState
*s
, int vector
, Error
**errp
)
465 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
466 bool with_irqfd
= kvm_msi_via_irqfd_enabled() &&
467 ivshmem_has_feature(s
, IVSHMEM_MSI
);
468 PCIDevice
*pdev
= PCI_DEVICE(s
);
471 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector
);
474 IVSHMEM_DPRINTF("with eventfd\n");
475 watch_vector_notifier(s
, n
, vector
);
476 } else if (msix_enabled(pdev
)) {
477 IVSHMEM_DPRINTF("with irqfd\n");
478 ivshmem_add_kvm_msi_virq(s
, vector
, &err
);
480 error_propagate(errp
, err
);
484 if (!msix_is_masked(pdev
, vector
)) {
485 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
,
486 s
->msi_vectors
[vector
].virq
);
487 /* TODO handle error */
490 /* it will be delayed until msix is enabled, in write_config */
491 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
495 static void process_msg_shmem(IVShmemState
*s
, int fd
, Error
**errp
)
501 if (s
->ivshmem_bar2
) {
502 error_setg(errp
, "server sent unexpected shared memory message");
507 if (fstat(fd
, &buf
) < 0) {
508 error_setg_errno(errp
, errno
,
509 "can't determine size of shared memory sent by server");
517 if (s
->legacy_size
!= SIZE_MAX
) {
518 if (size
< s
->legacy_size
) {
519 error_setg(errp
, "server sent only %zd bytes of shared memory",
520 (size_t)buf
.st_size
);
524 size
= s
->legacy_size
;
527 /* mmap the region and map into the BAR2 */
528 ptr
= mmap(0, size
, PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, 0);
529 if (ptr
== MAP_FAILED
) {
530 error_setg_errno(errp
, errno
, "Failed to mmap shared memory");
534 memory_region_init_ram_ptr(&s
->server_bar2
, OBJECT(s
),
535 "ivshmem.bar2", size
, ptr
);
536 qemu_set_ram_fd(memory_region_get_ram_addr(&s
->server_bar2
), fd
);
537 s
->ivshmem_bar2
= &s
->server_bar2
;
540 static void process_msg_disconnect(IVShmemState
*s
, uint16_t posn
,
543 IVSHMEM_DPRINTF("posn %d has gone away\n", posn
);
544 if (posn
>= s
->nb_peers
|| posn
== s
->vm_id
) {
545 error_setg(errp
, "invalid peer %d", posn
);
548 close_peer_eventfds(s
, posn
);
551 static void process_msg_connect(IVShmemState
*s
, uint16_t posn
, int fd
,
554 Peer
*peer
= &s
->peers
[posn
];
558 * The N-th connect message for this peer comes with the file
559 * descriptor for vector N-1. Count messages to find the vector.
561 if (peer
->nb_eventfds
>= s
->vectors
) {
562 error_setg(errp
, "Too many eventfd received, device has %d vectors",
567 vector
= peer
->nb_eventfds
++;
569 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn
, vector
, fd
);
570 event_notifier_init_fd(&peer
->eventfds
[vector
], fd
);
571 fcntl_setfl(fd
, O_NONBLOCK
); /* msix/irqfd poll non block */
573 if (posn
== s
->vm_id
) {
574 setup_interrupt(s
, vector
, errp
);
575 /* TODO do we need to handle the error? */
578 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
579 ivshmem_add_eventfd(s
, posn
, vector
);
583 static void process_msg(IVShmemState
*s
, int64_t msg
, int fd
, Error
**errp
)
585 IVSHMEM_DPRINTF("posn is %" PRId64
", fd is %d\n", msg
, fd
);
587 if (msg
< -1 || msg
> IVSHMEM_MAX_PEERS
) {
588 error_setg(errp
, "server sent invalid message %" PRId64
, msg
);
594 process_msg_shmem(s
, fd
, errp
);
598 if (msg
>= s
->nb_peers
) {
599 resize_peers(s
, msg
+ 1);
603 process_msg_connect(s
, msg
, fd
, errp
);
605 process_msg_disconnect(s
, msg
, errp
);
609 static int ivshmem_can_receive(void *opaque
)
611 IVShmemState
*s
= opaque
;
613 assert(s
->msg_buffered_bytes
< sizeof(s
->msg_buf
));
614 return sizeof(s
->msg_buf
) - s
->msg_buffered_bytes
;
617 static void ivshmem_read(void *opaque
, const uint8_t *buf
, int size
)
619 IVShmemState
*s
= opaque
;
624 assert(size
>= 0 && s
->msg_buffered_bytes
+ size
<= sizeof(s
->msg_buf
));
625 memcpy((unsigned char *)&s
->msg_buf
+ s
->msg_buffered_bytes
, buf
, size
);
626 s
->msg_buffered_bytes
+= size
;
627 if (s
->msg_buffered_bytes
< sizeof(s
->msg_buf
)) {
630 msg
= le64_to_cpu(s
->msg_buf
);
631 s
->msg_buffered_bytes
= 0;
633 fd
= qemu_chr_fe_get_msgfd(s
->server_chr
);
634 IVSHMEM_DPRINTF("posn is %" PRId64
", fd is %d\n", msg
, fd
);
636 process_msg(s
, msg
, fd
, &err
);
638 error_report_err(err
);
642 static int64_t ivshmem_recv_msg(IVShmemState
*s
, int *pfd
, Error
**errp
)
649 ret
= qemu_chr_fe_read_all(s
->server_chr
, (uint8_t *)&msg
+ n
,
651 if (ret
< 0 && ret
!= -EINTR
) {
652 error_setg_errno(errp
, -ret
, "read from server failed");
656 } while (n
< sizeof(msg
));
658 *pfd
= qemu_chr_fe_get_msgfd(s
->server_chr
);
662 static void ivshmem_recv_setup(IVShmemState
*s
, Error
**errp
)
668 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
670 error_propagate(errp
, err
);
673 if (msg
!= IVSHMEM_PROTOCOL_VERSION
) {
674 error_setg(errp
, "server sent version %" PRId64
", expecting %d",
675 msg
, IVSHMEM_PROTOCOL_VERSION
);
679 error_setg(errp
, "server sent invalid version message");
684 * ivshmem-server sends the remaining initial messages in a fixed
685 * order, but the device has always accepted them in any order.
686 * Stay as compatible as practical, just in case people use
687 * servers that behave differently.
691 * ivshmem_device_spec.txt has always required the ID message
692 * right here, and ivshmem-server has always complied. However,
693 * older versions of the device accepted it out of order, but
694 * broke when an interrupt setup message arrived before it.
696 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
698 error_propagate(errp
, err
);
701 if (fd
!= -1 || msg
< 0 || msg
> IVSHMEM_MAX_PEERS
) {
702 error_setg(errp
, "server sent invalid ID message");
708 * Receive more messages until we got shared memory.
711 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
713 error_propagate(errp
, err
);
716 process_msg(s
, msg
, fd
, &err
);
718 error_propagate(errp
, err
);
724 * This function must either map the shared memory or fail. The
725 * loop above ensures that: it terminates normally only after it
726 * successfully processed the server's shared memory message.
727 * Assert that actually mapped the shared memory:
729 assert(s
->ivshmem_bar2
);
732 /* Select the MSI-X vectors used by device.
733 * ivshmem maps events to vectors statically, so
734 * we just enable all vectors on init and after reset. */
735 static void ivshmem_msix_vector_use(IVShmemState
*s
)
737 PCIDevice
*d
= PCI_DEVICE(s
);
740 for (i
= 0; i
< s
->vectors
; i
++) {
741 msix_vector_use(d
, i
);
745 static void ivshmem_reset(DeviceState
*d
)
747 IVShmemState
*s
= IVSHMEM_COMMON(d
);
751 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
752 ivshmem_msix_vector_use(s
);
756 static int ivshmem_setup_interrupts(IVShmemState
*s
)
758 /* allocate QEMU callback data for receiving interrupts */
759 s
->msi_vectors
= g_malloc0(s
->vectors
* sizeof(MSIVector
));
761 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
762 if (msix_init_exclusive_bar(PCI_DEVICE(s
), s
->vectors
, 1)) {
766 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s
->vectors
);
767 ivshmem_msix_vector_use(s
);
773 static void ivshmem_enable_irqfd(IVShmemState
*s
)
775 PCIDevice
*pdev
= PCI_DEVICE(s
);
778 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
781 ivshmem_add_kvm_msi_virq(s
, i
, &err
);
783 error_report_err(err
);
784 /* TODO do we need to handle the error? */
788 if (msix_set_vector_notifiers(pdev
,
789 ivshmem_vector_unmask
,
791 ivshmem_vector_poll
)) {
792 error_report("ivshmem: msix_set_vector_notifiers failed");
796 static void ivshmem_remove_kvm_msi_virq(IVShmemState
*s
, int vector
)
798 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector
);
800 if (s
->msi_vectors
[vector
].pdev
== NULL
) {
804 /* it was cleaned when masked in the frontend. */
805 kvm_irqchip_release_virq(kvm_state
, s
->msi_vectors
[vector
].virq
);
807 s
->msi_vectors
[vector
].pdev
= NULL
;
810 static void ivshmem_disable_irqfd(IVShmemState
*s
)
812 PCIDevice
*pdev
= PCI_DEVICE(s
);
815 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
816 ivshmem_remove_kvm_msi_virq(s
, i
);
819 msix_unset_vector_notifiers(pdev
);
822 static void ivshmem_write_config(PCIDevice
*pdev
, uint32_t address
,
823 uint32_t val
, int len
)
825 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
826 int is_enabled
, was_enabled
= msix_enabled(pdev
);
828 pci_default_write_config(pdev
, address
, val
, len
);
829 is_enabled
= msix_enabled(pdev
);
831 if (kvm_msi_via_irqfd_enabled()) {
832 if (!was_enabled
&& is_enabled
) {
833 ivshmem_enable_irqfd(s
);
834 } else if (was_enabled
&& !is_enabled
) {
835 ivshmem_disable_irqfd(s
);
840 static void ivshmem_common_realize(PCIDevice
*dev
, Error
**errp
)
842 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
845 uint8_t attr
= PCI_BASE_ADDRESS_SPACE_MEMORY
|
846 PCI_BASE_ADDRESS_MEM_PREFETCH
;
848 /* IRQFD requires MSI */
849 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
) &&
850 !ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
851 error_setg(errp
, "ioeventfd/irqfd requires MSI");
855 pci_conf
= dev
->config
;
856 pci_conf
[PCI_COMMAND
] = PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
;
858 memory_region_init_io(&s
->ivshmem_mmio
, OBJECT(s
), &ivshmem_mmio_ops
, s
,
859 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE
);
861 /* region for registers*/
862 pci_register_bar(dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
,
865 if (!s
->not_legacy_32bit
) {
866 attr
|= PCI_BASE_ADDRESS_MEM_TYPE_64
;
869 if (s
->hostmem
!= NULL
) {
870 IVSHMEM_DPRINTF("using hostmem\n");
872 s
->ivshmem_bar2
= host_memory_backend_get_memory(s
->hostmem
,
875 assert(s
->server_chr
);
877 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
878 s
->server_chr
->filename
);
880 /* we allocate enough space for 16 peers and grow as needed */
884 * Receive setup messages from server synchronously.
885 * Older versions did it asynchronously, but that creates a
886 * number of entertaining race conditions.
888 ivshmem_recv_setup(s
, &err
);
890 error_propagate(errp
, err
);
894 if (s
->master
== ON_OFF_AUTO_ON
&& s
->vm_id
!= 0) {
896 "master must connect to the server before any peers");
900 qemu_chr_add_handlers(s
->server_chr
, ivshmem_can_receive
,
901 ivshmem_read
, NULL
, s
);
903 if (ivshmem_setup_interrupts(s
) < 0) {
904 error_setg(errp
, "failed to initialize interrupts");
909 vmstate_register_ram(s
->ivshmem_bar2
, DEVICE(s
));
910 pci_register_bar(PCI_DEVICE(s
), 2, attr
, s
->ivshmem_bar2
);
912 if (s
->master
== ON_OFF_AUTO_AUTO
) {
913 s
->master
= s
->vm_id
== 0 ? ON_OFF_AUTO_ON
: ON_OFF_AUTO_OFF
;
916 if (!ivshmem_is_master(s
)) {
917 error_setg(&s
->migration_blocker
,
918 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
919 migrate_add_blocker(s
->migration_blocker
);
923 static void ivshmem_exit(PCIDevice
*dev
)
925 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
928 if (s
->migration_blocker
) {
929 migrate_del_blocker(s
->migration_blocker
);
930 error_free(s
->migration_blocker
);
933 if (memory_region_is_mapped(s
->ivshmem_bar2
)) {
935 void *addr
= memory_region_get_ram_ptr(s
->ivshmem_bar2
);
938 if (munmap(addr
, memory_region_size(s
->ivshmem_bar2
) == -1)) {
939 error_report("Failed to munmap shared memory %s",
943 fd
= qemu_get_ram_fd(memory_region_get_ram_addr(s
->ivshmem_bar2
));
947 vmstate_unregister_ram(s
->ivshmem_bar2
, DEVICE(dev
));
951 for (i
= 0; i
< s
->nb_peers
; i
++) {
952 close_peer_eventfds(s
, i
);
957 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
958 msix_uninit_exclusive_bar(dev
);
961 g_free(s
->msi_vectors
);
964 static int ivshmem_pre_load(void *opaque
)
966 IVShmemState
*s
= opaque
;
968 if (!ivshmem_is_master(s
)) {
969 error_report("'peer' devices are not migratable");
976 static int ivshmem_post_load(void *opaque
, int version_id
)
978 IVShmemState
*s
= opaque
;
980 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
981 ivshmem_msix_vector_use(s
);
986 static void ivshmem_common_class_init(ObjectClass
*klass
, void *data
)
988 DeviceClass
*dc
= DEVICE_CLASS(klass
);
989 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
991 k
->realize
= ivshmem_common_realize
;
992 k
->exit
= ivshmem_exit
;
993 k
->config_write
= ivshmem_write_config
;
994 k
->vendor_id
= PCI_VENDOR_ID_IVSHMEM
;
995 k
->device_id
= PCI_DEVICE_ID_IVSHMEM
;
996 k
->class_id
= PCI_CLASS_MEMORY_RAM
;
998 dc
->reset
= ivshmem_reset
;
999 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
1000 dc
->desc
= "Inter-VM shared memory";
1003 static const TypeInfo ivshmem_common_info
= {
1004 .name
= TYPE_IVSHMEM_COMMON
,
1005 .parent
= TYPE_PCI_DEVICE
,
1006 .instance_size
= sizeof(IVShmemState
),
1008 .class_init
= ivshmem_common_class_init
,
1011 static void ivshmem_check_memdev_is_busy(Object
*obj
, const char *name
,
1012 Object
*val
, Error
**errp
)
1016 mr
= host_memory_backend_get_memory(MEMORY_BACKEND(val
), &error_abort
);
1017 if (memory_region_is_mapped(mr
)) {
1018 char *path
= object_get_canonical_path_component(val
);
1019 error_setg(errp
, "can't use already busy memdev: %s", path
);
1022 qdev_prop_allow_set_link_before_realize(obj
, name
, val
, errp
);
1026 static const VMStateDescription ivshmem_plain_vmsd
= {
1027 .name
= TYPE_IVSHMEM_PLAIN
,
1029 .minimum_version_id
= 0,
1030 .pre_load
= ivshmem_pre_load
,
1031 .post_load
= ivshmem_post_load
,
1032 .fields
= (VMStateField
[]) {
1033 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1034 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1035 VMSTATE_UINT32(intrmask
, IVShmemState
),
1036 VMSTATE_END_OF_LIST()
1040 static Property ivshmem_plain_properties
[] = {
1041 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1042 DEFINE_PROP_END_OF_LIST(),
1045 static void ivshmem_plain_init(Object
*obj
)
1047 IVShmemState
*s
= IVSHMEM_PLAIN(obj
);
1049 object_property_add_link(obj
, "memdev", TYPE_MEMORY_BACKEND
,
1050 (Object
**)&s
->hostmem
,
1051 ivshmem_check_memdev_is_busy
,
1052 OBJ_PROP_LINK_UNREF_ON_RELEASE
,
1056 static void ivshmem_plain_realize(PCIDevice
*dev
, Error
**errp
)
1058 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1061 error_setg(errp
, "You must specify a 'memdev'");
1065 ivshmem_common_realize(dev
, errp
);
1068 static void ivshmem_plain_class_init(ObjectClass
*klass
, void *data
)
1070 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1071 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1073 k
->realize
= ivshmem_plain_realize
;
1074 dc
->props
= ivshmem_plain_properties
;
1075 dc
->vmsd
= &ivshmem_plain_vmsd
;
1078 static const TypeInfo ivshmem_plain_info
= {
1079 .name
= TYPE_IVSHMEM_PLAIN
,
1080 .parent
= TYPE_IVSHMEM_COMMON
,
1081 .instance_size
= sizeof(IVShmemState
),
1082 .instance_init
= ivshmem_plain_init
,
1083 .class_init
= ivshmem_plain_class_init
,
1086 static const VMStateDescription ivshmem_doorbell_vmsd
= {
1087 .name
= TYPE_IVSHMEM_DOORBELL
,
1089 .minimum_version_id
= 0,
1090 .pre_load
= ivshmem_pre_load
,
1091 .post_load
= ivshmem_post_load
,
1092 .fields
= (VMStateField
[]) {
1093 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1094 VMSTATE_MSIX(parent_obj
, IVShmemState
),
1095 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1096 VMSTATE_UINT32(intrmask
, IVShmemState
),
1097 VMSTATE_END_OF_LIST()
1101 static Property ivshmem_doorbell_properties
[] = {
1102 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1103 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1104 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1106 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1107 DEFINE_PROP_END_OF_LIST(),
1110 static void ivshmem_doorbell_init(Object
*obj
)
1112 IVShmemState
*s
= IVSHMEM_DOORBELL(obj
);
1114 s
->features
|= (1 << IVSHMEM_MSI
);
1115 s
->legacy_size
= SIZE_MAX
; /* whatever the server sends */
1118 static void ivshmem_doorbell_realize(PCIDevice
*dev
, Error
**errp
)
1120 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1122 if (!s
->server_chr
) {
1123 error_setg(errp
, "You must specify a 'chardev'");
1127 ivshmem_common_realize(dev
, errp
);
1130 static void ivshmem_doorbell_class_init(ObjectClass
*klass
, void *data
)
1132 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1133 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1135 k
->realize
= ivshmem_doorbell_realize
;
1136 dc
->props
= ivshmem_doorbell_properties
;
1137 dc
->vmsd
= &ivshmem_doorbell_vmsd
;
1140 static const TypeInfo ivshmem_doorbell_info
= {
1141 .name
= TYPE_IVSHMEM_DOORBELL
,
1142 .parent
= TYPE_IVSHMEM_COMMON
,
1143 .instance_size
= sizeof(IVShmemState
),
1144 .instance_init
= ivshmem_doorbell_init
,
1145 .class_init
= ivshmem_doorbell_class_init
,
1148 static int ivshmem_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
1150 IVShmemState
*s
= opaque
;
1151 PCIDevice
*pdev
= PCI_DEVICE(s
);
1154 IVSHMEM_DPRINTF("ivshmem_load_old\n");
1156 if (version_id
!= 0) {
1160 ret
= ivshmem_pre_load(s
);
1165 ret
= pci_device_load(pdev
, f
);
1170 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
1172 ivshmem_msix_vector_use(s
);
1174 s
->intrstatus
= qemu_get_be32(f
);
1175 s
->intrmask
= qemu_get_be32(f
);
1181 static bool test_msix(void *opaque
, int version_id
)
1183 IVShmemState
*s
= opaque
;
1185 return ivshmem_has_feature(s
, IVSHMEM_MSI
);
1188 static bool test_no_msix(void *opaque
, int version_id
)
1190 return !test_msix(opaque
, version_id
);
1193 static const VMStateDescription ivshmem_vmsd
= {
1196 .minimum_version_id
= 1,
1197 .pre_load
= ivshmem_pre_load
,
1198 .post_load
= ivshmem_post_load
,
1199 .fields
= (VMStateField
[]) {
1200 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1202 VMSTATE_MSIX_TEST(parent_obj
, IVShmemState
, test_msix
),
1203 VMSTATE_UINT32_TEST(intrstatus
, IVShmemState
, test_no_msix
),
1204 VMSTATE_UINT32_TEST(intrmask
, IVShmemState
, test_no_msix
),
1206 VMSTATE_END_OF_LIST()
1208 .load_state_old
= ivshmem_load_old
,
1209 .minimum_version_id_old
= 0
1212 static Property ivshmem_properties
[] = {
1213 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1214 DEFINE_PROP_STRING("size", IVShmemState
, sizearg
),
1215 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1216 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1218 DEFINE_PROP_BIT("msi", IVShmemState
, features
, IVSHMEM_MSI
, true),
1219 DEFINE_PROP_STRING("shm", IVShmemState
, shmobj
),
1220 DEFINE_PROP_STRING("role", IVShmemState
, role
),
1221 DEFINE_PROP_UINT32("use64", IVShmemState
, not_legacy_32bit
, 1),
1222 DEFINE_PROP_END_OF_LIST(),
1225 static void desugar_shm(IVShmemState
*s
)
1230 obj
= object_new("memory-backend-file");
1231 path
= g_strdup_printf("/dev/shm/%s", s
->shmobj
);
1232 object_property_set_str(obj
, path
, "mem-path", &error_abort
);
1234 object_property_set_int(obj
, s
->legacy_size
, "size", &error_abort
);
1235 object_property_set_bool(obj
, true, "share", &error_abort
);
1236 object_property_add_child(OBJECT(s
), "internal-shm-backend", obj
,
1238 user_creatable_complete(obj
, &error_abort
);
1239 s
->hostmem
= MEMORY_BACKEND(obj
);
1242 static void ivshmem_realize(PCIDevice
*dev
, Error
**errp
)
1244 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1246 if (!qtest_enabled()) {
1247 error_report("ivshmem is deprecated, please use ivshmem-plain"
1248 " or ivshmem-doorbell instead");
1251 if (!!s
->server_chr
+ !!s
->shmobj
!= 1) {
1252 error_setg(errp
, "You must specify either 'shm' or 'chardev'");
1256 if (s
->sizearg
== NULL
) {
1257 s
->legacy_size
= 4 << 20; /* 4 MB default */
1260 int64_t size
= qemu_strtosz(s
->sizearg
, &end
);
1261 if (size
< 0 || (size_t)size
!= size
|| *end
!= '\0'
1262 || !is_power_of_2(size
)) {
1263 error_setg(errp
, "Invalid size %s", s
->sizearg
);
1266 s
->legacy_size
= size
;
1269 /* check that role is reasonable */
1271 if (strncmp(s
->role
, "peer", 5) == 0) {
1272 s
->master
= ON_OFF_AUTO_OFF
;
1273 } else if (strncmp(s
->role
, "master", 7) == 0) {
1274 s
->master
= ON_OFF_AUTO_ON
;
1276 error_setg(errp
, "'role' must be 'peer' or 'master'");
1280 s
->master
= ON_OFF_AUTO_AUTO
;
1288 * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
1289 * bald-faced lie then. But it's a backwards compatible lie.
1291 pci_config_set_interrupt_pin(dev
->config
, 1);
1293 ivshmem_common_realize(dev
, errp
);
1296 static void ivshmem_class_init(ObjectClass
*klass
, void *data
)
1298 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1299 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1301 k
->realize
= ivshmem_realize
;
1303 dc
->desc
= "Inter-VM shared memory (legacy)";
1304 dc
->props
= ivshmem_properties
;
1305 dc
->vmsd
= &ivshmem_vmsd
;
1308 static const TypeInfo ivshmem_info
= {
1309 .name
= TYPE_IVSHMEM
,
1310 .parent
= TYPE_IVSHMEM_COMMON
,
1311 .instance_size
= sizeof(IVShmemState
),
1312 .class_init
= ivshmem_class_init
,
1315 static void ivshmem_register_types(void)
1317 type_register_static(&ivshmem_common_info
);
1318 type_register_static(&ivshmem_plain_info
);
1319 type_register_static(&ivshmem_doorbell_info
);
1320 type_register_static(&ivshmem_info
);
1323 type_init(ivshmem_register_types
)