block: Allow waiting for overlapping requests between begin/end
[qemu/cris-port.git] / hw / i386 / acpi-defs.h
blob78ca20489fa169680a8f63adab2b45051d12ccee
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License along
13 * with this program; if not, see <http://www.gnu.org/licenses/>.
15 #ifndef QEMU_ACPI_DEFS_H
16 #define QEMU_ACPI_DEFS_H
18 enum {
19 ACPI_FADT_F_WBINVD,
20 ACPI_FADT_F_WBINVD_FLUSH,
21 ACPI_FADT_F_PROC_C1,
22 ACPI_FADT_F_P_LVL2_UP,
23 ACPI_FADT_F_PWR_BUTTON,
24 ACPI_FADT_F_SLP_BUTTON,
25 ACPI_FADT_F_FIX_RTC,
26 ACPI_FADT_F_RTC_S4,
27 ACPI_FADT_F_TMR_VAL_EXT,
28 ACPI_FADT_F_DCK_CAP,
29 ACPI_FADT_F_RESET_REG_SUP,
30 ACPI_FADT_F_SEALED_CASE,
31 ACPI_FADT_F_HEADLESS,
32 ACPI_FADT_F_CPU_SW_SLP,
33 ACPI_FADT_F_PCI_EXP_WAK,
34 ACPI_FADT_F_USE_PLATFORM_CLOCK,
35 ACPI_FADT_F_S4_RTC_STS_VALID,
36 ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
37 ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
38 ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
39 ACPI_FADT_F_HW_REDUCED_ACPI,
40 ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
44 * ACPI 2.0 Generic Address Space definition.
46 struct Acpi20GenericAddress {
47 uint8_t address_space_id;
48 uint8_t register_bit_width;
49 uint8_t register_bit_offset;
50 uint8_t reserved;
51 uint64_t address;
52 } QEMU_PACKED;
53 typedef struct Acpi20GenericAddress Acpi20GenericAddress;
55 #define ACPI_RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR "
57 struct AcpiRsdpDescriptor { /* Root System Descriptor Pointer */
58 uint64_t signature; /* ACPI signature, contains "RSD PTR " */
59 uint8_t checksum; /* To make sum of struct == 0 */
60 uint8_t oem_id [6]; /* OEM identification */
61 uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */
62 uint32_t rsdt_physical_address; /* 32-bit physical address of RSDT */
63 uint32_t length; /* XSDT Length in bytes including hdr */
64 uint64_t xsdt_physical_address; /* 64-bit physical address of XSDT */
65 uint8_t extended_checksum; /* Checksum of entire table */
66 uint8_t reserved [3]; /* Reserved field must be 0 */
67 } QEMU_PACKED;
68 typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
70 /* Table structure from Linux kernel (the ACPI tables are under the
71 BSD license) */
74 #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
75 uint32_t signature; /* ACPI signature (4 ASCII characters) */ \
76 uint32_t length; /* Length of table, in bytes, including header */ \
77 uint8_t revision; /* ACPI Specification minor version # */ \
78 uint8_t checksum; /* To make sum of entire table == 0 */ \
79 uint8_t oem_id [6]; /* OEM identification */ \
80 uint8_t oem_table_id [8]; /* OEM table identification */ \
81 uint32_t oem_revision; /* OEM revision number */ \
82 uint8_t asl_compiler_id [4]; /* ASL compiler vendor ID */ \
83 uint32_t asl_compiler_revision; /* ASL compiler revision number */
86 struct AcpiTableHeader /* ACPI common table header */
88 ACPI_TABLE_HEADER_DEF
89 } QEMU_PACKED;
90 typedef struct AcpiTableHeader AcpiTableHeader;
93 * ACPI 1.0 Fixed ACPI Description Table (FADT)
95 #define ACPI_FACP_SIGNATURE 0x50434146 // FACP
96 struct AcpiFadtDescriptorRev1
98 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
99 uint32_t firmware_ctrl; /* Physical address of FACS */
100 uint32_t dsdt; /* Physical address of DSDT */
101 uint8_t model; /* System Interrupt Model */
102 uint8_t reserved1; /* Reserved */
103 uint16_t sci_int; /* System vector of SCI interrupt */
104 uint32_t smi_cmd; /* Port address of SMI command port */
105 uint8_t acpi_enable; /* Value to write to smi_cmd to enable ACPI */
106 uint8_t acpi_disable; /* Value to write to smi_cmd to disable ACPI */
107 uint8_t S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
108 uint8_t reserved2; /* Reserved - must be zero */
109 uint32_t pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
110 uint32_t pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
111 uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
112 uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
113 uint32_t pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
114 uint32_t pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
115 uint32_t gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
116 uint32_t gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
117 uint8_t pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
118 uint8_t pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
119 uint8_t pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
120 uint8_t pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
121 uint8_t gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
122 uint8_t gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
123 uint8_t gpe1_base; /* Offset in gpe model where gpe1 events start */
124 uint8_t reserved3; /* Reserved */
125 uint16_t plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
126 uint16_t plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
127 uint16_t flush_size; /* Size of area read to flush caches */
128 uint16_t flush_stride; /* Stride used in flushing caches */
129 uint8_t duty_offset; /* Bit location of duty cycle field in p_cnt reg */
130 uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */
131 uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
132 uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
133 uint8_t century; /* Index to century in RTC CMOS RAM */
134 uint8_t reserved4; /* Reserved */
135 uint8_t reserved4a; /* Reserved */
136 uint8_t reserved4b; /* Reserved */
137 uint32_t flags;
138 } QEMU_PACKED;
139 typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1;
142 * ACPI 1.0 Root System Description Table (RSDT)
144 #define ACPI_RSDT_SIGNATURE 0x54445352 // RSDT
145 struct AcpiRsdtDescriptorRev1
147 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
148 uint32_t table_offset_entry[0]; /* Array of pointers to other */
149 /* ACPI tables */
150 } QEMU_PACKED;
151 typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
154 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
156 #define ACPI_FACS_SIGNATURE 0x53434146 // FACS
157 struct AcpiFacsDescriptorRev1
159 uint32_t signature; /* ACPI Signature */
160 uint32_t length; /* Length of structure, in bytes */
161 uint32_t hardware_signature; /* Hardware configuration signature */
162 uint32_t firmware_waking_vector; /* ACPI OS waking vector */
163 uint32_t global_lock; /* Global Lock */
164 uint32_t flags;
165 uint8_t resverved3 [40]; /* Reserved - must be zero */
166 } QEMU_PACKED;
167 typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
170 * Differentiated System Description Table (DSDT)
172 #define ACPI_DSDT_SIGNATURE 0x54445344 // DSDT
175 * MADT values and structures
178 /* Values for MADT PCATCompat */
180 #define ACPI_DUAL_PIC 0
181 #define ACPI_MULTIPLE_APIC 1
183 /* Master MADT */
185 #define ACPI_APIC_SIGNATURE 0x43495041 // APIC
186 struct AcpiMultipleApicTable
188 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
189 uint32_t local_apic_address; /* Physical address of local APIC */
190 uint32_t flags;
191 } QEMU_PACKED;
192 typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
194 /* Values for Type in APIC sub-headers */
196 #define ACPI_APIC_PROCESSOR 0
197 #define ACPI_APIC_IO 1
198 #define ACPI_APIC_XRUPT_OVERRIDE 2
199 #define ACPI_APIC_NMI 3
200 #define ACPI_APIC_LOCAL_NMI 4
201 #define ACPI_APIC_ADDRESS_OVERRIDE 5
202 #define ACPI_APIC_IO_SAPIC 6
203 #define ACPI_APIC_LOCAL_SAPIC 7
204 #define ACPI_APIC_XRUPT_SOURCE 8
205 #define ACPI_APIC_RESERVED 9 /* 9 and greater are reserved */
208 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
210 #define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
211 uint8_t type; \
212 uint8_t length;
214 /* Sub-structures for MADT */
216 struct AcpiMadtProcessorApic
218 ACPI_SUB_HEADER_DEF
219 uint8_t processor_id; /* ACPI processor id */
220 uint8_t local_apic_id; /* Processor's local APIC id */
221 uint32_t flags;
222 } QEMU_PACKED;
223 typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
225 struct AcpiMadtIoApic
227 ACPI_SUB_HEADER_DEF
228 uint8_t io_apic_id; /* I/O APIC ID */
229 uint8_t reserved; /* Reserved - must be zero */
230 uint32_t address; /* APIC physical address */
231 uint32_t interrupt; /* Global system interrupt where INTI
232 * lines start */
233 } QEMU_PACKED;
234 typedef struct AcpiMadtIoApic AcpiMadtIoApic;
236 struct AcpiMadtIntsrcovr {
237 ACPI_SUB_HEADER_DEF
238 uint8_t bus;
239 uint8_t source;
240 uint32_t gsi;
241 uint16_t flags;
242 } QEMU_PACKED;
243 typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
245 struct AcpiMadtLocalNmi {
246 ACPI_SUB_HEADER_DEF
247 uint8_t processor_id; /* ACPI processor id */
248 uint16_t flags; /* MPS INTI flags */
249 uint8_t lint; /* Local APIC LINT# */
250 } QEMU_PACKED;
251 typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
254 * HPET Description Table
256 #define ACPI_HPET_SIGNATURE 0x54455048 // HPET
257 struct Acpi20Hpet {
258 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
259 uint32_t timer_block_id;
260 Acpi20GenericAddress addr;
261 uint8_t hpet_number;
262 uint16_t min_tick;
263 uint8_t page_protect;
264 } QEMU_PACKED;
265 typedef struct Acpi20Hpet Acpi20Hpet;
268 * SRAT (NUMA topology description) table
271 #define ACPI_SRAT_SIGNATURE 0x54415253 // SRAT
272 struct AcpiSystemResourceAffinityTable
274 ACPI_TABLE_HEADER_DEF
275 uint32_t reserved1;
276 uint32_t reserved2[2];
277 } QEMU_PACKED;
278 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
280 #define ACPI_SRAT_PROCESSOR 0
281 #define ACPI_SRAT_MEMORY 1
283 struct AcpiSratProcessorAffinity
285 ACPI_SUB_HEADER_DEF
286 uint8_t proximity_lo;
287 uint8_t local_apic_id;
288 uint32_t flags;
289 uint8_t local_sapic_eid;
290 uint8_t proximity_hi[3];
291 uint32_t reserved;
292 } QEMU_PACKED;
293 typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
295 struct AcpiSratMemoryAffinity
297 ACPI_SUB_HEADER_DEF
298 uint8_t proximity[4];
299 uint16_t reserved1;
300 uint64_t base_addr;
301 uint64_t range_length;
302 uint32_t reserved2;
303 uint32_t flags;
304 uint32_t reserved3[2];
305 } QEMU_PACKED;
306 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
308 /* PCI fw r3.0 MCFG table. */
309 /* Subtable */
310 struct AcpiMcfgAllocation {
311 uint64_t address; /* Base address, processor-relative */
312 uint16_t pci_segment; /* PCI segment group number */
313 uint8_t start_bus_number; /* Starting PCI Bus number */
314 uint8_t end_bus_number; /* Final PCI Bus number */
315 uint32_t reserved;
316 } QEMU_PACKED;
317 typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
319 #define ACPI_MCFG_SIGNATURE 0x4746434d // MCFG
321 /* Reserved signature: ignored by OSPM */
322 #define ACPI_RSRV_SIGNATURE 0x554d4551 // QEMU
324 struct AcpiTableMcfg {
325 ACPI_TABLE_HEADER_DEF;
326 uint8_t reserved[8];
327 AcpiMcfgAllocation allocation[0];
328 } QEMU_PACKED;
329 typedef struct AcpiTableMcfg AcpiTableMcfg;
331 #endif