target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "cpu.h"
  22 #include "exec/memory.h"
  23 #include "qemu/host-utils.h"
  24 #include "exec/helper-proto.h"
  25 #include <string.h>
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #include "exec/address-spaces.h"
  29 #ifdef CONFIG_KVM
  30 #include <linux/kvm.h>
  31 #endif
  32 #include "exec/cpu_ldst.h"
  33 #include "hw/watchdog/wdt_diag288.h"
  34
  35 #if !defined(CONFIG_USER_ONLY)
  36 #include "sysemu/cpus.h"
  37 #include "sysemu/sysemu.h"
  38 #include "hw/s390x/ebcdic.h"
  39 #include "hw/s390x/ipl.h"
  40 #endif
  41
  42 /* #define DEBUG_HELPER */
  43 #ifdef DEBUG_HELPER
  44 #define HELPER_LOG(x...) qemu_log(x)
  45 #else
  46 #define HELPER_LOG(x...)
  47 #endif
  48
  49 /* Raise an exception dynamically from a helper function.  */
  50 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  51                                      uintptr_t retaddr)
  52 {
  53     CPUState *cs = CPU(s390_env_get_cpu(env));
  54     int t;
  55
  56     cs->exception_index = EXCP_PGM;
  57     env->int_pgm_code = excp;
  58
  59     /* Use the (ultimate) callers address to find the insn that trapped.  */
  60     cpu_restore_state(cs, retaddr);
  61
  62     /* Advance past the insn.  */
  63     t = cpu_ldub_code(env, env->psw.addr);
  64     env->int_pgm_ilen = t = get_ilen(t);
  65     env->psw.addr += t;
  66
  67     cpu_loop_exit(cs);
  68 }
  69
  70 /* Raise an exception statically from a TB.  */
  71 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  72 {
  73     CPUState *cs = CPU(s390_env_get_cpu(env));
  74
  75     HELPER_LOG("%s: exception %d\n", __func__, excp);
  76     cs->exception_index = excp;
  77     cpu_loop_exit(cs);
  78 }
  79
  80 #ifndef CONFIG_USER_ONLY
  81
  82 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  83 {
  84     S390CPU *cpu = s390_env_get_cpu(env);
  85
  86     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  87                   env->psw.addr);
  88
  89     if (kvm_enabled()) {
  90 #ifdef CONFIG_KVM
  91         struct kvm_s390_irq irq = {
  92             .type = KVM_S390_PROGRAM_INT,
  93             .u.pgm.code = code,
  94         };
  95
  96         kvm_s390_vcpu_interrupt(cpu, &irq);
  97 #endif
  98     } else {
  99         CPUState *cs = CPU(cpu);
 100
 101         env->int_pgm_code = code;
 102         env->int_pgm_ilen = ilen;
 103         cs->exception_index = EXCP_PGM;
 104         cpu_loop_exit(cs);
 105     }
 106 }
 107
 108 /* SCLP service call */
 109 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 110 {
 111     int r = sclp_service_call(env, r1, r2);
 112     if (r < 0) {
 113         program_interrupt(env, -r, 4);
 114         return 0;
 115     }
 116     return r;
 117 }
 118
 119 #ifndef CONFIG_USER_ONLY
 120 static int modified_clear_reset(S390CPU *cpu)
 121 {
 122     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 123     CPUState *t;
 124
 125     pause_all_vcpus();
 126     cpu_synchronize_all_states();
 127     CPU_FOREACH(t) {
 128         run_on_cpu(t, s390_do_cpu_full_reset, t);
 129     }
 130     s390_cmma_reset();
 131     subsystem_reset();
 132     s390_crypto_reset();
 133     scc->load_normal(CPU(cpu));
 134     cpu_synchronize_all_post_reset();
 135     resume_all_vcpus();
 136     return 0;
 137 }
 138
 139 static int load_normal_reset(S390CPU *cpu)
 140 {
 141     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 142     CPUState *t;
 143
 144     pause_all_vcpus();
 145     cpu_synchronize_all_states();
 146     CPU_FOREACH(t) {
 147         run_on_cpu(t, s390_do_cpu_reset, t);
 148     }
 149     s390_cmma_reset();
 150     subsystem_reset();
 151     scc->initial_cpu_reset(CPU(cpu));
 152     scc->load_normal(CPU(cpu));
 153     cpu_synchronize_all_post_reset();
 154     resume_all_vcpus();
 155     return 0;
 156 }
 157
 158 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 159 {
 160     uint64_t func = env->regs[r1];
 161     uint64_t timeout = env->regs[r1 + 1];
 162     uint64_t action = env->regs[r3];
 163     Object *obj;
 164     DIAG288State *diag288;
 165     DIAG288Class *diag288_class;
 166
 167     if (r1 % 2 || action != 0) {
 168         return -1;
 169     }
 170
 171     /* Timeout must be more than 15 seconds except for timer deletion */
 172     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 173         return -1;
 174     }
 175
 176     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 177     if (!obj) {
 178         return -1;
 179     }
 180
 181     diag288 = DIAG288(obj);
 182     diag288_class = DIAG288_GET_CLASS(diag288);
 183     return diag288_class->handle_timer(diag288, func, timeout);
 184 }
 185
 186 #define DIAG_308_RC_OK              0x0001
 187 #define DIAG_308_RC_NO_CONF         0x0102
 188 #define DIAG_308_RC_INVALID         0x0402
 189
 190 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 191 {
 192     uint64_t addr =  env->regs[r1];
 193     uint64_t subcode = env->regs[r3];
 194     IplParameterBlock *iplb;
 195
 196     if (env->psw.mask & PSW_MASK_PSTATE) {
 197         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 198         return;
 199     }
 200
 201     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 202         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 203         return;
 204     }
 205
 206     switch (subcode) {
 207     case 0:
 208         modified_clear_reset(s390_env_get_cpu(env));
 209         if (tcg_enabled()) {
 210             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 211         }
 212         break;
 213     case 1:
 214         load_normal_reset(s390_env_get_cpu(env));
 215         if (tcg_enabled()) {
 216             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 217         }
 218         break;
 219     case 3:
 220         s390_reipl_request();
 221         if (tcg_enabled()) {
 222             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 223         }
 224         break;
 225     case 5:
 226         if ((r1 & 1) || (addr & 0x0fffULL)) {
 227             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 228             return;
 229         }
 230         if (!address_space_access_valid(&address_space_memory, addr,
 231                                         sizeof(IplParameterBlock), false)) {
 232             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 233             return;
 234         }
 235         iplb = g_malloc0(sizeof(struct IplParameterBlock));
 236         cpu_physical_memory_read(addr, iplb, sizeof(struct IplParameterBlock));
 237         s390_ipl_update_diag308(iplb);
 238         env->regs[r1 + 1] = DIAG_308_RC_OK;
 239         g_free(iplb);
 240         return;
 241     case 6:
 242         if ((r1 & 1) || (addr & 0x0fffULL)) {
 243             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 244             return;
 245         }
 246         if (!address_space_access_valid(&address_space_memory, addr,
 247                                         sizeof(IplParameterBlock), true)) {
 248             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 249             return;
 250         }
 251         iplb = s390_ipl_get_iplb();
 252         if (iplb) {
 253             cpu_physical_memory_write(addr, iplb,
 254                                       sizeof(struct IplParameterBlock));
 255             env->regs[r1 + 1] = DIAG_308_RC_OK;
 256         } else {
 257             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 258         }
 259         return;
 260     default:
 261         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 262         break;
 263     }
 264 }
 265 #endif
 266
 267 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 268 {
 269     uint64_t r;
 270
 271     switch (num) {
 272     case 0x500:
 273         /* KVM hypercall */
 274         r = s390_virtio_hypercall(env);
 275         break;
 276     case 0x44:
 277         /* yield */
 278         r = 0;
 279         break;
 280     case 0x308:
 281         /* ipl */
 282         handle_diag_308(env, r1, r3);
 283         r = 0;
 284         break;
 285     default:
 286         r = -1;
 287         break;
 288     }
 289
 290     if (r) {
 291         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 292     }
 293 }
 294
 295 /* Set Prefix */
 296 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 297 {
 298     CPUState *cs = CPU(s390_env_get_cpu(env));
 299     uint32_t prefix = a1 & 0x7fffe000;
 300
 301     env->psa = prefix;
 302     qemu_log("prefix: %#x\n", prefix);
 303     tlb_flush_page(cs, 0);
 304     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 305 }
 306
 307 /* Store Clock */
 308 uint64_t HELPER(stck)(CPUS390XState *env)
 309 {
 310     uint64_t time;
 311
 312     time = env->tod_offset +
 313         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 314
 315     return time;
 316 }
 317
 318 /* Set Clock Comparator */
 319 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 320 {
 321     if (time == -1ULL) {
 322         return;
 323     }
 324
 325     env->ckc = time;
 326
 327     /* difference between origins */
 328     time -= env->tod_offset;
 329
 330     /* nanoseconds */
 331     time = tod2time(time);
 332
 333     timer_mod(env->tod_timer, env->tod_basetime + time);
 334 }
 335
 336 /* Store Clock Comparator */
 337 uint64_t HELPER(stckc)(CPUS390XState *env)
 338 {
 339     return env->ckc;
 340 }
 341
 342 /* Set CPU Timer */
 343 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 344 {
 345     if (time == -1ULL) {
 346         return;
 347     }
 348
 349     /* nanoseconds */
 350     time = tod2time(time);
 351
 352     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 353
 354     timer_mod(env->cpu_timer, env->cputm);
 355 }
 356
 357 /* Store CPU Timer */
 358 uint64_t HELPER(stpt)(CPUS390XState *env)
 359 {
 360     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 361 }
 362
 363 /* Store System Information */
 364 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 365                       uint64_t r0, uint64_t r1)
 366 {
 367     int cc = 0;
 368     int sel1, sel2;
 369
 370     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 371         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 372         /* valid function code, invalid reserved bits */
 373         program_interrupt(env, PGM_SPECIFICATION, 2);
 374     }
 375
 376     sel1 = r0 & STSI_R0_SEL1_MASK;
 377     sel2 = r1 & STSI_R1_SEL2_MASK;
 378
 379     /* XXX: spec exception if sysib is not 4k-aligned */
 380
 381     switch (r0 & STSI_LEVEL_MASK) {
 382     case STSI_LEVEL_1:
 383         if ((sel1 == 1) && (sel2 == 1)) {
 384             /* Basic Machine Configuration */
 385             struct sysib_111 sysib;
 386
 387             memset(&sysib, 0, sizeof(sysib));
 388             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 389             /* same as machine type number in STORE CPU ID */
 390             ebcdic_put(sysib.type, "QEMU", 4);
 391             /* same as model number in STORE CPU ID */
 392             ebcdic_put(sysib.model, "QEMU            ", 16);
 393             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 394             ebcdic_put(sysib.plant, "QEMU", 4);
 395             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 396         } else if ((sel1 == 2) && (sel2 == 1)) {
 397             /* Basic Machine CPU */
 398             struct sysib_121 sysib;
 399
 400             memset(&sysib, 0, sizeof(sysib));
 401             /* XXX make different for different CPUs? */
 402             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 403             ebcdic_put(sysib.plant, "QEMU", 4);
 404             stw_p(&sysib.cpu_addr, env->cpu_num);
 405             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 406         } else if ((sel1 == 2) && (sel2 == 2)) {
 407             /* Basic Machine CPUs */
 408             struct sysib_122 sysib;
 409
 410             memset(&sysib, 0, sizeof(sysib));
 411             stl_p(&sysib.capability, 0x443afc29);
 412             /* XXX change when SMP comes */
 413             stw_p(&sysib.total_cpus, 1);
 414             stw_p(&sysib.active_cpus, 1);
 415             stw_p(&sysib.standby_cpus, 0);
 416             stw_p(&sysib.reserved_cpus, 0);
 417             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 418         } else {
 419             cc = 3;
 420         }
 421         break;
 422     case STSI_LEVEL_2:
 423         {
 424             if ((sel1 == 2) && (sel2 == 1)) {
 425                 /* LPAR CPU */
 426                 struct sysib_221 sysib;
 427
 428                 memset(&sysib, 0, sizeof(sysib));
 429                 /* XXX make different for different CPUs? */
 430                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 431                 ebcdic_put(sysib.plant, "QEMU", 4);
 432                 stw_p(&sysib.cpu_addr, env->cpu_num);
 433                 stw_p(&sysib.cpu_id, 0);
 434                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 435             } else if ((sel1 == 2) && (sel2 == 2)) {
 436                 /* LPAR CPUs */
 437                 struct sysib_222 sysib;
 438
 439                 memset(&sysib, 0, sizeof(sysib));
 440                 stw_p(&sysib.lpar_num, 0);
 441                 sysib.lcpuc = 0;
 442                 /* XXX change when SMP comes */
 443                 stw_p(&sysib.total_cpus, 1);
 444                 stw_p(&sysib.conf_cpus, 1);
 445                 stw_p(&sysib.standby_cpus, 0);
 446                 stw_p(&sysib.reserved_cpus, 0);
 447                 ebcdic_put(sysib.name, "QEMU    ", 8);
 448                 stl_p(&sysib.caf, 1000);
 449                 stw_p(&sysib.dedicated_cpus, 0);
 450                 stw_p(&sysib.shared_cpus, 0);
 451                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 452             } else {
 453                 cc = 3;
 454             }
 455             break;
 456         }
 457     case STSI_LEVEL_3:
 458         {
 459             if ((sel1 == 2) && (sel2 == 2)) {
 460                 /* VM CPUs */
 461                 struct sysib_322 sysib;
 462
 463                 memset(&sysib, 0, sizeof(sysib));
 464                 sysib.count = 1;
 465                 /* XXX change when SMP comes */
 466                 stw_p(&sysib.vm[0].total_cpus, 1);
 467                 stw_p(&sysib.vm[0].conf_cpus, 1);
 468                 stw_p(&sysib.vm[0].standby_cpus, 0);
 469                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 470                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 471                 stl_p(&sysib.vm[0].caf, 1000);
 472                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 473                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 474             } else {
 475                 cc = 3;
 476             }
 477             break;
 478         }
 479     case STSI_LEVEL_CURRENT:
 480         env->regs[0] = STSI_LEVEL_3;
 481         break;
 482     default:
 483         cc = 3;
 484         break;
 485     }
 486
 487     return cc;
 488 }
 489
 490 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 491                       uint64_t cpu_addr)
 492 {
 493     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 494
 495     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 496                __func__, order_code, r1, cpu_addr);
 497
 498     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 499        as parameter (input). Status (output) is always R1. */
 500
 501     switch (order_code) {
 502     case SIGP_SET_ARCH:
 503         /* switch arch */
 504         break;
 505     case SIGP_SENSE:
 506         /* enumerate CPU status */
 507         if (cpu_addr) {
 508             /* XXX implement when SMP comes */
 509             return 3;
 510         }
 511         env->regs[r1] &= 0xffffffff00000000ULL;
 512         cc = 1;
 513         break;
 514 #if !defined(CONFIG_USER_ONLY)
 515     case SIGP_RESTART:
 516         qemu_system_reset_request();
 517         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 518         break;
 519     case SIGP_STOP:
 520         qemu_system_shutdown_request();
 521         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 522         break;
 523 #endif
 524     default:
 525         /* unknown sigp */
 526         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 527         cc = SIGP_CC_NOT_OPERATIONAL;
 528     }
 529
 530     return cc;
 531 }
 532 #endif
 533
 534 #ifndef CONFIG_USER_ONLY
 535 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 536 {
 537     S390CPU *cpu = s390_env_get_cpu(env);
 538     ioinst_handle_xsch(cpu, r1);
 539 }
 540
 541 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 542 {
 543     S390CPU *cpu = s390_env_get_cpu(env);
 544     ioinst_handle_csch(cpu, r1);
 545 }
 546
 547 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 548 {
 549     S390CPU *cpu = s390_env_get_cpu(env);
 550     ioinst_handle_hsch(cpu, r1);
 551 }
 552
 553 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 554 {
 555     S390CPU *cpu = s390_env_get_cpu(env);
 556     ioinst_handle_msch(cpu, r1, inst >> 16);
 557 }
 558
 559 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 560 {
 561     S390CPU *cpu = s390_env_get_cpu(env);
 562     ioinst_handle_rchp(cpu, r1);
 563 }
 564
 565 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 566 {
 567     S390CPU *cpu = s390_env_get_cpu(env);
 568     ioinst_handle_rsch(cpu, r1);
 569 }
 570
 571 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 572 {
 573     S390CPU *cpu = s390_env_get_cpu(env);
 574     ioinst_handle_ssch(cpu, r1, inst >> 16);
 575 }
 576
 577 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 578 {
 579     S390CPU *cpu = s390_env_get_cpu(env);
 580     ioinst_handle_stsch(cpu, r1, inst >> 16);
 581 }
 582
 583 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 584 {
 585     S390CPU *cpu = s390_env_get_cpu(env);
 586     ioinst_handle_tsch(cpu, r1, inst >> 16);
 587 }
 588
 589 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 590 {
 591     S390CPU *cpu = s390_env_get_cpu(env);
 592     ioinst_handle_chsc(cpu, inst >> 16);
 593 }
 594 #endif
 595
 596 #ifndef CONFIG_USER_ONLY
 597 void HELPER(per_check_exception)(CPUS390XState *env)
 598 {
 599     CPUState *cs = CPU(s390_env_get_cpu(env));
 600
 601     if (env->per_perc_atmid) {
 602         env->int_pgm_code = PGM_PER;
 603         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 604
 605         cs->exception_index = EXCP_PGM;
 606         cpu_loop_exit(cs);
 607     }
 608 }
 609
 610 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 611 {
 612     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 613         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 614             || get_per_in_range(env, to)) {
 615             env->per_address = from;
 616             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 617         }
 618     }
 619 }
 620
 621 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 622 {
 623     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 624         env->per_address = addr;
 625         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 626
 627         /* If the instruction has to be nullified, trigger the
 628            exception immediately. */
 629         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 630             CPUState *cs = CPU(s390_env_get_cpu(env));
 631
 632             env->int_pgm_code = PGM_PER;
 633             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 634
 635             cs->exception_index = EXCP_PGM;
 636             cpu_loop_exit(cs);
 637         }
 638     }
 639 }
 640 #endif