disas.c

   1 /* General "disassemble this chunk" code.  Used for debugging. */
   2 #include "config.h"
   3 #include "qemu-common.h"
   4 #include "disas/bfd.h"
   5 #include "elf.h"
   6 #include <errno.h>
   7
   8 #include "cpu.h"
   9 #include "disas/disas.h"
  10
  11 typedef struct CPUDebug {
  12     struct disassemble_info info;
  13     CPUState *cpu;
  14 } CPUDebug;
  15
  16 /* Filled in by elfload.c.  Simplistic, but will do for now. */
  17 struct syminfo *syminfos = NULL;
  18
  19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  20    Transfer them to myaddr.  */
  21 int
  22 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
  23                    struct disassemble_info *info)
  24 {
  25     if (memaddr < info->buffer_vma
  26         || memaddr + length > info->buffer_vma + info->buffer_length)
  27         /* Out of bounds.  Use EIO because GDB uses it.  */
  28         return EIO;
  29     memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
  30     return 0;
  31 }
  32
  33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  34    Transfer them to myaddr.  */
  35 static int
  36 target_read_memory (bfd_vma memaddr,
  37                     bfd_byte *myaddr,
  38                     int length,
  39                     struct disassemble_info *info)
  40 {
  41     CPUDebug *s = container_of(info, CPUDebug, info);
  42
  43     cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
  44     return 0;
  45 }
  46
  47 /* Print an error message.  We can assume that this is in response to
  48    an error return from buffer_read_memory.  */
  49 void
  50 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
  51 {
  52   if (status != EIO)
  53     /* Can't happen.  */
  54     (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  55   else
  56     /* Actually, address between memaddr and memaddr + len was
  57        out of bounds.  */
  58     (*info->fprintf_func) (info->stream,
  59                            "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
  60 }
  61
  62 /* This could be in a separate file, to save minuscule amounts of space
  63    in statically linked executables.  */
  64
  65 /* Just print the address is hex.  This is included for completeness even
  66    though both GDB and objdump provide their own (to print symbolic
  67    addresses).  */
  68
  69 void
  70 generic_print_address (bfd_vma addr, struct disassemble_info *info)
  71 {
  72     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
  73 }
  74
  75 /* Print address in hex, truncated to the width of a target virtual address. */
  76 static void
  77 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
  78 {
  79     uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
  80     generic_print_address(addr & mask, info);
  81 }
  82
  83 /* Print address in hex, truncated to the width of a host virtual address. */
  84 static void
  85 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
  86 {
  87     uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
  88     generic_print_address(addr & mask, info);
  89 }
  90
  91 /* Just return the given address.  */
  92
  93 int
  94 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
  95 {
  96   return 1;
  97 }
  98
  99 bfd_vma bfd_getl64 (const bfd_byte *addr)
 100 {
 101   unsigned long long v;
 102
 103   v = (unsigned long long) addr[0];
 104   v |= (unsigned long long) addr[1] << 8;
 105   v |= (unsigned long long) addr[2] << 16;
 106   v |= (unsigned long long) addr[3] << 24;
 107   v |= (unsigned long long) addr[4] << 32;
 108   v |= (unsigned long long) addr[5] << 40;
 109   v |= (unsigned long long) addr[6] << 48;
 110   v |= (unsigned long long) addr[7] << 56;
 111   return (bfd_vma) v;
 112 }
 113
 114 bfd_vma bfd_getl32 (const bfd_byte *addr)
 115 {
 116   unsigned long v;
 117
 118   v = (unsigned long) addr[0];
 119   v |= (unsigned long) addr[1] << 8;
 120   v |= (unsigned long) addr[2] << 16;
 121   v |= (unsigned long) addr[3] << 24;
 122   return (bfd_vma) v;
 123 }
 124
 125 bfd_vma bfd_getb32 (const bfd_byte *addr)
 126 {
 127   unsigned long v;
 128
 129   v = (unsigned long) addr[0] << 24;
 130   v |= (unsigned long) addr[1] << 16;
 131   v |= (unsigned long) addr[2] << 8;
 132   v |= (unsigned long) addr[3];
 133   return (bfd_vma) v;
 134 }
 135
 136 bfd_vma bfd_getl16 (const bfd_byte *addr)
 137 {
 138   unsigned long v;
 139
 140   v = (unsigned long) addr[0];
 141   v |= (unsigned long) addr[1] << 8;
 142   return (bfd_vma) v;
 143 }
 144
 145 bfd_vma bfd_getb16 (const bfd_byte *addr)
 146 {
 147   unsigned long v;
 148
 149   v = (unsigned long) addr[0] << 24;
 150   v |= (unsigned long) addr[1] << 16;
 151   return (bfd_vma) v;
 152 }
 153
 154 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
 155                               const char *prefix)
 156 {
 157     int i, n = info->buffer_length;
 158     uint8_t *buf = g_malloc(n);
 159
 160     info->read_memory_func(pc, buf, n, info);
 161
 162     for (i = 0; i < n; ++i) {
 163         if (i % 32 == 0) {
 164             info->fprintf_func(info->stream, "\n%s: ", prefix);
 165         }
 166         info->fprintf_func(info->stream, "%02x", buf[i]);
 167     }
 168
 169     g_free(buf);
 170     return n;
 171 }
 172
 173 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
 174 {
 175     return print_insn_objdump(pc, info, "OBJD-H");
 176 }
 177
 178 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
 179 {
 180     return print_insn_objdump(pc, info, "OBJD-T");
 181 }
 182
 183 /* Disassemble this for me please... (debugging). 'flags' has the following
 184    values:
 185     i386 - 1 means 16 bit code, 2 means 64 bit code
 186     ppc  - bits 0:15 specify (optionally) the machine instruction set;
 187            bit 16 indicates little endian.
 188     other targets - unused
 189  */
 190 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 191                   target_ulong size, int flags)
 192 {
 193     CPUClass *cc = CPU_GET_CLASS(cpu);
 194     target_ulong pc;
 195     int count;
 196     CPUDebug s;
 197
 198     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 199
 200     s.cpu = cpu;
 201     s.info.read_memory_func = target_read_memory;
 202     s.info.buffer_vma = code;
 203     s.info.buffer_length = size;
 204     s.info.print_address_func = generic_print_target_address;
 205
 206 #ifdef TARGET_WORDS_BIGENDIAN
 207     s.info.endian = BFD_ENDIAN_BIG;
 208 #else
 209     s.info.endian = BFD_ENDIAN_LITTLE;
 210 #endif
 211
 212     if (cc->disas_set_info) {
 213         cc->disas_set_info(cpu, &s.info);
 214     }
 215
 216 #if defined(TARGET_I386)
 217     if (flags == 2) {
 218         s.info.mach = bfd_mach_x86_64;
 219     } else if (flags == 1) {
 220         s.info.mach = bfd_mach_i386_i8086;
 221     } else {
 222         s.info.mach = bfd_mach_i386_i386;
 223     }
 224     s.info.print_insn = print_insn_i386;
 225 #elif defined(TARGET_SPARC)
 226     s.info.print_insn = print_insn_sparc;
 227 #ifdef TARGET_SPARC64
 228     s.info.mach = bfd_mach_sparc_v9b;
 229 #endif
 230 #elif defined(TARGET_PPC)
 231     if ((flags >> 16) & 1) {
 232         s.info.endian = BFD_ENDIAN_LITTLE;
 233     }
 234     if (flags & 0xFFFF) {
 235         /* If we have a precise definition of the instruction set, use it. */
 236         s.info.mach = flags & 0xFFFF;
 237     } else {
 238 #ifdef TARGET_PPC64
 239         s.info.mach = bfd_mach_ppc64;
 240 #else
 241         s.info.mach = bfd_mach_ppc;
 242 #endif
 243     }
 244     s.info.disassembler_options = (char *)"any";
 245     s.info.print_insn = print_insn_ppc;
 246 #elif defined(TARGET_M68K)
 247     s.info.print_insn = print_insn_m68k;
 248 #elif defined(TARGET_MIPS)
 249 #ifdef TARGET_WORDS_BIGENDIAN
 250     s.info.print_insn = print_insn_big_mips;
 251 #else
 252     s.info.print_insn = print_insn_little_mips;
 253 #endif
 254 #elif defined(TARGET_SH4)
 255     s.info.mach = bfd_mach_sh4;
 256     s.info.print_insn = print_insn_sh;
 257 #elif defined(TARGET_ALPHA)
 258     s.info.mach = bfd_mach_alpha_ev6;
 259     s.info.print_insn = print_insn_alpha;
 260 #elif defined(TARGET_CRIS)
 261     if (flags != 32) {
 262         s.info.mach = bfd_mach_cris_v0_v10;
 263         s.info.print_insn = print_insn_crisv10;
 264     } else {
 265         s.info.mach = bfd_mach_cris_v32;
 266         s.info.print_insn = print_insn_crisv32;
 267     }
 268 #elif defined(TARGET_S390X)
 269     s.info.mach = bfd_mach_s390_64;
 270     s.info.print_insn = print_insn_s390;
 271 #elif defined(TARGET_MOXIE)
 272     s.info.mach = bfd_arch_moxie;
 273     s.info.print_insn = print_insn_moxie;
 274 #elif defined(TARGET_LM32)
 275     s.info.mach = bfd_mach_lm32;
 276     s.info.print_insn = print_insn_lm32;
 277 #endif
 278     if (s.info.print_insn == NULL) {
 279         s.info.print_insn = print_insn_od_target;
 280     }
 281
 282     for (pc = code; size > 0; pc += count, size -= count) {
 283         fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 284         count = s.info.print_insn(pc, &s.info);
 285 #if 0
 286         {
 287             int i;
 288             uint8_t b;
 289             fprintf(out, " {");
 290             for(i = 0; i < count; i++) {
 291                 target_read_memory(pc + i, &b, 1, &s.info);
 292                 fprintf(out, " %02x", b);
 293             }
 294             fprintf(out, " }");
 295         }
 296 #endif
 297         fprintf(out, "\n");
 298         if (count < 0)
 299             break;
 300         if (size < count) {
 301             fprintf(out,
 302                     "Disassembler disagrees with translator over instruction "
 303                     "decoding\n"
 304                     "Please report this to qemu-devel@nongnu.org\n");
 305             break;
 306         }
 307     }
 308 }
 309
 310 /* Disassemble this for me please... (debugging). */
 311 void disas(FILE *out, void *code, unsigned long size)
 312 {
 313     uintptr_t pc;
 314     int count;
 315     CPUDebug s;
 316     int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 317
 318     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 319     s.info.print_address_func = generic_print_host_address;
 320
 321     s.info.buffer = code;
 322     s.info.buffer_vma = (uintptr_t)code;
 323     s.info.buffer_length = size;
 324
 325 #ifdef HOST_WORDS_BIGENDIAN
 326     s.info.endian = BFD_ENDIAN_BIG;
 327 #else
 328     s.info.endian = BFD_ENDIAN_LITTLE;
 329 #endif
 330 #if defined(CONFIG_TCG_INTERPRETER)
 331     print_insn = print_insn_tci;
 332 #elif defined(__i386__)
 333     s.info.mach = bfd_mach_i386_i386;
 334     print_insn = print_insn_i386;
 335 #elif defined(__x86_64__)
 336     s.info.mach = bfd_mach_x86_64;
 337     print_insn = print_insn_i386;
 338 #elif defined(_ARCH_PPC)
 339     s.info.disassembler_options = (char *)"any";
 340     print_insn = print_insn_ppc;
 341 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
 342     print_insn = print_insn_arm_a64;
 343 #elif defined(__alpha__)
 344     print_insn = print_insn_alpha;
 345 #elif defined(__sparc__)
 346     print_insn = print_insn_sparc;
 347     s.info.mach = bfd_mach_sparc_v9b;
 348 #elif defined(__arm__)
 349     print_insn = print_insn_arm;
 350 #elif defined(__MIPSEB__)
 351     print_insn = print_insn_big_mips;
 352 #elif defined(__MIPSEL__)
 353     print_insn = print_insn_little_mips;
 354 #elif defined(__m68k__)
 355     print_insn = print_insn_m68k;
 356 #elif defined(__s390__)
 357     print_insn = print_insn_s390;
 358 #elif defined(__hppa__)
 359     print_insn = print_insn_hppa;
 360 #elif defined(__ia64__)
 361     print_insn = print_insn_ia64;
 362 #endif
 363     if (print_insn == NULL) {
 364         print_insn = print_insn_od_host;
 365     }
 366     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
 367         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
 368         count = print_insn(pc, &s.info);
 369         fprintf(out, "\n");
 370         if (count < 0)
 371             break;
 372     }
 373 }
 374
 375 /* Look up symbol for debugging purpose.  Returns "" if unknown. */
 376 const char *lookup_symbol(target_ulong orig_addr)
 377 {
 378     const char *symbol = "";
 379     struct syminfo *s;
 380
 381     for (s = syminfos; s; s = s->next) {
 382         symbol = s->lookup_symbol(s, orig_addr);
 383         if (symbol[0] != '\0') {
 384             break;
 385         }
 386     }
 387
 388     return symbol;
 389 }
 390
 391 #if !defined(CONFIG_USER_ONLY)
 392
 393 #include "monitor/monitor.h"
 394
 395 static int monitor_disas_is_physical;
 396
 397 static int
 398 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
 399                      struct disassemble_info *info)
 400 {
 401     CPUDebug *s = container_of(info, CPUDebug, info);
 402
 403     if (monitor_disas_is_physical) {
 404         cpu_physical_memory_read(memaddr, myaddr, length);
 405     } else {
 406         cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
 407     }
 408     return 0;
 409 }
 410
 411 static int GCC_FMT_ATTR(2, 3)
 412 monitor_fprintf(FILE *stream, const char *fmt, ...)
 413 {
 414     va_list ap;
 415     va_start(ap, fmt);
 416     monitor_vprintf((Monitor *)stream, fmt, ap);
 417     va_end(ap);
 418     return 0;
 419 }
 420
 421 /* Disassembler for the monitor.
 422    See target_disas for a description of flags. */
 423 void monitor_disas(Monitor *mon, CPUState *cpu,
 424                    target_ulong pc, int nb_insn, int is_physical, int flags)
 425 {
 426     CPUClass *cc = CPU_GET_CLASS(cpu);
 427     int count, i;
 428     CPUDebug s;
 429
 430     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 431
 432     s.cpu = cpu;
 433     monitor_disas_is_physical = is_physical;
 434     s.info.read_memory_func = monitor_read_memory;
 435     s.info.print_address_func = generic_print_target_address;
 436
 437     s.info.buffer_vma = pc;
 438
 439 #ifdef TARGET_WORDS_BIGENDIAN
 440     s.info.endian = BFD_ENDIAN_BIG;
 441 #else
 442     s.info.endian = BFD_ENDIAN_LITTLE;
 443 #endif
 444
 445     if (cc->disas_set_info) {
 446         cc->disas_set_info(cpu, &s.info);
 447     }
 448
 449 #if defined(TARGET_I386)
 450     if (flags == 2) {
 451         s.info.mach = bfd_mach_x86_64;
 452     } else if (flags == 1) {
 453         s.info.mach = bfd_mach_i386_i8086;
 454     } else {
 455         s.info.mach = bfd_mach_i386_i386;
 456     }
 457     s.info.print_insn = print_insn_i386;
 458 #elif defined(TARGET_ALPHA)
 459     s.info.print_insn = print_insn_alpha;
 460 #elif defined(TARGET_SPARC)
 461     s.info.print_insn = print_insn_sparc;
 462 #ifdef TARGET_SPARC64
 463     s.info.mach = bfd_mach_sparc_v9b;
 464 #endif
 465 #elif defined(TARGET_PPC)
 466     if (flags & 0xFFFF) {
 467         /* If we have a precise definition of the instruction set, use it. */
 468         s.info.mach = flags & 0xFFFF;
 469     } else {
 470 #ifdef TARGET_PPC64
 471         s.info.mach = bfd_mach_ppc64;
 472 #else
 473         s.info.mach = bfd_mach_ppc;
 474 #endif
 475     }
 476     if ((flags >> 16) & 1) {
 477         s.info.endian = BFD_ENDIAN_LITTLE;
 478     }
 479     s.info.print_insn = print_insn_ppc;
 480 #elif defined(TARGET_M68K)
 481     s.info.print_insn = print_insn_m68k;
 482 #elif defined(TARGET_MIPS)
 483 #ifdef TARGET_WORDS_BIGENDIAN
 484     s.info.print_insn = print_insn_big_mips;
 485 #else
 486     s.info.print_insn = print_insn_little_mips;
 487 #endif
 488 #elif defined(TARGET_SH4)
 489     s.info.mach = bfd_mach_sh4;
 490     s.info.print_insn = print_insn_sh;
 491 #elif defined(TARGET_S390X)
 492     s.info.mach = bfd_mach_s390_64;
 493     s.info.print_insn = print_insn_s390;
 494 #elif defined(TARGET_MOXIE)
 495     s.info.mach = bfd_arch_moxie;
 496     s.info.print_insn = print_insn_moxie;
 497 #elif defined(TARGET_LM32)
 498     s.info.mach = bfd_mach_lm32;
 499     s.info.print_insn = print_insn_lm32;
 500 #endif
 501     if (!s.info.print_insn) {
 502         monitor_printf(mon, "0x" TARGET_FMT_lx
 503                        ": Asm output not supported on this arch\n", pc);
 504         return;
 505     }
 506
 507     for(i = 0; i < nb_insn; i++) {
 508         monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 509         count = s.info.print_insn(pc, &s.info);
 510         monitor_printf(mon, "\n");
 511         if (count < 0)
 512             break;
 513         pc += count;
 514     }
 515 }
 516 #endif