target-alpha/mem_helper.c

   1 /*
   2  *  Helpers for loads and stores
   3  *
   4  *  Copyright (c) 2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "cpu.h"
  21 #include "helper.h"
  22
  23
  24 /* Softmmu support */
  25 #ifndef CONFIG_USER_ONLY
  26
  27 uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
  28 {
  29     CPUState *cs = CPU(alpha_env_get_cpu(env));
  30     return (int32_t)ldl_phys(cs->as, p);
  31 }
  32
  33 uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
  34 {
  35     CPUState *cs = CPU(alpha_env_get_cpu(env));
  36     return ldq_phys(cs->as, p);
  37 }
  38
  39 uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
  40 {
  41     CPUState *cs = CPU(alpha_env_get_cpu(env));
  42     env->lock_addr = p;
  43     return env->lock_value = (int32_t)ldl_phys(cs->as, p);
  44 }
  45
  46 uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
  47 {
  48     CPUState *cs = CPU(alpha_env_get_cpu(env));
  49     env->lock_addr = p;
  50     return env->lock_value = ldq_phys(cs->as, p);
  51 }
  52
  53 void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  54 {
  55     CPUState *cs = CPU(alpha_env_get_cpu(env));
  56     stl_phys(cs->as, p, v);
  57 }
  58
  59 void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  60 {
  61     CPUState *cs = CPU(alpha_env_get_cpu(env));
  62     stq_phys(cs->as, p, v);
  63 }
  64
  65 uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  66 {
  67     CPUState *cs = CPU(alpha_env_get_cpu(env));
  68     uint64_t ret = 0;
  69
  70     if (p == env->lock_addr) {
  71         int32_t old = ldl_phys(cs->as, p);
  72         if (old == (int32_t)env->lock_value) {
  73             stl_phys(cs->as, p, v);
  74             ret = 1;
  75         }
  76     }
  77     env->lock_addr = -1;
  78
  79     return ret;
  80 }
  81
  82 uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  83 {
  84     CPUState *cs = CPU(alpha_env_get_cpu(env));
  85     uint64_t ret = 0;
  86
  87     if (p == env->lock_addr) {
  88         uint64_t old = ldq_phys(cs->as, p);
  89         if (old == env->lock_value) {
  90             stq_phys(cs->as, p, v);
  91             ret = 1;
  92         }
  93     }
  94     env->lock_addr = -1;
  95
  96     return ret;
  97 }
  98
  99 static void do_unaligned_access(CPUAlphaState *env, target_ulong addr,
 100                                 int is_write, int is_user, uintptr_t retaddr)
 101 {
 102     AlphaCPU *cpu = alpha_env_get_cpu(env);
 103     CPUState *cs = CPU(cpu);
 104     uint64_t pc;
 105     uint32_t insn;
 106
 107     if (retaddr) {
 108         cpu_restore_state(cs, retaddr);
 109     }
 110
 111     pc = env->pc;
 112     insn = cpu_ldl_code(env, pc);
 113
 114     env->trap_arg0 = addr;
 115     env->trap_arg1 = insn >> 26;                /* opcode */
 116     env->trap_arg2 = (insn >> 21) & 31;         /* dest regno */
 117     cs->exception_index = EXCP_UNALIGN;
 118     env->error_code = 0;
 119     cpu_loop_exit(cs);
 120 }
 121
 122 void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
 123                                  bool is_write, bool is_exec, int unused,
 124                                  unsigned size)
 125 {
 126     AlphaCPU *cpu = ALPHA_CPU(cs);
 127     CPUAlphaState *env = &cpu->env;
 128
 129     env->trap_arg0 = addr;
 130     env->trap_arg1 = is_write ? 1 : 0;
 131     dynamic_excp(env, 0, EXCP_MCHK, 0);
 132 }
 133
 134 #include "exec/softmmu_exec.h"
 135
 136 #define MMUSUFFIX _mmu
 137 #define ALIGNED_ONLY
 138
 139 #define SHIFT 0
 140 #include "exec/softmmu_template.h"
 141
 142 #define SHIFT 1
 143 #include "exec/softmmu_template.h"
 144
 145 #define SHIFT 2
 146 #include "exec/softmmu_template.h"
 147
 148 #define SHIFT 3
 149 #include "exec/softmmu_template.h"
 150
 151 /* try to fill the TLB and return an exception if error. If retaddr is
 152    NULL, it means that the function was called in C code (i.e. not
 153    from generated code or from helper.c) */
 154 /* XXX: fix it to restore all registers */
 155 void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
 156               int mmu_idx, uintptr_t retaddr)
 157 {
 158     int ret;
 159
 160     ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
 161     if (unlikely(ret != 0)) {
 162         if (retaddr) {
 163             cpu_restore_state(cs, retaddr);
 164         }
 165         /* Exception index and error code are already set */
 166         cpu_loop_exit(cs);
 167     }
 168 }
 169 #endif /* CONFIG_USER_ONLY */