hw/ppc/spapr: Add h_set_sprg0 hypercall
[qemu/cris-port.git] / qom / cpu.c
blobaeb32f1b6eab985a14092785fabae021eb3f2df6
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu-common.h"
22 #include "qom/cpu.h"
23 #include "sysemu/kvm.h"
24 #include "qemu/notify.h"
25 #include "qemu/log.h"
26 #include "exec/log.h"
27 #include "qemu/error-report.h"
28 #include "sysemu/sysemu.h"
30 bool cpu_exists(int64_t id)
32 CPUState *cpu;
34 CPU_FOREACH(cpu) {
35 CPUClass *cc = CPU_GET_CLASS(cpu);
37 if (cc->get_arch_id(cpu) == id) {
38 return true;
41 return false;
44 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
46 char *str, *name, *featurestr;
47 CPUState *cpu;
48 ObjectClass *oc;
49 CPUClass *cc;
50 Error *err = NULL;
52 str = g_strdup(cpu_model);
53 name = strtok(str, ",");
55 oc = cpu_class_by_name(typename, name);
56 if (oc == NULL) {
57 g_free(str);
58 return NULL;
61 cpu = CPU(object_new(object_class_get_name(oc)));
62 cc = CPU_GET_CLASS(cpu);
64 featurestr = strtok(NULL, ",");
65 cc->parse_features(cpu, featurestr, &err);
66 g_free(str);
67 if (err != NULL) {
68 goto out;
71 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
73 out:
74 if (err != NULL) {
75 error_report_err(err);
76 object_unref(OBJECT(cpu));
77 return NULL;
80 return cpu;
83 bool cpu_paging_enabled(const CPUState *cpu)
85 CPUClass *cc = CPU_GET_CLASS(cpu);
87 return cc->get_paging_enabled(cpu);
90 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
92 return false;
95 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
96 Error **errp)
98 CPUClass *cc = CPU_GET_CLASS(cpu);
100 cc->get_memory_mapping(cpu, list, errp);
103 static void cpu_common_get_memory_mapping(CPUState *cpu,
104 MemoryMappingList *list,
105 Error **errp)
107 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
110 void cpu_reset_interrupt(CPUState *cpu, int mask)
112 cpu->interrupt_request &= ~mask;
115 void cpu_exit(CPUState *cpu)
117 cpu->exit_request = 1;
118 /* Ensure cpu_exec will see the exit request after TCG has exited. */
119 smp_wmb();
120 cpu->tcg_exit_req = 1;
123 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
124 void *opaque)
126 CPUClass *cc = CPU_GET_CLASS(cpu);
128 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
131 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
132 CPUState *cpu, void *opaque)
134 return 0;
137 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
138 int cpuid, void *opaque)
140 CPUClass *cc = CPU_GET_CLASS(cpu);
142 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
145 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
146 CPUState *cpu, int cpuid,
147 void *opaque)
149 return -1;
152 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
153 void *opaque)
155 CPUClass *cc = CPU_GET_CLASS(cpu);
157 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
160 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
161 CPUState *cpu, void *opaque)
163 return 0;
166 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
167 int cpuid, void *opaque)
169 CPUClass *cc = CPU_GET_CLASS(cpu);
171 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
174 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
175 CPUState *cpu, int cpuid,
176 void *opaque)
178 return -1;
182 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
184 return 0;
187 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
189 return 0;
192 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
194 /* If no extra check is required, QEMU watchpoint match can be considered
195 * as an architectural match.
197 return true;
200 bool target_words_bigendian(void);
201 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
203 return target_words_bigendian();
206 static void cpu_common_noop(CPUState *cpu)
210 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
212 return false;
215 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
216 int flags)
218 CPUClass *cc = CPU_GET_CLASS(cpu);
220 if (cc->dump_state) {
221 cpu_synchronize_state(cpu);
222 cc->dump_state(cpu, f, cpu_fprintf, flags);
226 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
227 int flags)
229 CPUClass *cc = CPU_GET_CLASS(cpu);
231 if (cc->dump_statistics) {
232 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
236 void cpu_reset(CPUState *cpu)
238 CPUClass *klass = CPU_GET_CLASS(cpu);
240 if (klass->reset != NULL) {
241 (*klass->reset)(cpu);
245 static void cpu_common_reset(CPUState *cpu)
247 CPUClass *cc = CPU_GET_CLASS(cpu);
249 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
250 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
251 log_cpu_state(cpu, cc->reset_dump_flags);
254 cpu->interrupt_request = 0;
255 cpu->current_tb = NULL;
256 cpu->halted = 0;
257 cpu->mem_io_pc = 0;
258 cpu->mem_io_vaddr = 0;
259 cpu->icount_extra = 0;
260 cpu->icount_decr.u32 = 0;
261 cpu->can_do_io = 1;
262 cpu->exception_index = -1;
263 cpu->crash_occurred = false;
264 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
267 static bool cpu_common_has_work(CPUState *cs)
269 return false;
272 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
274 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
276 return cc->class_by_name(cpu_model);
279 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
281 return NULL;
284 static void cpu_common_parse_features(CPUState *cpu, char *features,
285 Error **errp)
287 char *featurestr; /* Single "key=value" string being parsed */
288 char *val;
289 Error *err = NULL;
291 featurestr = features ? strtok(features, ",") : NULL;
293 while (featurestr) {
294 val = strchr(featurestr, '=');
295 if (val) {
296 *val = 0;
297 val++;
298 object_property_parse(OBJECT(cpu), val, featurestr, &err);
299 if (err) {
300 error_propagate(errp, err);
301 return;
303 } else {
304 error_setg(errp, "Expected key=value format, found %s.",
305 featurestr);
306 return;
308 featurestr = strtok(NULL, ",");
312 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
314 CPUState *cpu = CPU(dev);
316 if (dev->hotplugged) {
317 cpu_synchronize_post_init(cpu);
318 cpu_resume(cpu);
322 static void cpu_common_initfn(Object *obj)
324 CPUState *cpu = CPU(obj);
325 CPUClass *cc = CPU_GET_CLASS(obj);
327 cpu->cpu_index = -1;
328 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
329 qemu_mutex_init(&cpu->work_mutex);
330 QTAILQ_INIT(&cpu->breakpoints);
331 QTAILQ_INIT(&cpu->watchpoints);
334 static void cpu_common_finalize(Object *obj)
336 cpu_exec_exit(CPU(obj));
339 static int64_t cpu_common_get_arch_id(CPUState *cpu)
341 return cpu->cpu_index;
344 static void cpu_class_init(ObjectClass *klass, void *data)
346 DeviceClass *dc = DEVICE_CLASS(klass);
347 CPUClass *k = CPU_CLASS(klass);
349 k->class_by_name = cpu_common_class_by_name;
350 k->parse_features = cpu_common_parse_features;
351 k->reset = cpu_common_reset;
352 k->get_arch_id = cpu_common_get_arch_id;
353 k->has_work = cpu_common_has_work;
354 k->get_paging_enabled = cpu_common_get_paging_enabled;
355 k->get_memory_mapping = cpu_common_get_memory_mapping;
356 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
357 k->write_elf32_note = cpu_common_write_elf32_note;
358 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
359 k->write_elf64_note = cpu_common_write_elf64_note;
360 k->gdb_read_register = cpu_common_gdb_read_register;
361 k->gdb_write_register = cpu_common_gdb_write_register;
362 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
363 k->debug_excp_handler = cpu_common_noop;
364 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
365 k->cpu_exec_enter = cpu_common_noop;
366 k->cpu_exec_exit = cpu_common_noop;
367 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
368 dc->realize = cpu_common_realizefn;
370 * Reason: CPUs still need special care by board code: wiring up
371 * IRQs, adding reset handlers, halting non-first CPUs, ...
373 dc->cannot_instantiate_with_device_add_yet = true;
376 static const TypeInfo cpu_type_info = {
377 .name = TYPE_CPU,
378 .parent = TYPE_DEVICE,
379 .instance_size = sizeof(CPUState),
380 .instance_init = cpu_common_initfn,
381 .instance_finalize = cpu_common_finalize,
382 .abstract = true,
383 .class_size = sizeof(CPUClass),
384 .class_init = cpu_class_init,
387 static void cpu_register_types(void)
389 type_register_static(&cpu_type_info);
392 type_init(cpu_register_types)