include/hw/i386/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "exec/memory.h"
   6 #include "hw/boards.h"
   7 #include "hw/isa/isa.h"
   8 #include "hw/block/fdc.h"
   9 #include "net/net.h"
  10 #include "hw/i386/ioapic.h"
  11
  12 #include "qemu/range.h"
  13 #include "qemu/bitmap.h"
  14 #include "sysemu/sysemu.h"
  15 #include "hw/pci/pci.h"
  16 #include "hw/boards.h"
  17 #include "hw/compat.h"
  18
  19 #define HPET_INTCAP "hpet-intcap"
  20
  21 /**
  22  * PCMachineState:
  23  * @hotplug_memory_base: address in guest RAM address space where hotplug memory
  24  * address space begins.
  25  * @hotplug_memory: hotplug memory addess space container
  26  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
  27  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
  28  *                        backend's alignment value if provided
  29  */
  30 struct PCMachineState {
  31     /*< private >*/
  32     MachineState parent_obj;
  33
  34     /* <public> */
  35     ram_addr_t hotplug_memory_base;
  36     MemoryRegion hotplug_memory;
  37
  38     HotplugHandler *acpi_dev;
  39     ISADevice *rtc;
  40
  41     uint64_t max_ram_below_4g;
  42     OnOffAuto vmport;
  43     bool enforce_aligned_dimm;
  44 };
  45
  46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
  47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
  48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
  49 #define PC_MACHINE_VMPORT           "vmport"
  50 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm"
  51
  52 /**
  53  * PCMachineClass:
  54  * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
  55  */
  56 struct PCMachineClass {
  57     /*< private >*/
  58     MachineClass parent_class;
  59
  60     /*< public >*/
  61     HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
  62                                            DeviceState *dev);
  63 };
  64
  65 typedef struct PCMachineState PCMachineState;
  66 typedef struct PCMachineClass PCMachineClass;
  67
  68 #define TYPE_PC_MACHINE "generic-pc-machine"
  69 #define PC_MACHINE(obj) \
  70     OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
  71 #define PC_MACHINE_GET_CLASS(obj) \
  72     OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
  73 #define PC_MACHINE_CLASS(klass) \
  74     OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
  75
  76 void qemu_register_pc_machine(QEMUMachine *m);
  77
  78 /* PC-style peripherals (also used by other machines).  */
  79
  80 typedef struct PcPciInfo {
  81     Range w32;
  82     Range w64;
  83 } PcPciInfo;
  84
  85 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
  86 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
  87 #define ACPI_PM_PROP_S4_VAL "s4_val"
  88 #define ACPI_PM_PROP_SCI_INT "sci_int"
  89 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
  90 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
  91 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
  92 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
  93 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
  94
  95 struct PcGuestInfo {
  96     bool isapc_ram_fw;
  97     hwaddr ram_size, ram_size_below_4g;
  98     unsigned apic_id_limit;
  99     bool apic_xrupt_override;
 100     uint64_t numa_nodes;
 101     uint64_t *node_mem;
 102     uint64_t *node_cpu;
 103     FWCfgState *fw_cfg;
 104     int legacy_acpi_table_size;
 105     bool has_acpi_build;
 106     bool has_reserved_memory;
 107     bool rsdp_in_ram;
 108 };
 109
 110 /* parallel.c */
 111
 112 void parallel_hds_isa_init(ISABus *bus, int n);
 113
 114 bool parallel_mm_init(MemoryRegion *address_space,
 115                       hwaddr base, int it_shift, qemu_irq irq,
 116                       CharDriverState *chr);
 117
 118 /* i8259.c */
 119
 120 extern DeviceState *isa_pic;
 121 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
 122 qemu_irq *kvm_i8259_init(ISABus *bus);
 123 int pic_read_irq(DeviceState *d);
 124 int pic_get_output(DeviceState *d);
 125 void hmp_info_pic(Monitor *mon, const QDict *qdict);
 126 void hmp_info_irq(Monitor *mon, const QDict *qdict);
 127
 128 /* Global System Interrupts */
 129
 130 #define GSI_NUM_PINS IOAPIC_NUM_PINS
 131
 132 typedef struct GSIState {
 133     qemu_irq i8259_irq[ISA_NUM_IRQS];
 134     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
 135 } GSIState;
 136
 137 void gsi_handler(void *opaque, int n, int level);
 138
 139 /* vmport.c */
 140 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
 141
 142 static inline void vmport_init(ISABus *bus)
 143 {
 144     isa_create_simple(bus, "vmport");
 145 }
 146
 147 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
 148 void vmmouse_get_data(uint32_t *data);
 149 void vmmouse_set_data(const uint32_t *data);
 150
 151 /* pckbd.c */
 152
 153 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
 154 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 155                    MemoryRegion *region, ram_addr_t size,
 156                    hwaddr mask);
 157 void i8042_isa_mouse_fake_event(void *opaque);
 158 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
 159
 160 /* pc.c */
 161 extern int fd_bootchk;
 162
 163 void pc_register_ferr_irq(qemu_irq irq);
 164 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 165
 166 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
 167 void pc_hot_add_cpu(const int64_t id, Error **errp);
 168 void pc_acpi_init(const char *default_dsdt);
 169
 170 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
 171                                 ram_addr_t above_4g_mem_size);
 172
 173 void pc_set_legacy_acpi_data_size(void);
 174
 175 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
 176 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
 177 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
 178 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
 179 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
 180 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
 181
 182
 183 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
 184                             MemoryRegion *pci_address_space);
 185
 186 FWCfgState *xen_load_linux(const char *kernel_filename,
 187                            const char *kernel_cmdline,
 188                            const char *initrd_filename,
 189                            ram_addr_t below_4g_mem_size,
 190                            PcGuestInfo *guest_info);
 191 FWCfgState *pc_memory_init(MachineState *machine,
 192                            MemoryRegion *system_memory,
 193                            ram_addr_t below_4g_mem_size,
 194                            ram_addr_t above_4g_mem_size,
 195                            MemoryRegion *rom_memory,
 196                            MemoryRegion **ram_memory,
 197                            PcGuestInfo *guest_info);
 198 qemu_irq *pc_allocate_cpu_irq(void);
 199 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 200 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
 201                           ISADevice **rtc_state,
 202                           ISADevice **floppy,
 203                           bool no_vmport,
 204                           uint32 hpet_irqs);
 205 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
 206 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 207                   const char *boot_device, MachineState *machine,
 208                   ISADevice *floppy, BusState *ide0, BusState *ide1,
 209                   ISADevice *s);
 210 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
 211 void pc_pci_device_init(PCIBus *pci_bus);
 212
 213 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 214 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 215
 216 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
 217
 218 /* acpi_piix.c */
 219
 220 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 221                       qemu_irq sci_irq, qemu_irq smi_irq,
 222                       int kvm_enabled, FWCfgState *fw_cfg,
 223                       DeviceState **piix4_pm);
 224 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 225
 226 /* hpet.c */
 227 extern int no_hpet;
 228
 229 /* piix_pci.c */
 230 struct PCII440FXState;
 231 typedef struct PCII440FXState PCII440FXState;
 232
 233 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
 234                     ISABus **isa_bus, qemu_irq *pic,
 235                     MemoryRegion *address_space_mem,
 236                     MemoryRegion *address_space_io,
 237                     ram_addr_t ram_size,
 238                     ram_addr_t below_4g_mem_size,
 239                     ram_addr_t above_4g_mem_size,
 240                     MemoryRegion *pci_memory,
 241                     MemoryRegion *ram_memory);
 242
 243 PCIBus *find_i440fx(void);
 244 /* piix4.c */
 245 extern PCIDevice *piix4_dev;
 246 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
 247
 248 /* vga.c */
 249 enum vga_retrace_method {
 250     VGA_RETRACE_DUMB,
 251     VGA_RETRACE_PRECISE
 252 };
 253
 254 extern enum vga_retrace_method vga_retrace_method;
 255
 256 int isa_vga_mm_init(hwaddr vram_base,
 257                     hwaddr ctrl_base, int it_shift,
 258                     MemoryRegion *address_space);
 259
 260 /* ne2000.c */
 261 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
 262 {
 263     DeviceState *dev;
 264     ISADevice *isadev;
 265
 266     qemu_check_nic_model(nd, "ne2k_isa");
 267
 268     isadev = isa_try_create(bus, "ne2k_isa");
 269     if (!isadev) {
 270         return false;
 271     }
 272     dev = DEVICE(isadev);
 273     qdev_prop_set_uint32(dev, "iobase", base);
 274     qdev_prop_set_uint32(dev, "irq",    irq);
 275     qdev_set_nic_properties(dev, nd);
 276     qdev_init_nofail(dev);
 277     return true;
 278 }
 279
 280 /* pc_sysfw.c */
 281 void pc_system_firmware_init(MemoryRegion *rom_memory,
 282                              bool isapc_ram_fw);
 283
 284 /* pvpanic.c */
 285 uint16_t pvpanic_port(void);
 286
 287 /* e820 types */
 288 #define E820_RAM        1
 289 #define E820_RESERVED   2
 290 #define E820_ACPI       3
 291 #define E820_NVS        4
 292 #define E820_UNUSABLE   5
 293
 294 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 295 int e820_get_num_entries(void);
 296 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
 297
 298 #define PC_COMPAT_2_3 \
 299         HW_COMPAT_2_3
 300
 301 #define PC_COMPAT_2_2 \
 302         PC_COMPAT_2_3 \
 303         HW_COMPAT_2_2
 304
 305 #define PC_COMPAT_2_1 \
 306         PC_COMPAT_2_2 \
 307         HW_COMPAT_2_1
 308
 309 #define PC_COMPAT_2_0 \
 310         PC_COMPAT_2_1 \
 311         {\
 312             .driver   = "virtio-scsi-pci",\
 313             .property = "any_layout",\
 314             .value    = "off",\
 315         },{\
 316             .driver   = "PIIX4_PM",\
 317             .property = "memory-hotplug-support",\
 318             .value    = "off",\
 319         },\
 320         {\
 321             .driver   = "apic",\
 322             .property = "version",\
 323             .value    = stringify(0x11),\
 324         },\
 325         {\
 326             .driver   = "nec-usb-xhci",\
 327             .property = "superspeed-ports-first",\
 328             .value    = "off",\
 329         },\
 330         {\
 331             .driver   = "nec-usb-xhci",\
 332             .property = "force-pcie-endcap",\
 333             .value    = "on",\
 334         },\
 335         {\
 336             .driver   = "pci-serial",\
 337             .property = "prog_if",\
 338             .value    = stringify(0),\
 339         },\
 340         {\
 341             .driver   = "pci-serial-2x",\
 342             .property = "prog_if",\
 343             .value    = stringify(0),\
 344         },\
 345         {\
 346             .driver   = "pci-serial-4x",\
 347             .property = "prog_if",\
 348             .value    = stringify(0),\
 349         },\
 350         {\
 351             .driver   = "virtio-net-pci",\
 352             .property = "guest_announce",\
 353             .value    = "off",\
 354         },\
 355         {\
 356             .driver   = "ICH9-LPC",\
 357             .property = "memory-hotplug-support",\
 358             .value    = "off",\
 359         },{\
 360             .driver   = "xio3130-downstream",\
 361             .property = COMPAT_PROP_PCP,\
 362             .value    = "off",\
 363         },{\
 364             .driver   = "ioh3420",\
 365             .property = COMPAT_PROP_PCP,\
 366             .value    = "off",\
 367         },
 368
 369 #define PC_COMPAT_1_7 \
 370         PC_COMPAT_2_0 \
 371         {\
 372             .driver   = TYPE_USB_DEVICE,\
 373             .property = "msos-desc",\
 374             .value    = "no",\
 375         },\
 376         {\
 377             .driver   = "PIIX4_PM",\
 378             .property = "acpi-pci-hotplug-with-bridge-support",\
 379             .value    = "off",\
 380         },\
 381         {\
 382             .driver   = "hpet",\
 383             .property = HPET_INTCAP,\
 384             .value    = stringify(4),\
 385         },
 386
 387 #define PC_COMPAT_1_6 \
 388         PC_COMPAT_1_7 \
 389         {\
 390             .driver   = "e1000",\
 391             .property = "mitigation",\
 392             .value    = "off",\
 393         },{\
 394             .driver   = "qemu64-" TYPE_X86_CPU,\
 395             .property = "model",\
 396             .value    = stringify(2),\
 397         },{\
 398             .driver   = "qemu32-" TYPE_X86_CPU,\
 399             .property = "model",\
 400             .value    = stringify(3),\
 401         },{\
 402             .driver   = "i440FX-pcihost",\
 403             .property = "short_root_bus",\
 404             .value    = stringify(1),\
 405         },{\
 406             .driver   = "q35-pcihost",\
 407             .property = "short_root_bus",\
 408             .value    = stringify(1),\
 409         },
 410
 411 #define PC_COMPAT_1_5 \
 412         PC_COMPAT_1_6 \
 413         {\
 414             .driver   = "Conroe-" TYPE_X86_CPU,\
 415             .property = "model",\
 416             .value    = stringify(2),\
 417         },{\
 418             .driver   = "Conroe-" TYPE_X86_CPU,\
 419             .property = "level",\
 420             .value    = stringify(2),\
 421         },{\
 422             .driver   = "Penryn-" TYPE_X86_CPU,\
 423             .property = "model",\
 424             .value    = stringify(2),\
 425         },{\
 426             .driver   = "Penryn-" TYPE_X86_CPU,\
 427             .property = "level",\
 428             .value    = stringify(2),\
 429         },{\
 430             .driver   = "Nehalem-" TYPE_X86_CPU,\
 431             .property = "model",\
 432             .value    = stringify(2),\
 433         },{\
 434             .driver   = "Nehalem-" TYPE_X86_CPU,\
 435             .property = "level",\
 436             .value    = stringify(2),\
 437         },{\
 438             .driver   = "virtio-net-pci",\
 439             .property = "any_layout",\
 440             .value    = "off",\
 441         },{\
 442             .driver = TYPE_X86_CPU,\
 443             .property = "pmu",\
 444             .value = "on",\
 445         },{\
 446             .driver   = "i440FX-pcihost",\
 447             .property = "short_root_bus",\
 448             .value    = stringify(0),\
 449         },{\
 450             .driver   = "q35-pcihost",\
 451             .property = "short_root_bus",\
 452             .value    = stringify(0),\
 453         },
 454
 455 #define PC_COMPAT_1_4 \
 456         PC_COMPAT_1_5 \
 457         {\
 458             .driver   = "scsi-hd",\
 459             .property = "discard_granularity",\
 460             .value    = stringify(0),\
 461         },{\
 462             .driver   = "scsi-cd",\
 463             .property = "discard_granularity",\
 464             .value    = stringify(0),\
 465         },{\
 466             .driver   = "scsi-disk",\
 467             .property = "discard_granularity",\
 468             .value    = stringify(0),\
 469         },{\
 470             .driver   = "ide-hd",\
 471             .property = "discard_granularity",\
 472             .value    = stringify(0),\
 473         },{\
 474             .driver   = "ide-cd",\
 475             .property = "discard_granularity",\
 476             .value    = stringify(0),\
 477         },{\
 478             .driver   = "ide-drive",\
 479             .property = "discard_granularity",\
 480             .value    = stringify(0),\
 481         },{\
 482             .driver   = "virtio-blk-pci",\
 483             .property = "discard_granularity",\
 484             .value    = stringify(0),\
 485         },{\
 486             .driver   = "virtio-serial-pci",\
 487             .property = "vectors",\
 488             /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
 489             .value    = stringify(0xFFFFFFFF),\
 490         },{ \
 491             .driver   = "virtio-net-pci", \
 492             .property = "ctrl_guest_offloads", \
 493             .value    = "off", \
 494         },{\
 495             .driver   = "e1000",\
 496             .property = "romfile",\
 497             .value    = "pxe-e1000.rom",\
 498         },{\
 499             .driver   = "ne2k_pci",\
 500             .property = "romfile",\
 501             .value    = "pxe-ne2k_pci.rom",\
 502         },{\
 503             .driver   = "pcnet",\
 504             .property = "romfile",\
 505             .value    = "pxe-pcnet.rom",\
 506         },{\
 507             .driver   = "rtl8139",\
 508             .property = "romfile",\
 509             .value    = "pxe-rtl8139.rom",\
 510         },{\
 511             .driver   = "virtio-net-pci",\
 512             .property = "romfile",\
 513             .value    = "pxe-virtio.rom",\
 514         },{\
 515             .driver   = "486-" TYPE_X86_CPU,\
 516             .property = "model",\
 517             .value    = stringify(0),\
 518         },
 519
 520 #define PC_COMMON_MACHINE_OPTIONS \
 521     .default_boot_order = "cad"
 522
 523 #define PC_DEFAULT_MACHINE_OPTIONS \
 524     PC_COMMON_MACHINE_OPTIONS, \
 525     .hot_add_cpu = pc_hot_add_cpu, \
 526     .max_cpus = 255
 527
 528 #endif