target-alpha/cpu.c

   1 /*
   2  * QEMU Alpha CPU
   3  *
   4  * Copyright (c) 2007 Jocelyn Mayer
   5  * Copyright (c) 2012 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see
  19  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qapi/error.h"
  24 #include "cpu.h"
  25 #include "qemu-common.h"
  26 #include "migration/vmstate.h"
  27 #include "exec/exec-all.h"
  28
  29
  30 static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
  31 {
  32     AlphaCPU *cpu = ALPHA_CPU(cs);
  33
  34     cpu->env.pc = value;
  35 }
  36
  37 static bool alpha_cpu_has_work(CPUState *cs)
  38 {
  39     /* Here we are checking to see if the CPU should wake up from HALT.
  40        We will have gotten into this state only for WTINT from PALmode.  */
  41     /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
  42        asleep even if (some) interrupts have been asserted.  For now,
  43        assume that if a CPU really wants to stay asleep, it will mask
  44        interrupts at the chipset level, which will prevent these bits
  45        from being set in the first place.  */
  46     return cs->interrupt_request & (CPU_INTERRUPT_HARD
  47                                     | CPU_INTERRUPT_TIMER
  48                                     | CPU_INTERRUPT_SMP
  49                                     | CPU_INTERRUPT_MCHK);
  50 }
  51
  52 static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
  53 {
  54     info->mach = bfd_mach_alpha_ev6;
  55     info->print_insn = print_insn_alpha;
  56 }
  57
  58 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
  59 {
  60     CPUState *cs = CPU(dev);
  61     AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
  62
  63     qemu_init_vcpu(cs);
  64
  65     acc->parent_realize(dev, errp);
  66 }
  67
  68 /* Sort alphabetically by type name. */
  69 static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b)
  70 {
  71     ObjectClass *class_a = (ObjectClass *)a;
  72     ObjectClass *class_b = (ObjectClass *)b;
  73     const char *name_a, *name_b;
  74
  75     name_a = object_class_get_name(class_a);
  76     name_b = object_class_get_name(class_b);
  77     return strcmp(name_a, name_b);
  78 }
  79
  80 static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
  81 {
  82     ObjectClass *oc = data;
  83     CPUListState *s = user_data;
  84
  85     (*s->cpu_fprintf)(s->file, "  %s\n",
  86                       object_class_get_name(oc));
  87 }
  88
  89 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  90 {
  91     CPUListState s = {
  92         .file = f,
  93         .cpu_fprintf = cpu_fprintf,
  94     };
  95     GSList *list;
  96
  97     list = object_class_get_list(TYPE_ALPHA_CPU, false);
  98     list = g_slist_sort(list, alpha_cpu_list_compare);
  99     (*cpu_fprintf)(f, "Available CPUs:\n");
 100     g_slist_foreach(list, alpha_cpu_list_entry, &s);
 101     g_slist_free(list);
 102 }
 103
 104 /* Models */
 105
 106 #define TYPE(model) model "-" TYPE_ALPHA_CPU
 107
 108 typedef struct AlphaCPUAlias {
 109     const char *alias;
 110     const char *typename;
 111 } AlphaCPUAlias;
 112
 113 static const AlphaCPUAlias alpha_cpu_aliases[] = {
 114     { "21064",   TYPE("ev4") },
 115     { "21164",   TYPE("ev5") },
 116     { "21164a",  TYPE("ev56") },
 117     { "21164pc", TYPE("pca56") },
 118     { "21264",   TYPE("ev6") },
 119     { "21264a",  TYPE("ev67") },
 120 };
 121
 122 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
 123 {
 124     ObjectClass *oc = NULL;
 125     char *typename;
 126     int i;
 127
 128     if (cpu_model == NULL) {
 129         return NULL;
 130     }
 131
 132     oc = object_class_by_name(cpu_model);
 133     if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL &&
 134         !object_class_is_abstract(oc)) {
 135         return oc;
 136     }
 137
 138     for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) {
 139         if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) {
 140             oc = object_class_by_name(alpha_cpu_aliases[i].typename);
 141             assert(oc != NULL && !object_class_is_abstract(oc));
 142             return oc;
 143         }
 144     }
 145
 146     typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
 147     oc = object_class_by_name(typename);
 148     g_free(typename);
 149     if (oc != NULL && object_class_is_abstract(oc)) {
 150         oc = NULL;
 151     }
 152     return oc;
 153 }
 154
 155 AlphaCPU *cpu_alpha_init(const char *cpu_model)
 156 {
 157     AlphaCPU *cpu;
 158     ObjectClass *cpu_class;
 159
 160     cpu_class = alpha_cpu_class_by_name(cpu_model);
 161     if (cpu_class == NULL) {
 162         /* Default to ev67; no reason not to emulate insns by default.  */
 163         cpu_class = object_class_by_name(TYPE("ev67"));
 164     }
 165     cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
 166
 167     object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 168
 169     return cpu;
 170 }
 171
 172 static void ev4_cpu_initfn(Object *obj)
 173 {
 174     AlphaCPU *cpu = ALPHA_CPU(obj);
 175     CPUAlphaState *env = &cpu->env;
 176
 177     env->implver = IMPLVER_2106x;
 178 }
 179
 180 static const TypeInfo ev4_cpu_type_info = {
 181     .name = TYPE("ev4"),
 182     .parent = TYPE_ALPHA_CPU,
 183     .instance_init = ev4_cpu_initfn,
 184 };
 185
 186 static void ev5_cpu_initfn(Object *obj)
 187 {
 188     AlphaCPU *cpu = ALPHA_CPU(obj);
 189     CPUAlphaState *env = &cpu->env;
 190
 191     env->implver = IMPLVER_21164;
 192 }
 193
 194 static const TypeInfo ev5_cpu_type_info = {
 195     .name = TYPE("ev5"),
 196     .parent = TYPE_ALPHA_CPU,
 197     .instance_init = ev5_cpu_initfn,
 198 };
 199
 200 static void ev56_cpu_initfn(Object *obj)
 201 {
 202     AlphaCPU *cpu = ALPHA_CPU(obj);
 203     CPUAlphaState *env = &cpu->env;
 204
 205     env->amask |= AMASK_BWX;
 206 }
 207
 208 static const TypeInfo ev56_cpu_type_info = {
 209     .name = TYPE("ev56"),
 210     .parent = TYPE("ev5"),
 211     .instance_init = ev56_cpu_initfn,
 212 };
 213
 214 static void pca56_cpu_initfn(Object *obj)
 215 {
 216     AlphaCPU *cpu = ALPHA_CPU(obj);
 217     CPUAlphaState *env = &cpu->env;
 218
 219     env->amask |= AMASK_MVI;
 220 }
 221
 222 static const TypeInfo pca56_cpu_type_info = {
 223     .name = TYPE("pca56"),
 224     .parent = TYPE("ev56"),
 225     .instance_init = pca56_cpu_initfn,
 226 };
 227
 228 static void ev6_cpu_initfn(Object *obj)
 229 {
 230     AlphaCPU *cpu = ALPHA_CPU(obj);
 231     CPUAlphaState *env = &cpu->env;
 232
 233     env->implver = IMPLVER_21264;
 234     env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 235 }
 236
 237 static const TypeInfo ev6_cpu_type_info = {
 238     .name = TYPE("ev6"),
 239     .parent = TYPE_ALPHA_CPU,
 240     .instance_init = ev6_cpu_initfn,
 241 };
 242
 243 static void ev67_cpu_initfn(Object *obj)
 244 {
 245     AlphaCPU *cpu = ALPHA_CPU(obj);
 246     CPUAlphaState *env = &cpu->env;
 247
 248     env->amask |= AMASK_CIX | AMASK_PREFETCH;
 249 }
 250
 251 static const TypeInfo ev67_cpu_type_info = {
 252     .name = TYPE("ev67"),
 253     .parent = TYPE("ev6"),
 254     .instance_init = ev67_cpu_initfn,
 255 };
 256
 257 static const TypeInfo ev68_cpu_type_info = {
 258     .name = TYPE("ev68"),
 259     .parent = TYPE("ev67"),
 260 };
 261
 262 static void alpha_cpu_initfn(Object *obj)
 263 {
 264     CPUState *cs = CPU(obj);
 265     AlphaCPU *cpu = ALPHA_CPU(obj);
 266     CPUAlphaState *env = &cpu->env;
 267
 268     cs->env_ptr = env;
 269     cpu_exec_init(cs, &error_abort);
 270     tlb_flush(cs, 1);
 271
 272     alpha_translate_init();
 273
 274 #if defined(CONFIG_USER_ONLY)
 275     env->ps = PS_USER_MODE;
 276     cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD
 277                                | FPCR_UNFD | FPCR_INED | FPCR_DNOD
 278                                | FPCR_DYN_NORMAL));
 279 #endif
 280     env->lock_addr = -1;
 281     env->fen = 1;
 282 }
 283
 284 static void alpha_cpu_class_init(ObjectClass *oc, void *data)
 285 {
 286     DeviceClass *dc = DEVICE_CLASS(oc);
 287     CPUClass *cc = CPU_CLASS(oc);
 288     AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc);
 289
 290     acc->parent_realize = dc->realize;
 291     dc->realize = alpha_cpu_realizefn;
 292
 293     cc->class_by_name = alpha_cpu_class_by_name;
 294     cc->has_work = alpha_cpu_has_work;
 295     cc->do_interrupt = alpha_cpu_do_interrupt;
 296     cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
 297     cc->dump_state = alpha_cpu_dump_state;
 298     cc->set_pc = alpha_cpu_set_pc;
 299     cc->gdb_read_register = alpha_cpu_gdb_read_register;
 300     cc->gdb_write_register = alpha_cpu_gdb_write_register;
 301 #ifdef CONFIG_USER_ONLY
 302     cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
 303 #else
 304     cc->do_unassigned_access = alpha_cpu_unassigned_access;
 305     cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
 306     cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
 307     dc->vmsd = &vmstate_alpha_cpu;
 308 #endif
 309     cc->disas_set_info = alpha_cpu_disas_set_info;
 310
 311     cc->gdb_num_core_regs = 67;
 312
 313     /*
 314      * Reason: alpha_cpu_initfn() calls cpu_exec_init(), which saves
 315      * the object in cpus -> dangling pointer after final
 316      * object_unref().
 317      */
 318     dc->cannot_destroy_with_object_finalize_yet = true;
 319 }
 320
 321 static const TypeInfo alpha_cpu_type_info = {
 322     .name = TYPE_ALPHA_CPU,
 323     .parent = TYPE_CPU,
 324     .instance_size = sizeof(AlphaCPU),
 325     .instance_init = alpha_cpu_initfn,
 326     .abstract = true,
 327     .class_size = sizeof(AlphaCPUClass),
 328     .class_init = alpha_cpu_class_init,
 329 };
 330
 331 static void alpha_cpu_register_types(void)
 332 {
 333     type_register_static(&alpha_cpu_type_info);
 334     type_register_static(&ev4_cpu_type_info);
 335     type_register_static(&ev5_cpu_type_info);
 336     type_register_static(&ev56_cpu_type_info);
 337     type_register_static(&pca56_cpu_type_info);
 338     type_register_static(&ev6_cpu_type_info);
 339     type_register_static(&ev67_cpu_type_info);
 340     type_register_static(&ev68_cpu_type_info);
 341 }
 342
 343 type_init(alpha_cpu_register_types)