include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "exec/hwaddr.h"
  27 #include "exec/memattrs.h"
  28 #include "qemu/queue.h"
  29 #include "qemu/thread.h"
  30 #include "qemu/tls.h"
  31 #include "qemu/typedefs.h"
  32
  33 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  34                                      void *opaque);
  35
  36 /**
  37  * vaddr:
  38  * Type wide enough to contain any #target_ulong virtual address.
  39  */
  40 typedef uint64_t vaddr;
  41 #define VADDR_PRId PRId64
  42 #define VADDR_PRIu PRIu64
  43 #define VADDR_PRIo PRIo64
  44 #define VADDR_PRIx PRIx64
  45 #define VADDR_PRIX PRIX64
  46 #define VADDR_MAX UINT64_MAX
  47
  48 /**
  49  * SECTION:cpu
  50  * @section_id: QEMU-cpu
  51  * @title: CPU Class
  52  * @short_description: Base class for all CPUs
  53  */
  54
  55 #define TYPE_CPU "cpu"
  56
  57 /* Since this macro is used a lot in hot code paths and in conjunction with
  58  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  59  * an unchecked cast.
  60  */
  61 #define CPU(obj) ((CPUState *)(obj))
  62
  63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  65
  66 typedef struct CPUState CPUState;
  67
  68 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  69                                     bool is_write, bool is_exec, int opaque,
  70                                     unsigned size);
  71
  72 struct TranslationBlock;
  73
  74 /**
  75  * CPUClass:
  76  * @class_by_name: Callback to map -cpu command line model name to an
  77  * instantiatable CPU type.
  78  * @parse_features: Callback to parse command line arguments.
  79  * @reset: Callback to reset the #CPUState to its initial state.
  80  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  81  * @has_work: Callback for checking if there is work to do.
  82  * @do_interrupt: Callback for interrupt handling.
  83  * @do_unassigned_access: Callback for unassigned access handling.
  84  * @do_unaligned_access: Callback for unaligned access handling, if
  85  * the target defines #ALIGNED_ONLY.
  86  * @virtio_is_big_endian: Callback to return %true if a CPU which supports
  87  * runtime configurable endianness is currently big-endian. Non-configurable
  88  * CPUs can use the default implementation of this method. This method should
  89  * not be used by any callers other than the pre-1.0 virtio devices.
  90  * @memory_rw_debug: Callback for GDB memory access.
  91  * @dump_state: Callback for dumping state.
  92  * @dump_statistics: Callback for dumping statistics.
  93  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  94  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  95  * @get_memory_mapping: Callback for obtaining the memory mappings.
  96  * @set_pc: Callback for setting the Program Counter register.
  97  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  98  * #TranslationBlock.
  99  * @handle_mmu_fault: Callback for handling an MMU fault.
 100  * @get_phys_page_debug: Callback for obtaining a physical address.
 101  * @gdb_read_register: Callback for letting GDB read a register.
 102  * @gdb_write_register: Callback for letting GDB write a register.
 103  * @debug_excp_handler: Callback for handling debug exceptions.
 104  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
 105  * 64-bit VM coredump.
 106  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 107  * note to a 32-bit VM coredump.
 108  * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
 109  * 32-bit VM coredump.
 110  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 111  * note to a 32-bit VM coredump.
 112  * @vmsd: State description for migration.
 113  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 114  * @gdb_core_xml_file: File name for core registers GDB XML description.
 115  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
 116  *           before the insn which triggers a watchpoint rather than after it.
 117  * @cpu_exec_enter: Callback for cpu_exec preparation.
 118  * @cpu_exec_exit: Callback for cpu_exec cleanup.
 119  * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
 120  *
 121  * Represents a CPU family or model.
 122  */
 123 typedef struct CPUClass {
 124     /*< private >*/
 125     DeviceClass parent_class;
 126     /*< public >*/
 127
 128     ObjectClass *(*class_by_name)(const char *cpu_model);
 129     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 130
 131     void (*reset)(CPUState *cpu);
 132     int reset_dump_flags;
 133     bool (*has_work)(CPUState *cpu);
 134     void (*do_interrupt)(CPUState *cpu);
 135     CPUUnassignedAccess do_unassigned_access;
 136     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 137                                 int is_write, int is_user, uintptr_t retaddr);
 138     bool (*virtio_is_big_endian)(CPUState *cpu);
 139     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 140                            uint8_t *buf, int len, bool is_write);
 141     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 142                        int flags);
 143     void (*dump_statistics)(CPUState *cpu, FILE *f,
 144                             fprintf_function cpu_fprintf, int flags);
 145     int64_t (*get_arch_id)(CPUState *cpu);
 146     bool (*get_paging_enabled)(const CPUState *cpu);
 147     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 148                                Error **errp);
 149     void (*set_pc)(CPUState *cpu, vaddr value);
 150     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 151     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 152                             int mmu_index);
 153     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 154     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 155     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 156     void (*debug_excp_handler)(CPUState *cpu);
 157
 158     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 159                             int cpuid, void *opaque);
 160     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 161                                 void *opaque);
 162     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 163                             int cpuid, void *opaque);
 164     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 165                                 void *opaque);
 166
 167     const struct VMStateDescription *vmsd;
 168     int gdb_num_core_regs;
 169     const char *gdb_core_xml_file;
 170     bool gdb_stop_before_watchpoint;
 171
 172     void (*cpu_exec_enter)(CPUState *cpu);
 173     void (*cpu_exec_exit)(CPUState *cpu);
 174     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
 175 } CPUClass;
 176
 177 #ifdef HOST_WORDS_BIGENDIAN
 178 typedef struct icount_decr_u16 {
 179     uint16_t high;
 180     uint16_t low;
 181 } icount_decr_u16;
 182 #else
 183 typedef struct icount_decr_u16 {
 184     uint16_t low;
 185     uint16_t high;
 186 } icount_decr_u16;
 187 #endif
 188
 189 typedef struct CPUBreakpoint {
 190     vaddr pc;
 191     int flags; /* BP_* */
 192     QTAILQ_ENTRY(CPUBreakpoint) entry;
 193 } CPUBreakpoint;
 194
 195 typedef struct CPUWatchpoint {
 196     vaddr vaddr;
 197     vaddr len;
 198     vaddr hitaddr;
 199     MemTxAttrs hitattrs;
 200     int flags; /* BP_* */
 201     QTAILQ_ENTRY(CPUWatchpoint) entry;
 202 } CPUWatchpoint;
 203
 204 struct KVMState;
 205 struct kvm_run;
 206
 207 #define TB_JMP_CACHE_BITS 12
 208 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 209
 210 /**
 211  * CPUState:
 212  * @cpu_index: CPU index (informative).
 213  * @nr_cores: Number of cores within this CPU package.
 214  * @nr_threads: Number of threads within this CPU.
 215  * @numa_node: NUMA node this CPU is belonging to.
 216  * @host_tid: Host thread ID.
 217  * @running: #true if CPU is currently running (usermode).
 218  * @created: Indicates whether the CPU thread has been successfully created.
 219  * @interrupt_request: Indicates a pending interrupt request.
 220  * @halted: Nonzero if the CPU is in suspended state.
 221  * @stop: Indicates a pending stop request.
 222  * @stopped: Indicates the CPU has been artificially stopped.
 223  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 224  *           CPU and return to its top level loop.
 225  * @singlestep_enabled: Flags for single-stepping.
 226  * @icount_extra: Instructions until next timer event.
 227  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 228  * This allows a single read-compare-cbranch-write sequence to test
 229  * for both decrementer underflow and exceptions.
 230  * @can_do_io: Nonzero if memory-mapped IO is safe.
 231  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 232  * @current_tb: Currently executing TB.
 233  * @gdb_regs: Additional GDB registers.
 234  * @gdb_num_regs: Number of total registers accessible to GDB.
 235  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 236  * @next_cpu: Next CPU sharing TB cache.
 237  * @opaque: User data.
 238  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 239  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 240  * @kvm_fd: vCPU file descriptor for KVM.
 241  *
 242  * State of one CPU core or thread.
 243  */
 244 struct CPUState {
 245     /*< private >*/
 246     DeviceState parent_obj;
 247     /*< public >*/
 248
 249     int nr_cores;
 250     int nr_threads;
 251     int numa_node;
 252
 253     struct QemuThread *thread;
 254 #ifdef _WIN32
 255     HANDLE hThread;
 256 #endif
 257     int thread_id;
 258     uint32_t host_tid;
 259     bool running;
 260     struct QemuCond *halt_cond;
 261     struct qemu_work_item *queued_work_first, *queued_work_last;
 262     bool thread_kicked;
 263     bool created;
 264     bool stop;
 265     bool stopped;
 266     volatile sig_atomic_t exit_request;
 267     uint32_t interrupt_request;
 268     int singlestep_enabled;
 269     int64_t icount_extra;
 270     sigjmp_buf jmp_env;
 271
 272     AddressSpace *as;
 273     struct AddressSpaceDispatch *memory_dispatch;
 274     MemoryListener *tcg_as_listener;
 275
 276     void *env_ptr; /* CPUArchState */
 277     struct TranslationBlock *current_tb;
 278     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 279     struct GDBRegisterState *gdb_regs;
 280     int gdb_num_regs;
 281     int gdb_num_g_regs;
 282     QTAILQ_ENTRY(CPUState) node;
 283
 284     /* ice debug support */
 285     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 286
 287     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 288     CPUWatchpoint *watchpoint_hit;
 289
 290     void *opaque;
 291
 292     /* In order to avoid passing too many arguments to the MMIO helpers,
 293      * we store some rarely used information in the CPU context.
 294      */
 295     uintptr_t mem_io_pc;
 296     vaddr mem_io_vaddr;
 297
 298     int kvm_fd;
 299     bool kvm_vcpu_dirty;
 300     struct KVMState *kvm_state;
 301     struct kvm_run *kvm_run;
 302
 303     /* TODO Move common fields from CPUArchState here. */
 304     int cpu_index; /* used by alpha TCG */
 305     uint32_t halted; /* used by alpha, cris, ppc TCG */
 306     union {
 307         uint32_t u32;
 308         icount_decr_u16 u16;
 309     } icount_decr;
 310     uint32_t can_do_io;
 311     int32_t exception_index; /* used by m68k TCG */
 312
 313     /* Note that this is accessed at the start of every TB via a negative
 314        offset from AREG0.  Leave this field at the end so as to make the
 315        (absolute value) offset as small as possible.  This reduces code
 316        size, especially for hosts without large memory offsets.  */
 317     volatile sig_atomic_t tcg_exit_req;
 318 };
 319
 320 QTAILQ_HEAD(CPUTailQ, CPUState);
 321 extern struct CPUTailQ cpus;
 322 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 323 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 324 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 325     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 326 #define CPU_FOREACH_REVERSE(cpu) \
 327     QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
 328 #define first_cpu QTAILQ_FIRST(&cpus)
 329
 330 DECLARE_TLS(CPUState *, current_cpu);
 331 #define current_cpu tls_var(current_cpu)
 332
 333 /**
 334  * cpu_paging_enabled:
 335  * @cpu: The CPU whose state is to be inspected.
 336  *
 337  * Returns: %true if paging is enabled, %false otherwise.
 338  */
 339 bool cpu_paging_enabled(const CPUState *cpu);
 340
 341 /**
 342  * cpu_get_memory_mapping:
 343  * @cpu: The CPU whose memory mappings are to be obtained.
 344  * @list: Where to write the memory mappings to.
 345  * @errp: Pointer for reporting an #Error.
 346  */
 347 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 348                             Error **errp);
 349
 350 /**
 351  * cpu_write_elf64_note:
 352  * @f: pointer to a function that writes memory to a file
 353  * @cpu: The CPU whose memory is to be dumped
 354  * @cpuid: ID number of the CPU
 355  * @opaque: pointer to the CPUState struct
 356  */
 357 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 358                          int cpuid, void *opaque);
 359
 360 /**
 361  * cpu_write_elf64_qemunote:
 362  * @f: pointer to a function that writes memory to a file
 363  * @cpu: The CPU whose memory is to be dumped
 364  * @cpuid: ID number of the CPU
 365  * @opaque: pointer to the CPUState struct
 366  */
 367 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 368                              void *opaque);
 369
 370 /**
 371  * cpu_write_elf32_note:
 372  * @f: pointer to a function that writes memory to a file
 373  * @cpu: The CPU whose memory is to be dumped
 374  * @cpuid: ID number of the CPU
 375  * @opaque: pointer to the CPUState struct
 376  */
 377 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 378                          int cpuid, void *opaque);
 379
 380 /**
 381  * cpu_write_elf32_qemunote:
 382  * @f: pointer to a function that writes memory to a file
 383  * @cpu: The CPU whose memory is to be dumped
 384  * @cpuid: ID number of the CPU
 385  * @opaque: pointer to the CPUState struct
 386  */
 387 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 388                              void *opaque);
 389
 390 /**
 391  * CPUDumpFlags:
 392  * @CPU_DUMP_CODE:
 393  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 394  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 395  */
 396 enum CPUDumpFlags {
 397     CPU_DUMP_CODE = 0x00010000,
 398     CPU_DUMP_FPU  = 0x00020000,
 399     CPU_DUMP_CCOP = 0x00040000,
 400 };
 401
 402 /**
 403  * cpu_dump_state:
 404  * @cpu: The CPU whose state is to be dumped.
 405  * @f: File to dump to.
 406  * @cpu_fprintf: Function to dump with.
 407  * @flags: Flags what to dump.
 408  *
 409  * Dumps CPU state.
 410  */
 411 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 412                     int flags);
 413
 414 /**
 415  * cpu_dump_statistics:
 416  * @cpu: The CPU whose state is to be dumped.
 417  * @f: File to dump to.
 418  * @cpu_fprintf: Function to dump with.
 419  * @flags: Flags what to dump.
 420  *
 421  * Dumps CPU statistics.
 422  */
 423 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 424                          int flags);
 425
 426 #ifndef CONFIG_USER_ONLY
 427 /**
 428  * cpu_get_phys_page_debug:
 429  * @cpu: The CPU to obtain the physical page address for.
 430  * @addr: The virtual address.
 431  *
 432  * Obtains the physical page corresponding to a virtual one.
 433  * Use it only for debugging because no protection checks are done.
 434  *
 435  * Returns: Corresponding physical page address or -1 if no page found.
 436  */
 437 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 438 {
 439     CPUClass *cc = CPU_GET_CLASS(cpu);
 440
 441     return cc->get_phys_page_debug(cpu, addr);
 442 }
 443 #endif
 444
 445 /**
 446  * cpu_reset:
 447  * @cpu: The CPU whose state is to be reset.
 448  */
 449 void cpu_reset(CPUState *cpu);
 450
 451 /**
 452  * cpu_class_by_name:
 453  * @typename: The CPU base type.
 454  * @cpu_model: The model string without any parameters.
 455  *
 456  * Looks up a CPU #ObjectClass matching name @cpu_model.
 457  *
 458  * Returns: A #CPUClass or %NULL if not matching class is found.
 459  */
 460 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 461
 462 /**
 463  * cpu_generic_init:
 464  * @typename: The CPU base type.
 465  * @cpu_model: The model string including optional parameters.
 466  *
 467  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 468  *
 469  * Returns: A #CPUState or %NULL if an error occurred.
 470  */
 471 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 472
 473 /**
 474  * cpu_has_work:
 475  * @cpu: The vCPU to check.
 476  *
 477  * Checks whether the CPU has work to do.
 478  *
 479  * Returns: %true if the CPU has work, %false otherwise.
 480  */
 481 static inline bool cpu_has_work(CPUState *cpu)
 482 {
 483     CPUClass *cc = CPU_GET_CLASS(cpu);
 484
 485     g_assert(cc->has_work);
 486     return cc->has_work(cpu);
 487 }
 488
 489 /**
 490  * qemu_cpu_is_self:
 491  * @cpu: The vCPU to check against.
 492  *
 493  * Checks whether the caller is executing on the vCPU thread.
 494  *
 495  * Returns: %true if called from @cpu's thread, %false otherwise.
 496  */
 497 bool qemu_cpu_is_self(CPUState *cpu);
 498
 499 /**
 500  * qemu_cpu_kick:
 501  * @cpu: The vCPU to kick.
 502  *
 503  * Kicks @cpu's thread.
 504  */
 505 void qemu_cpu_kick(CPUState *cpu);
 506
 507 /**
 508  * cpu_is_stopped:
 509  * @cpu: The CPU to check.
 510  *
 511  * Checks whether the CPU is stopped.
 512  *
 513  * Returns: %true if run state is not running or if artificially stopped;
 514  * %false otherwise.
 515  */
 516 bool cpu_is_stopped(CPUState *cpu);
 517
 518 /**
 519  * run_on_cpu:
 520  * @cpu: The vCPU to run on.
 521  * @func: The function to be executed.
 522  * @data: Data to pass to the function.
 523  *
 524  * Schedules the function @func for execution on the vCPU @cpu.
 525  */
 526 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 527
 528 /**
 529  * async_run_on_cpu:
 530  * @cpu: The vCPU to run on.
 531  * @func: The function to be executed.
 532  * @data: Data to pass to the function.
 533  *
 534  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 535  */
 536 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 537
 538 /**
 539  * qemu_get_cpu:
 540  * @index: The CPUState@cpu_index value of the CPU to obtain.
 541  *
 542  * Gets a CPU matching @index.
 543  *
 544  * Returns: The CPU or %NULL if there is no matching CPU.
 545  */
 546 CPUState *qemu_get_cpu(int index);
 547
 548 /**
 549  * cpu_exists:
 550  * @id: Guest-exposed CPU ID to lookup.
 551  *
 552  * Search for CPU with specified ID.
 553  *
 554  * Returns: %true - CPU is found, %false - CPU isn't found.
 555  */
 556 bool cpu_exists(int64_t id);
 557
 558 #ifndef CONFIG_USER_ONLY
 559
 560 typedef void (*CPUInterruptHandler)(CPUState *, int);
 561
 562 extern CPUInterruptHandler cpu_interrupt_handler;
 563
 564 /**
 565  * cpu_interrupt:
 566  * @cpu: The CPU to set an interrupt on.
 567  * @mask: The interupts to set.
 568  *
 569  * Invokes the interrupt handler.
 570  */
 571 static inline void cpu_interrupt(CPUState *cpu, int mask)
 572 {
 573     cpu_interrupt_handler(cpu, mask);
 574 }
 575
 576 #else /* USER_ONLY */
 577
 578 void cpu_interrupt(CPUState *cpu, int mask);
 579
 580 #endif /* USER_ONLY */
 581
 582 #ifdef CONFIG_SOFTMMU
 583 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 584                                          bool is_write, bool is_exec,
 585                                          int opaque, unsigned size)
 586 {
 587     CPUClass *cc = CPU_GET_CLASS(cpu);
 588
 589     if (cc->do_unassigned_access) {
 590         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 591     }
 592 }
 593
 594 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 595                                         int is_write, int is_user,
 596                                         uintptr_t retaddr)
 597 {
 598     CPUClass *cc = CPU_GET_CLASS(cpu);
 599
 600     cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
 601 }
 602 #endif
 603
 604 /**
 605  * cpu_set_pc:
 606  * @cpu: The CPU to set the program counter for.
 607  * @addr: Program counter value.
 608  *
 609  * Sets the program counter for a CPU.
 610  */
 611 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
 612 {
 613     CPUClass *cc = CPU_GET_CLASS(cpu);
 614
 615     cc->set_pc(cpu, addr);
 616 }
 617
 618 /**
 619  * cpu_reset_interrupt:
 620  * @cpu: The CPU to clear the interrupt on.
 621  * @mask: The interrupt mask to clear.
 622  *
 623  * Resets interrupts on the vCPU @cpu.
 624  */
 625 void cpu_reset_interrupt(CPUState *cpu, int mask);
 626
 627 /**
 628  * cpu_exit:
 629  * @cpu: The CPU to exit.
 630  *
 631  * Requests the CPU @cpu to exit execution.
 632  */
 633 void cpu_exit(CPUState *cpu);
 634
 635 /**
 636  * cpu_resume:
 637  * @cpu: The CPU to resume.
 638  *
 639  * Resumes CPU, i.e. puts CPU into runnable state.
 640  */
 641 void cpu_resume(CPUState *cpu);
 642
 643 /**
 644  * qemu_init_vcpu:
 645  * @cpu: The vCPU to initialize.
 646  *
 647  * Initializes a vCPU.
 648  */
 649 void qemu_init_vcpu(CPUState *cpu);
 650
 651 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 652 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 653 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 654
 655 /**
 656  * cpu_single_step:
 657  * @cpu: CPU to the flags for.
 658  * @enabled: Flags to enable.
 659  *
 660  * Enables or disables single-stepping for @cpu.
 661  */
 662 void cpu_single_step(CPUState *cpu, int enabled);
 663
 664 /* Breakpoint/watchpoint flags */
 665 #define BP_MEM_READ           0x01
 666 #define BP_MEM_WRITE          0x02
 667 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 668 #define BP_STOP_BEFORE_ACCESS 0x04
 669 /* 0x08 currently unused */
 670 #define BP_GDB                0x10
 671 #define BP_CPU                0x20
 672 #define BP_WATCHPOINT_HIT_READ 0x40
 673 #define BP_WATCHPOINT_HIT_WRITE 0x80
 674 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
 675
 676 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 677                           CPUBreakpoint **breakpoint);
 678 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 679 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 680 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 681
 682 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 683                           int flags, CPUWatchpoint **watchpoint);
 684 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 685                           vaddr len, int flags);
 686 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 687 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 688
 689 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 690     GCC_FMT_ATTR(2, 3);
 691 void cpu_exec_exit(CPUState *cpu);
 692
 693 #ifdef CONFIG_SOFTMMU
 694 extern const struct VMStateDescription vmstate_cpu_common;
 695 #else
 696 #define vmstate_cpu_common vmstate_dummy
 697 #endif
 698
 699 #define VMSTATE_CPU() {                                                     \
 700     .name = "parent_obj",                                                   \
 701     .size = sizeof(CPUState),                                               \
 702     .vmsd = &vmstate_cpu_common,                                            \
 703     .flags = VMS_STRUCT,                                                    \
 704     .offset = 0,                                                            \
 705 }
 706
 707 #endif