2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
32 #include "qemu-error.h"
33 #include "qemu-timer.h"
36 #include "qdev-addr.h"
41 /********************************************************/
42 /* debug Floppy devices */
43 //#define DEBUG_FLOPPY
46 #define FLOPPY_DPRINTF(fmt, ...) \
47 do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
49 #define FLOPPY_DPRINTF(fmt, ...)
52 /********************************************************/
53 /* Floppy drive emulation */
55 typedef enum FDriveRate
{
56 FDRIVE_RATE_500K
= 0x00, /* 500 Kbps */
57 FDRIVE_RATE_300K
= 0x01, /* 300 Kbps */
58 FDRIVE_RATE_250K
= 0x02, /* 250 Kbps */
59 FDRIVE_RATE_1M
= 0x03, /* 1 Mbps */
62 typedef struct FDFormat
{
70 static const FDFormat fd_formats
[] = {
71 /* First entry is default format */
72 /* 1.44 MB 3"1/2 floppy disks */
73 { FDRIVE_DRV_144
, 18, 80, 1, FDRIVE_RATE_500K
, },
74 { FDRIVE_DRV_144
, 20, 80, 1, FDRIVE_RATE_500K
, },
75 { FDRIVE_DRV_144
, 21, 80, 1, FDRIVE_RATE_500K
, },
76 { FDRIVE_DRV_144
, 21, 82, 1, FDRIVE_RATE_500K
, },
77 { FDRIVE_DRV_144
, 21, 83, 1, FDRIVE_RATE_500K
, },
78 { FDRIVE_DRV_144
, 22, 80, 1, FDRIVE_RATE_500K
, },
79 { FDRIVE_DRV_144
, 23, 80, 1, FDRIVE_RATE_500K
, },
80 { FDRIVE_DRV_144
, 24, 80, 1, FDRIVE_RATE_500K
, },
81 /* 2.88 MB 3"1/2 floppy disks */
82 { FDRIVE_DRV_288
, 36, 80, 1, FDRIVE_RATE_1M
, },
83 { FDRIVE_DRV_288
, 39, 80, 1, FDRIVE_RATE_1M
, },
84 { FDRIVE_DRV_288
, 40, 80, 1, FDRIVE_RATE_1M
, },
85 { FDRIVE_DRV_288
, 44, 80, 1, FDRIVE_RATE_1M
, },
86 { FDRIVE_DRV_288
, 48, 80, 1, FDRIVE_RATE_1M
, },
87 /* 720 kB 3"1/2 floppy disks */
88 { FDRIVE_DRV_144
, 9, 80, 1, FDRIVE_RATE_250K
, },
89 { FDRIVE_DRV_144
, 10, 80, 1, FDRIVE_RATE_250K
, },
90 { FDRIVE_DRV_144
, 10, 82, 1, FDRIVE_RATE_250K
, },
91 { FDRIVE_DRV_144
, 10, 83, 1, FDRIVE_RATE_250K
, },
92 { FDRIVE_DRV_144
, 13, 80, 1, FDRIVE_RATE_250K
, },
93 { FDRIVE_DRV_144
, 14, 80, 1, FDRIVE_RATE_250K
, },
94 /* 1.2 MB 5"1/4 floppy disks */
95 { FDRIVE_DRV_120
, 15, 80, 1, FDRIVE_RATE_500K
, },
96 { FDRIVE_DRV_120
, 18, 80, 1, FDRIVE_RATE_500K
, },
97 { FDRIVE_DRV_120
, 18, 82, 1, FDRIVE_RATE_500K
, },
98 { FDRIVE_DRV_120
, 18, 83, 1, FDRIVE_RATE_500K
, },
99 { FDRIVE_DRV_120
, 20, 80, 1, FDRIVE_RATE_500K
, },
100 /* 720 kB 5"1/4 floppy disks */
101 { FDRIVE_DRV_120
, 9, 80, 1, FDRIVE_RATE_250K
, },
102 { FDRIVE_DRV_120
, 11, 80, 1, FDRIVE_RATE_250K
, },
103 /* 360 kB 5"1/4 floppy disks */
104 { FDRIVE_DRV_120
, 9, 40, 1, FDRIVE_RATE_300K
, },
105 { FDRIVE_DRV_120
, 9, 40, 0, FDRIVE_RATE_300K
, },
106 { FDRIVE_DRV_120
, 10, 41, 1, FDRIVE_RATE_300K
, },
107 { FDRIVE_DRV_120
, 10, 42, 1, FDRIVE_RATE_300K
, },
108 /* 320 kB 5"1/4 floppy disks */
109 { FDRIVE_DRV_120
, 8, 40, 1, FDRIVE_RATE_250K
, },
110 { FDRIVE_DRV_120
, 8, 40, 0, FDRIVE_RATE_250K
, },
111 /* 360 kB must match 5"1/4 better than 3"1/2... */
112 { FDRIVE_DRV_144
, 9, 80, 0, FDRIVE_RATE_250K
, },
114 { FDRIVE_DRV_NONE
, -1, -1, 0, 0, },
117 static void pick_geometry(BlockDriverState
*bs
, int *nb_heads
,
118 int *max_track
, int *last_sect
,
119 FDriveType drive_in
, FDriveType
*drive
,
122 const FDFormat
*parse
;
123 uint64_t nb_sectors
, size
;
124 int i
, first_match
, match
;
126 bdrv_get_geometry(bs
, &nb_sectors
);
130 parse
= &fd_formats
[i
];
131 if (parse
->drive
== FDRIVE_DRV_NONE
) {
134 if (drive_in
== parse
->drive
||
135 drive_in
== FDRIVE_DRV_NONE
) {
136 size
= (parse
->max_head
+ 1) * parse
->max_track
*
138 if (nb_sectors
== size
) {
142 if (first_match
== -1) {
148 if (first_match
== -1) {
153 parse
= &fd_formats
[match
];
155 *nb_heads
= parse
->max_head
+ 1;
156 *max_track
= parse
->max_track
;
157 *last_sect
= parse
->last_sect
;
158 *drive
= parse
->drive
;
162 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
163 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
165 /* Will always be a fixed parameter for us */
166 #define FD_SECTOR_LEN 512
167 #define FD_SECTOR_SC 2 /* Sector size code */
168 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
170 typedef struct FDCtrl FDCtrl
;
172 /* Floppy disk drive emulation */
173 typedef enum FDiskFlags
{
174 FDISK_DBL_SIDES
= 0x01,
177 typedef struct FDrive
{
179 BlockDriverState
*bs
;
182 uint8_t perpendicular
; /* 2.88 MB access mode */
189 uint8_t last_sect
; /* Nb sector per track */
190 uint8_t max_track
; /* Nb of tracks */
191 uint16_t bps
; /* Bytes per sector */
192 uint8_t ro
; /* Is read-only */
193 uint8_t media_changed
; /* Is media changed */
194 uint8_t media_rate
; /* Data rate of medium */
197 static void fd_init(FDrive
*drv
)
200 drv
->drive
= FDRIVE_DRV_NONE
;
201 drv
->perpendicular
= 0;
207 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
209 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
210 uint8_t last_sect
, uint8_t num_sides
)
212 return (((track
* num_sides
) + head
) * last_sect
) + sect
- 1;
215 /* Returns current position, in sectors, for given drive */
216 static int fd_sector(FDrive
*drv
)
218 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
,
222 /* Seek to a new position:
223 * returns 0 if already on right track
224 * returns 1 if track changed
225 * returns 2 if track is invalid
226 * returns 3 if sector is invalid
227 * returns 4 if seek is disabled
229 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
235 if (track
> drv
->max_track
||
236 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
237 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
238 head
, track
, sect
, 1,
239 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
240 drv
->max_track
, drv
->last_sect
);
243 if (sect
> drv
->last_sect
) {
244 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
245 head
, track
, sect
, 1,
246 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
247 drv
->max_track
, drv
->last_sect
);
250 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
, NUM_SIDES(drv
));
252 if (sector
!= fd_sector(drv
)) {
255 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
256 " (max=%d %02x %02x)\n",
257 head
, track
, sect
, 1, drv
->max_track
,
263 if (drv
->track
!= track
) {
264 if (drv
->bs
!= NULL
&& bdrv_is_inserted(drv
->bs
)) {
265 drv
->media_changed
= 0;
273 if (drv
->bs
== NULL
|| !bdrv_is_inserted(drv
->bs
)) {
280 /* Set drive back to track 0 */
281 static void fd_recalibrate(FDrive
*drv
)
283 FLOPPY_DPRINTF("recalibrate\n");
284 fd_seek(drv
, 0, 0, 1, 1);
287 /* Revalidate a disk drive after a disk change */
288 static void fd_revalidate(FDrive
*drv
)
290 int nb_heads
, max_track
, last_sect
, ro
;
294 FLOPPY_DPRINTF("revalidate\n");
295 if (drv
->bs
!= NULL
) {
296 ro
= bdrv_is_read_only(drv
->bs
);
297 pick_geometry(drv
->bs
, &nb_heads
, &max_track
,
298 &last_sect
, drv
->drive
, &drive
, &rate
);
299 if (!bdrv_is_inserted(drv
->bs
)) {
300 FLOPPY_DPRINTF("No disk in drive\n");
302 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", nb_heads
,
303 max_track
, last_sect
, ro
? "ro" : "rw");
306 drv
->flags
&= ~FDISK_DBL_SIDES
;
308 drv
->flags
|= FDISK_DBL_SIDES
;
310 drv
->max_track
= max_track
;
311 drv
->last_sect
= last_sect
;
314 drv
->media_rate
= rate
;
316 FLOPPY_DPRINTF("No drive connected\n");
319 drv
->flags
&= ~FDISK_DBL_SIDES
;
323 /********************************************************/
324 /* Intel 82078 floppy disk controller emulation */
326 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
327 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
);
328 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
329 int dma_pos
, int dma_len
);
330 static void fdctrl_raise_irq(FDCtrl
*fdctrl
);
331 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
);
333 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
334 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
335 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
336 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
337 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
338 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
339 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
340 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
341 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
342 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
343 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
344 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
);
356 FD_STATE_MULTI
= 0x01, /* multi track flag */
357 FD_STATE_FORMAT
= 0x02, /* format flag */
358 FD_STATE_SEEK
= 0x04, /* seek flag */
374 FD_CMD_READ_TRACK
= 0x02,
375 FD_CMD_SPECIFY
= 0x03,
376 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
379 FD_CMD_RECALIBRATE
= 0x07,
380 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
381 FD_CMD_WRITE_DELETED
= 0x09,
382 FD_CMD_READ_ID
= 0x0a,
383 FD_CMD_READ_DELETED
= 0x0c,
384 FD_CMD_FORMAT_TRACK
= 0x0d,
385 FD_CMD_DUMPREG
= 0x0e,
387 FD_CMD_VERSION
= 0x10,
388 FD_CMD_SCAN_EQUAL
= 0x11,
389 FD_CMD_PERPENDICULAR_MODE
= 0x12,
390 FD_CMD_CONFIGURE
= 0x13,
392 FD_CMD_VERIFY
= 0x16,
393 FD_CMD_POWERDOWN_MODE
= 0x17,
394 FD_CMD_PART_ID
= 0x18,
395 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
396 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
398 FD_CMD_OPTION
= 0x33,
399 FD_CMD_RESTORE
= 0x4e,
400 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
401 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
402 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
403 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
407 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
408 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
409 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
410 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
411 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
420 FD_SR0_ABNTERM
= 0x40,
421 FD_SR0_INVCMD
= 0x80,
422 FD_SR0_RDYCHG
= 0xc0,
426 FD_SR1_MA
= 0x01, /* Missing address mark */
427 FD_SR1_NW
= 0x02, /* Not writable */
428 FD_SR1_EC
= 0x80, /* End of cylinder */
432 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
433 FD_SR2_SEH
= 0x08, /* Scan equal hit */
444 FD_SRA_INTPEND
= 0x80,
458 FD_DOR_SELMASK
= 0x03,
460 FD_DOR_SELMASK
= 0x01,
462 FD_DOR_nRESET
= 0x04,
464 FD_DOR_MOTEN0
= 0x10,
465 FD_DOR_MOTEN1
= 0x20,
466 FD_DOR_MOTEN2
= 0x40,
467 FD_DOR_MOTEN3
= 0x80,
472 FD_TDR_BOOTSEL
= 0x0c,
474 FD_TDR_BOOTSEL
= 0x04,
479 FD_DSR_DRATEMASK
= 0x03,
480 FD_DSR_PWRDOWN
= 0x40,
481 FD_DSR_SWRESET
= 0x80,
485 FD_MSR_DRV0BUSY
= 0x01,
486 FD_MSR_DRV1BUSY
= 0x02,
487 FD_MSR_DRV2BUSY
= 0x04,
488 FD_MSR_DRV3BUSY
= 0x08,
489 FD_MSR_CMDBUSY
= 0x10,
490 FD_MSR_NONDMA
= 0x20,
496 FD_DIR_DSKCHG
= 0x80,
499 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
500 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
501 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
506 /* Controller state */
507 QEMUTimer
*result_timer
;
509 /* Controller's identification */
515 uint8_t dor_vmstate
; /* only used as temp during vmstate */
530 uint8_t eot
; /* last wanted sector */
531 /* States kept only to be returned back */
532 /* precompensation */
536 /* Power down config (also with status regB access mode */
539 uint8_t num_floppies
;
542 FDrive drives
[MAX_FD
];
544 uint32_t check_media_rate
;
550 typedef struct FDCtrlSysBus
{
555 typedef struct FDCtrlISABus
{
565 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
567 FDCtrl
*fdctrl
= opaque
;
573 retval
= fdctrl_read_statusA(fdctrl
);
576 retval
= fdctrl_read_statusB(fdctrl
);
579 retval
= fdctrl_read_dor(fdctrl
);
582 retval
= fdctrl_read_tape(fdctrl
);
585 retval
= fdctrl_read_main_status(fdctrl
);
588 retval
= fdctrl_read_data(fdctrl
);
591 retval
= fdctrl_read_dir(fdctrl
);
594 retval
= (uint32_t)(-1);
597 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
602 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
604 FDCtrl
*fdctrl
= opaque
;
606 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
611 fdctrl_write_dor(fdctrl
, value
);
614 fdctrl_write_tape(fdctrl
, value
);
617 fdctrl_write_rate(fdctrl
, value
);
620 fdctrl_write_data(fdctrl
, value
);
623 fdctrl_write_ccr(fdctrl
, value
);
630 static uint64_t fdctrl_read_mem (void *opaque
, hwaddr reg
,
633 return fdctrl_read(opaque
, (uint32_t)reg
);
636 static void fdctrl_write_mem (void *opaque
, hwaddr reg
,
637 uint64_t value
, unsigned size
)
639 fdctrl_write(opaque
, (uint32_t)reg
, value
);
642 static const MemoryRegionOps fdctrl_mem_ops
= {
643 .read
= fdctrl_read_mem
,
644 .write
= fdctrl_write_mem
,
645 .endianness
= DEVICE_NATIVE_ENDIAN
,
648 static const MemoryRegionOps fdctrl_mem_strict_ops
= {
649 .read
= fdctrl_read_mem
,
650 .write
= fdctrl_write_mem
,
651 .endianness
= DEVICE_NATIVE_ENDIAN
,
653 .min_access_size
= 1,
654 .max_access_size
= 1,
658 static bool fdrive_media_changed_needed(void *opaque
)
660 FDrive
*drive
= opaque
;
662 return (drive
->bs
!= NULL
&& drive
->media_changed
!= 1);
665 static const VMStateDescription vmstate_fdrive_media_changed
= {
666 .name
= "fdrive/media_changed",
668 .minimum_version_id
= 1,
669 .minimum_version_id_old
= 1,
670 .fields
= (VMStateField
[]) {
671 VMSTATE_UINT8(media_changed
, FDrive
),
672 VMSTATE_END_OF_LIST()
676 static bool fdrive_media_rate_needed(void *opaque
)
678 FDrive
*drive
= opaque
;
680 return drive
->fdctrl
->check_media_rate
;
683 static const VMStateDescription vmstate_fdrive_media_rate
= {
684 .name
= "fdrive/media_rate",
686 .minimum_version_id
= 1,
687 .minimum_version_id_old
= 1,
688 .fields
= (VMStateField
[]) {
689 VMSTATE_UINT8(media_rate
, FDrive
),
690 VMSTATE_END_OF_LIST()
694 static const VMStateDescription vmstate_fdrive
= {
697 .minimum_version_id
= 1,
698 .minimum_version_id_old
= 1,
699 .fields
= (VMStateField
[]) {
700 VMSTATE_UINT8(head
, FDrive
),
701 VMSTATE_UINT8(track
, FDrive
),
702 VMSTATE_UINT8(sect
, FDrive
),
703 VMSTATE_END_OF_LIST()
705 .subsections
= (VMStateSubsection
[]) {
707 .vmsd
= &vmstate_fdrive_media_changed
,
708 .needed
= &fdrive_media_changed_needed
,
710 .vmsd
= &vmstate_fdrive_media_rate
,
711 .needed
= &fdrive_media_rate_needed
,
718 static void fdc_pre_save(void *opaque
)
722 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
725 static int fdc_post_load(void *opaque
, int version_id
)
729 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
730 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
734 static const VMStateDescription vmstate_fdc
= {
737 .minimum_version_id
= 2,
738 .minimum_version_id_old
= 2,
739 .pre_save
= fdc_pre_save
,
740 .post_load
= fdc_post_load
,
741 .fields
= (VMStateField
[]) {
742 /* Controller State */
743 VMSTATE_UINT8(sra
, FDCtrl
),
744 VMSTATE_UINT8(srb
, FDCtrl
),
745 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
746 VMSTATE_UINT8(tdr
, FDCtrl
),
747 VMSTATE_UINT8(dsr
, FDCtrl
),
748 VMSTATE_UINT8(msr
, FDCtrl
),
749 VMSTATE_UINT8(status0
, FDCtrl
),
750 VMSTATE_UINT8(status1
, FDCtrl
),
751 VMSTATE_UINT8(status2
, FDCtrl
),
753 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
755 VMSTATE_UINT32(data_pos
, FDCtrl
),
756 VMSTATE_UINT32(data_len
, FDCtrl
),
757 VMSTATE_UINT8(data_state
, FDCtrl
),
758 VMSTATE_UINT8(data_dir
, FDCtrl
),
759 VMSTATE_UINT8(eot
, FDCtrl
),
760 /* States kept only to be returned back */
761 VMSTATE_UINT8(timer0
, FDCtrl
),
762 VMSTATE_UINT8(timer1
, FDCtrl
),
763 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
764 VMSTATE_UINT8(config
, FDCtrl
),
765 VMSTATE_UINT8(lock
, FDCtrl
),
766 VMSTATE_UINT8(pwrd
, FDCtrl
),
767 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
768 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
769 vmstate_fdrive
, FDrive
),
770 VMSTATE_END_OF_LIST()
774 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
776 FDCtrlSysBus
*sys
= container_of(d
, FDCtrlSysBus
, busdev
.qdev
);
777 FDCtrl
*s
= &sys
->state
;
782 static void fdctrl_external_reset_isa(DeviceState
*d
)
784 FDCtrlISABus
*isa
= container_of(d
, FDCtrlISABus
, busdev
.qdev
);
785 FDCtrl
*s
= &isa
->state
;
790 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
792 //FDCtrl *s = opaque;
796 FLOPPY_DPRINTF("TC pulsed\n");
800 /* Change IRQ state */
801 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
804 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
806 FLOPPY_DPRINTF("Reset interrupt\n");
807 qemu_set_irq(fdctrl
->irq
, 0);
808 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
811 static void fdctrl_raise_irq(FDCtrl
*fdctrl
)
814 if (fdctrl
->sun4m
&& (fdctrl
->msr
& FD_MSR_CMDBUSY
)) {
816 fdctrl
->msr
&= ~FD_MSR_CMDBUSY
;
817 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
820 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
821 qemu_set_irq(fdctrl
->irq
, 1);
822 fdctrl
->sra
|= FD_SRA_INTPEND
;
825 fdctrl
->reset_sensei
= 0;
826 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
829 /* Reset controller */
830 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
834 FLOPPY_DPRINTF("reset controller\n");
835 fdctrl_reset_irq(fdctrl
);
836 /* Initialise controller */
839 if (!fdctrl
->drives
[1].bs
)
840 fdctrl
->sra
|= FD_SRA_nDRV2
;
842 fdctrl
->dor
= FD_DOR_nRESET
;
843 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
844 fdctrl
->msr
= FD_MSR_RQM
;
846 fdctrl
->data_pos
= 0;
847 fdctrl
->data_len
= 0;
848 fdctrl
->data_state
= 0;
849 fdctrl
->data_dir
= FD_DIR_WRITE
;
850 for (i
= 0; i
< MAX_FD
; i
++)
851 fd_recalibrate(&fdctrl
->drives
[i
]);
852 fdctrl_reset_fifo(fdctrl
);
854 fdctrl
->status0
|= FD_SR0_RDYCHG
;
855 fdctrl_raise_irq(fdctrl
);
856 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
860 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
862 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
865 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
867 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
868 return &fdctrl
->drives
[1];
870 return &fdctrl
->drives
[0];
874 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
876 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
877 return &fdctrl
->drives
[2];
879 return &fdctrl
->drives
[1];
882 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
884 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
885 return &fdctrl
->drives
[3];
887 return &fdctrl
->drives
[2];
891 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
893 switch (fdctrl
->cur_drv
) {
894 case 0: return drv0(fdctrl
);
895 case 1: return drv1(fdctrl
);
897 case 2: return drv2(fdctrl
);
898 case 3: return drv3(fdctrl
);
900 default: return NULL
;
904 /* Status A register : 0x00 (read-only) */
905 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
907 uint32_t retval
= fdctrl
->sra
;
909 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
914 /* Status B register : 0x01 (read-only) */
915 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
917 uint32_t retval
= fdctrl
->srb
;
919 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
924 /* Digital output register : 0x02 */
925 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
927 uint32_t retval
= fdctrl
->dor
;
930 retval
|= fdctrl
->cur_drv
;
931 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
936 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
938 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
941 if (value
& FD_DOR_MOTEN0
)
942 fdctrl
->srb
|= FD_SRB_MTR0
;
944 fdctrl
->srb
&= ~FD_SRB_MTR0
;
945 if (value
& FD_DOR_MOTEN1
)
946 fdctrl
->srb
|= FD_SRB_MTR1
;
948 fdctrl
->srb
&= ~FD_SRB_MTR1
;
952 fdctrl
->srb
|= FD_SRB_DR0
;
954 fdctrl
->srb
&= ~FD_SRB_DR0
;
957 if (!(value
& FD_DOR_nRESET
)) {
958 if (fdctrl
->dor
& FD_DOR_nRESET
) {
959 FLOPPY_DPRINTF("controller enter RESET state\n");
962 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
963 FLOPPY_DPRINTF("controller out of RESET state\n");
964 fdctrl_reset(fdctrl
, 1);
965 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
969 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
974 /* Tape drive register : 0x03 */
975 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
977 uint32_t retval
= fdctrl
->tdr
;
979 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
984 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
987 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
988 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
991 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
992 /* Disk boot selection indicator */
993 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
994 /* Tape indicators: never allow */
997 /* Main status register : 0x04 (read) */
998 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
1000 uint32_t retval
= fdctrl
->msr
;
1002 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1003 fdctrl
->dor
|= FD_DOR_nRESET
;
1005 /* Sparc mutation */
1006 if (fdctrl
->sun4m
) {
1007 retval
|= FD_MSR_DIO
;
1008 fdctrl_reset_irq(fdctrl
);
1011 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
1016 /* Data select rate register : 0x04 (write) */
1017 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
1020 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1021 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1024 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
1025 /* Reset: autoclear */
1026 if (value
& FD_DSR_SWRESET
) {
1027 fdctrl
->dor
&= ~FD_DOR_nRESET
;
1028 fdctrl_reset(fdctrl
, 1);
1029 fdctrl
->dor
|= FD_DOR_nRESET
;
1031 if (value
& FD_DSR_PWRDOWN
) {
1032 fdctrl_reset(fdctrl
, 1);
1034 fdctrl
->dsr
= value
;
1037 /* Configuration control register: 0x07 (write) */
1038 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
)
1041 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1042 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1045 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value
);
1047 /* Only the rate selection bits used in AT mode, and we
1048 * store those in the DSR.
1050 fdctrl
->dsr
= (fdctrl
->dsr
& ~FD_DSR_DRATEMASK
) |
1051 (value
& FD_DSR_DRATEMASK
);
1054 static int fdctrl_media_changed(FDrive
*drv
)
1056 return drv
->media_changed
;
1059 /* Digital input register : 0x07 (read-only) */
1060 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
1062 uint32_t retval
= 0;
1064 if (fdctrl_media_changed(get_cur_drv(fdctrl
))) {
1065 retval
|= FD_DIR_DSKCHG
;
1068 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
1074 /* FIFO state control */
1075 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
)
1077 fdctrl
->data_dir
= FD_DIR_WRITE
;
1078 fdctrl
->data_pos
= 0;
1079 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
1082 /* Set FIFO status for the host to read */
1083 static void fdctrl_set_fifo(FDCtrl
*fdctrl
, int fifo_len
)
1085 fdctrl
->data_dir
= FD_DIR_READ
;
1086 fdctrl
->data_len
= fifo_len
;
1087 fdctrl
->data_pos
= 0;
1088 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
1091 /* Set an error: unimplemented/unknown command */
1092 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
1094 qemu_log_mask(LOG_UNIMP
, "fdc: unimplemented command 0x%02x\n",
1096 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1097 fdctrl_set_fifo(fdctrl
, 1);
1100 /* Seek to next sector
1101 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1102 * otherwise returns 1
1104 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
1106 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1107 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
1108 fd_sector(cur_drv
));
1109 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1111 uint8_t new_head
= cur_drv
->head
;
1112 uint8_t new_track
= cur_drv
->track
;
1113 uint8_t new_sect
= cur_drv
->sect
;
1117 if (new_sect
>= cur_drv
->last_sect
||
1118 new_sect
== fdctrl
->eot
) {
1120 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
1121 if (new_head
== 0 &&
1122 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
1127 fdctrl
->status0
|= FD_SR0_SEEK
;
1128 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0) {
1133 fdctrl
->status0
|= FD_SR0_SEEK
;
1138 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1139 new_head
, new_track
, new_sect
, fd_sector(cur_drv
));
1144 fd_seek(cur_drv
, new_head
, new_track
, new_sect
, 1);
1148 /* Callback for transfer end (stop or abort) */
1149 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
1150 uint8_t status1
, uint8_t status2
)
1153 cur_drv
= get_cur_drv(fdctrl
);
1155 fdctrl
->status0
&= ~(FD_SR0_DS0
| FD_SR0_DS1
| FD_SR0_HEAD
);
1156 fdctrl
->status0
|= GET_CUR_DRV(fdctrl
);
1157 if (cur_drv
->head
) {
1158 fdctrl
->status0
|= FD_SR0_HEAD
;
1160 fdctrl
->status0
|= status0
;
1162 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1163 status0
, status1
, status2
, fdctrl
->status0
);
1164 fdctrl
->fifo
[0] = fdctrl
->status0
;
1165 fdctrl
->fifo
[1] = status1
;
1166 fdctrl
->fifo
[2] = status2
;
1167 fdctrl
->fifo
[3] = cur_drv
->track
;
1168 fdctrl
->fifo
[4] = cur_drv
->head
;
1169 fdctrl
->fifo
[5] = cur_drv
->sect
;
1170 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
1171 fdctrl
->data_dir
= FD_DIR_READ
;
1172 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
1173 DMA_release_DREQ(fdctrl
->dma_chann
);
1175 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
1176 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
1178 fdctrl_set_fifo(fdctrl
, 7);
1179 fdctrl_raise_irq(fdctrl
);
1182 /* Prepare a data transfer (either DMA or FIFO) */
1183 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
1188 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1189 cur_drv
= get_cur_drv(fdctrl
);
1190 kt
= fdctrl
->fifo
[2];
1191 kh
= fdctrl
->fifo
[3];
1192 ks
= fdctrl
->fifo
[4];
1193 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1194 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1195 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1196 NUM_SIDES(cur_drv
)));
1197 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1200 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1201 fdctrl
->fifo
[3] = kt
;
1202 fdctrl
->fifo
[4] = kh
;
1203 fdctrl
->fifo
[5] = ks
;
1207 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1208 fdctrl
->fifo
[3] = kt
;
1209 fdctrl
->fifo
[4] = kh
;
1210 fdctrl
->fifo
[5] = ks
;
1213 /* No seek enabled */
1214 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1215 fdctrl
->fifo
[3] = kt
;
1216 fdctrl
->fifo
[4] = kh
;
1217 fdctrl
->fifo
[5] = ks
;
1220 fdctrl
->status0
|= FD_SR0_SEEK
;
1226 /* Check the data rate. If the programmed data rate does not match
1227 * the currently inserted medium, the operation has to fail. */
1228 if (fdctrl
->check_media_rate
&&
1229 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1230 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1231 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1232 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1233 fdctrl
->fifo
[3] = kt
;
1234 fdctrl
->fifo
[4] = kh
;
1235 fdctrl
->fifo
[5] = ks
;
1239 /* Set the FIFO state */
1240 fdctrl
->data_dir
= direction
;
1241 fdctrl
->data_pos
= 0;
1242 assert(fdctrl
->msr
& FD_MSR_CMDBUSY
);
1243 if (fdctrl
->fifo
[0] & 0x80)
1244 fdctrl
->data_state
|= FD_STATE_MULTI
;
1246 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1247 if (fdctrl
->fifo
[5] == 00) {
1248 fdctrl
->data_len
= fdctrl
->fifo
[8];
1251 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1252 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1253 if (fdctrl
->fifo
[0] & 0x80)
1254 tmp
+= fdctrl
->fifo
[6];
1255 fdctrl
->data_len
*= tmp
;
1257 fdctrl
->eot
= fdctrl
->fifo
[6];
1258 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1260 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1261 dma_mode
= DMA_get_channel_mode(fdctrl
->dma_chann
);
1262 dma_mode
= (dma_mode
>> 2) & 3;
1263 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1264 dma_mode
, direction
,
1265 (128 << fdctrl
->fifo
[5]) *
1266 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1267 if (((direction
== FD_DIR_SCANE
|| direction
== FD_DIR_SCANL
||
1268 direction
== FD_DIR_SCANH
) && dma_mode
== 0) ||
1269 (direction
== FD_DIR_WRITE
&& dma_mode
== 2) ||
1270 (direction
== FD_DIR_READ
&& dma_mode
== 1) ||
1271 (direction
== FD_DIR_VERIFY
)) {
1272 /* No access is allowed until DMA transfer has completed */
1273 fdctrl
->msr
&= ~FD_MSR_RQM
;
1274 if (direction
!= FD_DIR_VERIFY
) {
1275 /* Now, we just have to wait for the DMA controller to
1278 DMA_hold_DREQ(fdctrl
->dma_chann
);
1279 DMA_schedule(fdctrl
->dma_chann
);
1281 /* Start transfer */
1282 fdctrl_transfer_handler(fdctrl
, fdctrl
->dma_chann
, 0,
1287 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode
,
1291 FLOPPY_DPRINTF("start non-DMA transfer\n");
1292 fdctrl
->msr
|= FD_MSR_NONDMA
;
1293 if (direction
!= FD_DIR_WRITE
)
1294 fdctrl
->msr
|= FD_MSR_DIO
;
1295 /* IO based transfer: calculate len */
1296 fdctrl_raise_irq(fdctrl
);
1299 /* Prepare a transfer of deleted data */
1300 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1302 qemu_log_mask(LOG_UNIMP
, "fdctrl_start_transfer_del() unimplemented\n");
1304 /* We don't handle deleted data,
1305 * so we don't return *ANYTHING*
1307 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1310 /* handlers for DMA transfers */
1311 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1312 int dma_pos
, int dma_len
)
1316 int len
, start_pos
, rel_pos
;
1317 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1320 if (fdctrl
->msr
& FD_MSR_RQM
) {
1321 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1324 cur_drv
= get_cur_drv(fdctrl
);
1325 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1326 fdctrl
->data_dir
== FD_DIR_SCANH
)
1327 status2
= FD_SR2_SNS
;
1328 if (dma_len
> fdctrl
->data_len
)
1329 dma_len
= fdctrl
->data_len
;
1330 if (cur_drv
->bs
== NULL
) {
1331 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1332 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1334 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1336 goto transfer_error
;
1338 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1339 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1340 len
= dma_len
- fdctrl
->data_pos
;
1341 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1342 len
= FD_SECTOR_LEN
- rel_pos
;
1343 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1344 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1345 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1346 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1347 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1348 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1349 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1350 /* READ & SCAN commands and realign to a sector for WRITE */
1351 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
),
1352 fdctrl
->fifo
, 1) < 0) {
1353 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1354 fd_sector(cur_drv
));
1355 /* Sure, image size is too small... */
1356 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1359 switch (fdctrl
->data_dir
) {
1362 DMA_write_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1363 fdctrl
->data_pos
, len
);
1366 /* WRITE commands */
1368 /* Handle readonly medium early, no need to do DMA, touch the
1369 * LED or attempt any writes. A real floppy doesn't attempt
1370 * to write to readonly media either. */
1371 fdctrl_stop_transfer(fdctrl
,
1372 FD_SR0_ABNTERM
| FD_SR0_SEEK
, FD_SR1_NW
,
1374 goto transfer_error
;
1377 DMA_read_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1378 fdctrl
->data_pos
, len
);
1379 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
),
1380 fdctrl
->fifo
, 1) < 0) {
1381 FLOPPY_DPRINTF("error writing sector %d\n",
1382 fd_sector(cur_drv
));
1383 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1384 goto transfer_error
;
1388 /* VERIFY commands */
1393 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1395 DMA_read_memory (nchan
, tmpbuf
, fdctrl
->data_pos
, len
);
1396 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1398 status2
= FD_SR2_SEH
;
1401 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1402 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1409 fdctrl
->data_pos
+= len
;
1410 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1412 /* Seek to next sector */
1413 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1418 len
= fdctrl
->data_pos
- start_pos
;
1419 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1420 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1421 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1422 fdctrl
->data_dir
== FD_DIR_SCANL
||
1423 fdctrl
->data_dir
== FD_DIR_SCANH
)
1424 status2
= FD_SR2_SEH
;
1425 if (FD_DID_SEEK(fdctrl
->data_state
))
1426 status0
|= FD_SR0_SEEK
;
1427 fdctrl
->data_len
-= len
;
1428 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1434 /* Data register : 0x05 */
1435 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1438 uint32_t retval
= 0;
1441 cur_drv
= get_cur_drv(fdctrl
);
1442 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1443 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1444 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1447 pos
= fdctrl
->data_pos
;
1448 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1449 pos
%= FD_SECTOR_LEN
;
1451 if (fdctrl
->data_pos
!= 0)
1452 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1453 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1454 fd_sector(cur_drv
));
1457 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1458 FLOPPY_DPRINTF("error getting sector %d\n",
1459 fd_sector(cur_drv
));
1460 /* Sure, image size is too small... */
1461 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1465 retval
= fdctrl
->fifo
[pos
];
1466 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1467 fdctrl
->data_pos
= 0;
1468 /* Switch from transfer mode to status mode
1469 * then from status mode to command mode
1471 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1472 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1474 fdctrl_reset_fifo(fdctrl
);
1475 fdctrl_reset_irq(fdctrl
);
1478 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1483 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1488 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1489 cur_drv
= get_cur_drv(fdctrl
);
1490 kt
= fdctrl
->fifo
[6];
1491 kh
= fdctrl
->fifo
[7];
1492 ks
= fdctrl
->fifo
[8];
1493 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1494 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1495 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1496 NUM_SIDES(cur_drv
)));
1497 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1500 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1501 fdctrl
->fifo
[3] = kt
;
1502 fdctrl
->fifo
[4] = kh
;
1503 fdctrl
->fifo
[5] = ks
;
1507 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1508 fdctrl
->fifo
[3] = kt
;
1509 fdctrl
->fifo
[4] = kh
;
1510 fdctrl
->fifo
[5] = ks
;
1513 /* No seek enabled */
1514 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1515 fdctrl
->fifo
[3] = kt
;
1516 fdctrl
->fifo
[4] = kh
;
1517 fdctrl
->fifo
[5] = ks
;
1520 fdctrl
->data_state
|= FD_STATE_SEEK
;
1525 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1526 if (cur_drv
->bs
== NULL
||
1527 bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1528 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv
));
1529 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1531 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1532 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1533 /* Last sector done */
1534 if (FD_DID_SEEK(fdctrl
->data_state
))
1535 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1537 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1540 fdctrl
->data_pos
= 0;
1541 fdctrl
->data_len
= 4;
1546 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1548 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1549 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1550 fdctrl_set_fifo(fdctrl
, 1);
1553 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1555 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1557 /* Drives position */
1558 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1559 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1561 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1562 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1564 fdctrl
->fifo
[2] = 0;
1565 fdctrl
->fifo
[3] = 0;
1568 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1569 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1570 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1571 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1572 (cur_drv
->perpendicular
<< 2);
1573 fdctrl
->fifo
[8] = fdctrl
->config
;
1574 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1575 fdctrl_set_fifo(fdctrl
, 10);
1578 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1580 /* Controller's version */
1581 fdctrl
->fifo
[0] = fdctrl
->version
;
1582 fdctrl_set_fifo(fdctrl
, 1);
1585 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1587 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1588 fdctrl_set_fifo(fdctrl
, 1);
1591 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1593 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1595 /* Drives position */
1596 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1597 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1599 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1600 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1603 fdctrl
->timer0
= fdctrl
->fifo
[7];
1604 fdctrl
->timer1
= fdctrl
->fifo
[8];
1605 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1606 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1607 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1608 fdctrl
->config
= fdctrl
->fifo
[11];
1609 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1610 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1611 fdctrl_reset_fifo(fdctrl
);
1614 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1616 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1618 fdctrl
->fifo
[0] = 0;
1619 fdctrl
->fifo
[1] = 0;
1620 /* Drives position */
1621 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1622 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1624 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1625 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1627 fdctrl
->fifo
[4] = 0;
1628 fdctrl
->fifo
[5] = 0;
1631 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1632 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1633 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1634 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1635 (cur_drv
->perpendicular
<< 2);
1636 fdctrl
->fifo
[10] = fdctrl
->config
;
1637 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1638 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1639 fdctrl
->fifo
[13] = 0;
1640 fdctrl
->fifo
[14] = 0;
1641 fdctrl_set_fifo(fdctrl
, 15);
1644 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1646 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1648 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1649 qemu_mod_timer(fdctrl
->result_timer
,
1650 qemu_get_clock_ns(vm_clock
) + (get_ticks_per_sec() / 50));
1653 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1657 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1658 cur_drv
= get_cur_drv(fdctrl
);
1659 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1660 if (fdctrl
->fifo
[0] & 0x80)
1661 fdctrl
->data_state
|= FD_STATE_MULTI
;
1663 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1664 fdctrl
->data_state
&= ~FD_STATE_SEEK
;
1666 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1668 cur_drv
->last_sect
=
1669 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1670 fdctrl
->fifo
[3] / 2;
1672 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1674 /* TODO: implement format using DMA expected by the Bochs BIOS
1675 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1676 * the sector with the specified fill byte
1678 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1679 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1682 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1684 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1685 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1686 if (fdctrl
->fifo
[2] & 1)
1687 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1689 fdctrl
->dor
|= FD_DOR_DMAEN
;
1690 /* No result back */
1691 fdctrl_reset_fifo(fdctrl
);
1694 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
1698 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1699 cur_drv
= get_cur_drv(fdctrl
);
1700 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1701 /* 1 Byte status back */
1702 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
1703 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
1704 (cur_drv
->head
<< 2) |
1705 GET_CUR_DRV(fdctrl
) |
1707 fdctrl_set_fifo(fdctrl
, 1);
1710 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
1714 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1715 cur_drv
= get_cur_drv(fdctrl
);
1716 fd_recalibrate(cur_drv
);
1717 fdctrl_reset_fifo(fdctrl
);
1718 /* Raise Interrupt */
1719 fdctrl
->status0
|= FD_SR0_SEEK
;
1720 fdctrl_raise_irq(fdctrl
);
1723 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
1725 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1727 if (fdctrl
->reset_sensei
> 0) {
1729 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
1730 fdctrl
->reset_sensei
--;
1731 } else if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
1732 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1733 fdctrl_set_fifo(fdctrl
, 1);
1737 (fdctrl
->status0
& ~(FD_SR0_HEAD
| FD_SR0_DS1
| FD_SR0_DS0
))
1738 | GET_CUR_DRV(fdctrl
);
1741 fdctrl
->fifo
[1] = cur_drv
->track
;
1742 fdctrl_set_fifo(fdctrl
, 2);
1743 fdctrl_reset_irq(fdctrl
);
1744 fdctrl
->status0
= FD_SR0_RDYCHG
;
1747 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
1751 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1752 cur_drv
= get_cur_drv(fdctrl
);
1753 fdctrl_reset_fifo(fdctrl
);
1754 /* The seek command just sends step pulses to the drive and doesn't care if
1755 * there is a medium inserted of if it's banging the head against the drive.
1757 fd_seek(cur_drv
, cur_drv
->head
, fdctrl
->fifo
[2], cur_drv
->sect
, 1);
1758 /* Raise Interrupt */
1759 fdctrl
->status0
|= FD_SR0_SEEK
;
1760 fdctrl_raise_irq(fdctrl
);
1763 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
1765 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1767 if (fdctrl
->fifo
[1] & 0x80)
1768 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
1769 /* No result back */
1770 fdctrl_reset_fifo(fdctrl
);
1773 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
1775 fdctrl
->config
= fdctrl
->fifo
[2];
1776 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
1777 /* No result back */
1778 fdctrl_reset_fifo(fdctrl
);
1781 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
1783 fdctrl
->pwrd
= fdctrl
->fifo
[1];
1784 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1785 fdctrl_set_fifo(fdctrl
, 1);
1788 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
1790 /* No result back */
1791 fdctrl_reset_fifo(fdctrl
);
1794 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
1796 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1798 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x80) {
1799 /* Command parameters done */
1800 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x40) {
1801 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1802 fdctrl
->fifo
[2] = 0;
1803 fdctrl
->fifo
[3] = 0;
1804 fdctrl_set_fifo(fdctrl
, 4);
1806 fdctrl_reset_fifo(fdctrl
);
1808 } else if (fdctrl
->data_len
> 7) {
1810 fdctrl
->fifo
[0] = 0x80 |
1811 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1812 fdctrl_set_fifo(fdctrl
, 1);
1816 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
1820 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1821 cur_drv
= get_cur_drv(fdctrl
);
1822 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
1823 fd_seek(cur_drv
, cur_drv
->head
, cur_drv
->max_track
- 1,
1826 fd_seek(cur_drv
, cur_drv
->head
,
1827 cur_drv
->track
+ fdctrl
->fifo
[2], cur_drv
->sect
, 1);
1829 fdctrl_reset_fifo(fdctrl
);
1830 /* Raise Interrupt */
1831 fdctrl
->status0
|= FD_SR0_SEEK
;
1832 fdctrl_raise_irq(fdctrl
);
1835 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
1839 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1840 cur_drv
= get_cur_drv(fdctrl
);
1841 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
1842 fd_seek(cur_drv
, cur_drv
->head
, 0, cur_drv
->sect
, 1);
1844 fd_seek(cur_drv
, cur_drv
->head
,
1845 cur_drv
->track
- fdctrl
->fifo
[2], cur_drv
->sect
, 1);
1847 fdctrl_reset_fifo(fdctrl
);
1848 /* Raise Interrupt */
1849 fdctrl
->status0
|= FD_SR0_SEEK
;
1850 fdctrl_raise_irq(fdctrl
);
1853 static const struct {
1858 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
1861 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1862 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
1863 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
1864 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
1865 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
1866 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
1867 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1868 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
1869 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
1870 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
1871 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
1872 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_start_transfer
, FD_DIR_VERIFY
},
1873 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
1874 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
1875 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
1876 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
1877 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
1878 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
1879 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
1880 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
1881 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
1882 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
1883 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
1884 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
1885 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
1886 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
1887 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
1888 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
1889 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
1890 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
1891 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
1892 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
1894 /* Associate command to an index in the 'handlers' array */
1895 static uint8_t command_to_handler
[256];
1897 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
1903 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1904 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1907 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
1908 FLOPPY_DPRINTF("error: controller not ready for writing\n");
1911 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1912 /* Is it write command time ? */
1913 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1914 /* FIFO data write */
1915 pos
= fdctrl
->data_pos
++;
1916 pos
%= FD_SECTOR_LEN
;
1917 fdctrl
->fifo
[pos
] = value
;
1918 if (pos
== FD_SECTOR_LEN
- 1 ||
1919 fdctrl
->data_pos
== fdctrl
->data_len
) {
1920 cur_drv
= get_cur_drv(fdctrl
);
1921 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1922 FLOPPY_DPRINTF("error writing sector %d\n",
1923 fd_sector(cur_drv
));
1926 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1927 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1928 fd_sector(cur_drv
));
1932 /* Switch from transfer mode to status mode
1933 * then from status mode to command mode
1935 if (fdctrl
->data_pos
== fdctrl
->data_len
)
1936 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1939 if (fdctrl
->data_pos
== 0) {
1941 pos
= command_to_handler
[value
& 0xff];
1942 FLOPPY_DPRINTF("%s command\n", handlers
[pos
].name
);
1943 fdctrl
->data_len
= handlers
[pos
].parameters
+ 1;
1944 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
1947 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
1948 fdctrl
->fifo
[fdctrl
->data_pos
++] = value
;
1949 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
1950 /* We now have all parameters
1951 * and will be able to treat the command
1953 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
1954 fdctrl_format_sector(fdctrl
);
1958 pos
= command_to_handler
[fdctrl
->fifo
[0] & 0xff];
1959 FLOPPY_DPRINTF("treat %s command\n", handlers
[pos
].name
);
1960 (*handlers
[pos
].handler
)(fdctrl
, handlers
[pos
].direction
);
1964 static void fdctrl_result_timer(void *opaque
)
1966 FDCtrl
*fdctrl
= opaque
;
1967 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1969 /* Pretend we are spinning.
1970 * This is needed for Coherent, which uses READ ID to check for
1971 * sector interleaving.
1973 if (cur_drv
->last_sect
!= 0) {
1974 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
1976 /* READ_ID can't automatically succeed! */
1977 if (fdctrl
->check_media_rate
&&
1978 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1979 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
1980 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1981 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1983 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1987 static void fdctrl_change_cb(void *opaque
, bool load
)
1989 FDrive
*drive
= opaque
;
1991 drive
->media_changed
= 1;
1992 fd_revalidate(drive
);
1995 static const BlockDevOps fdctrl_block_ops
= {
1996 .change_media_cb
= fdctrl_change_cb
,
1999 /* Init functions */
2000 static int fdctrl_connect_drives(FDCtrl
*fdctrl
)
2005 for (i
= 0; i
< MAX_FD
; i
++) {
2006 drive
= &fdctrl
->drives
[i
];
2007 drive
->fdctrl
= fdctrl
;
2010 if (bdrv_get_on_error(drive
->bs
, 0) != BLOCKDEV_ON_ERROR_ENOSPC
) {
2011 error_report("fdc doesn't support drive option werror");
2014 if (bdrv_get_on_error(drive
->bs
, 1) != BLOCKDEV_ON_ERROR_REPORT
) {
2015 error_report("fdc doesn't support drive option rerror");
2021 fdctrl_change_cb(drive
, 0);
2023 bdrv_set_dev_ops(drive
->bs
, &fdctrl_block_ops
, drive
);
2029 ISADevice
*fdctrl_init_isa(ISABus
*bus
, DriveInfo
**fds
)
2033 dev
= isa_try_create(bus
, "isa-fdc");
2039 qdev_prop_set_drive_nofail(&dev
->qdev
, "driveA", fds
[0]->bdrv
);
2042 qdev_prop_set_drive_nofail(&dev
->qdev
, "driveB", fds
[1]->bdrv
);
2044 qdev_init_nofail(&dev
->qdev
);
2049 void fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
2050 hwaddr mmio_base
, DriveInfo
**fds
)
2056 dev
= qdev_create(NULL
, "sysbus-fdc");
2057 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
2058 fdctrl
= &sys
->state
;
2059 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
2061 qdev_prop_set_drive_nofail(dev
, "driveA", fds
[0]->bdrv
);
2064 qdev_prop_set_drive_nofail(dev
, "driveB", fds
[1]->bdrv
);
2066 qdev_init_nofail(dev
);
2067 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
2068 sysbus_mmio_map(&sys
->busdev
, 0, mmio_base
);
2071 void sun4m_fdctrl_init(qemu_irq irq
, hwaddr io_base
,
2072 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
2077 dev
= qdev_create(NULL
, "SUNW,fdtwo");
2079 qdev_prop_set_drive_nofail(dev
, "drive", fds
[0]->bdrv
);
2081 qdev_init_nofail(dev
);
2082 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
2083 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
2084 sysbus_mmio_map(&sys
->busdev
, 0, io_base
);
2085 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
2088 static int fdctrl_init_common(FDCtrl
*fdctrl
)
2091 static int command_tables_inited
= 0;
2093 /* Fill 'command_to_handler' lookup table */
2094 if (!command_tables_inited
) {
2095 command_tables_inited
= 1;
2096 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
2097 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
2098 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
2099 command_to_handler
[j
] = i
;
2105 FLOPPY_DPRINTF("init controller\n");
2106 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
2107 fdctrl
->fifo_size
= 512;
2108 fdctrl
->result_timer
= qemu_new_timer_ns(vm_clock
,
2109 fdctrl_result_timer
, fdctrl
);
2111 fdctrl
->version
= 0x90; /* Intel 82078 controller */
2112 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
2113 fdctrl
->num_floppies
= MAX_FD
;
2115 if (fdctrl
->dma_chann
!= -1)
2116 DMA_register_channel(fdctrl
->dma_chann
, &fdctrl_transfer_handler
, fdctrl
);
2117 return fdctrl_connect_drives(fdctrl
);
2120 static const MemoryRegionPortio fdc_portio_list
[] = {
2121 { 1, 5, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2122 { 7, 1, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2123 PORTIO_END_OF_LIST(),
2126 static int isabus_fdc_init1(ISADevice
*dev
)
2128 FDCtrlISABus
*isa
= DO_UPCAST(FDCtrlISABus
, busdev
, dev
);
2129 FDCtrl
*fdctrl
= &isa
->state
;
2132 isa_register_portio_list(dev
, isa
->iobase
, fdc_portio_list
, fdctrl
, "fdc");
2134 isa_init_irq(&isa
->busdev
, &fdctrl
->irq
, isa
->irq
);
2135 fdctrl
->dma_chann
= isa
->dma
;
2137 qdev_set_legacy_instance_id(&dev
->qdev
, isa
->iobase
, 2);
2138 ret
= fdctrl_init_common(fdctrl
);
2140 add_boot_device_path(isa
->bootindexA
, &dev
->qdev
, "/floppy@0");
2141 add_boot_device_path(isa
->bootindexB
, &dev
->qdev
, "/floppy@1");
2146 static int sysbus_fdc_init1(SysBusDevice
*dev
)
2148 FDCtrlSysBus
*sys
= DO_UPCAST(FDCtrlSysBus
, busdev
, dev
);
2149 FDCtrl
*fdctrl
= &sys
->state
;
2152 memory_region_init_io(&fdctrl
->iomem
, &fdctrl_mem_ops
, fdctrl
, "fdc", 0x08);
2153 sysbus_init_mmio(dev
, &fdctrl
->iomem
);
2154 sysbus_init_irq(dev
, &fdctrl
->irq
);
2155 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
2156 fdctrl
->dma_chann
= -1;
2158 qdev_set_legacy_instance_id(&dev
->qdev
, 0 /* io */, 2); /* FIXME */
2159 ret
= fdctrl_init_common(fdctrl
);
2164 static int sun4m_fdc_init1(SysBusDevice
*dev
)
2166 FDCtrl
*fdctrl
= &(FROM_SYSBUS(FDCtrlSysBus
, dev
)->state
);
2168 memory_region_init_io(&fdctrl
->iomem
, &fdctrl_mem_strict_ops
, fdctrl
,
2170 sysbus_init_mmio(dev
, &fdctrl
->iomem
);
2171 sysbus_init_irq(dev
, &fdctrl
->irq
);
2172 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
2175 qdev_set_legacy_instance_id(&dev
->qdev
, 0 /* io */, 2); /* FIXME */
2176 return fdctrl_init_common(fdctrl
);
2179 FDriveType
isa_fdc_get_drive_type(ISADevice
*fdc
, int i
)
2181 FDCtrlISABus
*isa
= DO_UPCAST(FDCtrlISABus
, busdev
, fdc
);
2183 return isa
->state
.drives
[i
].drive
;
2186 static const VMStateDescription vmstate_isa_fdc
={
2189 .minimum_version_id
= 2,
2190 .fields
= (VMStateField
[]) {
2191 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
2192 VMSTATE_END_OF_LIST()
2196 static Property isa_fdc_properties
[] = {
2197 DEFINE_PROP_HEX32("iobase", FDCtrlISABus
, iobase
, 0x3f0),
2198 DEFINE_PROP_UINT32("irq", FDCtrlISABus
, irq
, 6),
2199 DEFINE_PROP_UINT32("dma", FDCtrlISABus
, dma
, 2),
2200 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].bs
),
2201 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].bs
),
2202 DEFINE_PROP_INT32("bootindexA", FDCtrlISABus
, bootindexA
, -1),
2203 DEFINE_PROP_INT32("bootindexB", FDCtrlISABus
, bootindexB
, -1),
2204 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus
, state
.check_media_rate
,
2206 DEFINE_PROP_END_OF_LIST(),
2209 static void isabus_fdc_class_init1(ObjectClass
*klass
, void *data
)
2211 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2212 ISADeviceClass
*ic
= ISA_DEVICE_CLASS(klass
);
2213 ic
->init
= isabus_fdc_init1
;
2214 dc
->fw_name
= "fdc";
2216 dc
->reset
= fdctrl_external_reset_isa
;
2217 dc
->vmsd
= &vmstate_isa_fdc
;
2218 dc
->props
= isa_fdc_properties
;
2221 static TypeInfo isa_fdc_info
= {
2223 .parent
= TYPE_ISA_DEVICE
,
2224 .instance_size
= sizeof(FDCtrlISABus
),
2225 .class_init
= isabus_fdc_class_init1
,
2228 static const VMStateDescription vmstate_sysbus_fdc
={
2231 .minimum_version_id
= 2,
2232 .fields
= (VMStateField
[]) {
2233 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
2234 VMSTATE_END_OF_LIST()
2238 static Property sysbus_fdc_properties
[] = {
2239 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].bs
),
2240 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].bs
),
2241 DEFINE_PROP_END_OF_LIST(),
2244 static void sysbus_fdc_class_init(ObjectClass
*klass
, void *data
)
2246 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2247 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
2249 k
->init
= sysbus_fdc_init1
;
2250 dc
->reset
= fdctrl_external_reset_sysbus
;
2251 dc
->vmsd
= &vmstate_sysbus_fdc
;
2252 dc
->props
= sysbus_fdc_properties
;
2255 static TypeInfo sysbus_fdc_info
= {
2256 .name
= "sysbus-fdc",
2257 .parent
= TYPE_SYS_BUS_DEVICE
,
2258 .instance_size
= sizeof(FDCtrlSysBus
),
2259 .class_init
= sysbus_fdc_class_init
,
2262 static Property sun4m_fdc_properties
[] = {
2263 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].bs
),
2264 DEFINE_PROP_END_OF_LIST(),
2267 static void sun4m_fdc_class_init(ObjectClass
*klass
, void *data
)
2269 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2270 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
2272 k
->init
= sun4m_fdc_init1
;
2273 dc
->reset
= fdctrl_external_reset_sysbus
;
2274 dc
->vmsd
= &vmstate_sysbus_fdc
;
2275 dc
->props
= sun4m_fdc_properties
;
2278 static TypeInfo sun4m_fdc_info
= {
2279 .name
= "SUNW,fdtwo",
2280 .parent
= TYPE_SYS_BUS_DEVICE
,
2281 .instance_size
= sizeof(FDCtrlSysBus
),
2282 .class_init
= sun4m_fdc_class_init
,
2285 static void fdc_register_types(void)
2287 type_register_static(&isa_fdc_info
);
2288 type_register_static(&sysbus_fdc_info
);
2289 type_register_static(&sun4m_fdc_info
);
2292 type_init(fdc_register_types
)