4 * Copyright (c) 2006 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, see <http://www.gnu.org/licenses/>
18 * Contributions after 2012-01-13 are licensed under the terms of the
19 * GNU GPL, version 2 or (at your option) any later version.
22 #include "hw/i386/pc.h"
23 #include "hw/isa/apm.h"
24 #include "hw/i2c/pm_smbus.h"
25 #include "hw/pci/pci.h"
26 #include "hw/acpi/acpi.h"
27 #include "sysemu/sysemu.h"
28 #include "qemu/range.h"
29 #include "exec/ioport.h"
30 #include "hw/nvram/fw_cfg.h"
31 #include "exec/address-spaces.h"
32 #include "hw/acpi/piix4.h"
33 #include "hw/acpi/pcihp.h"
34 #include "hw/acpi/cpu_hotplug.h"
35 #include "hw/hotplug.h"
36 #include "hw/mem/pc-dimm.h"
37 #include "hw/acpi/memory_hotplug.h"
38 #include "hw/acpi/acpi_dev_interface.h"
39 #include "hw/xen/xen.h"
44 # define PIIX4_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
46 # define PIIX4_DPRINTF(format, ...) do { } while (0)
49 #define GPE_BASE 0xafe0
53 uint32_t up
; /* deprecated, maintained for migration compatibility */
57 typedef struct PIIX4PMState
{
76 Notifier machine_ready
;
77 Notifier powerdown_notifier
;
79 AcpiPciHpState acpi_pci_hotplug
;
80 bool use_acpi_pci_hotplug
;
86 AcpiCpuHotplug gpe_cpu
;
88 MemHotplugState acpi_memory_hotplug
;
91 #define TYPE_PIIX4_PM "PIIX4_PM"
93 #define PIIX4_PM(obj) \
94 OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM)
96 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
97 PCIBus
*bus
, PIIX4PMState
*s
);
99 #define ACPI_ENABLE 0xf1
100 #define ACPI_DISABLE 0xf0
102 static void pm_tmr_timer(ACPIREGS
*ar
)
104 PIIX4PMState
*s
= container_of(ar
, PIIX4PMState
, ar
);
105 acpi_update_sci(&s
->ar
, s
->irq
);
108 static void apm_ctrl_changed(uint32_t val
, void *arg
)
110 PIIX4PMState
*s
= arg
;
111 PCIDevice
*d
= PCI_DEVICE(s
);
113 /* ACPI specs 3.0, 4.7.2.5 */
114 acpi_pm1_cnt_update(&s
->ar
, val
== ACPI_ENABLE
, val
== ACPI_DISABLE
);
116 if (d
->config
[0x5b] & (1 << 1)) {
118 qemu_irq_raise(s
->smi_irq
);
123 static void pm_io_space_update(PIIX4PMState
*s
)
125 PCIDevice
*d
= PCI_DEVICE(s
);
127 s
->io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x40));
128 s
->io_base
&= 0xffc0;
130 memory_region_transaction_begin();
131 memory_region_set_enabled(&s
->io
, d
->config
[0x80] & 1);
132 memory_region_set_address(&s
->io
, s
->io_base
);
133 memory_region_transaction_commit();
136 static void smbus_io_space_update(PIIX4PMState
*s
)
138 PCIDevice
*d
= PCI_DEVICE(s
);
140 s
->smb_io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x90));
141 s
->smb_io_base
&= 0xffc0;
143 memory_region_transaction_begin();
144 memory_region_set_enabled(&s
->smb
.io
, d
->config
[0xd2] & 1);
145 memory_region_set_address(&s
->smb
.io
, s
->smb_io_base
);
146 memory_region_transaction_commit();
149 static void pm_write_config(PCIDevice
*d
,
150 uint32_t address
, uint32_t val
, int len
)
152 pci_default_write_config(d
, address
, val
, len
);
153 if (range_covers_byte(address
, len
, 0x80) ||
154 ranges_overlap(address
, len
, 0x40, 4)) {
155 pm_io_space_update((PIIX4PMState
*)d
);
157 if (range_covers_byte(address
, len
, 0xd2) ||
158 ranges_overlap(address
, len
, 0x90, 4)) {
159 smbus_io_space_update((PIIX4PMState
*)d
);
163 static int vmstate_acpi_post_load(void *opaque
, int version_id
)
165 PIIX4PMState
*s
= opaque
;
167 pm_io_space_update(s
);
171 #define VMSTATE_GPE_ARRAY(_field, _state) \
173 .name = (stringify(_field)), \
175 .info = &vmstate_info_uint16, \
176 .size = sizeof(uint16_t), \
177 .flags = VMS_SINGLE | VMS_POINTER, \
178 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
181 static const VMStateDescription vmstate_gpe
= {
184 .minimum_version_id
= 1,
185 .fields
= (VMStateField
[]) {
186 VMSTATE_GPE_ARRAY(sts
, ACPIGPE
),
187 VMSTATE_GPE_ARRAY(en
, ACPIGPE
),
188 VMSTATE_END_OF_LIST()
192 static const VMStateDescription vmstate_pci_status
= {
193 .name
= "pci_status",
195 .minimum_version_id
= 1,
196 .fields
= (VMStateField
[]) {
197 VMSTATE_UINT32(up
, struct AcpiPciHpPciStatus
),
198 VMSTATE_UINT32(down
, struct AcpiPciHpPciStatus
),
199 VMSTATE_END_OF_LIST()
203 static int acpi_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
205 PIIX4PMState
*s
= opaque
;
209 ret
= pci_device_load(PCI_DEVICE(s
), f
);
213 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.sts
);
214 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.en
);
215 qemu_get_be16s(f
, &s
->ar
.pm1
.cnt
.cnt
);
217 ret
= vmstate_load_state(f
, &vmstate_apm
, &s
->apm
, 1);
222 timer_get(f
, s
->ar
.tmr
.timer
);
223 qemu_get_sbe64s(f
, &s
->ar
.tmr
.overflow_time
);
225 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.sts
);
226 for (i
= 0; i
< 3; i
++) {
227 qemu_get_be16s(f
, &temp
);
230 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.en
);
231 for (i
= 0; i
< 3; i
++) {
232 qemu_get_be16s(f
, &temp
);
235 ret
= vmstate_load_state(f
, &vmstate_pci_status
,
236 &s
->acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
], 1);
240 static bool vmstate_test_use_acpi_pci_hotplug(void *opaque
, int version_id
)
242 PIIX4PMState
*s
= opaque
;
243 return s
->use_acpi_pci_hotplug
;
246 static bool vmstate_test_no_use_acpi_pci_hotplug(void *opaque
, int version_id
)
248 PIIX4PMState
*s
= opaque
;
249 return !s
->use_acpi_pci_hotplug
;
252 static bool vmstate_test_use_memhp(void *opaque
)
254 PIIX4PMState
*s
= opaque
;
255 return s
->acpi_memory_hotplug
.is_enabled
;
258 static const VMStateDescription vmstate_memhp_state
= {
259 .name
= "piix4_pm/memhp",
261 .minimum_version_id
= 1,
262 .minimum_version_id_old
= 1,
263 .needed
= vmstate_test_use_memhp
,
264 .fields
= (VMStateField
[]) {
265 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, PIIX4PMState
),
266 VMSTATE_END_OF_LIST()
270 /* qemu-kvm 1.2 uses version 3 but advertised as 2
271 * To support incoming qemu-kvm 1.2 migration, change version_id
272 * and minimum_version_id to 2 below (which breaks migration from
276 static const VMStateDescription vmstate_acpi
= {
279 .minimum_version_id
= 3,
280 .minimum_version_id_old
= 1,
281 .load_state_old
= acpi_load_old
,
282 .post_load
= vmstate_acpi_post_load
,
283 .fields
= (VMStateField
[]) {
284 VMSTATE_PCI_DEVICE(parent_obj
, PIIX4PMState
),
285 VMSTATE_UINT16(ar
.pm1
.evt
.sts
, PIIX4PMState
),
286 VMSTATE_UINT16(ar
.pm1
.evt
.en
, PIIX4PMState
),
287 VMSTATE_UINT16(ar
.pm1
.cnt
.cnt
, PIIX4PMState
),
288 VMSTATE_STRUCT(apm
, PIIX4PMState
, 0, vmstate_apm
, APMState
),
289 VMSTATE_TIMER_PTR(ar
.tmr
.timer
, PIIX4PMState
),
290 VMSTATE_INT64(ar
.tmr
.overflow_time
, PIIX4PMState
),
291 VMSTATE_STRUCT(ar
.gpe
, PIIX4PMState
, 2, vmstate_gpe
, ACPIGPE
),
293 acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
],
295 vmstate_test_no_use_acpi_pci_hotplug
,
296 2, vmstate_pci_status
,
297 struct AcpiPciHpPciStatus
),
298 VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug
, PIIX4PMState
,
299 vmstate_test_use_acpi_pci_hotplug
),
300 VMSTATE_END_OF_LIST()
302 .subsections
= (const VMStateDescription
*[]) {
303 &vmstate_memhp_state
,
308 static void piix4_reset(void *opaque
)
310 PIIX4PMState
*s
= opaque
;
311 PCIDevice
*d
= PCI_DEVICE(s
);
312 uint8_t *pci_conf
= d
->config
;
319 pci_conf
[0x40] = 0x01; /* PM io base read only bit */
322 if (s
->kvm_enabled
) {
323 /* Mark SMM as already inited (until KVM supports SMM). */
324 pci_conf
[0x5B] = 0x02;
326 pm_io_space_update(s
);
327 acpi_pcihp_reset(&s
->acpi_pci_hotplug
);
330 static void piix4_pm_powerdown_req(Notifier
*n
, void *opaque
)
332 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, powerdown_notifier
);
335 acpi_pm1_evt_power_down(&s
->ar
);
338 static void piix4_device_plug_cb(HotplugHandler
*hotplug_dev
,
339 DeviceState
*dev
, Error
**errp
)
341 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
343 if (s
->acpi_memory_hotplug
.is_enabled
&&
344 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
345 acpi_memory_plug_cb(&s
->ar
, s
->irq
, &s
->acpi_memory_hotplug
, dev
, errp
);
346 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
347 acpi_pcihp_device_plug_cb(&s
->ar
, s
->irq
, &s
->acpi_pci_hotplug
, dev
,
349 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
350 acpi_cpu_plug_cb(&s
->ar
, s
->irq
, &s
->gpe_cpu
, dev
, errp
);
352 error_setg(errp
, "acpi: device plug request for not supported device"
353 " type: %s", object_get_typename(OBJECT(dev
)));
357 static void piix4_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
358 DeviceState
*dev
, Error
**errp
)
360 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
362 if (s
->acpi_memory_hotplug
.is_enabled
&&
363 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
364 acpi_memory_unplug_request_cb(&s
->ar
, s
->irq
, &s
->acpi_memory_hotplug
,
366 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
367 acpi_pcihp_device_unplug_cb(&s
->ar
, s
->irq
, &s
->acpi_pci_hotplug
, dev
,
370 error_setg(errp
, "acpi: device unplug request for not supported device"
371 " type: %s", object_get_typename(OBJECT(dev
)));
375 static void piix4_device_unplug_cb(HotplugHandler
*hotplug_dev
,
376 DeviceState
*dev
, Error
**errp
)
378 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
380 if (s
->acpi_memory_hotplug
.is_enabled
&&
381 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
382 acpi_memory_unplug_cb(&s
->acpi_memory_hotplug
, dev
, errp
);
384 error_setg(errp
, "acpi: device unplug for not supported device"
385 " type: %s", object_get_typename(OBJECT(dev
)));
389 static void piix4_update_bus_hotplug(PCIBus
*pci_bus
, void *opaque
)
391 PIIX4PMState
*s
= opaque
;
393 qbus_set_hotplug_handler(BUS(pci_bus
), DEVICE(s
), &error_abort
);
396 static void piix4_pm_machine_ready(Notifier
*n
, void *opaque
)
398 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, machine_ready
);
399 PCIDevice
*d
= PCI_DEVICE(s
);
400 MemoryRegion
*io_as
= pci_address_space_io(d
);
403 pci_conf
= d
->config
;
404 pci_conf
[0x5f] = 0x10 |
405 (memory_region_present(io_as
, 0x378) ? 0x80 : 0);
406 pci_conf
[0x63] = 0x60;
407 pci_conf
[0x67] = (memory_region_present(io_as
, 0x3f8) ? 0x08 : 0) |
408 (memory_region_present(io_as
, 0x2f8) ? 0x90 : 0);
410 if (s
->use_acpi_pci_hotplug
) {
411 pci_for_each_bus(d
->bus
, piix4_update_bus_hotplug
, s
);
413 piix4_update_bus_hotplug(d
->bus
, s
);
417 static void piix4_pm_add_propeties(PIIX4PMState
*s
)
419 static const uint8_t acpi_enable_cmd
= ACPI_ENABLE
;
420 static const uint8_t acpi_disable_cmd
= ACPI_DISABLE
;
421 static const uint32_t gpe0_blk
= GPE_BASE
;
422 static const uint32_t gpe0_blk_len
= GPE_LEN
;
423 static const uint16_t sci_int
= 9;
425 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_ENABLE_CMD
,
426 &acpi_enable_cmd
, NULL
);
427 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_DISABLE_CMD
,
428 &acpi_disable_cmd
, NULL
);
429 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK
,
431 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK_LEN
,
432 &gpe0_blk_len
, NULL
);
433 object_property_add_uint16_ptr(OBJECT(s
), ACPI_PM_PROP_SCI_INT
,
435 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_PM_IO_BASE
,
439 static void piix4_pm_realize(PCIDevice
*dev
, Error
**errp
)
441 PIIX4PMState
*s
= PIIX4_PM(dev
);
444 pci_conf
= dev
->config
;
445 pci_conf
[0x06] = 0x80;
446 pci_conf
[0x07] = 0x02;
447 pci_conf
[0x09] = 0x00;
448 pci_conf
[0x3d] = 0x01; // interrupt pin 1
451 apm_init(dev
, &s
->apm
, apm_ctrl_changed
, s
);
453 if (s
->kvm_enabled
) {
454 /* Mark SMM as already inited to prevent SMM from running. KVM does not
455 * support SMM mode. */
456 pci_conf
[0x5B] = 0x02;
459 /* XXX: which specification is used ? The i82731AB has different
461 pci_conf
[0x90] = s
->smb_io_base
| 1;
462 pci_conf
[0x91] = s
->smb_io_base
>> 8;
463 pci_conf
[0xd2] = 0x09;
464 pm_smbus_init(DEVICE(dev
), &s
->smb
);
465 memory_region_set_enabled(&s
->smb
.io
, pci_conf
[0xd2] & 1);
466 memory_region_add_subregion(pci_address_space_io(dev
),
467 s
->smb_io_base
, &s
->smb
.io
);
469 memory_region_init(&s
->io
, OBJECT(s
), "piix4-pm", 64);
470 memory_region_set_enabled(&s
->io
, false);
471 memory_region_add_subregion(pci_address_space_io(dev
),
474 acpi_pm_tmr_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
475 acpi_pm1_evt_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
476 acpi_pm1_cnt_init(&s
->ar
, &s
->io
, s
->disable_s3
, s
->disable_s4
, s
->s4_val
);
477 acpi_gpe_init(&s
->ar
, GPE_LEN
);
479 s
->powerdown_notifier
.notify
= piix4_pm_powerdown_req
;
480 qemu_register_powerdown_notifier(&s
->powerdown_notifier
);
482 s
->machine_ready
.notify
= piix4_pm_machine_ready
;
483 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
484 qemu_register_reset(piix4_reset
, s
);
486 piix4_acpi_system_hot_add_init(pci_address_space_io(dev
), dev
->bus
, s
);
488 piix4_pm_add_propeties(s
);
491 Object
*piix4_pm_find(void)
494 Object
*o
= object_resolve_path_type("", TYPE_PIIX4_PM
, &ambig
);
502 I2CBus
*piix4_pm_init(PCIBus
*bus
, int devfn
, uint32_t smb_io_base
,
503 qemu_irq sci_irq
, qemu_irq smi_irq
,
504 int kvm_enabled
, DeviceState
**piix4_pm
)
509 dev
= DEVICE(pci_create(bus
, devfn
, TYPE_PIIX4_PM
));
510 qdev_prop_set_uint32(dev
, "smb_io_base", smb_io_base
);
517 s
->smi_irq
= smi_irq
;
518 s
->kvm_enabled
= kvm_enabled
;
520 s
->use_acpi_pci_hotplug
= false;
523 qdev_init_nofail(dev
);
528 static uint64_t gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
530 PIIX4PMState
*s
= opaque
;
531 uint32_t val
= acpi_gpe_ioport_readb(&s
->ar
, addr
);
533 PIIX4_DPRINTF("gpe read %" HWADDR_PRIx
" == %" PRIu32
"\n", addr
, val
);
537 static void gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
540 PIIX4PMState
*s
= opaque
;
542 acpi_gpe_ioport_writeb(&s
->ar
, addr
, val
);
543 acpi_update_sci(&s
->ar
, s
->irq
);
545 PIIX4_DPRINTF("gpe write %" HWADDR_PRIx
" <== %" PRIu64
"\n", addr
, val
);
548 static const MemoryRegionOps piix4_gpe_ops
= {
551 .valid
.min_access_size
= 1,
552 .valid
.max_access_size
= 4,
553 .impl
.min_access_size
= 1,
554 .impl
.max_access_size
= 1,
555 .endianness
= DEVICE_LITTLE_ENDIAN
,
558 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
559 PCIBus
*bus
, PIIX4PMState
*s
)
561 memory_region_init_io(&s
->io_gpe
, OBJECT(s
), &piix4_gpe_ops
, s
,
562 "acpi-gpe0", GPE_LEN
);
563 memory_region_add_subregion(parent
, GPE_BASE
, &s
->io_gpe
);
565 acpi_pcihp_init(OBJECT(s
), &s
->acpi_pci_hotplug
, bus
, parent
,
566 s
->use_acpi_pci_hotplug
);
568 acpi_cpu_hotplug_init(parent
, OBJECT(s
), &s
->gpe_cpu
,
569 PIIX4_CPU_HOTPLUG_IO_BASE
);
571 if (s
->acpi_memory_hotplug
.is_enabled
) {
572 acpi_memory_hotplug_init(parent
, OBJECT(s
), &s
->acpi_memory_hotplug
);
576 static void piix4_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
578 PIIX4PMState
*s
= PIIX4_PM(adev
);
580 acpi_memory_ospm_status(&s
->acpi_memory_hotplug
, list
);
583 static Property piix4_pm_properties
[] = {
584 DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState
, smb_io_base
, 0),
585 DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED
, PIIX4PMState
, disable_s3
, 0),
586 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED
, PIIX4PMState
, disable_s4
, 0),
587 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL
, PIIX4PMState
, s4_val
, 2),
588 DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState
,
589 use_acpi_pci_hotplug
, true),
590 DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState
,
591 acpi_memory_hotplug
.is_enabled
, true),
592 DEFINE_PROP_END_OF_LIST(),
595 static void piix4_pm_class_init(ObjectClass
*klass
, void *data
)
597 DeviceClass
*dc
= DEVICE_CLASS(klass
);
598 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
599 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(klass
);
600 AcpiDeviceIfClass
*adevc
= ACPI_DEVICE_IF_CLASS(klass
);
602 k
->realize
= piix4_pm_realize
;
603 k
->config_write
= pm_write_config
;
604 k
->vendor_id
= PCI_VENDOR_ID_INTEL
;
605 k
->device_id
= PCI_DEVICE_ID_INTEL_82371AB_3
;
607 k
->class_id
= PCI_CLASS_BRIDGE_OTHER
;
609 dc
->vmsd
= &vmstate_acpi
;
610 dc
->props
= piix4_pm_properties
;
612 * Reason: part of PIIX4 southbridge, needs to be wired up,
613 * e.g. by mips_malta_init()
615 dc
->cannot_instantiate_with_device_add_yet
= true;
616 dc
->hotpluggable
= false;
617 hc
->plug
= piix4_device_plug_cb
;
618 hc
->unplug_request
= piix4_device_unplug_request_cb
;
619 hc
->unplug
= piix4_device_unplug_cb
;
620 adevc
->ospm_status
= piix4_ospm_status
;
623 static const TypeInfo piix4_pm_info
= {
624 .name
= TYPE_PIIX4_PM
,
625 .parent
= TYPE_PCI_DEVICE
,
626 .instance_size
= sizeof(PIIX4PMState
),
627 .class_init
= piix4_pm_class_init
,
628 .interfaces
= (InterfaceInfo
[]) {
629 { TYPE_HOTPLUG_HANDLER
},
630 { TYPE_ACPI_DEVICE_IF
},
635 static void piix4_pm_register_types(void)
637 type_register_static(&piix4_pm_info
);
640 type_init(piix4_pm_register_types
)