target-sh4/cpu-qom.h

   1 /*
   2  * QEMU SuperH CPU
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20 #ifndef QEMU_SUPERH_CPU_QOM_H
  21 #define QEMU_SUPERH_CPU_QOM_H
  22
  23 #include "qom/cpu.h"
  24
  25 #define TYPE_SUPERH_CPU "superh-cpu"
  26
  27 #define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
  28 #define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
  29 #define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
  30
  31 #define SUPERH_CPU_CLASS(klass) \
  32     OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
  33 #define SUPERH_CPU(obj) \
  34     OBJECT_CHECK(SuperHCPU, (obj), TYPE_SUPERH_CPU)
  35 #define SUPERH_CPU_GET_CLASS(obj) \
  36     OBJECT_GET_CLASS(SuperHCPUClass, (obj), TYPE_SUPERH_CPU)
  37
  38 /**
  39  * SuperHCPUClass:
  40  * @parent_realize: The parent class' realize handler.
  41  * @parent_reset: The parent class' reset handler.
  42  * @name: The name.
  43  * @pvr: Processor Version Register
  44  * @prr: Processor Revision Register
  45  * @cvr: Cache Version Register
  46  *
  47  * A SuperH CPU model.
  48  */
  49 typedef struct SuperHCPUClass {
  50     /*< private >*/
  51     CPUClass parent_class;
  52     /*< public >*/
  53
  54     DeviceRealize parent_realize;
  55     void (*parent_reset)(CPUState *cpu);
  56
  57     const char *name;
  58     uint32_t pvr;
  59     uint32_t prr;
  60     uint32_t cvr;
  61 } SuperHCPUClass;
  62
  63 /**
  64  * SuperHCPU:
  65  * @env: #CPUSH4State
  66  *
  67  * A SuperH CPU.
  68  */
  69 typedef struct SuperHCPU {
  70     /*< private >*/
  71     CPUState parent_obj;
  72     /*< public >*/
  73
  74     CPUSH4State env;
  75 } SuperHCPU;
  76
  77 static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
  78 {
  79     return container_of(env, SuperHCPU, env);
  80 }
  81
  82 #define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e))
  83
  84 #define ENV_OFFSET offsetof(SuperHCPU, env)
  85
  86 void superh_cpu_do_interrupt(CPUState *cpu);
  87 bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
  88 void superh_cpu_dump_state(CPUState *cpu, FILE *f,
  89                            fprintf_function cpu_fprintf, int flags);
  90 hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  91 int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
  92 int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
  93
  94 #endif