4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "cache-utils.h"
34 #include "qemu-timer.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
47 const char *cpu_model
;
48 unsigned long mmap_min_addr
;
49 #if defined(CONFIG_USE_GUEST_BASE)
50 unsigned long guest_base
;
52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
60 unsigned long reserved_va
= 0xf7000000;
62 unsigned long reserved_va
;
66 static void usage(void);
68 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
69 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
71 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
72 we allocate a bigger stack. Need a better solution, for example
73 by remapping the process stack directly at the right place */
74 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
76 void gemu_log(const char *fmt
, ...)
81 vfprintf(stderr
, fmt
, ap
);
85 #if defined(TARGET_I386)
86 int cpu_get_pic_interrupt(CPUX86State
*env
)
92 #if defined(CONFIG_USE_NPTL)
93 /***********************************************************/
94 /* Helper routines for implementing atomic operations. */
96 /* To implement exclusive operations we force all cpus to syncronise.
97 We don't require a full sync, only that no cpus are executing guest code.
98 The alternative is to map target atomic ops onto host equivalents,
99 which requires quite a lot of per host/target work. */
100 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
101 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
102 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
103 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
104 static int pending_cpus
;
106 /* Make sure everything is in a consistent state for calling fork(). */
107 void fork_start(void)
109 pthread_mutex_lock(&tb_lock
);
110 pthread_mutex_lock(&exclusive_lock
);
114 void fork_end(int child
)
116 mmap_fork_end(child
);
118 /* Child processes created by fork() only have a single thread.
119 Discard information about the parent threads. */
120 first_cpu
= thread_env
;
121 thread_env
->next_cpu
= NULL
;
123 pthread_mutex_init(&exclusive_lock
, NULL
);
124 pthread_mutex_init(&cpu_list_mutex
, NULL
);
125 pthread_cond_init(&exclusive_cond
, NULL
);
126 pthread_cond_init(&exclusive_resume
, NULL
);
127 pthread_mutex_init(&tb_lock
, NULL
);
128 gdbserver_fork(thread_env
);
130 pthread_mutex_unlock(&exclusive_lock
);
131 pthread_mutex_unlock(&tb_lock
);
135 /* Wait for pending exclusive operations to complete. The exclusive lock
137 static inline void exclusive_idle(void)
139 while (pending_cpus
) {
140 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
144 /* Start an exclusive operation.
145 Must only be called from outside cpu_arm_exec. */
146 static inline void start_exclusive(void)
149 pthread_mutex_lock(&exclusive_lock
);
153 /* Make all other cpus stop executing. */
154 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
155 if (other
->running
) {
160 if (pending_cpus
> 1) {
161 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
165 /* Finish an exclusive operation. */
166 static inline void end_exclusive(void)
169 pthread_cond_broadcast(&exclusive_resume
);
170 pthread_mutex_unlock(&exclusive_lock
);
173 /* Wait for exclusive ops to finish, and begin cpu execution. */
174 static inline void cpu_exec_start(CPUArchState
*env
)
176 pthread_mutex_lock(&exclusive_lock
);
179 pthread_mutex_unlock(&exclusive_lock
);
182 /* Mark cpu as not executing, and release pending exclusive ops. */
183 static inline void cpu_exec_end(CPUArchState
*env
)
185 pthread_mutex_lock(&exclusive_lock
);
187 if (pending_cpus
> 1) {
189 if (pending_cpus
== 1) {
190 pthread_cond_signal(&exclusive_cond
);
194 pthread_mutex_unlock(&exclusive_lock
);
197 void cpu_list_lock(void)
199 pthread_mutex_lock(&cpu_list_mutex
);
202 void cpu_list_unlock(void)
204 pthread_mutex_unlock(&cpu_list_mutex
);
206 #else /* if !CONFIG_USE_NPTL */
207 /* These are no-ops because we are not threadsafe. */
208 static inline void cpu_exec_start(CPUArchState
*env
)
212 static inline void cpu_exec_end(CPUArchState
*env
)
216 static inline void start_exclusive(void)
220 static inline void end_exclusive(void)
224 void fork_start(void)
228 void fork_end(int child
)
231 gdbserver_fork(thread_env
);
235 void cpu_list_lock(void)
239 void cpu_list_unlock(void)
246 /***********************************************************/
247 /* CPUX86 core interface */
249 void cpu_smm_update(CPUX86State
*env
)
253 uint64_t cpu_get_tsc(CPUX86State
*env
)
255 return cpu_get_real_ticks();
258 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
263 e1
= (addr
<< 16) | (limit
& 0xffff);
264 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
271 static uint64_t *idt_table
;
273 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
274 uint64_t addr
, unsigned int sel
)
277 e1
= (addr
& 0xffff) | (sel
<< 16);
278 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
282 p
[2] = tswap32(addr
>> 32);
285 /* only dpl matters as we do only user space emulation */
286 static void set_idt(int n
, unsigned int dpl
)
288 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
291 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
292 uint32_t addr
, unsigned int sel
)
295 e1
= (addr
& 0xffff) | (sel
<< 16);
296 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
302 /* only dpl matters as we do only user space emulation */
303 static void set_idt(int n
, unsigned int dpl
)
305 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
309 void cpu_loop(CPUX86State
*env
)
313 target_siginfo_t info
;
316 trapnr
= cpu_x86_exec(env
);
319 /* linux syscall from int $0x80 */
320 env
->regs
[R_EAX
] = do_syscall(env
,
332 /* linux syscall from syscall instruction */
333 env
->regs
[R_EAX
] = do_syscall(env
,
342 env
->eip
= env
->exception_next_eip
;
347 info
.si_signo
= SIGBUS
;
349 info
.si_code
= TARGET_SI_KERNEL
;
350 info
._sifields
._sigfault
._addr
= 0;
351 queue_signal(env
, info
.si_signo
, &info
);
354 /* XXX: potential problem if ABI32 */
355 #ifndef TARGET_X86_64
356 if (env
->eflags
& VM_MASK
) {
357 handle_vm86_fault(env
);
361 info
.si_signo
= SIGSEGV
;
363 info
.si_code
= TARGET_SI_KERNEL
;
364 info
._sifields
._sigfault
._addr
= 0;
365 queue_signal(env
, info
.si_signo
, &info
);
369 info
.si_signo
= SIGSEGV
;
371 if (!(env
->error_code
& 1))
372 info
.si_code
= TARGET_SEGV_MAPERR
;
374 info
.si_code
= TARGET_SEGV_ACCERR
;
375 info
._sifields
._sigfault
._addr
= env
->cr
[2];
376 queue_signal(env
, info
.si_signo
, &info
);
379 #ifndef TARGET_X86_64
380 if (env
->eflags
& VM_MASK
) {
381 handle_vm86_trap(env
, trapnr
);
385 /* division by zero */
386 info
.si_signo
= SIGFPE
;
388 info
.si_code
= TARGET_FPE_INTDIV
;
389 info
._sifields
._sigfault
._addr
= env
->eip
;
390 queue_signal(env
, info
.si_signo
, &info
);
395 #ifndef TARGET_X86_64
396 if (env
->eflags
& VM_MASK
) {
397 handle_vm86_trap(env
, trapnr
);
401 info
.si_signo
= SIGTRAP
;
403 if (trapnr
== EXCP01_DB
) {
404 info
.si_code
= TARGET_TRAP_BRKPT
;
405 info
._sifields
._sigfault
._addr
= env
->eip
;
407 info
.si_code
= TARGET_SI_KERNEL
;
408 info
._sifields
._sigfault
._addr
= 0;
410 queue_signal(env
, info
.si_signo
, &info
);
415 #ifndef TARGET_X86_64
416 if (env
->eflags
& VM_MASK
) {
417 handle_vm86_trap(env
, trapnr
);
421 info
.si_signo
= SIGSEGV
;
423 info
.si_code
= TARGET_SI_KERNEL
;
424 info
._sifields
._sigfault
._addr
= 0;
425 queue_signal(env
, info
.si_signo
, &info
);
429 info
.si_signo
= SIGILL
;
431 info
.si_code
= TARGET_ILL_ILLOPN
;
432 info
._sifields
._sigfault
._addr
= env
->eip
;
433 queue_signal(env
, info
.si_signo
, &info
);
436 /* just indicate that signals should be handled asap */
442 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
447 info
.si_code
= TARGET_TRAP_BRKPT
;
448 queue_signal(env
, info
.si_signo
, &info
);
453 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
454 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
458 process_pending_signals(env
);
465 #define get_user_code_u32(x, gaddr, doswap) \
466 ({ abi_long __r = get_user_u32((x), (gaddr)); \
467 if (!__r && (doswap)) { \
473 #define get_user_code_u16(x, gaddr, doswap) \
474 ({ abi_long __r = get_user_u16((x), (gaddr)); \
475 if (!__r && (doswap)) { \
482 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
484 * r0 = pointer to oldval
485 * r1 = pointer to newval
486 * r2 = pointer to target value
489 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
490 * C set if *ptr was changed, clear if no exchange happened
492 * Note segv's in kernel helpers are a bit tricky, we can set the
493 * data address sensibly but the PC address is just the entry point.
495 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
497 uint64_t oldval
, newval
, val
;
499 target_siginfo_t info
;
501 /* Based on the 32 bit code in do_kernel_trap */
503 /* XXX: This only works between threads, not between processes.
504 It's probably possible to implement this with native host
505 operations. However things like ldrex/strex are much harder so
506 there's not much point trying. */
508 cpsr
= cpsr_read(env
);
511 if (get_user_u64(oldval
, env
->regs
[0])) {
512 env
->cp15
.c6_data
= env
->regs
[0];
516 if (get_user_u64(newval
, env
->regs
[1])) {
517 env
->cp15
.c6_data
= env
->regs
[1];
521 if (get_user_u64(val
, addr
)) {
522 env
->cp15
.c6_data
= addr
;
529 if (put_user_u64(val
, addr
)) {
530 env
->cp15
.c6_data
= addr
;
540 cpsr_write(env
, cpsr
, CPSR_C
);
546 /* We get the PC of the entry address - which is as good as anything,
547 on a real kernel what you get depends on which mode it uses. */
548 info
.si_signo
= SIGSEGV
;
550 /* XXX: check env->error_code */
551 info
.si_code
= TARGET_SEGV_MAPERR
;
552 info
._sifields
._sigfault
._addr
= env
->cp15
.c6_data
;
553 queue_signal(env
, info
.si_signo
, &info
);
558 /* Handle a jump to the kernel code page. */
560 do_kernel_trap(CPUARMState
*env
)
566 switch (env
->regs
[15]) {
567 case 0xffff0fa0: /* __kernel_memory_barrier */
568 /* ??? No-op. Will need to do better for SMP. */
570 case 0xffff0fc0: /* __kernel_cmpxchg */
571 /* XXX: This only works between threads, not between processes.
572 It's probably possible to implement this with native host
573 operations. However things like ldrex/strex are much harder so
574 there's not much point trying. */
576 cpsr
= cpsr_read(env
);
578 /* FIXME: This should SEGV if the access fails. */
579 if (get_user_u32(val
, addr
))
581 if (val
== env
->regs
[0]) {
583 /* FIXME: Check for segfaults. */
584 put_user_u32(val
, addr
);
591 cpsr_write(env
, cpsr
, CPSR_C
);
594 case 0xffff0fe0: /* __kernel_get_tls */
595 env
->regs
[0] = env
->cp15
.c13_tls2
;
597 case 0xffff0f60: /* __kernel_cmpxchg64 */
598 arm_kernel_cmpxchg64_helper(env
);
604 /* Jump back to the caller. */
605 addr
= env
->regs
[14];
610 env
->regs
[15] = addr
;
615 static int do_strex(CPUARMState
*env
)
623 addr
= env
->exclusive_addr
;
624 if (addr
!= env
->exclusive_test
) {
627 size
= env
->exclusive_info
& 0xf;
630 segv
= get_user_u8(val
, addr
);
633 segv
= get_user_u16(val
, addr
);
637 segv
= get_user_u32(val
, addr
);
643 env
->cp15
.c6_data
= addr
;
646 if (val
!= env
->exclusive_val
) {
650 segv
= get_user_u32(val
, addr
+ 4);
652 env
->cp15
.c6_data
= addr
+ 4;
655 if (val
!= env
->exclusive_high
) {
659 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
662 segv
= put_user_u8(val
, addr
);
665 segv
= put_user_u16(val
, addr
);
669 segv
= put_user_u32(val
, addr
);
673 env
->cp15
.c6_data
= addr
;
677 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
678 segv
= put_user_u32(val
, addr
+ 4);
680 env
->cp15
.c6_data
= addr
+ 4;
687 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
693 void cpu_loop(CPUARMState
*env
)
696 unsigned int n
, insn
;
697 target_siginfo_t info
;
702 trapnr
= cpu_arm_exec(env
);
707 TaskState
*ts
= env
->opaque
;
711 /* we handle the FPU emulation here, as Linux */
712 /* we get the opcode */
713 /* FIXME - what to do if get_user() fails? */
714 get_user_code_u32(opcode
, env
->regs
[15], env
->bswap_code
);
716 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
717 if (rc
== 0) { /* illegal instruction */
718 info
.si_signo
= SIGILL
;
720 info
.si_code
= TARGET_ILL_ILLOPN
;
721 info
._sifields
._sigfault
._addr
= env
->regs
[15];
722 queue_signal(env
, info
.si_signo
, &info
);
723 } else if (rc
< 0) { /* FP exception */
726 /* translate softfloat flags to FPSR flags */
727 if (-rc
& float_flag_invalid
)
729 if (-rc
& float_flag_divbyzero
)
731 if (-rc
& float_flag_overflow
)
733 if (-rc
& float_flag_underflow
)
735 if (-rc
& float_flag_inexact
)
738 FPSR fpsr
= ts
->fpa
.fpsr
;
739 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
741 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
742 info
.si_signo
= SIGFPE
;
745 /* ordered by priority, least first */
746 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
747 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
748 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
749 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
750 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
752 info
._sifields
._sigfault
._addr
= env
->regs
[15];
753 queue_signal(env
, info
.si_signo
, &info
);
758 /* accumulate unenabled exceptions */
759 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
761 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
763 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
765 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
767 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
770 } else { /* everything OK */
781 if (trapnr
== EXCP_BKPT
) {
783 /* FIXME - what to do if get_user() fails? */
784 get_user_code_u16(insn
, env
->regs
[15], env
->bswap_code
);
788 /* FIXME - what to do if get_user() fails? */
789 get_user_code_u32(insn
, env
->regs
[15], env
->bswap_code
);
790 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
795 /* FIXME - what to do if get_user() fails? */
796 get_user_code_u16(insn
, env
->regs
[15] - 2,
800 /* FIXME - what to do if get_user() fails? */
801 get_user_code_u32(insn
, env
->regs
[15] - 4,
807 if (n
== ARM_NR_cacheflush
) {
809 } else if (n
== ARM_NR_semihosting
810 || n
== ARM_NR_thumb_semihosting
) {
811 env
->regs
[0] = do_arm_semihosting (env
);
812 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
814 if (env
->thumb
|| n
== 0) {
817 n
-= ARM_SYSCALL_BASE
;
820 if ( n
> ARM_NR_BASE
) {
822 case ARM_NR_cacheflush
:
826 cpu_set_tls(env
, env
->regs
[0]);
830 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
832 env
->regs
[0] = -TARGET_ENOSYS
;
836 env
->regs
[0] = do_syscall(env
,
852 /* just indicate that signals should be handled asap */
854 case EXCP_PREFETCH_ABORT
:
855 addr
= env
->cp15
.c6_insn
;
857 case EXCP_DATA_ABORT
:
858 addr
= env
->cp15
.c6_data
;
861 info
.si_signo
= SIGSEGV
;
863 /* XXX: check env->error_code */
864 info
.si_code
= TARGET_SEGV_MAPERR
;
865 info
._sifields
._sigfault
._addr
= addr
;
866 queue_signal(env
, info
.si_signo
, &info
);
873 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
878 info
.si_code
= TARGET_TRAP_BRKPT
;
879 queue_signal(env
, info
.si_signo
, &info
);
883 case EXCP_KERNEL_TRAP
:
884 if (do_kernel_trap(env
))
889 addr
= env
->cp15
.c6_data
;
895 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
897 cpu_dump_state(env
, stderr
, fprintf
, 0);
900 process_pending_signals(env
);
906 #ifdef TARGET_UNICORE32
908 void cpu_loop(CPUUniCore32State
*env
)
911 unsigned int n
, insn
;
912 target_siginfo_t info
;
916 trapnr
= uc32_cpu_exec(env
);
922 get_user_u32(insn
, env
->regs
[31] - 4);
925 if (n
>= UC32_SYSCALL_BASE
) {
927 n
-= UC32_SYSCALL_BASE
;
928 if (n
== UC32_SYSCALL_NR_set_tls
) {
929 cpu_set_tls(env
, env
->regs
[0]);
932 env
->regs
[0] = do_syscall(env
,
947 case UC32_EXCP_DTRAP
:
948 case UC32_EXCP_ITRAP
:
949 info
.si_signo
= SIGSEGV
;
951 /* XXX: check env->error_code */
952 info
.si_code
= TARGET_SEGV_MAPERR
;
953 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
954 queue_signal(env
, info
.si_signo
, &info
);
957 /* just indicate that signals should be handled asap */
963 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
967 info
.si_code
= TARGET_TRAP_BRKPT
;
968 queue_signal(env
, info
.si_signo
, &info
);
975 process_pending_signals(env
);
979 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
980 cpu_dump_state(env
, stderr
, fprintf
, 0);
986 #define SPARC64_STACK_BIAS 2047
990 /* WARNING: dealing with register windows _is_ complicated. More info
991 can be found at http://www.sics.se/~psm/sparcstack.html */
992 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
994 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
995 /* wrap handling : if cwp is on the last window, then we use the
996 registers 'after' the end */
997 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
998 index
+= 16 * env
->nwindows
;
1002 /* save the register window 'cwp1' */
1003 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
1008 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1009 #ifdef TARGET_SPARC64
1011 sp_ptr
+= SPARC64_STACK_BIAS
;
1013 #if defined(DEBUG_WIN)
1014 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1017 for(i
= 0; i
< 16; i
++) {
1018 /* FIXME - what to do if put_user() fails? */
1019 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1020 sp_ptr
+= sizeof(abi_ulong
);
1024 static void save_window(CPUSPARCState
*env
)
1026 #ifndef TARGET_SPARC64
1027 unsigned int new_wim
;
1028 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1029 ((1LL << env
->nwindows
) - 1);
1030 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1033 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1039 static void restore_window(CPUSPARCState
*env
)
1041 #ifndef TARGET_SPARC64
1042 unsigned int new_wim
;
1044 unsigned int i
, cwp1
;
1047 #ifndef TARGET_SPARC64
1048 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1049 ((1LL << env
->nwindows
) - 1);
1052 /* restore the invalid window */
1053 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1054 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1055 #ifdef TARGET_SPARC64
1057 sp_ptr
+= SPARC64_STACK_BIAS
;
1059 #if defined(DEBUG_WIN)
1060 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1063 for(i
= 0; i
< 16; i
++) {
1064 /* FIXME - what to do if get_user() fails? */
1065 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1066 sp_ptr
+= sizeof(abi_ulong
);
1068 #ifdef TARGET_SPARC64
1070 if (env
->cleanwin
< env
->nwindows
- 1)
1078 static void flush_windows(CPUSPARCState
*env
)
1084 /* if restore would invoke restore_window(), then we can stop */
1085 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1086 #ifndef TARGET_SPARC64
1087 if (env
->wim
& (1 << cwp1
))
1090 if (env
->canrestore
== 0)
1095 save_window_offset(env
, cwp1
);
1098 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1099 #ifndef TARGET_SPARC64
1100 /* set wim so that restore will reload the registers */
1101 env
->wim
= 1 << cwp1
;
1103 #if defined(DEBUG_WIN)
1104 printf("flush_windows: nb=%d\n", offset
- 1);
1108 void cpu_loop (CPUSPARCState
*env
)
1112 target_siginfo_t info
;
1115 trapnr
= cpu_sparc_exec (env
);
1117 /* Compute PSR before exposing state. */
1118 if (env
->cc_op
!= CC_OP_FLAGS
) {
1123 #ifndef TARGET_SPARC64
1130 ret
= do_syscall (env
, env
->gregs
[1],
1131 env
->regwptr
[0], env
->regwptr
[1],
1132 env
->regwptr
[2], env
->regwptr
[3],
1133 env
->regwptr
[4], env
->regwptr
[5],
1135 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1136 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1137 env
->xcc
|= PSR_CARRY
;
1139 env
->psr
|= PSR_CARRY
;
1143 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1144 env
->xcc
&= ~PSR_CARRY
;
1146 env
->psr
&= ~PSR_CARRY
;
1149 env
->regwptr
[0] = ret
;
1150 /* next instruction */
1152 env
->npc
= env
->npc
+ 4;
1154 case 0x83: /* flush windows */
1159 /* next instruction */
1161 env
->npc
= env
->npc
+ 4;
1163 #ifndef TARGET_SPARC64
1164 case TT_WIN_OVF
: /* window overflow */
1167 case TT_WIN_UNF
: /* window underflow */
1168 restore_window(env
);
1173 info
.si_signo
= TARGET_SIGSEGV
;
1175 /* XXX: check env->error_code */
1176 info
.si_code
= TARGET_SEGV_MAPERR
;
1177 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1178 queue_signal(env
, info
.si_signo
, &info
);
1182 case TT_SPILL
: /* window overflow */
1185 case TT_FILL
: /* window underflow */
1186 restore_window(env
);
1191 info
.si_signo
= TARGET_SIGSEGV
;
1193 /* XXX: check env->error_code */
1194 info
.si_code
= TARGET_SEGV_MAPERR
;
1195 if (trapnr
== TT_DFAULT
)
1196 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1198 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1199 queue_signal(env
, info
.si_signo
, &info
);
1202 #ifndef TARGET_ABI32
1205 sparc64_get_context(env
);
1209 sparc64_set_context(env
);
1213 case EXCP_INTERRUPT
:
1214 /* just indicate that signals should be handled asap */
1218 info
.si_signo
= TARGET_SIGILL
;
1220 info
.si_code
= TARGET_ILL_ILLOPC
;
1221 info
._sifields
._sigfault
._addr
= env
->pc
;
1222 queue_signal(env
, info
.si_signo
, &info
);
1229 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1232 info
.si_signo
= sig
;
1234 info
.si_code
= TARGET_TRAP_BRKPT
;
1235 queue_signal(env
, info
.si_signo
, &info
);
1240 printf ("Unhandled trap: 0x%x\n", trapnr
);
1241 cpu_dump_state(env
, stderr
, fprintf
, 0);
1244 process_pending_signals (env
);
1251 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1257 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1259 return cpu_ppc_get_tb(env
);
1262 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1264 return cpu_ppc_get_tb(env
) >> 32;
1267 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1269 return cpu_ppc_get_tb(env
);
1272 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1274 return cpu_ppc_get_tb(env
) >> 32;
1277 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1278 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1280 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1282 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1285 /* XXX: to be fixed */
1286 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1291 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1296 #define EXCP_DUMP(env, fmt, ...) \
1298 fprintf(stderr, fmt , ## __VA_ARGS__); \
1299 cpu_dump_state(env, stderr, fprintf, 0); \
1300 qemu_log(fmt, ## __VA_ARGS__); \
1301 if (qemu_log_enabled()) { \
1302 log_cpu_state(env, 0); \
1306 static int do_store_exclusive(CPUPPCState
*env
)
1309 target_ulong page_addr
;
1314 addr
= env
->reserve_ea
;
1315 page_addr
= addr
& TARGET_PAGE_MASK
;
1318 flags
= page_get_flags(page_addr
);
1319 if ((flags
& PAGE_READ
) == 0) {
1322 int reg
= env
->reserve_info
& 0x1f;
1323 int size
= (env
->reserve_info
>> 5) & 0xf;
1326 if (addr
== env
->reserve_addr
) {
1328 case 1: segv
= get_user_u8(val
, addr
); break;
1329 case 2: segv
= get_user_u16(val
, addr
); break;
1330 case 4: segv
= get_user_u32(val
, addr
); break;
1331 #if defined(TARGET_PPC64)
1332 case 8: segv
= get_user_u64(val
, addr
); break;
1336 if (!segv
&& val
== env
->reserve_val
) {
1337 val
= env
->gpr
[reg
];
1339 case 1: segv
= put_user_u8(val
, addr
); break;
1340 case 2: segv
= put_user_u16(val
, addr
); break;
1341 case 4: segv
= put_user_u32(val
, addr
); break;
1342 #if defined(TARGET_PPC64)
1343 case 8: segv
= put_user_u64(val
, addr
); break;
1352 env
->crf
[0] = (stored
<< 1) | xer_so
;
1353 env
->reserve_addr
= (target_ulong
)-1;
1363 void cpu_loop(CPUPPCState
*env
)
1365 target_siginfo_t info
;
1370 cpu_exec_start(env
);
1371 trapnr
= cpu_ppc_exec(env
);
1374 case POWERPC_EXCP_NONE
:
1377 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1378 cpu_abort(env
, "Critical interrupt while in user mode. "
1381 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1382 cpu_abort(env
, "Machine check exception while in user mode. "
1385 case POWERPC_EXCP_DSI
: /* Data storage exception */
1386 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1388 /* XXX: check this. Seems bugged */
1389 switch (env
->error_code
& 0xFF000000) {
1391 info
.si_signo
= TARGET_SIGSEGV
;
1393 info
.si_code
= TARGET_SEGV_MAPERR
;
1396 info
.si_signo
= TARGET_SIGILL
;
1398 info
.si_code
= TARGET_ILL_ILLADR
;
1401 info
.si_signo
= TARGET_SIGSEGV
;
1403 info
.si_code
= TARGET_SEGV_ACCERR
;
1406 /* Let's send a regular segfault... */
1407 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1409 info
.si_signo
= TARGET_SIGSEGV
;
1411 info
.si_code
= TARGET_SEGV_MAPERR
;
1414 info
._sifields
._sigfault
._addr
= env
->nip
;
1415 queue_signal(env
, info
.si_signo
, &info
);
1417 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1418 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1419 "\n", env
->spr
[SPR_SRR0
]);
1420 /* XXX: check this */
1421 switch (env
->error_code
& 0xFF000000) {
1423 info
.si_signo
= TARGET_SIGSEGV
;
1425 info
.si_code
= TARGET_SEGV_MAPERR
;
1429 info
.si_signo
= TARGET_SIGSEGV
;
1431 info
.si_code
= TARGET_SEGV_ACCERR
;
1434 /* Let's send a regular segfault... */
1435 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1437 info
.si_signo
= TARGET_SIGSEGV
;
1439 info
.si_code
= TARGET_SEGV_MAPERR
;
1442 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1443 queue_signal(env
, info
.si_signo
, &info
);
1445 case POWERPC_EXCP_EXTERNAL
: /* External input */
1446 cpu_abort(env
, "External interrupt while in user mode. "
1449 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1450 EXCP_DUMP(env
, "Unaligned memory access\n");
1451 /* XXX: check this */
1452 info
.si_signo
= TARGET_SIGBUS
;
1454 info
.si_code
= TARGET_BUS_ADRALN
;
1455 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1456 queue_signal(env
, info
.si_signo
, &info
);
1458 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1459 /* XXX: check this */
1460 switch (env
->error_code
& ~0xF) {
1461 case POWERPC_EXCP_FP
:
1462 EXCP_DUMP(env
, "Floating point program exception\n");
1463 info
.si_signo
= TARGET_SIGFPE
;
1465 switch (env
->error_code
& 0xF) {
1466 case POWERPC_EXCP_FP_OX
:
1467 info
.si_code
= TARGET_FPE_FLTOVF
;
1469 case POWERPC_EXCP_FP_UX
:
1470 info
.si_code
= TARGET_FPE_FLTUND
;
1472 case POWERPC_EXCP_FP_ZX
:
1473 case POWERPC_EXCP_FP_VXZDZ
:
1474 info
.si_code
= TARGET_FPE_FLTDIV
;
1476 case POWERPC_EXCP_FP_XX
:
1477 info
.si_code
= TARGET_FPE_FLTRES
;
1479 case POWERPC_EXCP_FP_VXSOFT
:
1480 info
.si_code
= TARGET_FPE_FLTINV
;
1482 case POWERPC_EXCP_FP_VXSNAN
:
1483 case POWERPC_EXCP_FP_VXISI
:
1484 case POWERPC_EXCP_FP_VXIDI
:
1485 case POWERPC_EXCP_FP_VXIMZ
:
1486 case POWERPC_EXCP_FP_VXVC
:
1487 case POWERPC_EXCP_FP_VXSQRT
:
1488 case POWERPC_EXCP_FP_VXCVI
:
1489 info
.si_code
= TARGET_FPE_FLTSUB
;
1492 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1497 case POWERPC_EXCP_INVAL
:
1498 EXCP_DUMP(env
, "Invalid instruction\n");
1499 info
.si_signo
= TARGET_SIGILL
;
1501 switch (env
->error_code
& 0xF) {
1502 case POWERPC_EXCP_INVAL_INVAL
:
1503 info
.si_code
= TARGET_ILL_ILLOPC
;
1505 case POWERPC_EXCP_INVAL_LSWX
:
1506 info
.si_code
= TARGET_ILL_ILLOPN
;
1508 case POWERPC_EXCP_INVAL_SPR
:
1509 info
.si_code
= TARGET_ILL_PRVREG
;
1511 case POWERPC_EXCP_INVAL_FP
:
1512 info
.si_code
= TARGET_ILL_COPROC
;
1515 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1516 env
->error_code
& 0xF);
1517 info
.si_code
= TARGET_ILL_ILLADR
;
1521 case POWERPC_EXCP_PRIV
:
1522 EXCP_DUMP(env
, "Privilege violation\n");
1523 info
.si_signo
= TARGET_SIGILL
;
1525 switch (env
->error_code
& 0xF) {
1526 case POWERPC_EXCP_PRIV_OPC
:
1527 info
.si_code
= TARGET_ILL_PRVOPC
;
1529 case POWERPC_EXCP_PRIV_REG
:
1530 info
.si_code
= TARGET_ILL_PRVREG
;
1533 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1534 env
->error_code
& 0xF);
1535 info
.si_code
= TARGET_ILL_PRVOPC
;
1539 case POWERPC_EXCP_TRAP
:
1540 cpu_abort(env
, "Tried to call a TRAP\n");
1543 /* Should not happen ! */
1544 cpu_abort(env
, "Unknown program exception (%02x)\n",
1548 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1549 queue_signal(env
, info
.si_signo
, &info
);
1551 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1552 EXCP_DUMP(env
, "No floating point allowed\n");
1553 info
.si_signo
= TARGET_SIGILL
;
1555 info
.si_code
= TARGET_ILL_COPROC
;
1556 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1557 queue_signal(env
, info
.si_signo
, &info
);
1559 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1560 cpu_abort(env
, "Syscall exception while in user mode. "
1563 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1564 EXCP_DUMP(env
, "No APU instruction allowed\n");
1565 info
.si_signo
= TARGET_SIGILL
;
1567 info
.si_code
= TARGET_ILL_COPROC
;
1568 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1569 queue_signal(env
, info
.si_signo
, &info
);
1571 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1572 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1575 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1576 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1579 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1580 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1583 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1584 cpu_abort(env
, "Data TLB exception while in user mode. "
1587 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1588 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1591 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1592 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1593 info
.si_signo
= TARGET_SIGILL
;
1595 info
.si_code
= TARGET_ILL_COPROC
;
1596 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1597 queue_signal(env
, info
.si_signo
, &info
);
1599 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1600 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1602 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1603 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1605 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1606 cpu_abort(env
, "Performance monitor exception not handled\n");
1608 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1609 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1612 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1613 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1616 case POWERPC_EXCP_RESET
: /* System reset exception */
1617 cpu_abort(env
, "Reset interrupt while in user mode. "
1620 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1621 cpu_abort(env
, "Data segment exception while in user mode. "
1624 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1625 cpu_abort(env
, "Instruction segment exception "
1626 "while in user mode. Aborting\n");
1628 /* PowerPC 64 with hypervisor mode support */
1629 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1630 cpu_abort(env
, "Hypervisor decrementer interrupt "
1631 "while in user mode. Aborting\n");
1633 case POWERPC_EXCP_TRACE
: /* Trace exception */
1635 * we use this exception to emulate step-by-step execution mode.
1638 /* PowerPC 64 with hypervisor mode support */
1639 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1640 cpu_abort(env
, "Hypervisor data storage exception "
1641 "while in user mode. Aborting\n");
1643 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1644 cpu_abort(env
, "Hypervisor instruction storage exception "
1645 "while in user mode. Aborting\n");
1647 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1648 cpu_abort(env
, "Hypervisor data segment exception "
1649 "while in user mode. Aborting\n");
1651 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1652 cpu_abort(env
, "Hypervisor instruction segment exception "
1653 "while in user mode. Aborting\n");
1655 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1656 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1657 info
.si_signo
= TARGET_SIGILL
;
1659 info
.si_code
= TARGET_ILL_COPROC
;
1660 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1661 queue_signal(env
, info
.si_signo
, &info
);
1663 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1664 cpu_abort(env
, "Programmable interval timer interrupt "
1665 "while in user mode. Aborting\n");
1667 case POWERPC_EXCP_IO
: /* IO error exception */
1668 cpu_abort(env
, "IO error exception while in user mode. "
1671 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1672 cpu_abort(env
, "Run mode exception while in user mode. "
1675 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1676 cpu_abort(env
, "Emulation trap exception not handled\n");
1678 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1679 cpu_abort(env
, "Instruction fetch TLB exception "
1680 "while in user-mode. Aborting");
1682 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1683 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1686 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1687 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1690 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1691 cpu_abort(env
, "Floating-point assist exception not handled\n");
1693 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1694 cpu_abort(env
, "Instruction address breakpoint exception "
1697 case POWERPC_EXCP_SMI
: /* System management interrupt */
1698 cpu_abort(env
, "System management interrupt while in user mode. "
1701 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1702 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1705 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1706 cpu_abort(env
, "Performance monitor exception not handled\n");
1708 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1709 cpu_abort(env
, "Vector assist exception not handled\n");
1711 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1712 cpu_abort(env
, "Soft patch exception not handled\n");
1714 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1715 cpu_abort(env
, "Maintenance exception while in user mode. "
1718 case POWERPC_EXCP_STOP
: /* stop translation */
1719 /* We did invalidate the instruction cache. Go on */
1721 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1722 /* We just stopped because of a branch. Go on */
1724 case POWERPC_EXCP_SYSCALL_USER
:
1725 /* system call in user-mode emulation */
1727 * PPC ABI uses overflow flag in cr0 to signal an error
1730 env
->crf
[0] &= ~0x1;
1731 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1732 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1734 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1735 /* Returning from a successful sigreturn syscall.
1736 Avoid corrupting register state. */
1739 if (ret
> (target_ulong
)(-515)) {
1745 case POWERPC_EXCP_STCX
:
1746 if (do_store_exclusive(env
)) {
1747 info
.si_signo
= TARGET_SIGSEGV
;
1749 info
.si_code
= TARGET_SEGV_MAPERR
;
1750 info
._sifields
._sigfault
._addr
= env
->nip
;
1751 queue_signal(env
, info
.si_signo
, &info
);
1758 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1760 info
.si_signo
= sig
;
1762 info
.si_code
= TARGET_TRAP_BRKPT
;
1763 queue_signal(env
, info
.si_signo
, &info
);
1767 case EXCP_INTERRUPT
:
1768 /* just indicate that signals should be handled asap */
1771 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1774 process_pending_signals(env
);
1781 #define MIPS_SYS(name, args) args,
1783 static const uint8_t mips_syscall_args
[] = {
1784 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1785 MIPS_SYS(sys_exit
, 1)
1786 MIPS_SYS(sys_fork
, 0)
1787 MIPS_SYS(sys_read
, 3)
1788 MIPS_SYS(sys_write
, 3)
1789 MIPS_SYS(sys_open
, 3) /* 4005 */
1790 MIPS_SYS(sys_close
, 1)
1791 MIPS_SYS(sys_waitpid
, 3)
1792 MIPS_SYS(sys_creat
, 2)
1793 MIPS_SYS(sys_link
, 2)
1794 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1795 MIPS_SYS(sys_execve
, 0)
1796 MIPS_SYS(sys_chdir
, 1)
1797 MIPS_SYS(sys_time
, 1)
1798 MIPS_SYS(sys_mknod
, 3)
1799 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1800 MIPS_SYS(sys_lchown
, 3)
1801 MIPS_SYS(sys_ni_syscall
, 0)
1802 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1803 MIPS_SYS(sys_lseek
, 3)
1804 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1805 MIPS_SYS(sys_mount
, 5)
1806 MIPS_SYS(sys_oldumount
, 1)
1807 MIPS_SYS(sys_setuid
, 1)
1808 MIPS_SYS(sys_getuid
, 0)
1809 MIPS_SYS(sys_stime
, 1) /* 4025 */
1810 MIPS_SYS(sys_ptrace
, 4)
1811 MIPS_SYS(sys_alarm
, 1)
1812 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1813 MIPS_SYS(sys_pause
, 0)
1814 MIPS_SYS(sys_utime
, 2) /* 4030 */
1815 MIPS_SYS(sys_ni_syscall
, 0)
1816 MIPS_SYS(sys_ni_syscall
, 0)
1817 MIPS_SYS(sys_access
, 2)
1818 MIPS_SYS(sys_nice
, 1)
1819 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1820 MIPS_SYS(sys_sync
, 0)
1821 MIPS_SYS(sys_kill
, 2)
1822 MIPS_SYS(sys_rename
, 2)
1823 MIPS_SYS(sys_mkdir
, 2)
1824 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1825 MIPS_SYS(sys_dup
, 1)
1826 MIPS_SYS(sys_pipe
, 0)
1827 MIPS_SYS(sys_times
, 1)
1828 MIPS_SYS(sys_ni_syscall
, 0)
1829 MIPS_SYS(sys_brk
, 1) /* 4045 */
1830 MIPS_SYS(sys_setgid
, 1)
1831 MIPS_SYS(sys_getgid
, 0)
1832 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1833 MIPS_SYS(sys_geteuid
, 0)
1834 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1835 MIPS_SYS(sys_acct
, 0)
1836 MIPS_SYS(sys_umount
, 2)
1837 MIPS_SYS(sys_ni_syscall
, 0)
1838 MIPS_SYS(sys_ioctl
, 3)
1839 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1840 MIPS_SYS(sys_ni_syscall
, 2)
1841 MIPS_SYS(sys_setpgid
, 2)
1842 MIPS_SYS(sys_ni_syscall
, 0)
1843 MIPS_SYS(sys_olduname
, 1)
1844 MIPS_SYS(sys_umask
, 1) /* 4060 */
1845 MIPS_SYS(sys_chroot
, 1)
1846 MIPS_SYS(sys_ustat
, 2)
1847 MIPS_SYS(sys_dup2
, 2)
1848 MIPS_SYS(sys_getppid
, 0)
1849 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1850 MIPS_SYS(sys_setsid
, 0)
1851 MIPS_SYS(sys_sigaction
, 3)
1852 MIPS_SYS(sys_sgetmask
, 0)
1853 MIPS_SYS(sys_ssetmask
, 1)
1854 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1855 MIPS_SYS(sys_setregid
, 2)
1856 MIPS_SYS(sys_sigsuspend
, 0)
1857 MIPS_SYS(sys_sigpending
, 1)
1858 MIPS_SYS(sys_sethostname
, 2)
1859 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1860 MIPS_SYS(sys_getrlimit
, 2)
1861 MIPS_SYS(sys_getrusage
, 2)
1862 MIPS_SYS(sys_gettimeofday
, 2)
1863 MIPS_SYS(sys_settimeofday
, 2)
1864 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1865 MIPS_SYS(sys_setgroups
, 2)
1866 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1867 MIPS_SYS(sys_symlink
, 2)
1868 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1869 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1870 MIPS_SYS(sys_uselib
, 1)
1871 MIPS_SYS(sys_swapon
, 2)
1872 MIPS_SYS(sys_reboot
, 3)
1873 MIPS_SYS(old_readdir
, 3)
1874 MIPS_SYS(old_mmap
, 6) /* 4090 */
1875 MIPS_SYS(sys_munmap
, 2)
1876 MIPS_SYS(sys_truncate
, 2)
1877 MIPS_SYS(sys_ftruncate
, 2)
1878 MIPS_SYS(sys_fchmod
, 2)
1879 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1880 MIPS_SYS(sys_getpriority
, 2)
1881 MIPS_SYS(sys_setpriority
, 3)
1882 MIPS_SYS(sys_ni_syscall
, 0)
1883 MIPS_SYS(sys_statfs
, 2)
1884 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1885 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1886 MIPS_SYS(sys_socketcall
, 2)
1887 MIPS_SYS(sys_syslog
, 3)
1888 MIPS_SYS(sys_setitimer
, 3)
1889 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1890 MIPS_SYS(sys_newstat
, 2)
1891 MIPS_SYS(sys_newlstat
, 2)
1892 MIPS_SYS(sys_newfstat
, 2)
1893 MIPS_SYS(sys_uname
, 1)
1894 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1895 MIPS_SYS(sys_vhangup
, 0)
1896 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1897 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1898 MIPS_SYS(sys_wait4
, 4)
1899 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1900 MIPS_SYS(sys_sysinfo
, 1)
1901 MIPS_SYS(sys_ipc
, 6)
1902 MIPS_SYS(sys_fsync
, 1)
1903 MIPS_SYS(sys_sigreturn
, 0)
1904 MIPS_SYS(sys_clone
, 6) /* 4120 */
1905 MIPS_SYS(sys_setdomainname
, 2)
1906 MIPS_SYS(sys_newuname
, 1)
1907 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1908 MIPS_SYS(sys_adjtimex
, 1)
1909 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1910 MIPS_SYS(sys_sigprocmask
, 3)
1911 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1912 MIPS_SYS(sys_init_module
, 5)
1913 MIPS_SYS(sys_delete_module
, 1)
1914 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1915 MIPS_SYS(sys_quotactl
, 0)
1916 MIPS_SYS(sys_getpgid
, 1)
1917 MIPS_SYS(sys_fchdir
, 1)
1918 MIPS_SYS(sys_bdflush
, 2)
1919 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1920 MIPS_SYS(sys_personality
, 1)
1921 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1922 MIPS_SYS(sys_setfsuid
, 1)
1923 MIPS_SYS(sys_setfsgid
, 1)
1924 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1925 MIPS_SYS(sys_getdents
, 3)
1926 MIPS_SYS(sys_select
, 5)
1927 MIPS_SYS(sys_flock
, 2)
1928 MIPS_SYS(sys_msync
, 3)
1929 MIPS_SYS(sys_readv
, 3) /* 4145 */
1930 MIPS_SYS(sys_writev
, 3)
1931 MIPS_SYS(sys_cacheflush
, 3)
1932 MIPS_SYS(sys_cachectl
, 3)
1933 MIPS_SYS(sys_sysmips
, 4)
1934 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1935 MIPS_SYS(sys_getsid
, 1)
1936 MIPS_SYS(sys_fdatasync
, 0)
1937 MIPS_SYS(sys_sysctl
, 1)
1938 MIPS_SYS(sys_mlock
, 2)
1939 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1940 MIPS_SYS(sys_mlockall
, 1)
1941 MIPS_SYS(sys_munlockall
, 0)
1942 MIPS_SYS(sys_sched_setparam
, 2)
1943 MIPS_SYS(sys_sched_getparam
, 2)
1944 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1945 MIPS_SYS(sys_sched_getscheduler
, 1)
1946 MIPS_SYS(sys_sched_yield
, 0)
1947 MIPS_SYS(sys_sched_get_priority_max
, 1)
1948 MIPS_SYS(sys_sched_get_priority_min
, 1)
1949 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1950 MIPS_SYS(sys_nanosleep
, 2)
1951 MIPS_SYS(sys_mremap
, 4)
1952 MIPS_SYS(sys_accept
, 3)
1953 MIPS_SYS(sys_bind
, 3)
1954 MIPS_SYS(sys_connect
, 3) /* 4170 */
1955 MIPS_SYS(sys_getpeername
, 3)
1956 MIPS_SYS(sys_getsockname
, 3)
1957 MIPS_SYS(sys_getsockopt
, 5)
1958 MIPS_SYS(sys_listen
, 2)
1959 MIPS_SYS(sys_recv
, 4) /* 4175 */
1960 MIPS_SYS(sys_recvfrom
, 6)
1961 MIPS_SYS(sys_recvmsg
, 3)
1962 MIPS_SYS(sys_send
, 4)
1963 MIPS_SYS(sys_sendmsg
, 3)
1964 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1965 MIPS_SYS(sys_setsockopt
, 5)
1966 MIPS_SYS(sys_shutdown
, 2)
1967 MIPS_SYS(sys_socket
, 3)
1968 MIPS_SYS(sys_socketpair
, 4)
1969 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1970 MIPS_SYS(sys_getresuid
, 3)
1971 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1972 MIPS_SYS(sys_poll
, 3)
1973 MIPS_SYS(sys_nfsservctl
, 3)
1974 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1975 MIPS_SYS(sys_getresgid
, 3)
1976 MIPS_SYS(sys_prctl
, 5)
1977 MIPS_SYS(sys_rt_sigreturn
, 0)
1978 MIPS_SYS(sys_rt_sigaction
, 4)
1979 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1980 MIPS_SYS(sys_rt_sigpending
, 2)
1981 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1982 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1983 MIPS_SYS(sys_rt_sigsuspend
, 0)
1984 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1985 MIPS_SYS(sys_pwrite64
, 6)
1986 MIPS_SYS(sys_chown
, 3)
1987 MIPS_SYS(sys_getcwd
, 2)
1988 MIPS_SYS(sys_capget
, 2)
1989 MIPS_SYS(sys_capset
, 2) /* 4205 */
1990 MIPS_SYS(sys_sigaltstack
, 2)
1991 MIPS_SYS(sys_sendfile
, 4)
1992 MIPS_SYS(sys_ni_syscall
, 0)
1993 MIPS_SYS(sys_ni_syscall
, 0)
1994 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1995 MIPS_SYS(sys_truncate64
, 4)
1996 MIPS_SYS(sys_ftruncate64
, 4)
1997 MIPS_SYS(sys_stat64
, 2)
1998 MIPS_SYS(sys_lstat64
, 2)
1999 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2000 MIPS_SYS(sys_pivot_root
, 2)
2001 MIPS_SYS(sys_mincore
, 3)
2002 MIPS_SYS(sys_madvise
, 3)
2003 MIPS_SYS(sys_getdents64
, 3)
2004 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2005 MIPS_SYS(sys_ni_syscall
, 0)
2006 MIPS_SYS(sys_gettid
, 0)
2007 MIPS_SYS(sys_readahead
, 5)
2008 MIPS_SYS(sys_setxattr
, 5)
2009 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2010 MIPS_SYS(sys_fsetxattr
, 5)
2011 MIPS_SYS(sys_getxattr
, 4)
2012 MIPS_SYS(sys_lgetxattr
, 4)
2013 MIPS_SYS(sys_fgetxattr
, 4)
2014 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2015 MIPS_SYS(sys_llistxattr
, 3)
2016 MIPS_SYS(sys_flistxattr
, 3)
2017 MIPS_SYS(sys_removexattr
, 2)
2018 MIPS_SYS(sys_lremovexattr
, 2)
2019 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2020 MIPS_SYS(sys_tkill
, 2)
2021 MIPS_SYS(sys_sendfile64
, 5)
2022 MIPS_SYS(sys_futex
, 2)
2023 MIPS_SYS(sys_sched_setaffinity
, 3)
2024 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2025 MIPS_SYS(sys_io_setup
, 2)
2026 MIPS_SYS(sys_io_destroy
, 1)
2027 MIPS_SYS(sys_io_getevents
, 5)
2028 MIPS_SYS(sys_io_submit
, 3)
2029 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2030 MIPS_SYS(sys_exit_group
, 1)
2031 MIPS_SYS(sys_lookup_dcookie
, 3)
2032 MIPS_SYS(sys_epoll_create
, 1)
2033 MIPS_SYS(sys_epoll_ctl
, 4)
2034 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2035 MIPS_SYS(sys_remap_file_pages
, 5)
2036 MIPS_SYS(sys_set_tid_address
, 1)
2037 MIPS_SYS(sys_restart_syscall
, 0)
2038 MIPS_SYS(sys_fadvise64_64
, 7)
2039 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2040 MIPS_SYS(sys_fstatfs64
, 2)
2041 MIPS_SYS(sys_timer_create
, 3)
2042 MIPS_SYS(sys_timer_settime
, 4)
2043 MIPS_SYS(sys_timer_gettime
, 2)
2044 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2045 MIPS_SYS(sys_timer_delete
, 1)
2046 MIPS_SYS(sys_clock_settime
, 2)
2047 MIPS_SYS(sys_clock_gettime
, 2)
2048 MIPS_SYS(sys_clock_getres
, 2)
2049 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2050 MIPS_SYS(sys_tgkill
, 3)
2051 MIPS_SYS(sys_utimes
, 2)
2052 MIPS_SYS(sys_mbind
, 4)
2053 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2054 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2055 MIPS_SYS(sys_mq_open
, 4)
2056 MIPS_SYS(sys_mq_unlink
, 1)
2057 MIPS_SYS(sys_mq_timedsend
, 5)
2058 MIPS_SYS(sys_mq_timedreceive
, 5)
2059 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2060 MIPS_SYS(sys_mq_getsetattr
, 3)
2061 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2062 MIPS_SYS(sys_waitid
, 4)
2063 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2064 MIPS_SYS(sys_add_key
, 5)
2065 MIPS_SYS(sys_request_key
, 4)
2066 MIPS_SYS(sys_keyctl
, 5)
2067 MIPS_SYS(sys_set_thread_area
, 1)
2068 MIPS_SYS(sys_inotify_init
, 0)
2069 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2070 MIPS_SYS(sys_inotify_rm_watch
, 2)
2071 MIPS_SYS(sys_migrate_pages
, 4)
2072 MIPS_SYS(sys_openat
, 4)
2073 MIPS_SYS(sys_mkdirat
, 3)
2074 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2075 MIPS_SYS(sys_fchownat
, 5)
2076 MIPS_SYS(sys_futimesat
, 3)
2077 MIPS_SYS(sys_fstatat64
, 4)
2078 MIPS_SYS(sys_unlinkat
, 3)
2079 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2080 MIPS_SYS(sys_linkat
, 5)
2081 MIPS_SYS(sys_symlinkat
, 3)
2082 MIPS_SYS(sys_readlinkat
, 4)
2083 MIPS_SYS(sys_fchmodat
, 3)
2084 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2085 MIPS_SYS(sys_pselect6
, 6)
2086 MIPS_SYS(sys_ppoll
, 5)
2087 MIPS_SYS(sys_unshare
, 1)
2088 MIPS_SYS(sys_splice
, 4)
2089 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2090 MIPS_SYS(sys_tee
, 4)
2091 MIPS_SYS(sys_vmsplice
, 4)
2092 MIPS_SYS(sys_move_pages
, 6)
2093 MIPS_SYS(sys_set_robust_list
, 2)
2094 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2095 MIPS_SYS(sys_kexec_load
, 4)
2096 MIPS_SYS(sys_getcpu
, 3)
2097 MIPS_SYS(sys_epoll_pwait
, 6)
2098 MIPS_SYS(sys_ioprio_set
, 3)
2099 MIPS_SYS(sys_ioprio_get
, 2)
2100 MIPS_SYS(sys_utimensat
, 4)
2101 MIPS_SYS(sys_signalfd
, 3)
2102 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2103 MIPS_SYS(sys_eventfd
, 1)
2104 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2105 MIPS_SYS(sys_timerfd_create
, 2)
2106 MIPS_SYS(sys_timerfd_gettime
, 2)
2107 MIPS_SYS(sys_timerfd_settime
, 4)
2108 MIPS_SYS(sys_signalfd4
, 4)
2109 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2110 MIPS_SYS(sys_epoll_create1
, 1)
2111 MIPS_SYS(sys_dup3
, 3)
2112 MIPS_SYS(sys_pipe2
, 2)
2113 MIPS_SYS(sys_inotify_init1
, 1)
2114 MIPS_SYS(sys_preadv
, 6) /* 4330 */
2115 MIPS_SYS(sys_pwritev
, 6)
2116 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2117 MIPS_SYS(sys_perf_event_open
, 5)
2118 MIPS_SYS(sys_accept4
, 4)
2119 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2120 MIPS_SYS(sys_fanotify_init
, 2)
2121 MIPS_SYS(sys_fanotify_mark
, 6)
2122 MIPS_SYS(sys_prlimit64
, 4)
2123 MIPS_SYS(sys_name_to_handle_at
, 5)
2124 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2125 MIPS_SYS(sys_clock_adjtime
, 2)
2126 MIPS_SYS(sys_syncfs
, 1)
2131 static int do_store_exclusive(CPUMIPSState
*env
)
2134 target_ulong page_addr
;
2142 page_addr
= addr
& TARGET_PAGE_MASK
;
2145 flags
= page_get_flags(page_addr
);
2146 if ((flags
& PAGE_READ
) == 0) {
2149 reg
= env
->llreg
& 0x1f;
2150 d
= (env
->llreg
& 0x20) != 0;
2152 segv
= get_user_s64(val
, addr
);
2154 segv
= get_user_s32(val
, addr
);
2157 if (val
!= env
->llval
) {
2158 env
->active_tc
.gpr
[reg
] = 0;
2161 segv
= put_user_u64(env
->llnewval
, addr
);
2163 segv
= put_user_u32(env
->llnewval
, addr
);
2166 env
->active_tc
.gpr
[reg
] = 1;
2173 env
->active_tc
.PC
+= 4;
2180 void cpu_loop(CPUMIPSState
*env
)
2182 target_siginfo_t info
;
2184 unsigned int syscall_num
;
2187 cpu_exec_start(env
);
2188 trapnr
= cpu_mips_exec(env
);
2192 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2193 env
->active_tc
.PC
+= 4;
2194 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2195 ret
= -TARGET_ENOSYS
;
2199 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2201 nb_args
= mips_syscall_args
[syscall_num
];
2202 sp_reg
= env
->active_tc
.gpr
[29];
2204 /* these arguments are taken from the stack */
2206 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2210 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2214 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2218 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2224 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2225 env
->active_tc
.gpr
[4],
2226 env
->active_tc
.gpr
[5],
2227 env
->active_tc
.gpr
[6],
2228 env
->active_tc
.gpr
[7],
2229 arg5
, arg6
, arg7
, arg8
);
2232 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2233 /* Returning from a successful sigreturn syscall.
2234 Avoid clobbering register state. */
2237 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
2238 env
->active_tc
.gpr
[7] = 1; /* error flag */
2241 env
->active_tc
.gpr
[7] = 0; /* error flag */
2243 env
->active_tc
.gpr
[2] = ret
;
2249 info
.si_signo
= TARGET_SIGSEGV
;
2251 /* XXX: check env->error_code */
2252 info
.si_code
= TARGET_SEGV_MAPERR
;
2253 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2254 queue_signal(env
, info
.si_signo
, &info
);
2258 info
.si_signo
= TARGET_SIGILL
;
2261 queue_signal(env
, info
.si_signo
, &info
);
2263 case EXCP_INTERRUPT
:
2264 /* just indicate that signals should be handled asap */
2270 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2273 info
.si_signo
= sig
;
2275 info
.si_code
= TARGET_TRAP_BRKPT
;
2276 queue_signal(env
, info
.si_signo
, &info
);
2281 if (do_store_exclusive(env
)) {
2282 info
.si_signo
= TARGET_SIGSEGV
;
2284 info
.si_code
= TARGET_SEGV_MAPERR
;
2285 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2286 queue_signal(env
, info
.si_signo
, &info
);
2291 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2293 cpu_dump_state(env
, stderr
, fprintf
, 0);
2296 process_pending_signals(env
);
2301 #ifdef TARGET_OPENRISC
2303 void cpu_loop(CPUOpenRISCState
*env
)
2308 trapnr
= cpu_exec(env
);
2313 qemu_log("\nReset request, exit, pc is %#x\n", env
->pc
);
2317 qemu_log("\nBus error, exit, pc is %#x\n", env
->pc
);
2322 cpu_dump_state(env
, stderr
, fprintf
, 0);
2323 gdbsig
= TARGET_SIGSEGV
;
2326 qemu_log("\nTick time interrupt pc is %#x\n", env
->pc
);
2329 qemu_log("\nAlignment pc is %#x\n", env
->pc
);
2333 qemu_log("\nIllegal instructionpc is %#x\n", env
->pc
);
2337 qemu_log("\nExternal interruptpc is %#x\n", env
->pc
);
2341 qemu_log("\nTLB miss\n");
2344 qemu_log("\nRange\n");
2348 env
->pc
+= 4; /* 0xc00; */
2349 env
->gpr
[11] = do_syscall(env
,
2350 env
->gpr
[11], /* return value */
2351 env
->gpr
[3], /* r3 - r7 are params */
2359 qemu_log("\nFloating point error\n");
2362 qemu_log("\nTrap\n");
2369 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2371 cpu_dump_state(env
, stderr
, fprintf
, 0);
2372 gdbsig
= TARGET_SIGILL
;
2376 gdb_handlesig(env
, gdbsig
);
2377 if (gdbsig
!= TARGET_SIGTRAP
) {
2382 process_pending_signals(env
);
2386 #endif /* TARGET_OPENRISC */
2389 void cpu_loop(CPUSH4State
*env
)
2392 target_siginfo_t info
;
2395 trapnr
= cpu_sh4_exec (env
);
2400 ret
= do_syscall(env
,
2409 env
->gregs
[0] = ret
;
2411 case EXCP_INTERRUPT
:
2412 /* just indicate that signals should be handled asap */
2418 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2421 info
.si_signo
= sig
;
2423 info
.si_code
= TARGET_TRAP_BRKPT
;
2424 queue_signal(env
, info
.si_signo
, &info
);
2430 info
.si_signo
= SIGSEGV
;
2432 info
.si_code
= TARGET_SEGV_MAPERR
;
2433 info
._sifields
._sigfault
._addr
= env
->tea
;
2434 queue_signal(env
, info
.si_signo
, &info
);
2438 printf ("Unhandled trap: 0x%x\n", trapnr
);
2439 cpu_dump_state(env
, stderr
, fprintf
, 0);
2442 process_pending_signals (env
);
2448 void cpu_loop(CPUCRISState
*env
)
2451 target_siginfo_t info
;
2454 trapnr
= cpu_cris_exec (env
);
2458 info
.si_signo
= SIGSEGV
;
2460 /* XXX: check env->error_code */
2461 info
.si_code
= TARGET_SEGV_MAPERR
;
2462 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2463 queue_signal(env
, info
.si_signo
, &info
);
2466 case EXCP_INTERRUPT
:
2467 /* just indicate that signals should be handled asap */
2470 ret
= do_syscall(env
,
2479 env
->regs
[10] = ret
;
2485 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2488 info
.si_signo
= sig
;
2490 info
.si_code
= TARGET_TRAP_BRKPT
;
2491 queue_signal(env
, info
.si_signo
, &info
);
2496 printf ("Unhandled trap: 0x%x\n", trapnr
);
2497 cpu_dump_state(env
, stderr
, fprintf
, 0);
2500 process_pending_signals (env
);
2505 #ifdef TARGET_MICROBLAZE
2506 void cpu_loop(CPUMBState
*env
)
2509 target_siginfo_t info
;
2512 trapnr
= cpu_mb_exec (env
);
2516 info
.si_signo
= SIGSEGV
;
2518 /* XXX: check env->error_code */
2519 info
.si_code
= TARGET_SEGV_MAPERR
;
2520 info
._sifields
._sigfault
._addr
= 0;
2521 queue_signal(env
, info
.si_signo
, &info
);
2524 case EXCP_INTERRUPT
:
2525 /* just indicate that signals should be handled asap */
2528 /* Return address is 4 bytes after the call. */
2530 env
->sregs
[SR_PC
] = env
->regs
[14];
2531 ret
= do_syscall(env
,
2543 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2544 if (env
->iflags
& D_FLAG
) {
2545 env
->sregs
[SR_ESR
] |= 1 << 12;
2546 env
->sregs
[SR_PC
] -= 4;
2547 /* FIXME: if branch was immed, replay the imm as well. */
2550 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2552 switch (env
->sregs
[SR_ESR
] & 31) {
2553 case ESR_EC_DIVZERO
:
2554 info
.si_signo
= SIGFPE
;
2556 info
.si_code
= TARGET_FPE_FLTDIV
;
2557 info
._sifields
._sigfault
._addr
= 0;
2558 queue_signal(env
, info
.si_signo
, &info
);
2561 info
.si_signo
= SIGFPE
;
2563 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2564 info
.si_code
= TARGET_FPE_FLTINV
;
2566 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2567 info
.si_code
= TARGET_FPE_FLTDIV
;
2569 info
._sifields
._sigfault
._addr
= 0;
2570 queue_signal(env
, info
.si_signo
, &info
);
2573 printf ("Unhandled hw-exception: 0x%x\n",
2574 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2575 cpu_dump_state(env
, stderr
, fprintf
, 0);
2584 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2587 info
.si_signo
= sig
;
2589 info
.si_code
= TARGET_TRAP_BRKPT
;
2590 queue_signal(env
, info
.si_signo
, &info
);
2595 printf ("Unhandled trap: 0x%x\n", trapnr
);
2596 cpu_dump_state(env
, stderr
, fprintf
, 0);
2599 process_pending_signals (env
);
2606 void cpu_loop(CPUM68KState
*env
)
2610 target_siginfo_t info
;
2611 TaskState
*ts
= env
->opaque
;
2614 trapnr
= cpu_m68k_exec(env
);
2618 if (ts
->sim_syscalls
) {
2620 nr
= lduw(env
->pc
+ 2);
2622 do_m68k_simcall(env
, nr
);
2628 case EXCP_HALT_INSN
:
2629 /* Semihosing syscall. */
2631 do_m68k_semihosting(env
, env
->dregs
[0]);
2635 case EXCP_UNSUPPORTED
:
2637 info
.si_signo
= SIGILL
;
2639 info
.si_code
= TARGET_ILL_ILLOPN
;
2640 info
._sifields
._sigfault
._addr
= env
->pc
;
2641 queue_signal(env
, info
.si_signo
, &info
);
2645 ts
->sim_syscalls
= 0;
2648 env
->dregs
[0] = do_syscall(env
,
2659 case EXCP_INTERRUPT
:
2660 /* just indicate that signals should be handled asap */
2664 info
.si_signo
= SIGSEGV
;
2666 /* XXX: check env->error_code */
2667 info
.si_code
= TARGET_SEGV_MAPERR
;
2668 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2669 queue_signal(env
, info
.si_signo
, &info
);
2676 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2679 info
.si_signo
= sig
;
2681 info
.si_code
= TARGET_TRAP_BRKPT
;
2682 queue_signal(env
, info
.si_signo
, &info
);
2687 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2689 cpu_dump_state(env
, stderr
, fprintf
, 0);
2692 process_pending_signals(env
);
2695 #endif /* TARGET_M68K */
2698 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2700 target_ulong addr
, val
, tmp
;
2701 target_siginfo_t info
;
2704 addr
= env
->lock_addr
;
2705 tmp
= env
->lock_st_addr
;
2706 env
->lock_addr
= -1;
2707 env
->lock_st_addr
= 0;
2713 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2717 if (val
== env
->lock_value
) {
2719 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2736 info
.si_signo
= TARGET_SIGSEGV
;
2738 info
.si_code
= TARGET_SEGV_MAPERR
;
2739 info
._sifields
._sigfault
._addr
= addr
;
2740 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2743 void cpu_loop(CPUAlphaState
*env
)
2746 target_siginfo_t info
;
2750 trapnr
= cpu_alpha_exec (env
);
2752 /* All of the traps imply a transition through PALcode, which
2753 implies an REI instruction has been executed. Which means
2754 that the intr_flag should be cleared. */
2759 fprintf(stderr
, "Reset requested. Exit\n");
2763 fprintf(stderr
, "Machine check exception. Exit\n");
2766 case EXCP_SMP_INTERRUPT
:
2767 case EXCP_CLK_INTERRUPT
:
2768 case EXCP_DEV_INTERRUPT
:
2769 fprintf(stderr
, "External interrupt. Exit\n");
2773 env
->lock_addr
= -1;
2774 info
.si_signo
= TARGET_SIGSEGV
;
2776 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2777 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2778 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2779 queue_signal(env
, info
.si_signo
, &info
);
2782 env
->lock_addr
= -1;
2783 info
.si_signo
= TARGET_SIGBUS
;
2785 info
.si_code
= TARGET_BUS_ADRALN
;
2786 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2787 queue_signal(env
, info
.si_signo
, &info
);
2791 env
->lock_addr
= -1;
2792 info
.si_signo
= TARGET_SIGILL
;
2794 info
.si_code
= TARGET_ILL_ILLOPC
;
2795 info
._sifields
._sigfault
._addr
= env
->pc
;
2796 queue_signal(env
, info
.si_signo
, &info
);
2799 env
->lock_addr
= -1;
2800 info
.si_signo
= TARGET_SIGFPE
;
2802 info
.si_code
= TARGET_FPE_FLTINV
;
2803 info
._sifields
._sigfault
._addr
= env
->pc
;
2804 queue_signal(env
, info
.si_signo
, &info
);
2807 /* No-op. Linux simply re-enables the FPU. */
2810 env
->lock_addr
= -1;
2811 switch (env
->error_code
) {
2814 info
.si_signo
= TARGET_SIGTRAP
;
2816 info
.si_code
= TARGET_TRAP_BRKPT
;
2817 info
._sifields
._sigfault
._addr
= env
->pc
;
2818 queue_signal(env
, info
.si_signo
, &info
);
2822 info
.si_signo
= TARGET_SIGTRAP
;
2825 info
._sifields
._sigfault
._addr
= env
->pc
;
2826 queue_signal(env
, info
.si_signo
, &info
);
2830 trapnr
= env
->ir
[IR_V0
];
2831 sysret
= do_syscall(env
, trapnr
,
2832 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2833 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2834 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2836 if (trapnr
== TARGET_NR_sigreturn
2837 || trapnr
== TARGET_NR_rt_sigreturn
) {
2840 /* Syscall writes 0 to V0 to bypass error check, similar
2841 to how this is handled internal to Linux kernel.
2842 (Ab)use trapnr temporarily as boolean indicating error. */
2843 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
2844 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
2845 env
->ir
[IR_A3
] = trapnr
;
2849 /* ??? We can probably elide the code using page_unprotect
2850 that is checking for self-modifying code. Instead we
2851 could simply call tb_flush here. Until we work out the
2852 changes required to turn off the extra write protection,
2853 this can be a no-op. */
2857 /* Handled in the translator for usermode. */
2861 /* Handled in the translator for usermode. */
2865 info
.si_signo
= TARGET_SIGFPE
;
2866 switch (env
->ir
[IR_A0
]) {
2867 case TARGET_GEN_INTOVF
:
2868 info
.si_code
= TARGET_FPE_INTOVF
;
2870 case TARGET_GEN_INTDIV
:
2871 info
.si_code
= TARGET_FPE_INTDIV
;
2873 case TARGET_GEN_FLTOVF
:
2874 info
.si_code
= TARGET_FPE_FLTOVF
;
2876 case TARGET_GEN_FLTUND
:
2877 info
.si_code
= TARGET_FPE_FLTUND
;
2879 case TARGET_GEN_FLTINV
:
2880 info
.si_code
= TARGET_FPE_FLTINV
;
2882 case TARGET_GEN_FLTINE
:
2883 info
.si_code
= TARGET_FPE_FLTRES
;
2885 case TARGET_GEN_ROPRAND
:
2889 info
.si_signo
= TARGET_SIGTRAP
;
2894 info
._sifields
._sigfault
._addr
= env
->pc
;
2895 queue_signal(env
, info
.si_signo
, &info
);
2902 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2903 if (info
.si_signo
) {
2904 env
->lock_addr
= -1;
2906 info
.si_code
= TARGET_TRAP_BRKPT
;
2907 queue_signal(env
, info
.si_signo
, &info
);
2912 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
2914 case EXCP_INTERRUPT
:
2915 /* Just indicate that signals should be handled asap. */
2918 printf ("Unhandled trap: 0x%x\n", trapnr
);
2919 cpu_dump_state(env
, stderr
, fprintf
, 0);
2922 process_pending_signals (env
);
2925 #endif /* TARGET_ALPHA */
2928 void cpu_loop(CPUS390XState
*env
)
2931 target_siginfo_t info
;
2934 trapnr
= cpu_s390x_exec (env
);
2937 case EXCP_INTERRUPT
:
2938 /* just indicate that signals should be handled asap */
2944 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2946 info
.si_signo
= sig
;
2948 info
.si_code
= TARGET_TRAP_BRKPT
;
2949 queue_signal(env
, info
.si_signo
, &info
);
2955 int n
= env
->int_svc_code
;
2957 /* syscalls > 255 */
2960 env
->psw
.addr
+= env
->int_svc_ilc
;
2961 env
->regs
[2] = do_syscall(env
, n
,
2973 info
.si_signo
= SIGSEGV
;
2975 /* XXX: check env->error_code */
2976 info
.si_code
= TARGET_SEGV_MAPERR
;
2977 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2978 queue_signal(env
, info
.si_signo
, &info
);
2983 fprintf(stderr
,"specification exception insn 0x%08x%04x\n", ldl(env
->psw
.addr
), lduw(env
->psw
.addr
+ 4));
2984 info
.si_signo
= SIGILL
;
2986 info
.si_code
= TARGET_ILL_ILLOPC
;
2987 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2988 queue_signal(env
, info
.si_signo
, &info
);
2992 printf ("Unhandled trap: 0x%x\n", trapnr
);
2993 cpu_dump_state(env
, stderr
, fprintf
, 0);
2996 process_pending_signals (env
);
3000 #endif /* TARGET_S390X */
3002 THREAD CPUArchState
*thread_env
;
3004 void task_settid(TaskState
*ts
)
3006 if (ts
->ts_tid
== 0) {
3007 #ifdef CONFIG_USE_NPTL
3008 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3010 /* when no threads are used, tid becomes pid */
3011 ts
->ts_tid
= getpid();
3016 void stop_all_tasks(void)
3019 * We trust that when using NPTL, start_exclusive()
3020 * handles thread stopping correctly.
3025 /* Assumes contents are already zeroed. */
3026 void init_task_state(TaskState
*ts
)
3031 ts
->first_free
= ts
->sigqueue_table
;
3032 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
3033 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
3035 ts
->sigqueue_table
[i
].next
= NULL
;
3038 static void handle_arg_help(const char *arg
)
3043 static void handle_arg_log(const char *arg
)
3046 const CPULogItem
*item
;
3048 mask
= cpu_str_to_log_mask(arg
);
3050 printf("Log items (comma separated):\n");
3051 for (item
= cpu_log_items
; item
->mask
!= 0; item
++) {
3052 printf("%-10s %s\n", item
->name
, item
->help
);
3059 static void handle_arg_log_filename(const char *arg
)
3061 cpu_set_log_filename(arg
);
3064 static void handle_arg_set_env(const char *arg
)
3066 char *r
, *p
, *token
;
3067 r
= p
= strdup(arg
);
3068 while ((token
= strsep(&p
, ",")) != NULL
) {
3069 if (envlist_setenv(envlist
, token
) != 0) {
3076 static void handle_arg_unset_env(const char *arg
)
3078 char *r
, *p
, *token
;
3079 r
= p
= strdup(arg
);
3080 while ((token
= strsep(&p
, ",")) != NULL
) {
3081 if (envlist_unsetenv(envlist
, token
) != 0) {
3088 static void handle_arg_argv0(const char *arg
)
3090 argv0
= strdup(arg
);
3093 static void handle_arg_stack_size(const char *arg
)
3096 guest_stack_size
= strtoul(arg
, &p
, 0);
3097 if (guest_stack_size
== 0) {
3102 guest_stack_size
*= 1024 * 1024;
3103 } else if (*p
== 'k' || *p
== 'K') {
3104 guest_stack_size
*= 1024;
3108 static void handle_arg_ld_prefix(const char *arg
)
3110 interp_prefix
= strdup(arg
);
3113 static void handle_arg_pagesize(const char *arg
)
3115 qemu_host_page_size
= atoi(arg
);
3116 if (qemu_host_page_size
== 0 ||
3117 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3118 fprintf(stderr
, "page size must be a power of two\n");
3123 static void handle_arg_gdb(const char *arg
)
3125 gdbstub_port
= atoi(arg
);
3128 static void handle_arg_uname(const char *arg
)
3130 qemu_uname_release
= strdup(arg
);
3133 static void handle_arg_cpu(const char *arg
)
3135 cpu_model
= strdup(arg
);
3136 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3137 /* XXX: implement xxx_cpu_list for targets that still miss it */
3138 #if defined(cpu_list)
3139 cpu_list(stdout
, &fprintf
);
3145 #if defined(CONFIG_USE_GUEST_BASE)
3146 static void handle_arg_guest_base(const char *arg
)
3148 guest_base
= strtol(arg
, NULL
, 0);
3149 have_guest_base
= 1;
3152 static void handle_arg_reserved_va(const char *arg
)
3156 reserved_va
= strtoul(arg
, &p
, 0);
3170 unsigned long unshifted
= reserved_va
;
3172 reserved_va
<<= shift
;
3173 if (((reserved_va
>> shift
) != unshifted
)
3174 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3175 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3178 fprintf(stderr
, "Reserved virtual address too big\n");
3183 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3189 static void handle_arg_singlestep(const char *arg
)
3194 static void handle_arg_strace(const char *arg
)
3199 static void handle_arg_version(const char *arg
)
3201 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
3202 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3206 struct qemu_argument
{
3210 void (*handle_opt
)(const char *arg
);
3211 const char *example
;
3215 static const struct qemu_argument arg_table
[] = {
3216 {"h", "", false, handle_arg_help
,
3217 "", "print this help"},
3218 {"g", "QEMU_GDB", true, handle_arg_gdb
,
3219 "port", "wait gdb connection to 'port'"},
3220 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
3221 "path", "set the elf interpreter prefix to 'path'"},
3222 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
3223 "size", "set the stack size to 'size' bytes"},
3224 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
3225 "model", "select CPU (-cpu help for list)"},
3226 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
3227 "var=value", "sets targets environment variable (see below)"},
3228 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
3229 "var", "unsets targets environment variable (see below)"},
3230 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
3231 "argv0", "forces target process argv[0] to be 'argv0'"},
3232 {"r", "QEMU_UNAME", true, handle_arg_uname
,
3233 "uname", "set qemu uname release string to 'uname'"},
3234 #if defined(CONFIG_USE_GUEST_BASE)
3235 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
3236 "address", "set guest_base address to 'address'"},
3237 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
3238 "size", "reserve 'size' bytes for guest virtual address space"},
3240 {"d", "QEMU_LOG", true, handle_arg_log
,
3241 "options", "activate log"},
3242 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
3243 "logfile", "override default logfile location"},
3244 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
3245 "pagesize", "set the host page size to 'pagesize'"},
3246 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
3247 "", "run in singlestep mode"},
3248 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
3249 "", "log system calls"},
3250 {"version", "QEMU_VERSION", false, handle_arg_version
,
3251 "", "display version information and exit"},
3252 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
3255 static void usage(void)
3257 const struct qemu_argument
*arginfo
;
3261 printf("usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
3262 "Linux CPU emulator (compiled for " TARGET_ARCH
" emulation)\n"
3264 "Options and associated environment variables:\n"
3267 maxarglen
= maxenvlen
= 0;
3269 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3270 if (strlen(arginfo
->env
) > maxenvlen
) {
3271 maxenvlen
= strlen(arginfo
->env
);
3273 if (strlen(arginfo
->argv
) > maxarglen
) {
3274 maxarglen
= strlen(arginfo
->argv
);
3278 printf("%-*s%-*sDescription\n", maxarglen
+3, "Argument",
3279 maxenvlen
+1, "Env-variable");
3281 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3282 if (arginfo
->has_arg
) {
3283 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
3284 (int)(maxarglen
-strlen(arginfo
->argv
)), arginfo
->example
,
3285 maxenvlen
, arginfo
->env
, arginfo
->help
);
3287 printf("-%-*s %-*s %s\n", maxarglen
+1, arginfo
->argv
,
3288 maxenvlen
, arginfo
->env
,
3295 "QEMU_LD_PREFIX = %s\n"
3296 "QEMU_STACK_SIZE = %ld byte\n"
3303 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3304 "QEMU_UNSET_ENV environment variables to set and unset\n"
3305 "environment variables for the target process.\n"
3306 "It is possible to provide several variables by separating them\n"
3307 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3308 "provide the -E and -U options multiple times.\n"
3309 "The following lines are equivalent:\n"
3310 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3311 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3312 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3313 "Note that if you provide several changes to a single variable\n"
3314 "the last change will stay in effect.\n");
3319 static int parse_args(int argc
, char **argv
)
3323 const struct qemu_argument
*arginfo
;
3325 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3326 if (arginfo
->env
== NULL
) {
3330 r
= getenv(arginfo
->env
);
3332 arginfo
->handle_opt(r
);
3338 if (optind
>= argc
) {
3347 if (!strcmp(r
, "-")) {
3351 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3352 if (!strcmp(r
, arginfo
->argv
)) {
3353 if (arginfo
->has_arg
) {
3354 if (optind
>= argc
) {
3357 arginfo
->handle_opt(argv
[optind
]);
3360 arginfo
->handle_opt(NULL
);
3366 /* no option matched the current argv */
3367 if (arginfo
->handle_opt
== NULL
) {
3372 if (optind
>= argc
) {
3376 filename
= argv
[optind
];
3377 exec_path
= argv
[optind
];
3382 int main(int argc
, char **argv
, char **envp
)
3384 const char *log_file
= DEBUG_LOGFILE
;
3385 struct target_pt_regs regs1
, *regs
= ®s1
;
3386 struct image_info info1
, *info
= &info1
;
3387 struct linux_binprm bprm
;
3391 char **target_environ
, **wrk
;
3397 module_call_init(MODULE_INIT_QOM
);
3399 qemu_cache_utils_init(envp
);
3401 if ((envlist
= envlist_create()) == NULL
) {
3402 (void) fprintf(stderr
, "Unable to allocate envlist\n");
3406 /* add current environment into the list */
3407 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
3408 (void) envlist_setenv(envlist
, *wrk
);
3411 /* Read the stack limit from the kernel. If it's "unlimited",
3412 then we can do little else besides use the default. */
3415 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
3416 && lim
.rlim_cur
!= RLIM_INFINITY
3417 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
3418 guest_stack_size
= lim
.rlim_cur
;
3423 #if defined(cpudef_setup)
3424 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3428 cpu_set_log_filename(log_file
);
3429 optind
= parse_args(argc
, argv
);
3432 memset(regs
, 0, sizeof(struct target_pt_regs
));
3434 /* Zero out image_info */
3435 memset(info
, 0, sizeof(struct image_info
));
3437 memset(&bprm
, 0, sizeof (bprm
));
3439 /* Scan interp_prefix dir for replacement files. */
3440 init_paths(interp_prefix
);
3442 if (cpu_model
== NULL
) {
3443 #if defined(TARGET_I386)
3444 #ifdef TARGET_X86_64
3445 cpu_model
= "qemu64";
3447 cpu_model
= "qemu32";
3449 #elif defined(TARGET_ARM)
3451 #elif defined(TARGET_UNICORE32)
3453 #elif defined(TARGET_M68K)
3455 #elif defined(TARGET_SPARC)
3456 #ifdef TARGET_SPARC64
3457 cpu_model
= "TI UltraSparc II";
3459 cpu_model
= "Fujitsu MB86904";
3461 #elif defined(TARGET_MIPS)
3462 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3467 #elif defined TARGET_OPENRISC
3468 cpu_model
= "or1200";
3469 #elif defined(TARGET_PPC)
3471 cpu_model
= "970fx";
3480 cpu_exec_init_all();
3481 /* NOTE: we need to init the CPU at this stage to get
3482 qemu_host_page_size */
3483 env
= cpu_init(cpu_model
);
3485 fprintf(stderr
, "Unable to find CPU definition\n");
3488 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3489 cpu_reset(ENV_GET_CPU(env
));
3494 if (getenv("QEMU_STRACE")) {
3498 target_environ
= envlist_to_environ(envlist
, NULL
);
3499 envlist_free(envlist
);
3501 #if defined(CONFIG_USE_GUEST_BASE)
3503 * Now that page sizes are configured in cpu_init() we can do
3504 * proper page alignment for guest_base.
3506 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3508 if (reserved_va
|| have_guest_base
) {
3509 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
3511 if (guest_base
== (unsigned long)-1) {
3512 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
3513 "space for use as guest address space (check your virtual "
3514 "memory ulimit setting or reserve less using -R option)\n",
3520 mmap_next_start
= reserved_va
;
3523 #endif /* CONFIG_USE_GUEST_BASE */
3526 * Read in mmap_min_addr kernel parameter. This value is used
3527 * When loading the ELF image to determine whether guest_base
3528 * is needed. It is also used in mmap_find_vma.
3533 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3535 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3536 mmap_min_addr
= tmp
;
3537 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3544 * Prepare copy of argv vector for target.
3546 target_argc
= argc
- optind
;
3547 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3548 if (target_argv
== NULL
) {
3549 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3554 * If argv0 is specified (using '-0' switch) we replace
3555 * argv[0] pointer with the given one.
3558 if (argv0
!= NULL
) {
3559 target_argv
[i
++] = strdup(argv0
);
3561 for (; i
< target_argc
; i
++) {
3562 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3564 target_argv
[target_argc
] = NULL
;
3566 ts
= g_malloc0 (sizeof(TaskState
));
3567 init_task_state(ts
);
3568 /* build Task State */
3574 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3577 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
3581 for (wrk
= target_environ
; *wrk
; wrk
++) {
3585 free(target_environ
);
3587 if (qemu_log_enabled()) {
3588 #if defined(CONFIG_USE_GUEST_BASE)
3589 qemu_log("guest_base 0x%lx\n", guest_base
);
3593 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3594 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3595 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3597 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3599 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3600 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3602 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3603 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3606 target_set_brk(info
->brk
);
3610 #if defined(CONFIG_USE_GUEST_BASE)
3611 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3612 generating the prologue until now so that the prologue can take
3613 the real value of GUEST_BASE into account. */
3614 tcg_prologue_init(&tcg_ctx
);
3617 #if defined(TARGET_I386)
3618 cpu_x86_set_cpl(env
, 3);
3620 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3621 env
->hflags
|= HF_PE_MASK
;
3622 if (env
->cpuid_features
& CPUID_SSE
) {
3623 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3624 env
->hflags
|= HF_OSFXSR_MASK
;
3626 #ifndef TARGET_ABI32
3627 /* enable 64 bit mode if possible */
3628 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
3629 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3632 env
->cr
[4] |= CR4_PAE_MASK
;
3633 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3634 env
->hflags
|= HF_LMA_MASK
;
3637 /* flags setup : we activate the IRQs by default as in user mode */
3638 env
->eflags
|= IF_MASK
;
3640 /* linux register setup */
3641 #ifndef TARGET_ABI32
3642 env
->regs
[R_EAX
] = regs
->rax
;
3643 env
->regs
[R_EBX
] = regs
->rbx
;
3644 env
->regs
[R_ECX
] = regs
->rcx
;
3645 env
->regs
[R_EDX
] = regs
->rdx
;
3646 env
->regs
[R_ESI
] = regs
->rsi
;
3647 env
->regs
[R_EDI
] = regs
->rdi
;
3648 env
->regs
[R_EBP
] = regs
->rbp
;
3649 env
->regs
[R_ESP
] = regs
->rsp
;
3650 env
->eip
= regs
->rip
;
3652 env
->regs
[R_EAX
] = regs
->eax
;
3653 env
->regs
[R_EBX
] = regs
->ebx
;
3654 env
->regs
[R_ECX
] = regs
->ecx
;
3655 env
->regs
[R_EDX
] = regs
->edx
;
3656 env
->regs
[R_ESI
] = regs
->esi
;
3657 env
->regs
[R_EDI
] = regs
->edi
;
3658 env
->regs
[R_EBP
] = regs
->ebp
;
3659 env
->regs
[R_ESP
] = regs
->esp
;
3660 env
->eip
= regs
->eip
;
3663 /* linux interrupt setup */
3664 #ifndef TARGET_ABI32
3665 env
->idt
.limit
= 511;
3667 env
->idt
.limit
= 255;
3669 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3670 PROT_READ
|PROT_WRITE
,
3671 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3672 idt_table
= g2h(env
->idt
.base
);
3695 /* linux segment setup */
3697 uint64_t *gdt_table
;
3698 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3699 PROT_READ
|PROT_WRITE
,
3700 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3701 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3702 gdt_table
= g2h(env
->gdt
.base
);
3704 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3705 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3706 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3708 /* 64 bit code segment */
3709 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3710 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3712 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3714 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3715 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3716 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3718 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3719 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3721 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3722 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3723 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3724 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3725 /* This hack makes Wine work... */
3726 env
->segs
[R_FS
].selector
= 0;
3728 cpu_x86_load_seg(env
, R_DS
, 0);
3729 cpu_x86_load_seg(env
, R_ES
, 0);
3730 cpu_x86_load_seg(env
, R_FS
, 0);
3731 cpu_x86_load_seg(env
, R_GS
, 0);
3733 #elif defined(TARGET_ARM)
3736 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3737 for(i
= 0; i
< 16; i
++) {
3738 env
->regs
[i
] = regs
->uregs
[i
];
3741 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
3742 && (info
->elf_flags
& EF_ARM_BE8
)) {
3743 env
->bswap_code
= 1;
3746 #elif defined(TARGET_UNICORE32)
3749 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3750 for (i
= 0; i
< 32; i
++) {
3751 env
->regs
[i
] = regs
->uregs
[i
];
3754 #elif defined(TARGET_SPARC)
3758 env
->npc
= regs
->npc
;
3760 for(i
= 0; i
< 8; i
++)
3761 env
->gregs
[i
] = regs
->u_regs
[i
];
3762 for(i
= 0; i
< 8; i
++)
3763 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3765 #elif defined(TARGET_PPC)
3769 #if defined(TARGET_PPC64)
3770 #if defined(TARGET_ABI32)
3771 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3773 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3776 env
->nip
= regs
->nip
;
3777 for(i
= 0; i
< 32; i
++) {
3778 env
->gpr
[i
] = regs
->gpr
[i
];
3781 #elif defined(TARGET_M68K)
3784 env
->dregs
[0] = regs
->d0
;
3785 env
->dregs
[1] = regs
->d1
;
3786 env
->dregs
[2] = regs
->d2
;
3787 env
->dregs
[3] = regs
->d3
;
3788 env
->dregs
[4] = regs
->d4
;
3789 env
->dregs
[5] = regs
->d5
;
3790 env
->dregs
[6] = regs
->d6
;
3791 env
->dregs
[7] = regs
->d7
;
3792 env
->aregs
[0] = regs
->a0
;
3793 env
->aregs
[1] = regs
->a1
;
3794 env
->aregs
[2] = regs
->a2
;
3795 env
->aregs
[3] = regs
->a3
;
3796 env
->aregs
[4] = regs
->a4
;
3797 env
->aregs
[5] = regs
->a5
;
3798 env
->aregs
[6] = regs
->a6
;
3799 env
->aregs
[7] = regs
->usp
;
3801 ts
->sim_syscalls
= 1;
3803 #elif defined(TARGET_MICROBLAZE)
3805 env
->regs
[0] = regs
->r0
;
3806 env
->regs
[1] = regs
->r1
;
3807 env
->regs
[2] = regs
->r2
;
3808 env
->regs
[3] = regs
->r3
;
3809 env
->regs
[4] = regs
->r4
;
3810 env
->regs
[5] = regs
->r5
;
3811 env
->regs
[6] = regs
->r6
;
3812 env
->regs
[7] = regs
->r7
;
3813 env
->regs
[8] = regs
->r8
;
3814 env
->regs
[9] = regs
->r9
;
3815 env
->regs
[10] = regs
->r10
;
3816 env
->regs
[11] = regs
->r11
;
3817 env
->regs
[12] = regs
->r12
;
3818 env
->regs
[13] = regs
->r13
;
3819 env
->regs
[14] = regs
->r14
;
3820 env
->regs
[15] = regs
->r15
;
3821 env
->regs
[16] = regs
->r16
;
3822 env
->regs
[17] = regs
->r17
;
3823 env
->regs
[18] = regs
->r18
;
3824 env
->regs
[19] = regs
->r19
;
3825 env
->regs
[20] = regs
->r20
;
3826 env
->regs
[21] = regs
->r21
;
3827 env
->regs
[22] = regs
->r22
;
3828 env
->regs
[23] = regs
->r23
;
3829 env
->regs
[24] = regs
->r24
;
3830 env
->regs
[25] = regs
->r25
;
3831 env
->regs
[26] = regs
->r26
;
3832 env
->regs
[27] = regs
->r27
;
3833 env
->regs
[28] = regs
->r28
;
3834 env
->regs
[29] = regs
->r29
;
3835 env
->regs
[30] = regs
->r30
;
3836 env
->regs
[31] = regs
->r31
;
3837 env
->sregs
[SR_PC
] = regs
->pc
;
3839 #elif defined(TARGET_MIPS)
3843 for(i
= 0; i
< 32; i
++) {
3844 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3846 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
3847 if (regs
->cp0_epc
& 1) {
3848 env
->hflags
|= MIPS_HFLAG_M16
;
3851 #elif defined(TARGET_OPENRISC)
3855 for (i
= 0; i
< 32; i
++) {
3856 env
->gpr
[i
] = regs
->gpr
[i
];
3862 #elif defined(TARGET_SH4)
3866 for(i
= 0; i
< 16; i
++) {
3867 env
->gregs
[i
] = regs
->regs
[i
];
3871 #elif defined(TARGET_ALPHA)
3875 for(i
= 0; i
< 28; i
++) {
3876 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3878 env
->ir
[IR_SP
] = regs
->usp
;
3881 #elif defined(TARGET_CRIS)
3883 env
->regs
[0] = regs
->r0
;
3884 env
->regs
[1] = regs
->r1
;
3885 env
->regs
[2] = regs
->r2
;
3886 env
->regs
[3] = regs
->r3
;
3887 env
->regs
[4] = regs
->r4
;
3888 env
->regs
[5] = regs
->r5
;
3889 env
->regs
[6] = regs
->r6
;
3890 env
->regs
[7] = regs
->r7
;
3891 env
->regs
[8] = regs
->r8
;
3892 env
->regs
[9] = regs
->r9
;
3893 env
->regs
[10] = regs
->r10
;
3894 env
->regs
[11] = regs
->r11
;
3895 env
->regs
[12] = regs
->r12
;
3896 env
->regs
[13] = regs
->r13
;
3897 env
->regs
[14] = info
->start_stack
;
3898 env
->regs
[15] = regs
->acr
;
3899 env
->pc
= regs
->erp
;
3901 #elif defined(TARGET_S390X)
3904 for (i
= 0; i
< 16; i
++) {
3905 env
->regs
[i
] = regs
->gprs
[i
];
3907 env
->psw
.mask
= regs
->psw
.mask
;
3908 env
->psw
.addr
= regs
->psw
.addr
;
3911 #error unsupported target CPU
3914 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3915 ts
->stack_base
= info
->start_stack
;
3916 ts
->heap_base
= info
->brk
;
3917 /* This will be filled in on the first SYS_HEAPINFO call. */
3922 if (gdbserver_start(gdbstub_port
) < 0) {
3923 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
3927 gdb_handlesig(env
, 0);