2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "audio/audio.h"
36 #include "hpet_emul.h"
41 /* output Bochs bios info messages */
44 /* Show multiboot debug output */
45 //#define DEBUG_MULTIBOOT
47 #define BIOS_FILENAME "bios.bin"
48 #define VGABIOS_FILENAME "vgabios.bin"
49 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
51 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
53 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
54 #define ACPI_DATA_SIZE 0x10000
55 #define BIOS_CFG_IOPORT 0x510
56 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
57 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
58 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
62 static fdctrl_t
*floppy_controller
;
63 static RTCState
*rtc_state
;
65 static PCII440FXState
*i440fx_state
;
67 typedef struct rom_reset_data
{
69 target_phys_addr_t addr
;
73 static void option_rom_reset(void *_rrd
)
75 RomResetData
*rrd
= _rrd
;
77 cpu_physical_memory_write_rom(rrd
->addr
, rrd
->data
, rrd
->size
);
80 static void option_rom_setup_reset(target_phys_addr_t addr
, unsigned size
)
82 RomResetData
*rrd
= qemu_malloc(sizeof *rrd
);
84 rrd
->data
= qemu_malloc(size
);
85 cpu_physical_memory_read(addr
, rrd
->data
, size
);
88 qemu_register_reset(option_rom_reset
, rrd
);
91 typedef struct isa_irq_state
{
96 static void isa_irq_handler(void *opaque
, int n
, int level
)
98 IsaIrqState
*isa
= (IsaIrqState
*)opaque
;
101 qemu_set_irq(isa
->i8259
[n
], level
);
104 qemu_set_irq(isa
->ioapic
[n
], level
);
107 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
111 /* MSDOS compatibility mode FPU exception support */
112 static qemu_irq ferr_irq
;
113 /* XXX: add IGNNE support */
114 void cpu_set_ferr(CPUX86State
*s
)
116 qemu_irq_raise(ferr_irq
);
119 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
121 qemu_irq_lower(ferr_irq
);
125 uint64_t cpu_get_tsc(CPUX86State
*env
)
127 return cpu_get_ticks();
131 void cpu_smm_update(CPUState
*env
)
133 if (i440fx_state
&& env
== first_cpu
)
134 i440fx_set_smm(i440fx_state
, (env
->hflags
>> HF_SMM_SHIFT
) & 1);
139 int cpu_get_pic_interrupt(CPUState
*env
)
143 intno
= apic_get_interrupt(env
);
145 /* set irq request if a PIC irq is still pending */
146 /* XXX: improve that */
147 pic_update_irq(isa_pic
);
150 /* read the irq from the PIC */
151 if (!apic_accept_pic_intr(env
))
154 intno
= pic_read_irq(isa_pic
);
158 static void pic_irq_request(void *opaque
, int irq
, int level
)
160 CPUState
*env
= first_cpu
;
162 if (env
->apic_state
) {
164 if (apic_accept_pic_intr(env
))
165 apic_deliver_pic_intr(env
, level
);
170 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
172 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
176 /* PC cmos mappings */
178 #define REG_EQUIPMENT_BYTE 0x14
180 static int cmos_get_fd_drive_type(int fd0
)
186 /* 1.44 Mb 3"5 drive */
190 /* 2.88 Mb 3"5 drive */
194 /* 1.2 Mb 5"5 drive */
204 static void cmos_init_hd(int type_ofs
, int info_ofs
, BlockDriverState
*hd
)
206 RTCState
*s
= rtc_state
;
207 int cylinders
, heads
, sectors
;
208 bdrv_get_geometry_hint(hd
, &cylinders
, &heads
, §ors
);
209 rtc_set_memory(s
, type_ofs
, 47);
210 rtc_set_memory(s
, info_ofs
, cylinders
);
211 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
212 rtc_set_memory(s
, info_ofs
+ 2, heads
);
213 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
214 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
215 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
216 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
217 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
218 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
221 /* convert boot_device letter to something recognizable by the bios */
222 static int boot_device2nibble(char boot_device
)
224 switch(boot_device
) {
227 return 0x01; /* floppy boot */
229 return 0x02; /* hard drive boot */
231 return 0x03; /* CD-ROM boot */
233 return 0x04; /* Network boot */
238 /* copy/pasted from cmos_init, should be made a general function
239 and used there as well */
240 static int pc_boot_set(void *opaque
, const char *boot_device
)
242 Monitor
*mon
= cur_mon
;
243 #define PC_MAX_BOOT_DEVICES 3
244 RTCState
*s
= (RTCState
*)opaque
;
245 int nbds
, bds
[3] = { 0, };
248 nbds
= strlen(boot_device
);
249 if (nbds
> PC_MAX_BOOT_DEVICES
) {
250 monitor_printf(mon
, "Too many boot devices for PC\n");
253 for (i
= 0; i
< nbds
; i
++) {
254 bds
[i
] = boot_device2nibble(boot_device
[i
]);
256 monitor_printf(mon
, "Invalid boot device for PC: '%c'\n",
261 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
262 rtc_set_memory(s
, 0x38, (bds
[2] << 4));
266 /* hd_table must contain 4 block drivers */
267 static void cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
268 const char *boot_device
, DriveInfo
**hd_table
)
270 RTCState
*s
= rtc_state
;
271 int nbds
, bds
[3] = { 0, };
276 /* various important CMOS locations needed by PC/Bochs bios */
279 val
= 640; /* base memory in K */
280 rtc_set_memory(s
, 0x15, val
);
281 rtc_set_memory(s
, 0x16, val
>> 8);
283 val
= (ram_size
/ 1024) - 1024;
286 rtc_set_memory(s
, 0x17, val
);
287 rtc_set_memory(s
, 0x18, val
>> 8);
288 rtc_set_memory(s
, 0x30, val
);
289 rtc_set_memory(s
, 0x31, val
>> 8);
291 if (above_4g_mem_size
) {
292 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
293 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
294 rtc_set_memory(s
, 0x5d, (uint64_t)above_4g_mem_size
>> 32);
297 if (ram_size
> (16 * 1024 * 1024))
298 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
303 rtc_set_memory(s
, 0x34, val
);
304 rtc_set_memory(s
, 0x35, val
>> 8);
306 /* set the number of CPU */
307 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
309 /* set boot devices, and disable floppy signature check if requested */
310 #define PC_MAX_BOOT_DEVICES 3
311 nbds
= strlen(boot_device
);
312 if (nbds
> PC_MAX_BOOT_DEVICES
) {
313 fprintf(stderr
, "Too many boot devices for PC\n");
316 for (i
= 0; i
< nbds
; i
++) {
317 bds
[i
] = boot_device2nibble(boot_device
[i
]);
319 fprintf(stderr
, "Invalid boot device for PC: '%c'\n",
324 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
325 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
329 fd0
= fdctrl_get_drive_type(floppy_controller
, 0);
330 fd1
= fdctrl_get_drive_type(floppy_controller
, 1);
332 val
= (cmos_get_fd_drive_type(fd0
) << 4) | cmos_get_fd_drive_type(fd1
);
333 rtc_set_memory(s
, 0x10, val
);
345 val
|= 0x01; /* 1 drive, ready for boot */
348 val
|= 0x41; /* 2 drives, ready for boot */
351 val
|= 0x02; /* FPU is there */
352 val
|= 0x04; /* PS/2 mouse installed */
353 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
357 rtc_set_memory(s
, 0x12, (hd_table
[0] ? 0xf0 : 0) | (hd_table
[1] ? 0x0f : 0));
359 cmos_init_hd(0x19, 0x1b, hd_table
[0]->bdrv
);
361 cmos_init_hd(0x1a, 0x24, hd_table
[1]->bdrv
);
364 for (i
= 0; i
< 4; i
++) {
366 int cylinders
, heads
, sectors
, translation
;
367 /* NOTE: bdrv_get_geometry_hint() returns the physical
368 geometry. It is always such that: 1 <= sects <= 63, 1
369 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
370 geometry can be different if a translation is done. */
371 translation
= bdrv_get_translation_hint(hd_table
[i
]->bdrv
);
372 if (translation
== BIOS_ATA_TRANSLATION_AUTO
) {
373 bdrv_get_geometry_hint(hd_table
[i
]->bdrv
, &cylinders
, &heads
, §ors
);
374 if (cylinders
<= 1024 && heads
<= 16 && sectors
<= 63) {
375 /* No translation. */
378 /* LBA translation. */
384 val
|= translation
<< (i
* 2);
387 rtc_set_memory(s
, 0x39, val
);
390 void ioport_set_a20(int enable
)
392 /* XXX: send to all CPUs ? */
393 cpu_x86_set_a20(first_cpu
, enable
);
396 int ioport_get_a20(void)
398 return ((first_cpu
->a20_mask
>> 20) & 1);
401 static void ioport92_write(void *opaque
, uint32_t addr
, uint32_t val
)
403 ioport_set_a20((val
>> 1) & 1);
404 /* XXX: bit 0 is fast reset */
407 static uint32_t ioport92_read(void *opaque
, uint32_t addr
)
409 return ioport_get_a20() << 1;
412 /***********************************************************/
413 /* Bochs BIOS debug ports */
415 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
417 static const char shutdown_str
[8] = "Shutdown";
418 static int shutdown_index
= 0;
421 /* Bochs BIOS messages */
424 fprintf(stderr
, "BIOS panic at rombios.c, line %d\n", val
);
429 fprintf(stderr
, "%c", val
);
433 /* same as Bochs power off */
434 if (val
== shutdown_str
[shutdown_index
]) {
436 if (shutdown_index
== 8) {
438 qemu_system_shutdown_request();
445 /* LGPL'ed VGA BIOS messages */
448 fprintf(stderr
, "VGA BIOS panic, line %d\n", val
);
453 fprintf(stderr
, "%c", val
);
459 static void *bochs_bios_init(void)
462 uint8_t *smbios_table
;
464 uint64_t *numa_fw_cfg
;
467 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
468 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
469 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
470 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
471 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
473 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
474 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
475 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
476 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
478 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
480 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
481 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
482 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
484 fw_cfg_add_bytes(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, &irq0override
, 1);
486 smbios_table
= smbios_get_table(&smbios_len
);
488 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
489 smbios_table
, smbios_len
);
491 /* allocate memory for the NUMA channel: one (64bit) word for the number
492 * of nodes, one word for each VCPU->node and one word for each node to
493 * hold the amount of memory.
495 numa_fw_cfg
= qemu_mallocz((1 + smp_cpus
+ nb_numa_nodes
) * 8);
496 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
497 for (i
= 0; i
< smp_cpus
; i
++) {
498 for (j
= 0; j
< nb_numa_nodes
; j
++) {
499 if (node_cpumask
[j
] & (1 << i
)) {
500 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
505 for (i
= 0; i
< nb_numa_nodes
; i
++) {
506 numa_fw_cfg
[smp_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
508 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
509 (1 + smp_cpus
+ nb_numa_nodes
) * 8);
514 /* Generate an initial boot sector which sets state and jump to
515 a specified vector */
516 static void generate_bootsect(target_phys_addr_t option_rom
,
517 uint32_t gpr
[8], uint16_t segs
[6], uint16_t ip
)
519 uint8_t rom
[512], *p
, *reloc
;
523 memset(rom
, 0, sizeof(rom
));
526 /* Make sure we have an option rom signature */
530 /* ROM size in sectors*/
535 *p
++ = 0x50; /* push ax */
536 *p
++ = 0x1e; /* push ds */
537 *p
++ = 0x31; *p
++ = 0xc0; /* xor ax, ax */
538 *p
++ = 0x8e; *p
++ = 0xd8; /* mov ax, ds */
540 *p
++ = 0xc7; *p
++ = 0x06; /* movvw _start,0x64 */
541 *p
++ = 0x64; *p
++ = 0x00;
543 *p
++ = 0x00; *p
++ = 0x00;
545 *p
++ = 0x8c; *p
++ = 0x0e; /* mov cs,0x66 */
546 *p
++ = 0x66; *p
++ = 0x00;
548 *p
++ = 0x1f; /* pop ds */
549 *p
++ = 0x58; /* pop ax */
550 *p
++ = 0xcb; /* lret */
555 *p
++ = 0xfa; /* CLI */
556 *p
++ = 0xfc; /* CLD */
558 for (i
= 0; i
< 6; i
++) {
559 if (i
== 1) /* Skip CS */
562 *p
++ = 0xb8; /* MOV AX,imm16 */
565 *p
++ = 0x8e; /* MOV <seg>,AX */
566 *p
++ = 0xc0 + (i
<< 3);
569 for (i
= 0; i
< 8; i
++) {
570 *p
++ = 0x66; /* 32-bit operand size */
571 *p
++ = 0xb8 + i
; /* MOV <reg>,imm32 */
578 *p
++ = 0xea; /* JMP FAR */
581 *p
++ = segs
[1]; /* CS */
586 for (i
= 0; i
< (sizeof(rom
) - 1); i
++)
588 rom
[sizeof(rom
) - 1] = -sum
;
590 cpu_physical_memory_write_rom(option_rom
, rom
, sizeof(rom
));
591 option_rom_setup_reset(option_rom
, sizeof (rom
));
594 static long get_file_size(FILE *f
)
598 /* XXX: on Unix systems, using fstat() probably makes more sense */
601 fseek(f
, 0, SEEK_END
);
603 fseek(f
, where
, SEEK_SET
);
608 #define MULTIBOOT_STRUCT_ADDR 0x9000
610 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
611 #error multiboot struct needs to fit in 16 bit real mode
614 static int load_multiboot(void *fw_cfg
,
616 const char *kernel_filename
,
617 const char *initrd_filename
,
618 const char *kernel_cmdline
,
621 int i
, t
, is_multiboot
= 0;
623 uint32_t mh_entry_addr
;
624 uint32_t mh_load_addr
;
625 uint32_t mb_kernel_size
;
626 uint32_t mmap_addr
= MULTIBOOT_STRUCT_ADDR
;
627 uint32_t mb_bootinfo
= MULTIBOOT_STRUCT_ADDR
+ 0x500;
628 uint32_t mb_cmdline
= mb_bootinfo
+ 0x200;
631 /* Ok, let's see if it is a multiboot image.
632 The header is 12x32bit long, so the latest entry may be 8192 - 48. */
633 for (i
= 0; i
< (8192 - 48); i
+= 4) {
634 if (ldl_p(header
+i
) == 0x1BADB002) {
635 uint32_t checksum
= ldl_p(header
+i
+8);
636 flags
= ldl_p(header
+i
+4);
638 checksum
+= (uint32_t)0x1BADB002;
647 return 0; /* no multiboot */
649 #ifdef DEBUG_MULTIBOOT
650 fprintf(stderr
, "qemu: I believe we found a multiboot image!\n");
653 if (flags
& 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
654 fprintf(stderr
, "qemu: multiboot knows VBE. we don't.\n");
656 if (!(flags
& 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
660 kernel_size
= load_elf(kernel_filename
, 0, &elf_entry
, NULL
, NULL
);
661 if (kernel_size
< 0) {
662 fprintf(stderr
, "Error while loading elf kernel\n");
665 mh_load_addr
= mh_entry_addr
= elf_entry
;
666 mb_kernel_size
= kernel_size
;
668 #ifdef DEBUG_MULTIBOOT
669 fprintf(stderr
, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
670 mb_kernel_size
, (size_t)mh_entry_addr
);
673 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
674 uint32_t mh_header_addr
= ldl_p(header
+i
+12);
675 mh_load_addr
= ldl_p(header
+i
+16);
676 #ifdef DEBUG_MULTIBOOT
677 uint32_t mh_load_end_addr
= ldl_p(header
+i
+20);
678 uint32_t mh_bss_end_addr
= ldl_p(header
+i
+24);
680 uint32_t mb_kernel_text_offset
= i
- (mh_header_addr
- mh_load_addr
);
682 mh_entry_addr
= ldl_p(header
+i
+28);
683 mb_kernel_size
= get_file_size(f
) - mb_kernel_text_offset
;
685 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
686 uint32_t mh_mode_type = ldl_p(header+i+32);
687 uint32_t mh_width = ldl_p(header+i+36);
688 uint32_t mh_height = ldl_p(header+i+40);
689 uint32_t mh_depth = ldl_p(header+i+44); */
691 #ifdef DEBUG_MULTIBOOT
692 fprintf(stderr
, "multiboot: mh_header_addr = %#x\n", mh_header_addr
);
693 fprintf(stderr
, "multiboot: mh_load_addr = %#x\n", mh_load_addr
);
694 fprintf(stderr
, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr
);
695 fprintf(stderr
, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr
);
698 fseek(f
, mb_kernel_text_offset
, SEEK_SET
);
700 #ifdef DEBUG_MULTIBOOT
701 fprintf(stderr
, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
702 mb_kernel_size
, mh_load_addr
);
705 if (!fread_targphys_ok(mh_load_addr
, mb_kernel_size
, f
)) {
706 fprintf(stderr
, "qemu: read error on multiboot kernel '%s' (%#x)\n",
707 kernel_filename
, mb_kernel_size
);
713 /* blob size is only the kernel for now */
714 mb_mod_end
= mh_load_addr
+ mb_kernel_size
;
717 stl_phys(mb_bootinfo
+ 20, 0x0); /* mods_count */
718 if (initrd_filename
) {
719 uint32_t mb_mod_info
= mb_bootinfo
+ 0x100;
720 uint32_t mb_mod_cmdline
= mb_bootinfo
+ 0x300;
721 uint32_t mb_mod_start
= mh_load_addr
;
722 uint32_t mb_mod_length
= mb_kernel_size
;
725 int mb_mod_count
= 0;
728 next_initrd
= strchr(initrd_filename
, ',');
731 /* if a space comes after the module filename, treat everything
732 after that as parameters */
733 cpu_physical_memory_write(mb_mod_cmdline
, (uint8_t*)initrd_filename
,
734 strlen(initrd_filename
) + 1);
735 stl_phys(mb_mod_info
+ 8, mb_mod_cmdline
); /* string */
736 mb_mod_cmdline
+= strlen(initrd_filename
) + 1;
737 if ((next_space
= strchr(initrd_filename
, ' ')))
739 #ifdef DEBUG_MULTIBOOT
740 printf("multiboot loading module: %s\n", initrd_filename
);
742 f
= fopen(initrd_filename
, "rb");
744 mb_mod_start
= (mb_mod_start
+ mb_mod_length
+ (TARGET_PAGE_SIZE
- 1))
745 & (TARGET_PAGE_MASK
);
746 mb_mod_length
= get_file_size(f
);
747 mb_mod_end
= mb_mod_start
+ mb_mod_length
;
749 if (!fread_targphys_ok(mb_mod_start
, mb_mod_length
, f
)) {
750 fprintf(stderr
, "qemu: read error on multiboot module '%s' (%#x)\n",
751 initrd_filename
, mb_mod_length
);
756 stl_phys(mb_mod_info
+ 0, mb_mod_start
);
757 stl_phys(mb_mod_info
+ 4, mb_mod_start
+ mb_mod_length
);
758 #ifdef DEBUG_MULTIBOOT
759 printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start
,
760 mb_mod_start
+ mb_mod_length
);
762 stl_phys(mb_mod_info
+ 12, 0x0); /* reserved */
764 initrd_filename
= next_initrd
+1;
766 } while (next_initrd
);
767 stl_phys(mb_bootinfo
+ 20, mb_mod_count
); /* mods_count */
768 stl_phys(mb_bootinfo
+ 24, mb_bootinfo
+ 0x100); /* mods_addr */
771 /* Make sure we're getting kernel + modules back after reset */
772 option_rom_setup_reset(mh_load_addr
, mb_mod_end
- mh_load_addr
);
774 /* Commandline support */
775 stl_phys(mb_bootinfo
+ 16, mb_cmdline
);
776 t
= strlen(kernel_filename
);
777 cpu_physical_memory_write(mb_cmdline
, (uint8_t*)kernel_filename
, t
);
779 stb_phys(mb_cmdline
++, ' ');
780 t
= strlen(kernel_cmdline
) + 1;
781 cpu_physical_memory_write(mb_cmdline
, (uint8_t*)kernel_cmdline
, t
);
783 /* the kernel is where we want it to be now */
785 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
786 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
787 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
788 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
789 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
790 stl_phys(mb_bootinfo
, MULTIBOOT_FLAGS_MEMORY
791 | MULTIBOOT_FLAGS_BOOT_DEVICE
792 | MULTIBOOT_FLAGS_CMDLINE
793 | MULTIBOOT_FLAGS_MODULES
794 | MULTIBOOT_FLAGS_MMAP
);
795 stl_phys(mb_bootinfo
+ 4, 640); /* mem_lower */
796 stl_phys(mb_bootinfo
+ 8, ram_size
/ 1024); /* mem_upper */
797 stl_phys(mb_bootinfo
+ 12, 0x8001ffff); /* XXX: use the -boot switch? */
798 stl_phys(mb_bootinfo
+ 48, mmap_addr
); /* mmap_addr */
800 #ifdef DEBUG_MULTIBOOT
801 fprintf(stderr
, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr
);
804 /* Pass variables to option rom */
805 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_entry_addr
);
806 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, mb_bootinfo
);
807 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, mmap_addr
);
809 /* Make sure we're getting the config space back after reset */
810 option_rom_setup_reset(mb_bootinfo
, 0x500);
812 option_rom
[nb_option_roms
] = "multiboot.bin";
815 return 1; /* yes, we are multiboot */
818 static void load_linux(void *fw_cfg
,
819 target_phys_addr_t option_rom
,
820 const char *kernel_filename
,
821 const char *initrd_filename
,
822 const char *kernel_cmdline
,
823 target_phys_addr_t max_ram_size
)
829 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
831 uint8_t header
[8192];
832 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
836 /* Align to 16 bytes as a paranoia measure */
837 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
839 /* load the kernel header */
840 f
= fopen(kernel_filename
, "rb");
841 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
842 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
843 MIN(ARRAY_SIZE(header
), kernel_size
)) {
844 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
849 /* kernel protocol version */
851 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
853 if (ldl_p(header
+0x202) == 0x53726448)
854 protocol
= lduw_p(header
+0x206);
856 /* This looks like a multiboot kernel. If it is, let's stop
857 treating it like a Linux kernel. */
858 if (load_multiboot(fw_cfg
, f
, kernel_filename
,
859 initrd_filename
, kernel_cmdline
, header
))
864 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
867 cmdline_addr
= 0x9a000 - cmdline_size
;
869 } else if (protocol
< 0x202) {
870 /* High but ancient kernel */
872 cmdline_addr
= 0x9a000 - cmdline_size
;
873 prot_addr
= 0x100000;
875 /* High and recent kernel */
877 cmdline_addr
= 0x20000;
878 prot_addr
= 0x100000;
883 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
884 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
885 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
891 /* highest address for loading the initrd */
892 if (protocol
>= 0x203)
893 initrd_max
= ldl_p(header
+0x22c);
895 initrd_max
= 0x37ffffff;
897 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
898 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
900 /* kernel command line */
901 pstrcpy_targphys(cmdline_addr
, 4096, kernel_cmdline
);
903 if (protocol
>= 0x202) {
904 stl_p(header
+0x228, cmdline_addr
);
906 stw_p(header
+0x20, 0xA33F);
907 stw_p(header
+0x22, cmdline_addr
-real_addr
);
910 /* handle vga= parameter */
911 vmode
= strstr(kernel_cmdline
, "vga=");
913 unsigned int video_mode
;
916 if (!strncmp(vmode
, "normal", 6)) {
918 } else if (!strncmp(vmode
, "ext", 3)) {
920 } else if (!strncmp(vmode
, "ask", 3)) {
923 video_mode
= strtol(vmode
, NULL
, 0);
925 stw_p(header
+0x1fa, video_mode
);
929 /* High nybble = B reserved for Qemu; low nybble is revision number.
930 If this code is substantially changed, you may want to consider
931 incrementing the revision. */
932 if (protocol
>= 0x200)
933 header
[0x210] = 0xB0;
936 if (protocol
>= 0x201) {
937 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
938 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
942 if (initrd_filename
) {
943 if (protocol
< 0x200) {
944 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
948 fi
= fopen(initrd_filename
, "rb");
950 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
955 initrd_size
= get_file_size(fi
);
956 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
958 if (!fread_targphys_ok(initrd_addr
, initrd_size
, fi
)) {
959 fprintf(stderr
, "qemu: read error on initial ram disk '%s'\n",
965 stl_p(header
+0x218, initrd_addr
);
966 stl_p(header
+0x21c, initrd_size
);
969 /* store the finalized header and load the rest of the kernel */
970 cpu_physical_memory_write(real_addr
, header
, ARRAY_SIZE(header
));
972 setup_size
= header
[0x1f1];
976 setup_size
= (setup_size
+1)*512;
977 /* Size of protected-mode code */
978 kernel_size
-= (setup_size
> ARRAY_SIZE(header
)) ? setup_size
: ARRAY_SIZE(header
);
980 /* In case we have read too much already, copy that over */
981 if (setup_size
< ARRAY_SIZE(header
)) {
982 cpu_physical_memory_write(prot_addr
, header
+ setup_size
, ARRAY_SIZE(header
) - setup_size
);
983 prot_addr
+= (ARRAY_SIZE(header
) - setup_size
);
984 setup_size
= ARRAY_SIZE(header
);
987 if (!fread_targphys_ok(real_addr
+ ARRAY_SIZE(header
),
988 setup_size
- ARRAY_SIZE(header
), f
) ||
989 !fread_targphys_ok(prot_addr
, kernel_size
, f
)) {
990 fprintf(stderr
, "qemu: read error on kernel '%s'\n",
996 /* generate bootsector to set up the initial register state */
997 real_seg
= real_addr
>> 4;
998 seg
[0] = seg
[2] = seg
[3] = seg
[4] = seg
[4] = real_seg
;
999 seg
[1] = real_seg
+0x20; /* CS */
1000 memset(gpr
, 0, sizeof gpr
);
1001 gpr
[4] = cmdline_addr
-real_addr
-16; /* SP (-16 is paranoia) */
1003 option_rom_setup_reset(real_addr
, setup_size
);
1004 option_rom_setup_reset(prot_addr
, kernel_size
);
1005 option_rom_setup_reset(cmdline_addr
, cmdline_size
);
1006 if (initrd_filename
)
1007 option_rom_setup_reset(initrd_addr
, initrd_size
);
1009 generate_bootsect(option_rom
, gpr
, seg
, 0);
1012 static const int ide_iobase
[2] = { 0x1f0, 0x170 };
1013 static const int ide_iobase2
[2] = { 0x3f6, 0x376 };
1014 static const int ide_irq
[2] = { 14, 15 };
1016 #define NE2000_NB_MAX 6
1018 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
1020 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
1022 static const int serial_io
[MAX_SERIAL_PORTS
] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1023 static const int serial_irq
[MAX_SERIAL_PORTS
] = { 4, 3, 4, 3 };
1025 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
1026 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
1029 static void audio_init (PCIBus
*pci_bus
, qemu_irq
*pic
)
1033 for (c
= soundhw
; c
->name
; ++c
) {
1036 c
->init
.init_isa(pic
);
1039 c
->init
.init_pci(pci_bus
);
1047 static void pc_init_ne2k_isa(NICInfo
*nd
)
1049 static int nb_ne2k
= 0;
1051 if (nb_ne2k
== NE2000_NB_MAX
)
1053 isa_ne2000_init(ne2000_io
[nb_ne2k
],
1054 ne2000_irq
[nb_ne2k
], nd
);
1058 static int load_option_rom(const char *oprom
, target_phys_addr_t start
,
1059 target_phys_addr_t end
)
1064 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, oprom
);
1066 size
= get_image_size(filename
);
1067 if (size
> 0 && start
+ size
> end
) {
1068 fprintf(stderr
, "Not enough space to load option rom '%s'\n",
1072 size
= load_image_targphys(filename
, start
, end
- start
);
1073 qemu_free(filename
);
1078 fprintf(stderr
, "Could not load option rom '%s'\n", oprom
);
1081 /* Round up optiom rom size to the next 2k boundary */
1082 size
= (size
+ 2047) & ~2047;
1083 option_rom_setup_reset(start
, size
);
1087 int cpu_is_bsp(CPUState
*env
)
1089 return env
->cpuid_apic_id
== 0;
1092 static CPUState
*pc_new_cpu(const char *cpu_model
)
1096 env
= cpu_init(cpu_model
);
1098 fprintf(stderr
, "Unable to find x86 CPU definition\n");
1101 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
1102 env
->cpuid_apic_id
= env
->cpu_index
;
1103 /* APIC reset callback resets cpu */
1106 qemu_register_reset((QEMUResetHandler
*)cpu_reset
, env
);
1111 /* PC hardware initialisation */
1112 static void pc_init1(ram_addr_t ram_size
,
1113 const char *boot_device
,
1114 const char *kernel_filename
,
1115 const char *kernel_cmdline
,
1116 const char *initrd_filename
,
1117 const char *cpu_model
,
1121 int ret
, linux_boot
, i
;
1122 ram_addr_t ram_addr
, bios_offset
, option_rom_offset
;
1123 ram_addr_t below_4g_mem_size
, above_4g_mem_size
= 0;
1124 int bios_size
, isa_bios_size
, oprom_area_size
;
1127 int piix3_devfn
= -1;
1132 IsaIrqState
*isa_irq_state
;
1134 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
1135 BlockDriverState
*fd
[MAX_FD
];
1136 int using_vga
= cirrus_vga_enabled
|| std_vga_enabled
|| vmsvga_enabled
;
1139 if (ram_size
>= 0xe0000000 ) {
1140 above_4g_mem_size
= ram_size
- 0xe0000000;
1141 below_4g_mem_size
= 0xe0000000;
1143 below_4g_mem_size
= ram_size
;
1146 linux_boot
= (kernel_filename
!= NULL
);
1149 if (cpu_model
== NULL
) {
1150 #ifdef TARGET_X86_64
1151 cpu_model
= "qemu64";
1153 cpu_model
= "qemu32";
1157 for (i
= 0; i
< smp_cpus
; i
++) {
1158 env
= pc_new_cpu(cpu_model
);
1164 ram_addr
= qemu_ram_alloc(0xa0000);
1165 cpu_register_physical_memory(0, 0xa0000, ram_addr
);
1167 /* Allocate, even though we won't register, so we don't break the
1168 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1169 * and some bios areas, which will be registered later
1171 ram_addr
= qemu_ram_alloc(0x100000 - 0xa0000);
1172 ram_addr
= qemu_ram_alloc(below_4g_mem_size
- 0x100000);
1173 cpu_register_physical_memory(0x100000,
1174 below_4g_mem_size
- 0x100000,
1177 /* above 4giga memory allocation */
1178 if (above_4g_mem_size
> 0) {
1179 #if TARGET_PHYS_ADDR_BITS == 32
1180 hw_error("To much RAM for 32-bit physical address");
1182 ram_addr
= qemu_ram_alloc(above_4g_mem_size
);
1183 cpu_register_physical_memory(0x100000000ULL
,
1191 if (bios_name
== NULL
)
1192 bios_name
= BIOS_FILENAME
;
1193 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1195 bios_size
= get_image_size(filename
);
1199 if (bios_size
<= 0 ||
1200 (bios_size
% 65536) != 0) {
1203 bios_offset
= qemu_ram_alloc(bios_size
);
1204 ret
= load_image(filename
, qemu_get_ram_ptr(bios_offset
));
1205 if (ret
!= bios_size
) {
1207 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
1211 qemu_free(filename
);
1213 /* map the last 128KB of the BIOS in ISA space */
1214 isa_bios_size
= bios_size
;
1215 if (isa_bios_size
> (128 * 1024))
1216 isa_bios_size
= 128 * 1024;
1217 cpu_register_physical_memory(0x100000 - isa_bios_size
,
1219 (bios_offset
+ bios_size
- isa_bios_size
) | IO_MEM_ROM
);
1223 option_rom_offset
= qemu_ram_alloc(0x20000);
1224 oprom_area_size
= 0;
1225 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset
);
1228 const char *vgabios_filename
;
1230 if (cirrus_vga_enabled
) {
1231 vgabios_filename
= VGABIOS_CIRRUS_FILENAME
;
1233 vgabios_filename
= VGABIOS_FILENAME
;
1235 oprom_area_size
= load_option_rom(vgabios_filename
, 0xc0000, 0xe0000);
1237 /* Although video roms can grow larger than 0x8000, the area between
1238 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
1239 * for any other kind of option rom inside this area */
1240 if (oprom_area_size
< 0x8000)
1241 oprom_area_size
= 0x8000;
1243 /* map all the bios at the top of memory */
1244 cpu_register_physical_memory((uint32_t)(-bios_size
),
1245 bios_size
, bios_offset
| IO_MEM_ROM
);
1247 fw_cfg
= bochs_bios_init();
1250 load_linux(fw_cfg
, 0xc0000 + oprom_area_size
,
1251 kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
1252 oprom_area_size
+= 2048;
1255 for (i
= 0; i
< nb_option_roms
; i
++) {
1256 oprom_area_size
+= load_option_rom(option_rom
[i
], 0xc0000 + oprom_area_size
,
1260 for (i
= 0; i
< nb_nics
; i
++) {
1261 char nic_oprom
[1024];
1262 const char *model
= nd_table
[i
].model
;
1264 if (!nd_table
[i
].bootable
)
1269 snprintf(nic_oprom
, sizeof(nic_oprom
), "pxe-%s.bin", model
);
1271 oprom_area_size
+= load_option_rom(nic_oprom
, 0xc0000 + oprom_area_size
,
1275 cpu_irq
= qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1276 i8259
= i8259_init(cpu_irq
[0]);
1277 isa_irq_state
= qemu_mallocz(sizeof(*isa_irq_state
));
1278 isa_irq_state
->i8259
= i8259
;
1279 isa_irq
= qemu_allocate_irqs(isa_irq_handler
, isa_irq_state
, 24);
1282 pci_bus
= i440fx_init(&i440fx_state
, &piix3_devfn
, isa_irq
);
1287 isa_bus_irqs(isa_irq
);
1289 ferr_irq
= isa_reserve_irq(13);
1291 /* init basic PC hardware */
1292 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1294 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1296 if (cirrus_vga_enabled
) {
1298 pci_cirrus_vga_init(pci_bus
);
1300 isa_cirrus_vga_init();
1302 } else if (vmsvga_enabled
) {
1304 pci_vmsvga_init(pci_bus
);
1306 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
1307 } else if (std_vga_enabled
) {
1309 pci_vga_init(pci_bus
, 0, 0);
1315 rtc_state
= rtc_init(2000);
1317 qemu_register_boot_set(pc_boot_set
, rtc_state
);
1319 register_ioport_read(0x92, 1, 1, ioport92_read
, NULL
);
1320 register_ioport_write(0x92, 1, 1, ioport92_write
, NULL
);
1323 isa_irq_state
->ioapic
= ioapic_init();
1325 pit
= pit_init(0x40, isa_reserve_irq(0));
1331 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1332 if (serial_hds
[i
]) {
1333 serial_init(serial_io
[i
], isa_reserve_irq(serial_irq
[i
]), 115200,
1338 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1339 if (parallel_hds
[i
]) {
1340 parallel_init(parallel_io
[i
], isa_reserve_irq(parallel_irq
[i
]),
1345 for(i
= 0; i
< nb_nics
; i
++) {
1346 NICInfo
*nd
= &nd_table
[i
];
1348 if (!pci_enabled
|| (nd
->model
&& strcmp(nd
->model
, "ne2k_isa") == 0))
1349 pc_init_ne2k_isa(nd
);
1351 pci_nic_init(nd
, "e1000", NULL
);
1354 piix4_acpi_system_hot_add_init();
1356 if (drive_get_max_bus(IF_IDE
) >= MAX_IDE_BUS
) {
1357 fprintf(stderr
, "qemu: too many IDE bus\n");
1361 for(i
= 0; i
< MAX_IDE_BUS
* MAX_IDE_DEVS
; i
++) {
1362 hd
[i
] = drive_get(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);
1366 pci_piix3_ide_init(pci_bus
, hd
, piix3_devfn
+ 1);
1368 for(i
= 0; i
< MAX_IDE_BUS
; i
++) {
1369 isa_ide_init(ide_iobase
[i
], ide_iobase2
[i
],
1370 isa_reserve_irq(ide_irq
[i
]),
1371 hd
[MAX_IDE_DEVS
* i
], hd
[MAX_IDE_DEVS
* i
+ 1]);
1375 isa_dev
= isa_create_simple("i8042");
1378 audio_init(pci_enabled
? pci_bus
: NULL
, isa_irq
);
1381 for(i
= 0; i
< MAX_FD
; i
++) {
1382 dinfo
= drive_get(IF_FLOPPY
, 0, i
);
1383 fd
[i
] = dinfo
? dinfo
->bdrv
: NULL
;
1385 floppy_controller
= fdctrl_init_isa(fd
);
1387 cmos_init(below_4g_mem_size
, above_4g_mem_size
, boot_device
, hd
);
1389 if (pci_enabled
&& usb_enabled
) {
1390 usb_uhci_piix3_init(pci_bus
, piix3_devfn
+ 2);
1393 if (pci_enabled
&& acpi_enabled
) {
1394 uint8_t *eeprom_buf
= qemu_mallocz(8 * 256); /* XXX: make this persistent */
1397 /* TODO: Populate SPD eeprom data. */
1398 smbus
= piix4_pm_init(pci_bus
, piix3_devfn
+ 3, 0xb100,
1399 isa_reserve_irq(9));
1400 for (i
= 0; i
< 8; i
++) {
1401 DeviceState
*eeprom
;
1402 eeprom
= qdev_create((BusState
*)smbus
, "smbus-eeprom");
1403 qdev_prop_set_uint32(eeprom
, "address", 0x50 + i
);
1404 qdev_prop_set_ptr(eeprom
, "data", eeprom_buf
+ (i
* 256));
1410 i440fx_init_memory_mappings(i440fx_state
);
1417 max_bus
= drive_get_max_bus(IF_SCSI
);
1418 for (bus
= 0; bus
<= max_bus
; bus
++) {
1419 pci_create_simple(pci_bus
, -1, "lsi53c895a");
1423 /* Add virtio console devices */
1425 for(i
= 0; i
< MAX_VIRTIO_CONSOLES
; i
++) {
1426 if (virtcon_hds
[i
]) {
1427 pci_create_simple(pci_bus
, -1, "virtio-console-pci");
1433 static void pc_init_pci(ram_addr_t ram_size
,
1434 const char *boot_device
,
1435 const char *kernel_filename
,
1436 const char *kernel_cmdline
,
1437 const char *initrd_filename
,
1438 const char *cpu_model
)
1440 pc_init1(ram_size
, boot_device
,
1441 kernel_filename
, kernel_cmdline
,
1442 initrd_filename
, cpu_model
, 1);
1445 static void pc_init_isa(ram_addr_t ram_size
,
1446 const char *boot_device
,
1447 const char *kernel_filename
,
1448 const char *kernel_cmdline
,
1449 const char *initrd_filename
,
1450 const char *cpu_model
)
1452 if (cpu_model
== NULL
)
1454 pc_init1(ram_size
, boot_device
,
1455 kernel_filename
, kernel_cmdline
,
1456 initrd_filename
, cpu_model
, 0);
1459 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1460 BIOS will read it and start S3 resume at POST Entry */
1461 void cmos_set_s3_resume(void)
1464 rtc_set_memory(rtc_state
, 0xF, 0xFE);
1467 static QEMUMachine pc_machine
= {
1470 .desc
= "Standard PC",
1471 .init
= pc_init_pci
,
1476 static QEMUMachine pc_machine_v0_10
= {
1478 .desc
= "Standard PC, qemu 0.10",
1479 .init
= pc_init_pci
,
1481 .compat_props
= (CompatProperty
[]) {
1483 .driver
= "virtio-blk-pci",
1484 .property
= "class",
1485 .value
= stringify(PCI_CLASS_STORAGE_OTHER
),
1487 .driver
= "virtio-console-pci",
1488 .property
= "class",
1489 .value
= stringify(PCI_CLASS_DISPLAY_OTHER
),
1491 .driver
= "virtio-net-pci",
1492 .property
= "vectors",
1493 .value
= stringify(0),
1495 .driver
= "virtio-blk-pci",
1496 .property
= "vectors",
1497 .value
= stringify(0),
1499 { /* end of list */ }
1503 static QEMUMachine isapc_machine
= {
1505 .desc
= "ISA-only PC",
1506 .init
= pc_init_isa
,
1510 static void pc_machine_init(void)
1512 qemu_register_machine(&pc_machine
);
1513 qemu_register_machine(&pc_machine_v0_10
);
1514 qemu_register_machine(&isapc_machine
);
1517 machine_init(pc_machine_init
);