4 * Copyright (c) 2005 Samuel Tardieu
5 * Copyright (c) 2012 SUSE LINUX Products GmbH
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/lgpl-2.1.html>
23 #include "qemu-common.h"
24 #include "migration/vmstate.h"
27 /* CPUClass::reset() */
28 static void superh_cpu_reset(CPUState
*s
)
30 SuperHCPU
*cpu
= SUPERH_CPU(s
);
31 SuperHCPUClass
*scc
= SUPERH_CPU_GET_CLASS(cpu
);
32 CPUSH4State
*env
= &cpu
->env
;
36 memset(env
, 0, offsetof(CPUSH4State
, breakpoints
));
40 #if defined(CONFIG_USER_ONLY)
41 env
->fpscr
= FPSCR_PR
; /* value for userspace according to the kernel */
42 set_float_rounding_mode(float_round_nearest_even
, &env
->fp_status
); /* ?! */
44 env
->sr
= SR_MD
| SR_RB
| SR_BL
| SR_I3
| SR_I2
| SR_I1
| SR_I0
;
45 env
->fpscr
= FPSCR_DN
| FPSCR_RM_ZERO
; /* CPU reset value according to SH4 manual */
46 set_float_rounding_mode(float_round_to_zero
, &env
->fp_status
);
47 set_flush_to_zero(1, &env
->fp_status
);
49 set_default_nan_mode(1, &env
->fp_status
);
52 typedef struct SuperHCPUListState
{
53 fprintf_function cpu_fprintf
;
57 /* Sort alphabetically by type name. */
58 static gint
superh_cpu_list_compare(gconstpointer a
, gconstpointer b
)
60 ObjectClass
*class_a
= (ObjectClass
*)a
;
61 ObjectClass
*class_b
= (ObjectClass
*)b
;
62 const char *name_a
, *name_b
;
64 name_a
= object_class_get_name(class_a
);
65 name_b
= object_class_get_name(class_b
);
66 return strcmp(name_a
, name_b
);
69 static void superh_cpu_list_entry(gpointer data
, gpointer user_data
)
71 ObjectClass
*oc
= data
;
72 SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(oc
);
73 SuperHCPUListState
*s
= user_data
;
75 (*s
->cpu_fprintf
)(s
->file
, "%s\n",
79 void sh4_cpu_list(FILE *f
, fprintf_function cpu_fprintf
)
81 SuperHCPUListState s
= {
82 .cpu_fprintf
= cpu_fprintf
,
87 list
= object_class_get_list(TYPE_SUPERH_CPU
, false);
88 list
= g_slist_sort(list
, superh_cpu_list_compare
);
89 g_slist_foreach(list
, superh_cpu_list_entry
, &s
);
93 static gint
superh_cpu_name_compare(gconstpointer a
, gconstpointer b
)
95 const SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(a
);
98 return strcasecmp(scc
->name
, name
);
101 static ObjectClass
*superh_cpu_class_by_name(const char *cpu_model
)
106 if (cpu_model
== NULL
) {
109 if (strcasecmp(cpu_model
, "any") == 0) {
110 return object_class_by_name(TYPE_SH7750R_CPU
);
113 oc
= object_class_by_name(cpu_model
);
114 if (oc
!= NULL
&& object_class_dynamic_cast(oc
, TYPE_SUPERH_CPU
) != NULL
115 && !object_class_is_abstract(oc
)) {
120 list
= object_class_get_list(TYPE_SUPERH_CPU
, false);
121 item
= g_slist_find_custom(list
, cpu_model
, superh_cpu_name_compare
);
129 SuperHCPU
*cpu_sh4_init(const char *cpu_model
)
135 oc
= superh_cpu_class_by_name(cpu_model
);
139 cpu
= SUPERH_CPU(object_new(object_class_get_name(oc
)));
141 env
->cpu_model_str
= cpu_model
;
143 object_property_set_bool(OBJECT(cpu
), true, "realized", NULL
);
148 static void sh7750r_cpu_initfn(Object
*obj
)
150 SuperHCPU
*cpu
= SUPERH_CPU(obj
);
151 CPUSH4State
*env
= &cpu
->env
;
153 env
->id
= SH_CPU_SH7750R
;
154 env
->features
= SH_FEATURE_BCR3_AND_BCR4
;
157 static void sh7750r_class_init(ObjectClass
*oc
, void *data
)
159 SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(oc
);
161 scc
->name
= "SH7750R";
162 scc
->pvr
= 0x00050000;
163 scc
->prr
= 0x00000100;
164 scc
->cvr
= 0x00110000;
167 static const TypeInfo sh7750r_type_info
= {
168 .name
= TYPE_SH7750R_CPU
,
169 .parent
= TYPE_SUPERH_CPU
,
170 .class_init
= sh7750r_class_init
,
171 .instance_init
= sh7750r_cpu_initfn
,
174 static void sh7751r_cpu_initfn(Object
*obj
)
176 SuperHCPU
*cpu
= SUPERH_CPU(obj
);
177 CPUSH4State
*env
= &cpu
->env
;
179 env
->id
= SH_CPU_SH7751R
;
180 env
->features
= SH_FEATURE_BCR3_AND_BCR4
;
183 static void sh7751r_class_init(ObjectClass
*oc
, void *data
)
185 SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(oc
);
187 scc
->name
= "SH7751R";
188 scc
->pvr
= 0x04050005;
189 scc
->prr
= 0x00000113;
190 scc
->cvr
= 0x00110000; /* Neutered caches, should be 0x20480000 */
193 static const TypeInfo sh7751r_type_info
= {
194 .name
= TYPE_SH7751R_CPU
,
195 .parent
= TYPE_SUPERH_CPU
,
196 .class_init
= sh7751r_class_init
,
197 .instance_init
= sh7751r_cpu_initfn
,
200 static void sh7785_cpu_initfn(Object
*obj
)
202 SuperHCPU
*cpu
= SUPERH_CPU(obj
);
203 CPUSH4State
*env
= &cpu
->env
;
205 env
->id
= SH_CPU_SH7785
;
206 env
->features
= SH_FEATURE_SH4A
;
209 static void sh7785_class_init(ObjectClass
*oc
, void *data
)
211 SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(oc
);
213 scc
->name
= "SH7785";
214 scc
->pvr
= 0x10300700;
215 scc
->prr
= 0x00000200;
216 scc
->cvr
= 0x71440211;
219 static const TypeInfo sh7785_type_info
= {
220 .name
= TYPE_SH7785_CPU
,
221 .parent
= TYPE_SUPERH_CPU
,
222 .class_init
= sh7785_class_init
,
223 .instance_init
= sh7785_cpu_initfn
,
226 static void superh_cpu_realizefn(DeviceState
*dev
, Error
**errp
)
228 SuperHCPU
*cpu
= SUPERH_CPU(dev
);
229 SuperHCPUClass
*scc
= SUPERH_CPU_GET_CLASS(dev
);
233 scc
->parent_realize(dev
, errp
);
236 static void superh_cpu_initfn(Object
*obj
)
238 CPUState
*cs
= CPU(obj
);
239 SuperHCPU
*cpu
= SUPERH_CPU(obj
);
240 CPUSH4State
*env
= &cpu
->env
;
245 env
->movcal_backup_tail
= &(env
->movcal_backup
);
248 sh4_translate_init();
252 static const VMStateDescription vmstate_sh_cpu
= {
257 static void superh_cpu_class_init(ObjectClass
*oc
, void *data
)
259 DeviceClass
*dc
= DEVICE_CLASS(oc
);
260 CPUClass
*cc
= CPU_CLASS(oc
);
261 SuperHCPUClass
*scc
= SUPERH_CPU_CLASS(oc
);
263 scc
->parent_realize
= dc
->realize
;
264 dc
->realize
= superh_cpu_realizefn
;
266 scc
->parent_reset
= cc
->reset
;
267 cc
->reset
= superh_cpu_reset
;
269 cc
->class_by_name
= superh_cpu_class_by_name
;
270 cc
->do_interrupt
= superh_cpu_do_interrupt
;
271 cc
->dump_state
= superh_cpu_dump_state
;
272 dc
->vmsd
= &vmstate_sh_cpu
;
275 static const TypeInfo superh_cpu_type_info
= {
276 .name
= TYPE_SUPERH_CPU
,
278 .instance_size
= sizeof(SuperHCPU
),
279 .instance_init
= superh_cpu_initfn
,
281 .class_size
= sizeof(SuperHCPUClass
),
282 .class_init
= superh_cpu_class_init
,
285 static void superh_cpu_register_types(void)
287 type_register_static(&superh_cpu_type_info
);
288 type_register_static(&sh7750r_type_info
);
289 type_register_static(&sh7751r_type_info
);
290 type_register_static(&sh7785_type_info
);
293 type_init(superh_cpu_register_types
)