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hw/arm/xilinx_zynq: connect uart clocks to slcr
2020-04-30 Damien Heddehw/arm/xilinx_zynq: connect uart clocks to slcr
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-9-damien.hedde@greensocs.com
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2020-04-30 Damien Heddehw/char/cadence_uart: add clock support
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-8-damien.hedde@greensocs.com
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2020-04-30 Damien Heddehw/misc/zynq_slcr: add clock generation for uarts
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-7-damien.hedde@greensocs.com
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2020-04-30 Damien Heddeqdev-clock: introduce an init array to ease the device...
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-5-damien.hedde@greensocs.com
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2020-04-30 Damien Heddeqdev: add clock input&output support to devices.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-4-damien.hedde@greensocs.com
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2020-04-30 Damien Heddehw/core/clock-vmstate: define a vmstate entry for clock...
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200406135251.157596-3-damien.hedde@greensocs.com
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2020-03-17 Damien Heddegdbstub: do not split gdb_monitor_write payload
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...Id: <20191211160514.58373-3-damien.hedde@greensocs.com>
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2020-03-17 Damien Heddegdbstub: change GDBState.last_packet to GByteArray
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...Id: <20191211160514.58373-2-damien.hedde@greensocs.com>
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2020-01-30 Damien Heddehw/s390x/ipl: replace deprecated qdev_reset_all registration
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
... 20200123132823.1117486-12-damien.hedde@greensocs.com
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2020-01-30 Damien Heddevl: replace deprecated qbus_reset_all registration
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
... 20200123132823.1117486-11-damien.hedde@greensocs.com
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2020-01-30 Damien Heddedocs/devel/reset.rst: add doc about Resettable interface
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
... 20200123132823.1117486-10-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core: deprecate old reset functions and introduce...
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-9-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core/qdev: update hotplug reset regarding resettable
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-8-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core/qdev: handle parent bus change regarding resettable
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-7-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core/resettable: add support for changing parent
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-6-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core: add Resettable support to BusClass and DeviceClass
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-5-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core: create Resettable QOM interface
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-4-damien.hedde@greensocs.com
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2020-01-30 Damien Heddehw/core/qdev: add trace events to help with resettable...
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-3-damien.hedde@greensocs.com
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2020-01-30 Damien Heddeadd device_legacy_reset function to prepare for reset...
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20200123132823.1117486-2-damien.hedde@greensocs.com
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2019-08-16 Damien Heddehw/misc/zynq_slcr: use standard register definition
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20190729145654.14644-30-damien.hedde@greensocs.com
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2019-07-26 Damien Heddepl330: fix vmstate description
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
...id: 20190724143553.21557-1-damien.hedde@greensocs.com
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armbru's QEMU hackery