disas/riscv-xventana.c

   1 /*
   2  * QEMU RISC-V Disassembler for xventana.
   3  *
   4  * SPDX-License-Identifier: GPL-2.0-or-later
   5  */
   6
   7 #include "qemu/osdep.h"
   8 #include "disas/riscv.h"
   9 #include "disas/riscv-xventana.h"
  10
  11 typedef enum {
  12     /* 0 is reserved for rv_op_illegal. */
  13     ventana_op_vt_maskc = 1,
  14     ventana_op_vt_maskcn = 2,
  15 } rv_ventana_op;
  16
  17 const rv_opcode_data ventana_opcode_data[] = {
  18     { "vt.illegal", rv_codec_illegal, rv_fmt_none, NULL, 0, 0, 0 },
  19     { "vt.maskc", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
  20     { "vt.maskcn", rv_codec_r, rv_fmt_rd_rs1_rs2, NULL, 0, 0, 0 },
  21 };
  22
  23 void decode_xventanacondops(rv_decode *dec, rv_isa isa)
  24 {
  25     rv_inst inst = dec->inst;
  26     rv_opcode op = rv_op_illegal;
  27
  28     switch (((inst >> 0) & 0b11)) {
  29     case 3:
  30         switch (((inst >> 2) & 0b11111)) {
  31         case 30:
  32             switch (((inst >> 22) & 0b1111111000) | ((inst >> 12) & 0b0000000111)) {
  33             case 6: op = ventana_op_vt_maskc; break;
  34             case 7: op = ventana_op_vt_maskcn; break;
  35             }
  36             break;
  37         }
  38         break;
  39     }
  40
  41     dec->op = op;
  42 }