3 # tool for querying VMX capabilities
5 # Copyright 2009-2010 Red Hat, Inc.
8 # Avi Kivity <avi@redhat.com>
10 # This work is licensed under the terms of the GNU GPL, version 2. See
11 # the COPYING file in the top-level directory.
13 from __future__
import print_function
14 MSR_IA32_VMX_BASIC
= 0x480
15 MSR_IA32_VMX_PINBASED_CTLS
= 0x481
16 MSR_IA32_VMX_PROCBASED_CTLS
= 0x482
17 MSR_IA32_VMX_EXIT_CTLS
= 0x483
18 MSR_IA32_VMX_ENTRY_CTLS
= 0x484
19 MSR_IA32_VMX_MISC_CTLS
= 0x485
20 MSR_IA32_VMX_PROCBASED_CTLS2
= 0x48B
21 MSR_IA32_VMX_EPT_VPID_CAP
= 0x48C
22 MSR_IA32_VMX_TRUE_PINBASED_CTLS
= 0x48D
23 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
= 0x48E
24 MSR_IA32_VMX_TRUE_EXIT_CTLS
= 0x48F
25 MSR_IA32_VMX_TRUE_ENTRY_CTLS
= 0x490
26 MSR_IA32_VMX_VMFUNC
= 0x491
31 self
.f
= open('/dev/cpu/0/msr', 'rb', 0)
33 self
.f
= open('/dev/msr0', 'rb', 0)
34 def read(self
, index
, default
= None):
38 return struct
.unpack('Q', self
.f
.read(8))[0]
42 class Control(object):
43 def __init__(self
, name
, bits
, cap_msr
, true_cap_msr
= None):
46 self
.cap_msr
= cap_msr
47 self
.true_cap_msr
= true_cap_msr
51 return (val
& 0xffffffff, val
>> 32)
54 mb1
, cb1
= self
.read2(self
.cap_msr
)
57 tmb1
, tcb1
= self
.read2(self
.true_cap_msr
)
58 for bit
in sorted(self
.bits
.keys()):
59 zero
= not (mb1
& (1 << bit
))
60 one
= cb1
& (1 << bit
)
61 true_zero
= not (tmb1
& (1 << bit
))
62 true_one
= tcb1
& (1 << bit
)
64 if (self
.true_cap_msr
and true_zero
and true_one
65 and one
and not zero
):
67 elif zero
and not one
:
69 elif one
and not zero
:
73 print(' %-40s %s' % (self
.bits
[bit
], s
))
76 def __init__(self
, name
, bits
, msr
):
82 value
= msr().read(self
.msr
, 0)
83 print(' Hex: 0x%x' % (value
))
85 if type(key
) is tuple:
89 for bits
in sorted(self
.bits
.keys(), key
= first_bit
):
90 if type(bits
) is tuple:
96 return { True: 'yes', False: 'no' }[x
]
97 v
= (value
>> lo
) & ((1 << (hi
- lo
+ 1)) - 1)
98 print(' %-40s %s' % (self
.bits
[bits
], fmt(v
)))
102 name
= 'Basic VMX Information',
105 (32,44): 'VMCS size',
106 48: 'VMCS restricted to 32 bit addresses',
107 49: 'Dual-monitor support',
108 (50, 53): 'VMCS memory type',
109 54: 'INS/OUTS instruction information',
110 55: 'IA32_VMX_TRUE_*_CTLS support',
112 msr
= MSR_IA32_VMX_BASIC
,
115 name
= 'pin-based controls',
117 0: 'External interrupt exiting',
120 6: 'Activate VMX-preemption timer',
121 7: 'Process posted interrupts',
123 cap_msr
= MSR_IA32_VMX_PINBASED_CTLS
,
124 true_cap_msr
= MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
128 name
= 'primary processor-based controls',
130 2: 'Interrupt window exiting',
131 3: 'Use TSC offsetting',
137 15: 'CR3-load exiting',
138 16: 'CR3-store exiting',
139 19: 'CR8-load exiting',
140 20: 'CR8-store exiting',
141 21: 'Use TPR shadow',
142 22: 'NMI-window exiting',
143 23: 'MOV-DR exiting',
144 24: 'Unconditional I/O exiting',
145 25: 'Use I/O bitmaps',
146 27: 'Monitor trap flag',
147 28: 'Use MSR bitmaps',
148 29: 'MONITOR exiting',
150 31: 'Activate secondary control',
152 cap_msr
= MSR_IA32_VMX_PROCBASED_CTLS
,
153 true_cap_msr
= MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
157 name
= 'secondary processor-based controls',
159 0: 'Virtualize APIC accesses',
161 2: 'Descriptor-table exiting',
163 4: 'Virtualize x2APIC mode',
166 7: 'Unrestricted guest',
167 8: 'APIC register emulation',
168 9: 'Virtual interrupt delivery',
169 10: 'PAUSE-loop exiting',
170 11: 'RDRAND exiting',
171 12: 'Enable INVPCID',
172 13: 'Enable VM functions',
173 14: 'VMCS shadowing',
174 15: 'Enable ENCLS exiting',
175 16: 'RDSEED exiting',
177 18: 'EPT-violation #VE',
178 19: 'Conceal non-root operation from PT',
179 20: 'Enable XSAVES/XRSTORS',
180 22: 'Mode-based execute control (XS/XU)',
181 23: 'Sub-page write permissions',
182 24: 'GPA translation for PT',
184 26: 'User wait and pause',
187 cap_msr
= MSR_IA32_VMX_PROCBASED_CTLS2
,
191 name
= 'VM-Exit controls',
193 2: 'Save debug controls',
194 9: 'Host address-space size',
195 12: 'Load IA32_PERF_GLOBAL_CTRL',
196 15: 'Acknowledge interrupt on exit',
199 20: 'Save IA32_EFER',
200 21: 'Load IA32_EFER',
201 22: 'Save VMX-preemption timer value',
202 23: 'Clear IA32_BNDCFGS',
203 24: 'Conceal VM exits from PT',
204 25: 'Clear IA32_RTIT_CTL',
206 cap_msr
= MSR_IA32_VMX_EXIT_CTLS
,
207 true_cap_msr
= MSR_IA32_VMX_TRUE_EXIT_CTLS
,
211 name
= 'VM-Entry controls',
213 2: 'Load debug controls',
214 9: 'IA-32e mode guest',
216 11: 'Deactivate dual-monitor treatment',
217 13: 'Load IA32_PERF_GLOBAL_CTRL',
219 15: 'Load IA32_EFER',
220 16: 'Load IA32_BNDCFGS',
221 17: 'Conceal VM entries from PT',
222 18: 'Load IA32_RTIT_CTL',
224 cap_msr
= MSR_IA32_VMX_ENTRY_CTLS
,
225 true_cap_msr
= MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
229 name
= 'Miscellaneous data',
231 (0,4): 'VMX-preemption timer scale (log2)',
232 5: 'Store EFER.LMA into IA-32e mode guest control',
233 6: 'HLT activity state',
234 7: 'Shutdown activity state',
235 8: 'Wait-for-SIPI activity state',
236 14: 'PT in VMX operation',
237 15: 'IA32_SMBASE support',
238 (16,24): 'Number of CR3-target values',
239 (25,27): 'MSR-load/store count recommendation',
240 28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
241 29: 'VMWRITE to VM-exit information fields',
242 30: 'Inject event with insn length=0',
243 (32,63): 'MSEG revision identifier',
245 msr
= MSR_IA32_VMX_MISC_CTLS
,
249 name
= 'VPID and EPT capabilities',
251 0: 'Execute-only EPT translations',
252 6: 'Page-walk length 4',
253 8: 'Paging-structure memory type UC',
254 14: 'Paging-structure memory type WB',
257 20: 'INVEPT supported',
258 21: 'EPT accessed and dirty flags',
259 22: 'Advanced VM-exit information for EPT violations',
260 25: 'Single-context INVEPT',
261 26: 'All-context INVEPT',
262 32: 'INVVPID supported',
263 40: 'Individual-address INVVPID',
264 41: 'Single-context INVVPID',
265 42: 'All-context INVVPID',
266 43: 'Single-context-retaining-globals INVVPID',
268 msr
= MSR_IA32_VMX_EPT_VPID_CAP
,
271 name
= 'VM Functions',
275 msr
= MSR_IA32_VMX_VMFUNC
,