hw/misc/ivshmem.c

   1 /*
   2  * Inter-VM Shared Memory PCI device.
   3  *
   4  * Author:
   5  *      Cam Macdonell <cam@cs.ualberta.ca>
   6  *
   7  * Based On: cirrus_vga.c
   8  *          Copyright (c) 2004 Fabrice Bellard
   9  *          Copyright (c) 2004 Makoto Suzuki (suzu)
  10  *
  11  *      and rtl8139.c
  12  *          Copyright (c) 2006 Igor Kovalenko
  13  *
  14  * This code is licensed under the GNU GPL v2.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "hw/hw.h"
  21 #include "hw/i386/pc.h"
  22 #include "hw/pci/pci.h"
  23 #include "hw/pci/msi.h"
  24 #include "hw/pci/msix.h"
  25 #include "sysemu/kvm.h"
  26 #include "migration/migration.h"
  27 #include "qemu/error-report.h"
  28 #include "qemu/event_notifier.h"
  29 #include "qemu/fifo8.h"
  30 #include "sysemu/char.h"
  31 #include "sysemu/hostmem.h"
  32 #include "qapi/visitor.h"
  33 #include "exec/ram_addr.h"
  34
  35 #include "hw/misc/ivshmem.h"
  36
  37 #include <sys/mman.h>
  38
  39 #define PCI_VENDOR_ID_IVSHMEM   PCI_VENDOR_ID_REDHAT_QUMRANET
  40 #define PCI_DEVICE_ID_IVSHMEM   0x1110
  41
  42 #define IVSHMEM_MAX_PEERS UINT16_MAX
  43 #define IVSHMEM_IOEVENTFD   0
  44 #define IVSHMEM_MSI     1
  45
  46 #define IVSHMEM_PEER    0
  47 #define IVSHMEM_MASTER  1
  48
  49 #define IVSHMEM_REG_BAR_SIZE 0x100
  50
  51 #define IVSHMEM_DEBUG 0
  52 #define IVSHMEM_DPRINTF(fmt, ...)                       \
  53     do {                                                \
  54         if (IVSHMEM_DEBUG) {                            \
  55             printf("IVSHMEM: " fmt, ## __VA_ARGS__);    \
  56         }                                               \
  57     } while (0)
  58
  59 #define TYPE_IVSHMEM "ivshmem"
  60 #define IVSHMEM(obj) \
  61     OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
  62
  63 typedef struct Peer {
  64     int nb_eventfds;
  65     EventNotifier *eventfds;
  66 } Peer;
  67
  68 typedef struct MSIVector {
  69     PCIDevice *pdev;
  70     int virq;
  71 } MSIVector;
  72
  73 typedef struct IVShmemState {
  74     /*< private >*/
  75     PCIDevice parent_obj;
  76     /*< public >*/
  77
  78     HostMemoryBackend *hostmem;
  79     uint32_t intrmask;
  80     uint32_t intrstatus;
  81
  82     CharDriverState *server_chr;
  83     Fifo8 incoming_fifo;
  84     MemoryRegion ivshmem_mmio;
  85
  86     /* We might need to register the BAR before we actually have the memory.
  87      * So prepare a container MemoryRegion for the BAR immediately and
  88      * add a subregion when we have the memory.
  89      */
  90     MemoryRegion bar;
  91     MemoryRegion ivshmem;
  92     uint64_t ivshmem_size; /* size of shared memory region */
  93     uint32_t ivshmem_64bit;
  94
  95     Peer *peers;
  96     int nb_peers;               /* space in @peers[] */
  97
  98     int vm_id;
  99     uint32_t vectors;
 100     uint32_t features;
 101     MSIVector *msi_vectors;
 102
 103     Error *migration_blocker;
 104
 105     char * shmobj;
 106     char * sizearg;
 107     char * role;
 108     int role_val;   /* scalar to avoid multiple string comparisons */
 109 } IVShmemState;
 110
 111 /* registers for the Inter-VM shared memory device */
 112 enum ivshmem_registers {
 113     INTRMASK = 0,
 114     INTRSTATUS = 4,
 115     IVPOSITION = 8,
 116     DOORBELL = 12,
 117 };
 118
 119 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
 120                                                     unsigned int feature) {
 121     return (ivs->features & (1 << feature));
 122 }
 123
 124 static void ivshmem_update_irq(IVShmemState *s)
 125 {
 126     PCIDevice *d = PCI_DEVICE(s);
 127     uint32_t isr = s->intrstatus & s->intrmask;
 128
 129     /* No INTx with msi=on, whether the guest enabled MSI-X or not */
 130     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 131         return;
 132     }
 133
 134     /* don't print ISR resets */
 135     if (isr) {
 136         IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
 137                         isr ? 1 : 0, s->intrstatus, s->intrmask);
 138     }
 139
 140     pci_set_irq(d, isr != 0);
 141 }
 142
 143 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
 144 {
 145     IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
 146
 147     s->intrmask = val;
 148     ivshmem_update_irq(s);
 149 }
 150
 151 static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
 152 {
 153     uint32_t ret = s->intrmask;
 154
 155     IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
 156     return ret;
 157 }
 158
 159 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
 160 {
 161     IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
 162
 163     s->intrstatus = val;
 164     ivshmem_update_irq(s);
 165 }
 166
 167 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
 168 {
 169     uint32_t ret = s->intrstatus;
 170
 171     /* reading ISR clears all interrupts */
 172     s->intrstatus = 0;
 173     ivshmem_update_irq(s);
 174     return ret;
 175 }
 176
 177 static void ivshmem_io_write(void *opaque, hwaddr addr,
 178                              uint64_t val, unsigned size)
 179 {
 180     IVShmemState *s = opaque;
 181
 182     uint16_t dest = val >> 16;
 183     uint16_t vector = val & 0xff;
 184
 185     addr &= 0xfc;
 186
 187     IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
 188     switch (addr)
 189     {
 190         case INTRMASK:
 191             ivshmem_IntrMask_write(s, val);
 192             break;
 193
 194         case INTRSTATUS:
 195             ivshmem_IntrStatus_write(s, val);
 196             break;
 197
 198         case DOORBELL:
 199             /* check that dest VM ID is reasonable */
 200             if (dest >= s->nb_peers) {
 201                 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
 202                 break;
 203             }
 204
 205             /* check doorbell range */
 206             if (vector < s->peers[dest].nb_eventfds) {
 207                 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
 208                 event_notifier_set(&s->peers[dest].eventfds[vector]);
 209             } else {
 210                 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
 211                                 vector, dest);
 212             }
 213             break;
 214         default:
 215             IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
 216     }
 217 }
 218
 219 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
 220                                 unsigned size)
 221 {
 222
 223     IVShmemState *s = opaque;
 224     uint32_t ret;
 225
 226     switch (addr)
 227     {
 228         case INTRMASK:
 229             ret = ivshmem_IntrMask_read(s);
 230             break;
 231
 232         case INTRSTATUS:
 233             ret = ivshmem_IntrStatus_read(s);
 234             break;
 235
 236         case IVPOSITION:
 237             /* return my VM ID if the memory is mapped */
 238             if (memory_region_is_mapped(&s->ivshmem)) {
 239                 ret = s->vm_id;
 240             } else {
 241                 ret = -1;
 242             }
 243             break;
 244
 245         default:
 246             IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
 247             ret = 0;
 248     }
 249
 250     return ret;
 251 }
 252
 253 static const MemoryRegionOps ivshmem_mmio_ops = {
 254     .read = ivshmem_io_read,
 255     .write = ivshmem_io_write,
 256     .endianness = DEVICE_NATIVE_ENDIAN,
 257     .impl = {
 258         .min_access_size = 4,
 259         .max_access_size = 4,
 260     },
 261 };
 262
 263 static int ivshmem_can_receive(void * opaque)
 264 {
 265     return sizeof(int64_t);
 266 }
 267
 268 static void ivshmem_vector_notify(void *opaque)
 269 {
 270     MSIVector *entry = opaque;
 271     PCIDevice *pdev = entry->pdev;
 272     IVShmemState *s = IVSHMEM(pdev);
 273     int vector = entry - s->msi_vectors;
 274     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 275
 276     if (!event_notifier_test_and_clear(n)) {
 277         return;
 278     }
 279
 280     IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
 281     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 282         if (msix_enabled(pdev)) {
 283             msix_notify(pdev, vector);
 284         }
 285     } else {
 286         ivshmem_IntrStatus_write(s, 1);
 287     }
 288 }
 289
 290 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
 291                                  MSIMessage msg)
 292 {
 293     IVShmemState *s = IVSHMEM(dev);
 294     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 295     MSIVector *v = &s->msi_vectors[vector];
 296     int ret;
 297
 298     IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
 299
 300     ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
 301     if (ret < 0) {
 302         return ret;
 303     }
 304
 305     return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
 306 }
 307
 308 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
 309 {
 310     IVShmemState *s = IVSHMEM(dev);
 311     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 312     int ret;
 313
 314     IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
 315
 316     ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n,
 317                                                 s->msi_vectors[vector].virq);
 318     if (ret != 0) {
 319         error_report("remove_irqfd_notifier_gsi failed");
 320     }
 321 }
 322
 323 static void ivshmem_vector_poll(PCIDevice *dev,
 324                                 unsigned int vector_start,
 325                                 unsigned int vector_end)
 326 {
 327     IVShmemState *s = IVSHMEM(dev);
 328     unsigned int vector;
 329
 330     IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
 331
 332     vector_end = MIN(vector_end, s->vectors);
 333
 334     for (vector = vector_start; vector < vector_end; vector++) {
 335         EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
 336
 337         if (!msix_is_masked(dev, vector)) {
 338             continue;
 339         }
 340
 341         if (event_notifier_test_and_clear(notifier)) {
 342             msix_set_pending(dev, vector);
 343         }
 344     }
 345 }
 346
 347 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
 348                                  int vector)
 349 {
 350     int eventfd = event_notifier_get_fd(n);
 351
 352     assert(!s->msi_vectors[vector].pdev);
 353     s->msi_vectors[vector].pdev = PCI_DEVICE(s);
 354
 355     qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
 356                         NULL, &s->msi_vectors[vector]);
 357 }
 358
 359 static int check_shm_size(IVShmemState *s, int fd, Error **errp)
 360 {
 361     /* check that the guest isn't going to try and map more memory than the
 362      * the object has allocated return -1 to indicate error */
 363
 364     struct stat buf;
 365
 366     if (fstat(fd, &buf) < 0) {
 367         error_setg(errp, "exiting: fstat on fd %d failed: %s",
 368                    fd, strerror(errno));
 369         return -1;
 370     }
 371
 372     if (s->ivshmem_size > buf.st_size) {
 373         error_setg(errp, "Requested memory size greater"
 374                    " than shared object size (%" PRIu64 " > %" PRIu64")",
 375                    s->ivshmem_size, (uint64_t)buf.st_size);
 376         return -1;
 377     } else {
 378         return 0;
 379     }
 380 }
 381
 382 /* create the shared memory BAR when we are not using the server, so we can
 383  * create the BAR and map the memory immediately */
 384 static int create_shared_memory_BAR(IVShmemState *s, int fd, uint8_t attr,
 385                                     Error **errp)
 386 {
 387     void * ptr;
 388
 389     ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
 390     if (ptr == MAP_FAILED) {
 391         error_setg_errno(errp, errno, "Failed to mmap shared memory");
 392         return -1;
 393     }
 394
 395     memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
 396                                s->ivshmem_size, ptr);
 397     qemu_set_ram_fd(memory_region_get_ram_addr(&s->ivshmem), fd);
 398     vmstate_register_ram(&s->ivshmem, DEVICE(s));
 399     memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
 400
 401     /* region for shared memory */
 402     pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
 403
 404     return 0;
 405 }
 406
 407 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
 408 {
 409     memory_region_add_eventfd(&s->ivshmem_mmio,
 410                               DOORBELL,
 411                               4,
 412                               true,
 413                               (posn << 16) | i,
 414                               &s->peers[posn].eventfds[i]);
 415 }
 416
 417 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
 418 {
 419     memory_region_del_eventfd(&s->ivshmem_mmio,
 420                               DOORBELL,
 421                               4,
 422                               true,
 423                               (posn << 16) | i,
 424                               &s->peers[posn].eventfds[i]);
 425 }
 426
 427 static void close_peer_eventfds(IVShmemState *s, int posn)
 428 {
 429     int i, n;
 430
 431     if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 432         return;
 433     }
 434     if (posn < 0 || posn >= s->nb_peers) {
 435         error_report("invalid peer %d", posn);
 436         return;
 437     }
 438
 439     n = s->peers[posn].nb_eventfds;
 440
 441     memory_region_transaction_begin();
 442     for (i = 0; i < n; i++) {
 443         ivshmem_del_eventfd(s, posn, i);
 444     }
 445     memory_region_transaction_commit();
 446     for (i = 0; i < n; i++) {
 447         event_notifier_cleanup(&s->peers[posn].eventfds[i]);
 448     }
 449
 450     g_free(s->peers[posn].eventfds);
 451     s->peers[posn].nb_eventfds = 0;
 452 }
 453
 454 static void resize_peers(IVShmemState *s, int nb_peers)
 455 {
 456     int old_nb_peers = s->nb_peers;
 457     int i;
 458
 459     assert(nb_peers > old_nb_peers);
 460     IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers);
 461
 462     s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer));
 463     s->nb_peers = nb_peers;
 464
 465     for (i = old_nb_peers; i < nb_peers; i++) {
 466         s->peers[i].eventfds = g_new0(EventNotifier, s->vectors);
 467         s->peers[i].nb_eventfds = 0;
 468     }
 469 }
 470
 471 static bool fifo_update_and_get(IVShmemState *s, const uint8_t *buf, int size,
 472                                 void *data, size_t len)
 473 {
 474     const uint8_t *p;
 475     uint32_t num;
 476
 477     assert(len <= sizeof(int64_t)); /* limitation of the fifo */
 478     if (fifo8_is_empty(&s->incoming_fifo) && size == len) {
 479         memcpy(data, buf, size);
 480         return true;
 481     }
 482
 483     IVSHMEM_DPRINTF("short read of %d bytes\n", size);
 484
 485     num = MIN(size, sizeof(int64_t) - fifo8_num_used(&s->incoming_fifo));
 486     fifo8_push_all(&s->incoming_fifo, buf, num);
 487
 488     if (fifo8_num_used(&s->incoming_fifo) < len) {
 489         assert(num == 0);
 490         return false;
 491     }
 492
 493     size -= num;
 494     buf += num;
 495     p = fifo8_pop_buf(&s->incoming_fifo, len, &num);
 496     assert(num == len);
 497
 498     memcpy(data, p, len);
 499
 500     if (size > 0) {
 501         fifo8_push_all(&s->incoming_fifo, buf, size);
 502     }
 503
 504     return true;
 505 }
 506
 507 static bool fifo_update_and_get_i64(IVShmemState *s,
 508                                     const uint8_t *buf, int size, int64_t *i64)
 509 {
 510     if (fifo_update_and_get(s, buf, size, i64, sizeof(*i64))) {
 511         *i64 = GINT64_FROM_LE(*i64);
 512         return true;
 513     }
 514
 515     return false;
 516 }
 517
 518 static int ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector)
 519 {
 520     PCIDevice *pdev = PCI_DEVICE(s);
 521     MSIMessage msg = msix_get_message(pdev, vector);
 522     int ret;
 523
 524     IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
 525     assert(!s->msi_vectors[vector].pdev);
 526
 527     ret = kvm_irqchip_add_msi_route(kvm_state, msg, pdev);
 528     if (ret < 0) {
 529         error_report("ivshmem: kvm_irqchip_add_msi_route failed");
 530         return -1;
 531     }
 532
 533     s->msi_vectors[vector].virq = ret;
 534     s->msi_vectors[vector].pdev = pdev;
 535
 536     return 0;
 537 }
 538
 539 static void setup_interrupt(IVShmemState *s, int vector)
 540 {
 541     EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
 542     bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
 543         ivshmem_has_feature(s, IVSHMEM_MSI);
 544     PCIDevice *pdev = PCI_DEVICE(s);
 545
 546     IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
 547
 548     if (!with_irqfd) {
 549         IVSHMEM_DPRINTF("with eventfd\n");
 550         watch_vector_notifier(s, n, vector);
 551     } else if (msix_enabled(pdev)) {
 552         IVSHMEM_DPRINTF("with irqfd\n");
 553         if (ivshmem_add_kvm_msi_virq(s, vector) < 0) {
 554             return;
 555         }
 556
 557         if (!msix_is_masked(pdev, vector)) {
 558             kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
 559                                                s->msi_vectors[vector].virq);
 560         }
 561     } else {
 562         /* it will be delayed until msix is enabled, in write_config */
 563         IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
 564     }
 565 }
 566
 567 static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
 568 {
 569     IVShmemState *s = opaque;
 570     int incoming_fd;
 571     int new_eventfd;
 572     int64_t incoming_posn;
 573     Error *err = NULL;
 574     Peer *peer;
 575
 576     if (!fifo_update_and_get_i64(s, buf, size, &incoming_posn)) {
 577         return;
 578     }
 579
 580     incoming_fd = qemu_chr_fe_get_msgfd(s->server_chr);
 581     IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n",
 582                     incoming_posn, incoming_fd);
 583
 584     if (incoming_posn < -1 || incoming_posn > IVSHMEM_MAX_PEERS) {
 585         error_report("server sent invalid message %" PRId64,
 586                      incoming_posn);
 587         if (incoming_fd != -1) {
 588             close(incoming_fd);
 589         }
 590         return;
 591     }
 592
 593     if (incoming_posn >= s->nb_peers) {
 594         resize_peers(s, incoming_posn + 1);
 595     }
 596
 597     peer = &s->peers[incoming_posn];
 598
 599     if (incoming_fd == -1) {
 600         /* if posn is positive and unseen before then this is our posn*/
 601         if (incoming_posn >= 0 && s->vm_id == -1) {
 602             /* receive our posn */
 603             s->vm_id = incoming_posn;
 604         } else {
 605             /* otherwise an fd == -1 means an existing peer has gone away */
 606             IVSHMEM_DPRINTF("posn %" PRId64 " has gone away\n", incoming_posn);
 607             close_peer_eventfds(s, incoming_posn);
 608         }
 609         return;
 610     }
 611
 612     /* if the position is -1, then it's shared memory region fd */
 613     if (incoming_posn == -1) {
 614         void * map_ptr;
 615
 616         if (memory_region_is_mapped(&s->ivshmem)) {
 617             error_report("shm already initialized");
 618             close(incoming_fd);
 619             return;
 620         }
 621
 622         if (check_shm_size(s, incoming_fd, &err) == -1) {
 623             error_report_err(err);
 624             close(incoming_fd);
 625             return;
 626         }
 627
 628         /* mmap the region and map into the BAR2 */
 629         map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
 630                                                             incoming_fd, 0);
 631         if (map_ptr == MAP_FAILED) {
 632             error_report("Failed to mmap shared memory %s", strerror(errno));
 633             close(incoming_fd);
 634             return;
 635         }
 636         memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
 637                                    "ivshmem.bar2", s->ivshmem_size, map_ptr);
 638         qemu_set_ram_fd(memory_region_get_ram_addr(&s->ivshmem),
 639                         incoming_fd);
 640         vmstate_register_ram(&s->ivshmem, DEVICE(s));
 641
 642         IVSHMEM_DPRINTF("guest h/w addr = %p, size = %" PRIu64 "\n",
 643                         map_ptr, s->ivshmem_size);
 644
 645         memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
 646
 647         return;
 648     }
 649
 650     /* each peer has an associated array of eventfds, and we keep
 651      * track of how many eventfds received so far */
 652     /* get a new eventfd: */
 653     if (peer->nb_eventfds >= s->vectors) {
 654         error_report("Too many eventfd received, device has %d vectors",
 655                      s->vectors);
 656         close(incoming_fd);
 657         return;
 658     }
 659
 660     new_eventfd = peer->nb_eventfds++;
 661
 662     /* this is an eventfd for a particular peer VM */
 663     IVSHMEM_DPRINTF("eventfds[%" PRId64 "][%d] = %d\n", incoming_posn,
 664                     new_eventfd, incoming_fd);
 665     event_notifier_init_fd(&peer->eventfds[new_eventfd], incoming_fd);
 666     fcntl_setfl(incoming_fd, O_NONBLOCK); /* msix/irqfd poll non block */
 667
 668     if (incoming_posn == s->vm_id) {
 669         setup_interrupt(s, new_eventfd);
 670     }
 671
 672     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
 673         ivshmem_add_eventfd(s, incoming_posn, new_eventfd);
 674     }
 675 }
 676
 677 static void ivshmem_check_version(void *opaque, const uint8_t * buf, int size)
 678 {
 679     IVShmemState *s = opaque;
 680     int tmp;
 681     int64_t version;
 682
 683     if (!fifo_update_and_get_i64(s, buf, size, &version)) {
 684         return;
 685     }
 686
 687     tmp = qemu_chr_fe_get_msgfd(s->server_chr);
 688     if (tmp != -1 || version != IVSHMEM_PROTOCOL_VERSION) {
 689         fprintf(stderr, "incompatible version, you are connecting to a ivshmem-"
 690                 "server using a different protocol please check your setup\n");
 691         qemu_chr_add_handlers(s->server_chr, NULL, NULL, NULL, s);
 692         return;
 693     }
 694
 695     IVSHMEM_DPRINTF("version check ok, switch to real chardev handler\n");
 696     qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
 697                           NULL, s);
 698 }
 699
 700 /* Select the MSI-X vectors used by device.
 701  * ivshmem maps events to vectors statically, so
 702  * we just enable all vectors on init and after reset. */
 703 static void ivshmem_msix_vector_use(IVShmemState *s)
 704 {
 705     PCIDevice *d = PCI_DEVICE(s);
 706     int i;
 707
 708     for (i = 0; i < s->vectors; i++) {
 709         msix_vector_use(d, i);
 710     }
 711 }
 712
 713 static void ivshmem_reset(DeviceState *d)
 714 {
 715     IVShmemState *s = IVSHMEM(d);
 716
 717     s->intrstatus = 0;
 718     s->intrmask = 0;
 719     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 720         ivshmem_msix_vector_use(s);
 721     }
 722 }
 723
 724 static int ivshmem_setup_interrupts(IVShmemState *s)
 725 {
 726     /* allocate QEMU callback data for receiving interrupts */
 727     s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
 728
 729     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 730         if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
 731             return -1;
 732         }
 733
 734         IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
 735         ivshmem_msix_vector_use(s);
 736     }
 737
 738     return 0;
 739 }
 740
 741 static void ivshmem_enable_irqfd(IVShmemState *s)
 742 {
 743     PCIDevice *pdev = PCI_DEVICE(s);
 744     int i;
 745
 746     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 747         ivshmem_add_kvm_msi_virq(s, i);
 748     }
 749
 750     if (msix_set_vector_notifiers(pdev,
 751                                   ivshmem_vector_unmask,
 752                                   ivshmem_vector_mask,
 753                                   ivshmem_vector_poll)) {
 754         error_report("ivshmem: msix_set_vector_notifiers failed");
 755     }
 756 }
 757
 758 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
 759 {
 760     IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
 761
 762     if (s->msi_vectors[vector].pdev == NULL) {
 763         return;
 764     }
 765
 766     /* it was cleaned when masked in the frontend. */
 767     kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
 768
 769     s->msi_vectors[vector].pdev = NULL;
 770 }
 771
 772 static void ivshmem_disable_irqfd(IVShmemState *s)
 773 {
 774     PCIDevice *pdev = PCI_DEVICE(s);
 775     int i;
 776
 777     for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
 778         ivshmem_remove_kvm_msi_virq(s, i);
 779     }
 780
 781     msix_unset_vector_notifiers(pdev);
 782 }
 783
 784 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
 785                                  uint32_t val, int len)
 786 {
 787     IVShmemState *s = IVSHMEM(pdev);
 788     int is_enabled, was_enabled = msix_enabled(pdev);
 789
 790     pci_default_write_config(pdev, address, val, len);
 791     is_enabled = msix_enabled(pdev);
 792
 793     if (kvm_msi_via_irqfd_enabled() && s->vm_id != -1) {
 794         if (!was_enabled && is_enabled) {
 795             ivshmem_enable_irqfd(s);
 796         } else if (was_enabled && !is_enabled) {
 797             ivshmem_disable_irqfd(s);
 798         }
 799     }
 800 }
 801
 802 static void pci_ivshmem_realize(PCIDevice *dev, Error **errp)
 803 {
 804     IVShmemState *s = IVSHMEM(dev);
 805     Error *err = NULL;
 806     uint8_t *pci_conf;
 807     uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
 808         PCI_BASE_ADDRESS_MEM_PREFETCH;
 809
 810     if (!!s->server_chr + !!s->shmobj + !!s->hostmem != 1) {
 811         error_setg(errp,
 812                    "You must specify either 'shm', 'chardev' or 'x-memdev'");
 813         return;
 814     }
 815
 816     if (s->hostmem) {
 817         MemoryRegion *mr;
 818
 819         if (s->sizearg) {
 820             g_warning("size argument ignored with hostmem");
 821         }
 822
 823         mr = host_memory_backend_get_memory(s->hostmem, &error_abort);
 824         s->ivshmem_size = memory_region_size(mr);
 825     } else if (s->sizearg == NULL) {
 826         s->ivshmem_size = 4 << 20; /* 4 MB default */
 827     } else {
 828         char *end;
 829         int64_t size = qemu_strtosz(s->sizearg, &end);
 830         if (size < 0 || *end != '\0' || !is_power_of_2(size)) {
 831             error_setg(errp, "Invalid size %s", s->sizearg);
 832             return;
 833         }
 834         s->ivshmem_size = size;
 835     }
 836
 837     /* IRQFD requires MSI */
 838     if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
 839         !ivshmem_has_feature(s, IVSHMEM_MSI)) {
 840         error_setg(errp, "ioeventfd/irqfd requires MSI");
 841         return;
 842     }
 843
 844     /* check that role is reasonable */
 845     if (s->role) {
 846         if (strncmp(s->role, "peer", 5) == 0) {
 847             s->role_val = IVSHMEM_PEER;
 848         } else if (strncmp(s->role, "master", 7) == 0) {
 849             s->role_val = IVSHMEM_MASTER;
 850         } else {
 851             error_setg(errp, "'role' must be 'peer' or 'master'");
 852             return;
 853         }
 854     } else {
 855         s->role_val = IVSHMEM_MASTER; /* default */
 856     }
 857
 858     pci_conf = dev->config;
 859     pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
 860
 861     /*
 862      * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
 863      * bald-faced lie then.  But it's a backwards compatible lie.
 864      */
 865     pci_config_set_interrupt_pin(pci_conf, 1);
 866
 867     memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
 868                           "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
 869
 870     /* region for registers*/
 871     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
 872                      &s->ivshmem_mmio);
 873
 874     memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
 875     if (s->ivshmem_64bit) {
 876         attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
 877     }
 878
 879     if (s->hostmem != NULL) {
 880         MemoryRegion *mr;
 881
 882         IVSHMEM_DPRINTF("using hostmem\n");
 883
 884         mr = host_memory_backend_get_memory(MEMORY_BACKEND(s->hostmem),
 885                                             &error_abort);
 886         vmstate_register_ram(mr, DEVICE(s));
 887         memory_region_add_subregion(&s->bar, 0, mr);
 888         pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
 889     } else if (s->server_chr != NULL) {
 890         /* FIXME do not rely on what chr drivers put into filename */
 891         if (strncmp(s->server_chr->filename, "unix:", 5)) {
 892             error_setg(errp, "chardev is not a unix client socket");
 893             return;
 894         }
 895
 896         /* if we get a UNIX socket as the parameter we will talk
 897          * to the ivshmem server to receive the memory region */
 898
 899         IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
 900                         s->server_chr->filename);
 901
 902         if (ivshmem_setup_interrupts(s) < 0) {
 903             error_setg(errp, "failed to initialize interrupts");
 904             return;
 905         }
 906
 907         /* we allocate enough space for 16 peers and grow as needed */
 908         resize_peers(s, 16);
 909         s->vm_id = -1;
 910
 911         pci_register_bar(dev, 2, attr, &s->bar);
 912
 913         qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive,
 914                               ivshmem_check_version, NULL, s);
 915     } else {
 916         /* just map the file immediately, we're not using a server */
 917         int fd;
 918
 919         IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
 920
 921         /* try opening with O_EXCL and if it succeeds zero the memory
 922          * by truncating to 0 */
 923         if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
 924                         S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
 925            /* truncate file to length PCI device's memory */
 926             if (ftruncate(fd, s->ivshmem_size) != 0) {
 927                 error_report("could not truncate shared file");
 928             }
 929
 930         } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
 931                         S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
 932             error_setg(errp, "could not open shared file");
 933             return;
 934         }
 935
 936         if (check_shm_size(s, fd, errp) == -1) {
 937             return;
 938         }
 939
 940         create_shared_memory_BAR(s, fd, attr, &err);
 941         if (err) {
 942             error_propagate(errp, err);
 943             return;
 944         }
 945     }
 946
 947     fifo8_create(&s->incoming_fifo, sizeof(int64_t));
 948
 949     if (s->role_val == IVSHMEM_PEER) {
 950         error_setg(&s->migration_blocker,
 951                    "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
 952         migrate_add_blocker(s->migration_blocker);
 953     }
 954 }
 955
 956 static void pci_ivshmem_exit(PCIDevice *dev)
 957 {
 958     IVShmemState *s = IVSHMEM(dev);
 959     int i;
 960
 961     fifo8_destroy(&s->incoming_fifo);
 962
 963     if (s->migration_blocker) {
 964         migrate_del_blocker(s->migration_blocker);
 965         error_free(s->migration_blocker);
 966     }
 967
 968     if (memory_region_is_mapped(&s->ivshmem)) {
 969         if (!s->hostmem) {
 970             void *addr = memory_region_get_ram_ptr(&s->ivshmem);
 971             int fd;
 972
 973             if (munmap(addr, s->ivshmem_size) == -1) {
 974                 error_report("Failed to munmap shared memory %s",
 975                              strerror(errno));
 976             }
 977
 978             fd = qemu_get_ram_fd(memory_region_get_ram_addr(&s->ivshmem));
 979             if (fd != -1) {
 980                 close(fd);
 981             }
 982         }
 983
 984         vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
 985         memory_region_del_subregion(&s->bar, &s->ivshmem);
 986     }
 987
 988     if (s->peers) {
 989         for (i = 0; i < s->nb_peers; i++) {
 990             close_peer_eventfds(s, i);
 991         }
 992         g_free(s->peers);
 993     }
 994
 995     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
 996         msix_uninit_exclusive_bar(dev);
 997     }
 998
 999     g_free(s->msi_vectors);
1000 }
1001
1002 static bool test_msix(void *opaque, int version_id)
1003 {
1004     IVShmemState *s = opaque;
1005
1006     return ivshmem_has_feature(s, IVSHMEM_MSI);
1007 }
1008
1009 static bool test_no_msix(void *opaque, int version_id)
1010 {
1011     return !test_msix(opaque, version_id);
1012 }
1013
1014 static int ivshmem_pre_load(void *opaque)
1015 {
1016     IVShmemState *s = opaque;
1017
1018     if (s->role_val == IVSHMEM_PEER) {
1019         error_report("'peer' devices are not migratable");
1020         return -EINVAL;
1021     }
1022
1023     return 0;
1024 }
1025
1026 static int ivshmem_post_load(void *opaque, int version_id)
1027 {
1028     IVShmemState *s = opaque;
1029
1030     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1031         ivshmem_msix_vector_use(s);
1032     }
1033     return 0;
1034 }
1035
1036 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
1037 {
1038     IVShmemState *s = opaque;
1039     PCIDevice *pdev = PCI_DEVICE(s);
1040     int ret;
1041
1042     IVSHMEM_DPRINTF("ivshmem_load_old\n");
1043
1044     if (version_id != 0) {
1045         return -EINVAL;
1046     }
1047
1048     if (s->role_val == IVSHMEM_PEER) {
1049         error_report("'peer' devices are not migratable");
1050         return -EINVAL;
1051     }
1052
1053     ret = pci_device_load(pdev, f);
1054     if (ret) {
1055         return ret;
1056     }
1057
1058     if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1059         msix_load(pdev, f);
1060         ivshmem_msix_vector_use(s);
1061     } else {
1062         s->intrstatus = qemu_get_be32(f);
1063         s->intrmask = qemu_get_be32(f);
1064     }
1065
1066     return 0;
1067 }
1068
1069 static const VMStateDescription ivshmem_vmsd = {
1070     .name = "ivshmem",
1071     .version_id = 1,
1072     .minimum_version_id = 1,
1073     .pre_load = ivshmem_pre_load,
1074     .post_load = ivshmem_post_load,
1075     .fields = (VMStateField[]) {
1076         VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1077
1078         VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
1079         VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
1080         VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
1081
1082         VMSTATE_END_OF_LIST()
1083     },
1084     .load_state_old = ivshmem_load_old,
1085     .minimum_version_id_old = 0
1086 };
1087
1088 static Property ivshmem_properties[] = {
1089     DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1090     DEFINE_PROP_STRING("size", IVShmemState, sizearg),
1091     DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1092     DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
1093     DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
1094     DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
1095     DEFINE_PROP_STRING("role", IVShmemState, role),
1096     DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
1097     DEFINE_PROP_END_OF_LIST(),
1098 };
1099
1100 static void ivshmem_class_init(ObjectClass *klass, void *data)
1101 {
1102     DeviceClass *dc = DEVICE_CLASS(klass);
1103     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1104
1105     k->realize = pci_ivshmem_realize;
1106     k->exit = pci_ivshmem_exit;
1107     k->config_write = ivshmem_write_config;
1108     k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
1109     k->device_id = PCI_DEVICE_ID_IVSHMEM;
1110     k->class_id = PCI_CLASS_MEMORY_RAM;
1111     dc->reset = ivshmem_reset;
1112     dc->props = ivshmem_properties;
1113     dc->vmsd = &ivshmem_vmsd;
1114     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1115     dc->desc = "Inter-VM shared memory";
1116 }
1117
1118 static void ivshmem_check_memdev_is_busy(Object *obj, const char *name,
1119                                          Object *val, Error **errp)
1120 {
1121     MemoryRegion *mr;
1122
1123     mr = host_memory_backend_get_memory(MEMORY_BACKEND(val), &error_abort);
1124     if (memory_region_is_mapped(mr)) {
1125         char *path = object_get_canonical_path_component(val);
1126         error_setg(errp, "can't use already busy memdev: %s", path);
1127         g_free(path);
1128     } else {
1129         qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
1130     }
1131 }
1132
1133 static void ivshmem_init(Object *obj)
1134 {
1135     IVShmemState *s = IVSHMEM(obj);
1136
1137     object_property_add_link(obj, "x-memdev", TYPE_MEMORY_BACKEND,
1138                              (Object **)&s->hostmem,
1139                              ivshmem_check_memdev_is_busy,
1140                              OBJ_PROP_LINK_UNREF_ON_RELEASE,
1141                              &error_abort);
1142 }
1143
1144 static const TypeInfo ivshmem_info = {
1145     .name          = TYPE_IVSHMEM,
1146     .parent        = TYPE_PCI_DEVICE,
1147     .instance_size = sizeof(IVShmemState),
1148     .instance_init = ivshmem_init,
1149     .class_init    = ivshmem_class_init,
1150 };
1151
1152 static void ivshmem_register_types(void)
1153 {
1154     type_register_static(&ivshmem_info);
1155 }
1156
1157 type_init(ivshmem_register_types)