hw/acpi/pcihp.c

   1 /*
   2  * QEMU<->ACPI BIOS PCI hotplug interface
   3  *
   4  * QEMU supports PCI hotplug via ACPI. This module
   5  * implements the interface between QEMU and the ACPI BIOS.
   6  * Interface specification - see docs/specs/acpi_pci_hotplug.txt
   7  *
   8  * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
   9  * Copyright (c) 2006 Fabrice Bellard
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26
  27 #include "qemu/osdep.h"
  28 #include "hw/acpi/pcihp.h"
  29
  30 #include "hw/pci-host/i440fx.h"
  31 #include "hw/pci/pci.h"
  32 #include "hw/pci/pci_bridge.h"
  33 #include "hw/acpi/acpi.h"
  34 #include "exec/address-spaces.h"
  35 #include "hw/pci/pci_bus.h"
  36 #include "migration/vmstate.h"
  37 #include "qapi/error.h"
  38 #include "qom/qom-qobject.h"
  39 #include "trace.h"
  40
  41 #define ACPI_PCIHP_ADDR 0xae00
  42 #define ACPI_PCIHP_SIZE 0x0014
  43 #define PCI_UP_BASE 0x0000
  44 #define PCI_DOWN_BASE 0x0004
  45 #define PCI_EJ_BASE 0x0008
  46 #define PCI_RMV_BASE 0x000c
  47 #define PCI_SEL_BASE 0x0010
  48
  49 typedef struct AcpiPciHpFind {
  50     int bsel;
  51     PCIBus *bus;
  52 } AcpiPciHpFind;
  53
  54 static int acpi_pcihp_get_bsel(PCIBus *bus)
  55 {
  56     Error *local_err = NULL;
  57     uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
  58                                              &local_err);
  59
  60     if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
  61         if (local_err) {
  62             error_free(local_err);
  63         }
  64         return -1;
  65     } else {
  66         return bsel;
  67     }
  68 }
  69
  70 /* Assign BSEL property to all buses.  In the future, this can be changed
  71  * to only assign to buses that support hotplug.
  72  */
  73 static void *acpi_set_bsel(PCIBus *bus, void *opaque)
  74 {
  75     unsigned *bsel_alloc = opaque;
  76     unsigned *bus_bsel;
  77
  78     if (qbus_is_hotpluggable(BUS(bus))) {
  79         bus_bsel = g_malloc(sizeof *bus_bsel);
  80
  81         *bus_bsel = (*bsel_alloc)++;
  82         object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
  83                                        bus_bsel, OBJ_PROP_FLAG_READ);
  84     }
  85
  86     return bsel_alloc;
  87 }
  88
  89 static void acpi_set_pci_info(void)
  90 {
  91     static bool bsel_is_set;
  92     PCIBus *bus;
  93     unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
  94
  95     if (bsel_is_set) {
  96         return;
  97     }
  98     bsel_is_set = true;
  99
 100     bus = find_i440fx(); /* TODO: Q35 support */
 101     if (bus) {
 102         /* Scan all PCI buses. Set property to enable acpi based hotplug. */
 103         pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
 104     }
 105 }
 106
 107 static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
 108 {
 109     AcpiPciHpFind *find = opaque;
 110     if (find->bsel == acpi_pcihp_get_bsel(bus)) {
 111         find->bus = bus;
 112     }
 113 }
 114
 115 static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
 116 {
 117     AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
 118
 119     if (bsel < 0) {
 120         return NULL;
 121     }
 122
 123     pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
 124
 125     /* Make bsel 0 eject root bus if bsel property is not set,
 126      * for compatibility with non acpi setups.
 127      * TODO: really needed?
 128      */
 129     if (!bsel && !find.bus) {
 130         find.bus = s->root;
 131     }
 132     return find.bus;
 133 }
 134
 135 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
 136 {
 137     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
 138     DeviceClass *dc = DEVICE_GET_CLASS(dev);
 139     /*
 140      * ACPI doesn't allow hotplug of bridge devices.  Don't allow
 141      * hot-unplug of bridge devices unless they were added by hotplug
 142      * (and so, not described by acpi).
 143      */
 144     return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
 145 }
 146
 147 static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
 148 {
 149     HotplugHandler *hotplug_ctrl;
 150     BusChild *kid, *next;
 151     int slot = ctz32(slots);
 152     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 153
 154     trace_acpi_pci_eject_slot(bsel, slot);
 155
 156     if (!bus || slot > 31) {
 157         return;
 158     }
 159
 160     /* Mark request as complete */
 161     s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
 162     s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
 163
 164     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 165         DeviceState *qdev = kid->child;
 166         PCIDevice *dev = PCI_DEVICE(qdev);
 167         if (PCI_SLOT(dev->devfn) == slot) {
 168             if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
 169                 hotplug_ctrl = qdev_get_hotplug_handler(qdev);
 170                 hotplug_handler_unplug(hotplug_ctrl, qdev, &error_abort);
 171                 object_unparent(OBJECT(qdev));
 172             }
 173         }
 174     }
 175 }
 176
 177 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
 178 {
 179     BusChild *kid, *next;
 180     PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
 181
 182     /* Execute any pending removes during reset */
 183     while (s->acpi_pcihp_pci_status[bsel].down) {
 184         acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
 185     }
 186
 187     s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
 188
 189     if (!bus) {
 190         return;
 191     }
 192     QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
 193         DeviceState *qdev = kid->child;
 194         PCIDevice *pdev = PCI_DEVICE(qdev);
 195         int slot = PCI_SLOT(pdev->devfn);
 196
 197         if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
 198             s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
 199         }
 200     }
 201 }
 202
 203 static void acpi_pcihp_update(AcpiPciHpState *s)
 204 {
 205     int i;
 206
 207     for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
 208         acpi_pcihp_update_hotplug_bus(s, i);
 209     }
 210 }
 211
 212 void acpi_pcihp_reset(AcpiPciHpState *s)
 213 {
 214     acpi_set_pci_info();
 215     acpi_pcihp_update(s);
 216 }
 217
 218 void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
 219                                    DeviceState *dev, Error **errp)
 220 {
 221     /* Only hotplugged devices need the hotplug capability. */
 222     if (dev->hotplugged &&
 223         acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))) < 0) {
 224         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 225                    ACPI_PCIHP_PROP_BSEL "' set");
 226         return;
 227     }
 228 }
 229
 230 void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 231                                DeviceState *dev, Error **errp)
 232 {
 233     PCIDevice *pdev = PCI_DEVICE(dev);
 234     int slot = PCI_SLOT(pdev->devfn);
 235     int bsel;
 236
 237     /* Don't send event when device is enabled during qemu machine creation:
 238      * it is present on boot, no hotplug event is necessary. We do send an
 239      * event when the device is disabled later. */
 240     if (!dev->hotplugged) {
 241         /*
 242          * Overwrite the default hotplug handler with the ACPI PCI one
 243          * for cold plugged bridges only.
 244          */
 245         if (!s->legacy_piix &&
 246             object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
 247             PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
 248
 249             qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev),
 250                                      &error_abort);
 251             /* We don't have to overwrite any other hotplug handler yet */
 252             assert(QLIST_EMPTY(&sec->child));
 253         }
 254
 255         return;
 256     }
 257
 258     bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
 259     g_assert(bsel >= 0);
 260     s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
 261     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 262 }
 263
 264 void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
 265                                  DeviceState *dev, Error **errp)
 266 {
 267     trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn),
 268                           acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))));
 269     object_property_set_bool(OBJECT(dev), false, "realized", &error_abort);
 270 }
 271
 272 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 273                                          AcpiPciHpState *s, DeviceState *dev,
 274                                          Error **errp)
 275 {
 276     PCIDevice *pdev = PCI_DEVICE(dev);
 277     int slot = PCI_SLOT(pdev->devfn);
 278     int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
 279
 280     trace_acpi_pci_unplug_request(bsel, slot);
 281
 282     if (bsel < 0) {
 283         error_setg(errp, "Unsupported bus. Bus doesn't have property '"
 284                    ACPI_PCIHP_PROP_BSEL "' set");
 285         return;
 286     }
 287
 288     s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
 289     acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
 290 }
 291
 292 static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
 293 {
 294     AcpiPciHpState *s = opaque;
 295     uint32_t val = 0;
 296     int bsel = s->hotplug_select;
 297
 298     if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 299         return 0;
 300     }
 301
 302     switch (addr) {
 303     case PCI_UP_BASE:
 304         val = s->acpi_pcihp_pci_status[bsel].up;
 305         if (!s->legacy_piix) {
 306             s->acpi_pcihp_pci_status[bsel].up = 0;
 307         }
 308         trace_acpi_pci_up_read(val);
 309         break;
 310     case PCI_DOWN_BASE:
 311         val = s->acpi_pcihp_pci_status[bsel].down;
 312         trace_acpi_pci_down_read(val);
 313         break;
 314     case PCI_EJ_BASE:
 315         /* No feature defined yet */
 316         trace_acpi_pci_features_read(val);
 317         break;
 318     case PCI_RMV_BASE:
 319         val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
 320         trace_acpi_pci_rmv_read(val);
 321         break;
 322     case PCI_SEL_BASE:
 323         val = s->hotplug_select;
 324         trace_acpi_pci_sel_read(val);
 325     default:
 326         break;
 327     }
 328
 329     return val;
 330 }
 331
 332 static void pci_write(void *opaque, hwaddr addr, uint64_t data,
 333                       unsigned int size)
 334 {
 335     AcpiPciHpState *s = opaque;
 336     switch (addr) {
 337     case PCI_EJ_BASE:
 338         if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
 339             break;
 340         }
 341         acpi_pcihp_eject_slot(s, s->hotplug_select, data);
 342         trace_acpi_pci_ej_write(addr, data);
 343         break;
 344     case PCI_SEL_BASE:
 345         s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
 346         trace_acpi_pci_sel_write(addr, data);
 347     default:
 348         break;
 349     }
 350 }
 351
 352 static const MemoryRegionOps acpi_pcihp_io_ops = {
 353     .read = pci_read,
 354     .write = pci_write,
 355     .endianness = DEVICE_LITTLE_ENDIAN,
 356     .valid = {
 357         .min_access_size = 4,
 358         .max_access_size = 4,
 359     },
 360 };
 361
 362 void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
 363                      MemoryRegion *address_space_io, bool bridges_enabled)
 364 {
 365     s->io_len = ACPI_PCIHP_SIZE;
 366     s->io_base = ACPI_PCIHP_ADDR;
 367
 368     s->root= root_bus;
 369     s->legacy_piix = !bridges_enabled;
 370
 371     memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
 372                           "acpi-pci-hotplug", s->io_len);
 373     memory_region_add_subregion(address_space_io, s->io_base, &s->io);
 374
 375     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
 376                                    OBJ_PROP_FLAG_READ);
 377     object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
 378                                    OBJ_PROP_FLAG_READ);
 379 }
 380
 381 const VMStateDescription vmstate_acpi_pcihp_pci_status = {
 382     .name = "acpi_pcihp_pci_status",
 383     .version_id = 1,
 384     .minimum_version_id = 1,
 385     .fields = (VMStateField[]) {
 386         VMSTATE_UINT32(up, AcpiPciHpPciStatus),
 387         VMSTATE_UINT32(down, AcpiPciHpPciStatus),
 388         VMSTATE_END_OF_LIST()
 389     }
 390 };