include/tcg/tcg-op-gvec.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Target dependent generic vector operation expansion
   4  *
   5  * Copyright (c) 2018 Linaro
   6  */
   7
   8 #ifndef TCG_TCG_OP_GVEC_H
   9 #define TCG_TCG_OP_GVEC_H
  10
  11 #include "tcg/tcg-op-gvec-common.h"
  12
  13 #ifndef TARGET_LONG_BITS
  14 #error must include QEMU headers
  15 #endif
  16
  17 #if TARGET_LONG_BITS == 64
  18 #define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i64
  19 #define tcg_gen_vec_add8_tl  tcg_gen_vec_add8_i64
  20 #define tcg_gen_vec_sub8_tl  tcg_gen_vec_sub8_i64
  21 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64
  22 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64
  23 #define tcg_gen_vec_add32_tl tcg_gen_vec_add32_i64
  24 #define tcg_gen_vec_sub32_tl tcg_gen_vec_sub32_i64
  25 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i64
  26 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i64
  27 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i64
  28 #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i64
  29 #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i64
  30 #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i64
  31 #elif TARGET_LONG_BITS == 32
  32 #define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i32
  33 #define tcg_gen_vec_add8_tl  tcg_gen_vec_add8_i32
  34 #define tcg_gen_vec_sub8_tl  tcg_gen_vec_sub8_i32
  35 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32
  36 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32
  37 #define tcg_gen_vec_add32_tl tcg_gen_add_i32
  38 #define tcg_gen_vec_sub32_tl tcg_gen_sub_i32
  39 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i32
  40 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i32
  41 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i32
  42 #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i32
  43 #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i32
  44 #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i32
  45 #else
  46 # error
  47 #endif
  48
  49 #endif