hw/pci: Clean up global variable shadowing of address_space_io variable
[qemu/armbru.git] / tcg / s390x / tcg-target-con-set.h
blob9a420374999228af8497a477d9bd69df81f65fe3
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define S390 target-specific constraint sets.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
9 * Each operand should be a sequence of constraint letters as defined by
10 * tcg-target-con-str.h; the constraint combination is inclusive or.
12 * C_Nn_Om_Ik(...) defines a constraint set with <n + m> outputs and <k>
13 * inputs, except that the first <n> outputs must use new registers.
15 C_O0_I1(r)
16 C_O0_I2(r, r)
17 C_O0_I2(r, ri)
18 C_O0_I2(r, rA)
19 C_O0_I2(v, r)
20 C_O0_I3(o, m, r)
21 C_O1_I1(r, r)
22 C_O1_I1(v, r)
23 C_O1_I1(v, v)
24 C_O1_I1(v, vr)
25 C_O1_I2(r, 0, ri)
26 C_O1_I2(r, 0, rI)
27 C_O1_I2(r, 0, rJ)
28 C_O1_I2(r, r, r)
29 C_O1_I2(r, r, ri)
30 C_O1_I2(r, r, rA)
31 C_O1_I2(r, r, rI)
32 C_O1_I2(r, r, rJ)
33 C_O1_I2(r, r, rK)
34 C_O1_I2(r, r, rKR)
35 C_O1_I2(r, r, rNK)
36 C_O1_I2(r, r, rNKR)
37 C_O1_I2(r, rZ, r)
38 C_O1_I2(v, v, r)
39 C_O1_I2(v, v, v)
40 C_O1_I3(v, v, v, v)
41 C_O1_I4(r, r, ri, rI, r)
42 C_O1_I4(r, r, rA, rI, r)
43 C_O2_I1(o, m, r)
44 C_O2_I2(o, m, 0, r)
45 C_O2_I2(o, m, r, r)
46 C_O2_I3(o, m, 0, 1, r)
47 C_N1_O1_I4(r, r, 0, 1, ri, r)
48 C_N1_O1_I4(r, r, 0, 1, rA, r)