Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
[qemu/armbru.git] / disas / riscv-xventana.h
blob72be9ffa16c1ca1832d00ece89dc921fc71837ed
1 /*
2 * QEMU disassembler -- RISC-V specific header (xventana*).
4 * Copyright (c) 2023 VRULL GmbH
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
9 #ifndef DISAS_RISCV_XVENTANA_H
10 #define DISAS_RISCV_XVENTANA_H
12 #include "disas/riscv.h"
14 extern const rv_opcode_data ventana_opcode_data[];
16 void decode_xventanacondops(rv_decode*, rv_isa);
18 #endif /* DISAS_RISCV_XVENTANA_H */