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disas/nanomips: Remove Pool tables from the class
[qemu/armbru.git] / disas / nanomips.cpp
bloba73eae5b33a0af330cd416ad88d8458845f8cab8
1 /*
2 * Source file for nanoMIPS disassembler component of QEMU
3 *
4 * Copyright (C) 2018 Wave Computing, Inc.
5 * Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com>
6 * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <https://www.gnu.org/licenses/>.
20 *
21 */
22
23 /*
24 * Documentation used while implementing this component:
25 *
26 * [1] "MIPSĀ® Architecture Base: nanoMIPS32(tm) Instruction Set Technical
27 * Reference Manual", Revision 01.01, April 27, 2018
28 */
29
30 #include "qemu/osdep.h"
31 #include "disas/dis-asm.h"
32
33 #include <cstring>
34 #include <stdexcept>
35 #include <sstream>
36 #include <stdio.h>
37 #include <stdarg.h>
38
39 #include "nanomips.h"
40
41 #define IMGASSERTONCE(test)
42
43
44 static int nanomips_dis(char *buf,
45 Dis_info *info,
46 unsigned short one,
47 unsigned short two,
48 unsigned short three)
49 {
50 std::string disasm;
51 uint16 bits[3] = {one, two, three};
52
53 TABLE_ENTRY_TYPE type;
54 NMD d;
55 int size = d.Disassemble(bits, disasm, type, info);
56
57 strcpy(buf, disasm.c_str());
58 return size;
59 }
60
61 int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info)
62 {
63 int status;
64 bfd_byte buffer[2];
65 uint16_t insn1 = 0, insn2 = 0, insn3 = 0;
66 char buf[200];
67
68 info->bytes_per_chunk = 2;
69 info->display_endian = info->endian;
70 info->insn_info_valid = 1;
71 info->branch_delay_insns = 0;
72 info->data_size = 0;
73 info->insn_type = dis_nonbranch;
74 info->target = 0;
75 info->target2 = 0;
76
77 Dis_info disassm_info;
78 disassm_info.m_pc = memaddr;
79
80 status = (*info->read_memory_func)(memaddr, buffer, 2, info);
81 if (status != 0) {
82 (*info->memory_error_func)(status, memaddr, info);
83 return -1;
84 }
85
86 if (info->endian == BFD_ENDIAN_BIG) {
87 insn1 = bfd_getb16(buffer);
88 } else {
89 insn1 = bfd_getl16(buffer);
90 }
91 (*info->fprintf_func)(info->stream, "%04x ", insn1);
92
93 /* Handle 32-bit opcodes. */
94 if ((insn1 & 0x1000) == 0) {
95 status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info);
96 if (status != 0) {
97 (*info->memory_error_func)(status, memaddr + 2, info);
98 return -1;
99 }
100
101 if (info->endian == BFD_ENDIAN_BIG) {
102 insn2 = bfd_getb16(buffer);
103 } else {
104 insn2 = bfd_getl16(buffer);
105 }
106 (*info->fprintf_func)(info->stream, "%04x ", insn2);
107 } else {
108 (*info->fprintf_func)(info->stream, " ");
109 }
110 /* Handle 48-bit opcodes. */
111 if ((insn1 >> 10) == 0x18) {
112 status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info);
113 if (status != 0) {
114 (*info->memory_error_func)(status, memaddr + 4, info);
115 return -1;
116 }
117
118 if (info->endian == BFD_ENDIAN_BIG) {
119 insn3 = bfd_getb16(buffer);
120 } else {
121 insn3 = bfd_getl16(buffer);
122 }
123 (*info->fprintf_func)(info->stream, "%04x ", insn3);
124 } else {
125 (*info->fprintf_func)(info->stream, " ");
126 }
127
128 int length = nanomips_dis(buf, &disassm_info, insn1, insn2, insn3);
129
130 /* FIXME: Should probably use a hash table on the major opcode here. */
131
132 (*info->fprintf_func) (info->stream, "%s", buf);
133 if (length > 0) {
134 return length / 8;
135 }
136
137 info->insn_type = dis_noninsn;
138
139 return insn3 ? 6 : insn2 ? 4 : 2;
140 }
141
142
143 std::string img_format(const char *format, ...)
144 {
145 char buffer[256];
146 va_list args;
147 va_start(args, format);
148 int err = vsprintf(buffer, format, args);
149 if (err < 0) {
150 perror(buffer);
151 }
152 va_end(args);
153 return buffer;
154 }
155
156 std::string img_format(const char *format,
157 std::string s)
158 {
159 char buffer[256];
160
161 sprintf(buffer, format, s.c_str());
162
163 return buffer;
164 }
165
166 std::string img_format(const char *format,
167 std::string s1,
168 std::string s2)
169 {
170 char buffer[256];
171
172 sprintf(buffer, format, s1.c_str(), s2.c_str());
173
174 return buffer;
175 }
176
177 std::string img_format(const char *format,
178 std::string s1,
179 std::string s2,
180 std::string s3)
181 {
182 char buffer[256];
183
184 sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str());
185
186 return buffer;
187 }
188
189 std::string img_format(const char *format,
190 std::string s1,
191 std::string s2,
192 std::string s3,
193 std::string s4)
194 {
195 char buffer[256];
196
197 sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
198 s4.c_str());
199
200 return buffer;
201 }
202
203 std::string img_format(const char *format,
204 std::string s1,
205 std::string s2,
206 std::string s3,
207 std::string s4,
208 std::string s5)
209 {
210 char buffer[256];
211
212 sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
213 s4.c_str(), s5.c_str());
214
215 return buffer;
216 }
217
218 std::string img_format(const char *format,
219 uint64 d,
220 std::string s2)
221 {
222 char buffer[256];
223
224 sprintf(buffer, format, d, s2.c_str());
225
226 return buffer;
227 }
228
229 std::string img_format(const char *format,
230 std::string s1,
231 uint64 d,
232 std::string s2)
233 {
234 char buffer[256];
235
236 sprintf(buffer, format, s1.c_str(), d, s2.c_str());
237
238 return buffer;
239 }
240
241 std::string img_format(const char *format,
242 std::string s1,
243 std::string s2,
244 uint64 d)
245 {
246 char buffer[256];
247
248 sprintf(buffer, format, s1.c_str(), s2.c_str(), d);
249
250 return buffer;
251 }
252
253
254 std::string to_string(img_address a)
255 {
256 char buffer[256];
257 sprintf(buffer, "0x%" PRIx64, a);
258 return buffer;
259 }
260
261
262 static uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size)
263 {
264 return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size);
265 }
266
267
268 static int64 sign_extend(int64 data, int msb)
269 {
270 uint64 shift = 63 - msb;
271 return (data << shift) >> shift;
272 }
273
274
275 static uint64 renumber_registers(uint64 index, uint64 *register_list,
276 size_t register_list_size)
277 {
278 if (index < register_list_size) {
279 return register_list[index];
280 }
281
282 throw std::runtime_error(img_format(
283 "Invalid register mapping index %" PRIu64
284 ", size of list = %zu",
285 index, register_list_size));
286 }
287
288
289 /*
290 * decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
291 *
292 * Map a 4-bit code to the 5-bit register space according to this pattern:
293 *
294 * 1 0
295 * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
296 * | | | | | | | | | | | | | | | |
297 * | | | | | | | | | | | | | | | |
298 * | | | | | | | | | | | ā””---------------ā”
299 * | | | | | | | | | | ā””---------------ā” |
300 * | | | | | | | | | ā””---------------ā” | |
301 * | | | | | | | | ā””---------------ā” | | |
302 * | | | | | | | | | | | | | | | |
303 * | | | | | | | | | | | | | | | |
304 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
305 * 3 2 1 0
306 *
307 * Used in handling following instructions:
308 *
309 * - ADDU[4X4]
310 * - LW[4X4]
311 * - MOVEP[REV]
312 * - MUL[4X4]
313 * - SW[4X4]
314 */
315 static uint64 decode_gpr_gpr4(uint64 d)
316 {
317 static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
318 16, 17, 18, 19, 20, 21, 22, 23 };
319 return renumber_registers(d, register_list,
320 sizeof(register_list) / sizeof(register_list[0]));
321 }
322
323
324 /*
325 * decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
326 *
327 * Map a 4-bit code to the 5-bit register space according to this pattern:
328 *
329 * 1 0
330 * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
331 * | | | | | | | | | | | | | | | |
332 * | | | | | | | | | | | | ā””---------------------ā”
333 * | | | | | | | | | | | ā””---------------ā” |
334 * | | | | | | | | | | ā””---------------ā” | |
335 * | | | | | | | | | ā””---------------ā” | | |
336 * | | | | | | | | ā””---------------ā” | | | |
337 * | | | | | | | | | | | | | | | |
338 * | | | | | | | | | | | | | | | |
339 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
340 * 3 2 1 0
341 *
342 * This pattern is the same one used for 'gpr4' gpr encoding type, except for
343 * the input value 3, that is mapped to the output value 0 instead of 11.
344 *
345 * Used in handling following instructions:
346 *
347 * - MOVE.BALC
348 * - MOVEP
349 * - SW[4X4]
350 */
351 static uint64 decode_gpr_gpr4_zero(uint64 d)
352 {
353 static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
354 16, 17, 18, 19, 20, 21, 22, 23 };
355 return renumber_registers(d, register_list,
356 sizeof(register_list) / sizeof(register_list[0]));
357 }
358
359
360 /*
361 * decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
362 *
363 * Map a 3-bit code to the 5-bit register space according to this pattern:
364 *
365 * 7 6 5 4 3 2 1 0
366 * | | | | | | | |
367 * | | | | | | | |
368 * | | | ā””-----------------------ā”
369 * | | ā””-----------------------ā” |
370 * | ā””-----------------------ā” | |
371 * ā””-----------------------ā” | | |
372 * | | | | | | | |
373 * ā”Œ-------ā”˜ | | | | | | |
374 * | ā”Œ-------ā”˜ | | | | | |
375 * | | ā”Œ-------ā”˜ | | | | |
376 * | | | ā”Œ-------ā”˜ | | | |
377 * | | | | | | | |
378 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
379 * 3 2 1 0
380 *
381 * Used in handling following instructions:
382 *
383 * - ADDIU[R1.SP]
384 * - ADDIU[R2]
385 * - ADDU[16]
386 * - AND[16]
387 * - ANDI[16]
388 * - BEQC[16]
389 * - BEQZC[16]
390 * - BNEC[16]
391 * - BNEZC[16]
392 * - LB[16]
393 * - LBU[16]
394 * - LH[16]
395 * - LHU[16]
396 * - LI[16]
397 * - LW[16]
398 * - LW[GP16]
399 * - LWXS[16]
400 * - NOT[16]
401 * - OR[16]
402 * - SB[16]
403 * - SH[16]
404 * - SLL[16]
405 * - SRL[16]
406 * - SUBU[16]
407 * - SW[16]
408 * - XOR[16]
409 */
410 static uint64 decode_gpr_gpr3(uint64 d)
411 {
412 static uint64 register_list[] = { 16, 17, 18, 19, 4, 5, 6, 7 };
413 return renumber_registers(d, register_list,
414 sizeof(register_list) / sizeof(register_list[0]));
415 }
416
417
418 /*
419 * decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding
420 * type
421 *
422 * Map a 3-bit code to the 5-bit register space according to this pattern:
423 *
424 * 7 6 5 4 3 2 1 0
425 * | | | | | | | |
426 * | | | | | | | ā””-----------------------ā”
427 * | | | ā””-----------------------ā” |
428 * | | ā””-----------------------ā” | |
429 * | ā””-----------------------ā” | | |
430 * ā””-----------------------ā” | | | |
431 * | | | | | | | |
432 * ā”Œ-------ā”˜ | | | | | | |
433 * | ā”Œ-------ā”˜ | | | | | |
434 * | | ā”Œ-------ā”˜ | | | | |
435 * | | | | | | | |
436 * | | | | | | | |
437 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
438 * 3 2 1 0
439 *
440 * This pattern is the same one used for 'gpr3' gpr encoding type, except for
441 * the input value 0, that is mapped to the output value 0 instead of 16.
442 *
443 * Used in handling following instructions:
444 *
445 * - SB[16]
446 * - SH[16]
447 * - SW[16]
448 * - SW[GP16]
449 */
450 static uint64 decode_gpr_gpr3_src_store(uint64 d)
451 {
452 static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 };
453 return renumber_registers(d, register_list,
454 sizeof(register_list) / sizeof(register_list[0]));
455 }
456
457
458 /*
459 * decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type
460 *
461 * Map a 2-bit code to the 5-bit register space according to this pattern:
462 *
463 * 3 2 1 0
464 * | | | |
465 * | | | |
466 * | | | ā””-------------------ā”
467 * | | ā””-------------------ā” |
468 * | ā””-------------------ā” | |
469 * ā””-------------------ā” | | |
470 * | | | |
471 * | | | |
472 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
473 * 3 2 1 0
474 *
475 * Used in handling following instructions:
476 *
477 * - MOVEP
478 * - MOVEP[REV]
479 */
480 static uint64 decode_gpr_gpr2_reg1(uint64 d)
481 {
482 static uint64 register_list[] = { 4, 5, 6, 7 };
483 return renumber_registers(d, register_list,
484 sizeof(register_list) / sizeof(register_list[0]));
485 }
486
487
488 /*
489 * decode_gpr_gpr2_reg2() - decoder for 'gpr2.reg2' gpr encoding type
490 *
491 * Map a 2-bit code to the 5-bit register space according to this pattern:
492 *
493 * 3 2 1 0
494 * | | | |
495 * | | | |
496 * | | | ā””-----------------ā”
497 * | | ā””-----------------ā” |
498 * | ā””-----------------ā” | |
499 * ā””-----------------ā” | | |
500 * | | | |
501 * | | | |
502 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
503 * 3 2 1 0
504 *
505 * Used in handling following instructions:
506 *
507 * - MOVEP
508 * - MOVEP[REV]
509 */
510 static uint64 decode_gpr_gpr2_reg2(uint64 d)
511 {
512 static uint64 register_list[] = { 5, 6, 7, 8 };
513 return renumber_registers(d, register_list,
514 sizeof(register_list) / sizeof(register_list[0]));
515 }
516
517
518 /*
519 * decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
520 *
521 * Map a 1-bit code to the 5-bit register space according to this pattern:
522 *
523 * 1 0
524 * | |
525 * | |
526 * | ā””---------------------ā”
527 * ā””---------------------ā” |
528 * | |
529 * | |
530 * | |
531 * | |
532 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
533 * 3 2 1 0
534 *
535 * Used in handling following instruction:
536 *
537 * - MOVE.BALC
538 */
539 static uint64 decode_gpr_gpr1(uint64 d)
540 {
541 static uint64 register_list[] = { 4, 5 };
542 return renumber_registers(d, register_list,
543 sizeof(register_list) / sizeof(register_list[0]));
544 }
545
546
547 static uint64 copy(uint64 d)
548 {
549 return d;
550 }
551
552
553 static int64 copy(int64 d)
554 {
555 return d;
556 }
557
558
559 static int64 neg_copy(uint64 d)
560 {
561 return 0ll - d;
562 }
563
564
565 /* strange wrapper around gpr3 */
566 static uint64 encode_rs3_and_check_rs3_ge_rt3(uint64 d)
567 {
568 return decode_gpr_gpr3(d);
569 }
570
571
572 /* strange wrapper around gpr3 */
573 static uint64 encode_rs3_and_check_rs3_lt_rt3(uint64 d)
574 {
575 return decode_gpr_gpr3(d);
576 }
577
578
579 /* nop - done by extraction function */
580 static uint64 encode_s_from_address(uint64 d)
581 {
582 return d;
583 }
584
585
586 /* nop - done by extraction function */
587 static uint64 encode_u_from_address(uint64 d)
588 {
589 return d;
590 }
591
592
593 static uint64 encode_count3_from_count(uint64 d)
594 {
595 IMGASSERTONCE(d < 8);
596 return d == 0ull ? 8ull : d;
597 }
598
599
600 static uint64 encode_shift3_from_shift(uint64 d)
601 {
602 IMGASSERTONCE(d < 8);
603 return d == 0ull ? 8ull : d;
604 }
605
606
607 /* special value for load literal */
608 static int64 encode_eu_from_s_li16(uint64 d)
609 {
610 IMGASSERTONCE(d < 128);
611 return d == 127 ? -1 : (int64)d;
612 }
613
614
615 static uint64 encode_msbd_from_size(uint64 d)
616 {
617 IMGASSERTONCE(d < 32);
618 return d + 1;
619 }
620
621
622 static uint64 encode_eu_from_u_andi16(uint64 d)
623 {
624 IMGASSERTONCE(d < 16);
625 if (d == 12) {
626 return 0x00ffull;
627 }
628 if (d == 13) {
629 return 0xffffull;
630 }
631 return d;
632 }
633
634
635 /* save16 / restore16 ???? */
636 static uint64 encode_rt1_from_rt(uint64 d)
637 {
638 return d ? 31 : 30;
639 }
640
641
642 /* ? */
643 static uint64 encode_lsb_from_pos_and_size(uint64 d)
644 {
645 return d;
646 }
647
648
649 static std::string GPR(uint64 reg)
650 {
651 static const char *gpr_reg[32] = {
652 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
653 "a4", "a5", "a6", "a7", "r12", "r13", "r14", "r15",
654 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
655 "r24", "r25", "k0", "k1", "gp", "sp", "fp", "ra"
656 };
657
658 if (reg < 32) {
659 return gpr_reg[reg];
660 }
661
662 throw std::runtime_error(img_format("Invalid GPR register index %" PRIu64,
663 reg));
664 }
665
666
667 static std::string save_restore_list(uint64 rt, uint64 count, uint64 gp)
668 {
669 std::string str;
670
671 for (uint64 counter = 0; counter != count; counter++) {
672 bool use_gp = gp && (counter == count - 1);
673 uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f;
674 str += img_format(",%s", GPR(this_rt));
675 }
676
677 return str;
678 }
679
680
681 static std::string FPR(uint64 reg)
682 {
683 static const char *fpr_reg[32] = {
684 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
685 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
686 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
687 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
688 };
689
690 if (reg < 32) {
691 return fpr_reg[reg];
692 }
693
694 throw std::runtime_error(img_format("Invalid FPR register index %" PRIu64,
695 reg));
696 }
697
698
699 static std::string AC(uint64 reg)
700 {
701 static const char *ac_reg[4] = {
702 "ac0", "ac1", "ac2", "ac3"
703 };
704
705 if (reg < 4) {
706 return ac_reg[reg];
707 }
708
709 throw std::runtime_error(img_format("Invalid AC register index %" PRIu64,
710 reg));
711 }
712
713
714 static std::string IMMEDIATE(uint64 value)
715 {
716 return img_format("0x%" PRIx64, value);
717 }
718
719
720 static std::string IMMEDIATE(int64 value)
721 {
722 return img_format("%" PRId64, value);
723 }
724
725
726 static std::string CPR(uint64 reg)
727 {
728 /* needs more work */
729 return img_format("CP%" PRIu64, reg);
730 }
731
732
733 static std::string ADDRESS(uint64 value, int instruction_size, Dis_info *info)
734 {
735 /* token for string replace */
736 img_address address = info->m_pc + value + instruction_size;
737 /* symbol replacement */
738 return to_string(address);
739 }
740
741
742 uint64 NMD::extract_op_code_value(const uint16 * data, int size)
743 {
744 switch (size) {
745 case 16:
746 return data[0];
747 case 32:
748 return ((uint64)data[0] << 16) | data[1];
749 case 48:
750 return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2];
751 default:
752 return data[0];
753 }
754 }
755
756
757 /*
758 * Recurse through tables until the instruction is found then return
759 * the string and size
760 *
761 * inputs:
762 * pointer to a word stream,
763 * disassember table and size
764 * returns:
765 * instruction size - negative is error
766 * disassembly string - on error will constain error string
767 */
768 int NMD::Disassemble(const uint16 * data, std::string & dis,
769 TABLE_ENTRY_TYPE & type, const Pool *table,
770 int table_size, Dis_info *info)
771 {
772 try
773 {
774 for (int i = 0; i < table_size; i++) {
775 uint64 op_code = extract_op_code_value(data,
776 table[i].instructions_size);
777 if ((op_code & table[i].mask) == table[i].value) {
778 /* possible match */
779 conditional_function cond = table[i].condition;
780 if ((cond == NULL) || cond(op_code)) {
781 try
782 {
783 if (table[i].type == pool) {
784 return Disassemble(data, dis, type,
785 table[i].next_table,
786 table[i].next_table_size,
787 info);
788 } else if ((table[i].type == instruction) ||
789 (table[i].type == call_instruction) ||
790 (table[i].type == branch_instruction) ||
791 (table[i].type == return_instruction)) {
792 disassembly_function dis_fn = table[i].disassembly;
793 if (dis_fn == 0) {
794 dis = "disassembler failure - bad table entry";
795 return -6;
796 }
797 type = table[i].type;
798 dis = dis_fn(op_code, info);
799 return table[i].instructions_size;
800 } else {
801 dis = "reserved instruction";
802 return -2;
803 }
804 }
805 catch (std::runtime_error & e)
806 {
807 dis = e.what();
808 return -3; /* runtime error */
809 }
810 }
811 }
812 }
813 }
814 catch (std::exception & e)
815 {
816 dis = e.what();
817 return -4; /* runtime error */
818 }
819
820 dis = "failed to disassemble";
821 return -1; /* failed to disassemble */
822 }
823
824
825 static uint64 extract_code_18_to_0(uint64 instruction)
826 {
827 uint64 value = 0;
828 value |= extract_bits(instruction, 0, 19);
829 return value;
830 }
831
832
833 static uint64 extract_shift3_2_1_0(uint64 instruction)
834 {
835 uint64 value = 0;
836 value |= extract_bits(instruction, 0, 3);
837 return value;
838 }
839
840
841 static uint64 extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction)
842 {
843 uint64 value = 0;
844 value |= extract_bits(instruction, 3, 9) << 3;
845 return value;
846 }
847
848
849 static uint64 extract_count_3_2_1_0(uint64 instruction)
850 {
851 uint64 value = 0;
852 value |= extract_bits(instruction, 0, 4);
853 return value;
854 }
855
856
857 static uint64 extract_rtz3_9_8_7(uint64 instruction)
858 {
859 uint64 value = 0;
860 value |= extract_bits(instruction, 7, 3);
861 return value;
862 }
863
864
865 static uint64 extract_u_17_to_1__s1(uint64 instruction)
866 {
867 uint64 value = 0;
868 value |= extract_bits(instruction, 1, 17) << 1;
869 return value;
870 }
871
872
873 static int64 extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction)
874 {
875 int64 value = 0;
876 value |= extract_bits(instruction, 11, 10);
877 value = sign_extend(value, 9);
878 return value;
879 }
880
881
882 static int64 extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction)
883 {
884 int64 value = 0;
885 value |= extract_bits(instruction, 0, 1) << 11;
886 value |= extract_bits(instruction, 1, 10) << 1;
887 value = sign_extend(value, 11);
888 return value;
889 }
890
891
892 static uint64 extract_u_10(uint64 instruction)
893 {
894 uint64 value = 0;
895 value |= extract_bits(instruction, 10, 1);
896 return value;
897 }
898
899
900 static uint64 extract_rtz4_27_26_25_23_22_21(uint64 instruction)
901 {
902 uint64 value = 0;
903 value |= extract_bits(instruction, 21, 3);
904 value |= extract_bits(instruction, 25, 1) << 3;
905 return value;
906 }
907
908
909 static uint64 extract_sa_15_14_13_12_11(uint64 instruction)
910 {
911 uint64 value = 0;
912 value |= extract_bits(instruction, 11, 5);
913 return value;
914 }
915
916
917 static uint64 extract_shift_4_3_2_1_0(uint64 instruction)
918 {
919 uint64 value = 0;
920 value |= extract_bits(instruction, 0, 5);
921 return value;
922 }
923
924
925 static uint64 extract_shiftx_10_9_8_7__s1(uint64 instruction)
926 {
927 uint64 value = 0;
928 value |= extract_bits(instruction, 7, 4) << 1;
929 return value;
930 }
931
932
933 static uint64 extract_hint_25_24_23_22_21(uint64 instruction)
934 {
935 uint64 value = 0;
936 value |= extract_bits(instruction, 21, 5);
937 return value;
938 }
939
940
941 static uint64 extract_count3_14_13_12(uint64 instruction)
942 {
943 uint64 value = 0;
944 value |= extract_bits(instruction, 12, 3);
945 return value;
946 }
947
948
949 static int64 extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction)
950 {
951 int64 value = 0;
952 value |= extract_bits(instruction, 0, 1) << 31;
953 value |= extract_bits(instruction, 2, 10) << 21;
954 value |= extract_bits(instruction, 12, 9) << 12;
955 value = sign_extend(value, 31);
956 return value;
957 }
958
959
960 static int64 extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction)
961 {
962 int64 value = 0;
963 value |= extract_bits(instruction, 0, 1) << 7;
964 value |= extract_bits(instruction, 1, 6) << 1;
965 value = sign_extend(value, 7);
966 return value;
967 }
968
969
970 static uint64 extract_u2_10_9(uint64 instruction)
971 {
972 uint64 value = 0;
973 value |= extract_bits(instruction, 9, 2);
974 return value;
975 }
976
977
978 static uint64 extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction)
979 {
980 uint64 value = 0;
981 value |= extract_bits(instruction, 16, 10);
982 return value;
983 }
984
985
986 static uint64 extract_rs_20_19_18_17_16(uint64 instruction)
987 {
988 uint64 value = 0;
989 value |= extract_bits(instruction, 16, 5);
990 return value;
991 }
992
993
994 static uint64 extract_u_2_1__s1(uint64 instruction)
995 {
996 uint64 value = 0;
997 value |= extract_bits(instruction, 1, 2) << 1;
998 return value;
999 }
1000
1001
1002 static uint64 extract_stripe_6(uint64 instruction)
1003 {
1004 uint64 value = 0;
1005 value |= extract_bits(instruction, 6, 1);
1006 return value;
1007 }
1008
1009
1010 static uint64 extract_ac_15_14(uint64 instruction)
1011 {
1012 uint64 value = 0;
1013 value |= extract_bits(instruction, 14, 2);
1014 return value;
1015 }
1016
1017
1018 static uint64 extract_shift_20_19_18_17_16(uint64 instruction)
1019 {
1020 uint64 value = 0;
1021 value |= extract_bits(instruction, 16, 5);
1022 return value;
1023 }
1024
1025
1026 static uint64 extract_rdl_25_24(uint64 instruction)
1027 {
1028 uint64 value = 0;
1029 value |= extract_bits(instruction, 24, 1);
1030 return value;
1031 }
1032
1033
1034 static int64 extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction)
1035 {
1036 int64 value = 0;
1037 value |= extract_bits(instruction, 0, 1) << 10;
1038 value |= extract_bits(instruction, 1, 9) << 1;
1039 value = sign_extend(value, 10);
1040 return value;
1041 }
1042
1043
1044 static uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction)
1045 {
1046 uint64 value = 0;
1047 value |= extract_bits(instruction, 0, 7);
1048 return value;
1049 }
1050
1051
1052 static uint64 extract_shift_5_4_3_2_1_0(uint64 instruction)
1053 {
1054 uint64 value = 0;
1055 value |= extract_bits(instruction, 0, 6);
1056 return value;
1057 }
1058
1059
1060 static uint64 extract_count_19_18_17_16(uint64 instruction)
1061 {
1062 uint64 value = 0;
1063 value |= extract_bits(instruction, 16, 4);
1064 return value;
1065 }
1066
1067
1068 static uint64 extract_code_2_1_0(uint64 instruction)
1069 {
1070 uint64 value = 0;
1071 value |= extract_bits(instruction, 0, 3);
1072 return value;
1073 }
1074
1075
1076 static uint64 extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
1077 {
1078 uint64 value = 0;
1079 value |= extract_bits(instruction, 0, 12);
1080 return value;
1081 }
1082
1083
1084 static uint64 extract_rs_4_3_2_1_0(uint64 instruction)
1085 {
1086 uint64 value = 0;
1087 value |= extract_bits(instruction, 0, 5);
1088 return value;
1089 }
1090
1091
1092 static uint64 extract_u_20_to_3__s3(uint64 instruction)
1093 {
1094 uint64 value = 0;
1095 value |= extract_bits(instruction, 3, 18) << 3;
1096 return value;
1097 }
1098
1099
1100 static uint64 extract_u_3_2_1_0__s2(uint64 instruction)
1101 {
1102 uint64 value = 0;
1103 value |= extract_bits(instruction, 0, 4) << 2;
1104 return value;
1105 }
1106
1107
1108 static uint64 extract_cofun_25_24_23(uint64 instruction)
1109 {
1110 uint64 value = 0;
1111 value |= extract_bits(instruction, 3, 23);
1112 return value;
1113 }
1114
1115
1116 static uint64 extract_u_2_1_0__s2(uint64 instruction)
1117 {
1118 uint64 value = 0;
1119 value |= extract_bits(instruction, 0, 3) << 2;
1120 return value;
1121 }
1122
1123
1124 static uint64 extract_rd3_3_2_1(uint64 instruction)
1125 {
1126 uint64 value = 0;
1127 value |= extract_bits(instruction, 1, 3);
1128 return value;
1129 }
1130
1131
1132 static uint64 extract_sa_15_14_13_12(uint64 instruction)
1133 {
1134 uint64 value = 0;
1135 value |= extract_bits(instruction, 12, 4);
1136 return value;
1137 }
1138
1139
1140 static uint64 extract_rt_25_24_23_22_21(uint64 instruction)
1141 {
1142 uint64 value = 0;
1143 value |= extract_bits(instruction, 21, 5);
1144 return value;
1145 }
1146
1147
1148 static uint64 extract_ru_7_6_5_4_3(uint64 instruction)
1149 {
1150 uint64 value = 0;
1151 value |= extract_bits(instruction, 3, 5);
1152 return value;
1153 }
1154
1155
1156 static uint64 extract_u_17_to_0(uint64 instruction)
1157 {
1158 uint64 value = 0;
1159 value |= extract_bits(instruction, 0, 18);
1160 return value;
1161 }
1162
1163
1164 static uint64 extract_rsz4_4_2_1_0(uint64 instruction)
1165 {
1166 uint64 value = 0;
1167 value |= extract_bits(instruction, 0, 3);
1168 value |= extract_bits(instruction, 4, 1) << 3;
1169 return value;
1170 }
1171
1172
1173 static int64 extract_s__se21_0_20_to_1_s1(uint64 instruction)
1174 {
1175 int64 value = 0;
1176 value |= extract_bits(instruction, 0, 1) << 21;
1177 value |= extract_bits(instruction, 1, 20) << 1;
1178 value = sign_extend(value, 21);
1179 return value;
1180 }
1181
1182
1183 static uint64 extract_op_25_to_3(uint64 instruction)
1184 {
1185 uint64 value = 0;
1186 value |= extract_bits(instruction, 3, 23);
1187 return value;
1188 }
1189
1190
1191 static uint64 extract_rs4_4_2_1_0(uint64 instruction)
1192 {
1193 uint64 value = 0;
1194 value |= extract_bits(instruction, 0, 3);
1195 value |= extract_bits(instruction, 4, 1) << 3;
1196 return value;
1197 }
1198
1199
1200 static uint64 extract_bit_23_22_21(uint64 instruction)
1201 {
1202 uint64 value = 0;
1203 value |= extract_bits(instruction, 21, 3);
1204 return value;
1205 }
1206
1207
1208 static uint64 extract_rt_41_40_39_38_37(uint64 instruction)
1209 {
1210 uint64 value = 0;
1211 value |= extract_bits(instruction, 37, 5);
1212 return value;
1213 }
1214
1215
1216 static int64 extract_shift__se5_21_20_19_18_17_16(uint64 instruction)
1217 {
1218 int64 value = 0;
1219 value |= extract_bits(instruction, 16, 6);
1220 value = sign_extend(value, 5);
1221 return value;
1222 }
1223
1224
1225 static uint64 extract_rd2_3_8(uint64 instruction)
1226 {
1227 uint64 value = 0;
1228 value |= extract_bits(instruction, 3, 1) << 1;
1229 value |= extract_bits(instruction, 8, 1);
1230 return value;
1231 }
1232
1233
1234 static uint64 extract_code_17_to_0(uint64 instruction)
1235 {
1236 uint64 value = 0;
1237 value |= extract_bits(instruction, 0, 18);
1238 return value;
1239 }
1240
1241
1242 static uint64 extract_size_20_19_18_17_16(uint64 instruction)
1243 {
1244 uint64 value = 0;
1245 value |= extract_bits(instruction, 16, 5);
1246 return value;
1247 }
1248
1249
1250 static int64 extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction)
1251 {
1252 int64 value = 0;
1253 value |= extract_bits(instruction, 2, 6) << 2;
1254 value |= extract_bits(instruction, 15, 1) << 8;
1255 value = sign_extend(value, 8);
1256 return value;
1257 }
1258
1259
1260 static uint64 extract_u_15_to_0(uint64 instruction)
1261 {
1262 uint64 value = 0;
1263 value |= extract_bits(instruction, 0, 16);
1264 return value;
1265 }
1266
1267
1268 static uint64 extract_fs_20_19_18_17_16(uint64 instruction)
1269 {
1270 uint64 value = 0;
1271 value |= extract_bits(instruction, 16, 5);
1272 return value;
1273 }
1274
1275
1276 static int64 extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction)
1277 {
1278 int64 value = 0;
1279 value |= extract_bits(instruction, 0, 8);
1280 value |= extract_bits(instruction, 15, 1) << 8;
1281 value = sign_extend(value, 8);
1282 return value;
1283 }
1284
1285
1286 static uint64 extract_stype_20_19_18_17_16(uint64 instruction)
1287 {
1288 uint64 value = 0;
1289 value |= extract_bits(instruction, 16, 5);
1290 return value;
1291 }
1292
1293
1294 static uint64 extract_rtl_11(uint64 instruction)
1295 {
1296 uint64 value = 0;
1297 value |= extract_bits(instruction, 9, 1);
1298 return value;
1299 }
1300
1301
1302 static uint64 extract_hs_20_19_18_17_16(uint64 instruction)
1303 {
1304 uint64 value = 0;
1305 value |= extract_bits(instruction, 16, 5);
1306 return value;
1307 }
1308
1309
1310 static uint64 extract_sel_13_12_11(uint64 instruction)
1311 {
1312 uint64 value = 0;
1313 value |= extract_bits(instruction, 11, 3);
1314 return value;
1315 }
1316
1317
1318 static uint64 extract_lsb_4_3_2_1_0(uint64 instruction)
1319 {
1320 uint64 value = 0;
1321 value |= extract_bits(instruction, 0, 5);
1322 return value;
1323 }
1324
1325
1326 static uint64 extract_gp_2(uint64 instruction)
1327 {
1328 uint64 value = 0;
1329 value |= extract_bits(instruction, 2, 1);
1330 return value;
1331 }
1332
1333
1334 static uint64 extract_rt3_9_8_7(uint64 instruction)
1335 {
1336 uint64 value = 0;
1337 value |= extract_bits(instruction, 7, 3);
1338 return value;
1339 }
1340
1341
1342 static uint64 extract_ft_25_24_23_22_21(uint64 instruction)
1343 {
1344 uint64 value = 0;
1345 value |= extract_bits(instruction, 21, 5);
1346 return value;
1347 }
1348
1349
1350 static uint64 extract_u_17_16_15_14_13_12_11(uint64 instruction)
1351 {
1352 uint64 value = 0;
1353 value |= extract_bits(instruction, 11, 7);
1354 return value;
1355 }
1356
1357
1358 static uint64 extract_cs_20_19_18_17_16(uint64 instruction)
1359 {
1360 uint64 value = 0;
1361 value |= extract_bits(instruction, 16, 5);
1362 return value;
1363 }
1364
1365
1366 static uint64 extract_rt4_9_7_6_5(uint64 instruction)
1367 {
1368 uint64 value = 0;
1369 value |= extract_bits(instruction, 5, 3);
1370 value |= extract_bits(instruction, 9, 1) << 3;
1371 return value;
1372 }
1373
1374
1375 static uint64 extract_msbt_10_9_8_7_6(uint64 instruction)
1376 {
1377 uint64 value = 0;
1378 value |= extract_bits(instruction, 6, 5);
1379 return value;
1380 }
1381
1382
1383 static uint64 extract_u_5_4_3_2_1_0__s2(uint64 instruction)
1384 {
1385 uint64 value = 0;
1386 value |= extract_bits(instruction, 0, 6) << 2;
1387 return value;
1388 }
1389
1390
1391 static uint64 extract_sa_15_14_13(uint64 instruction)
1392 {
1393 uint64 value = 0;
1394 value |= extract_bits(instruction, 13, 3);
1395 return value;
1396 }
1397
1398
1399 static int64 extract_s__se14_0_13_to_1_s1(uint64 instruction)
1400 {
1401 int64 value = 0;
1402 value |= extract_bits(instruction, 0, 1) << 14;
1403 value |= extract_bits(instruction, 1, 13) << 1;
1404 value = sign_extend(value, 14);
1405 return value;
1406 }
1407
1408
1409 static uint64 extract_rs3_6_5_4(uint64 instruction)
1410 {
1411 uint64 value = 0;
1412 value |= extract_bits(instruction, 4, 3);
1413 return value;
1414 }
1415
1416
1417 static uint64 extract_u_31_to_0__s32(uint64 instruction)
1418 {
1419 uint64 value = 0;
1420 value |= extract_bits(instruction, 0, 32) << 32;
1421 return value;
1422 }
1423
1424
1425 static uint64 extract_shift_10_9_8_7_6(uint64 instruction)
1426 {
1427 uint64 value = 0;
1428 value |= extract_bits(instruction, 6, 5);
1429 return value;
1430 }
1431
1432
1433 static uint64 extract_cs_25_24_23_22_21(uint64 instruction)
1434 {
1435 uint64 value = 0;
1436 value |= extract_bits(instruction, 21, 5);
1437 return value;
1438 }
1439
1440
1441 static uint64 extract_shiftx_11_10_9_8_7_6(uint64 instruction)
1442 {
1443 uint64 value = 0;
1444 value |= extract_bits(instruction, 6, 6);
1445 return value;
1446 }
1447
1448
1449 static uint64 extract_rt_9_8_7_6_5(uint64 instruction)
1450 {
1451 uint64 value = 0;
1452 value |= extract_bits(instruction, 5, 5);
1453 return value;
1454 }
1455
1456
1457 static uint64 extract_op_25_24_23_22_21(uint64 instruction)
1458 {
1459 uint64 value = 0;
1460 value |= extract_bits(instruction, 21, 5);
1461 return value;
1462 }
1463
1464
1465 static uint64 extract_u_6_5_4_3_2_1_0__s2(uint64 instruction)
1466 {
1467 uint64 value = 0;
1468 value |= extract_bits(instruction, 0, 7) << 2;
1469 return value;
1470 }
1471
1472
1473 static uint64 extract_bit_16_15_14_13_12_11(uint64 instruction)
1474 {
1475 uint64 value = 0;
1476 value |= extract_bits(instruction, 11, 6);
1477 return value;
1478 }
1479
1480
1481 static uint64 extract_mask_20_19_18_17_16_15_14(uint64 instruction)
1482 {
1483 uint64 value = 0;
1484 value |= extract_bits(instruction, 14, 7);
1485 return value;
1486 }
1487
1488
1489 static uint64 extract_eu_3_2_1_0(uint64 instruction)
1490 {
1491 uint64 value = 0;
1492 value |= extract_bits(instruction, 0, 4);
1493 return value;
1494 }
1495
1496
1497 static uint64 extract_u_7_6_5_4__s4(uint64 instruction)
1498 {
1499 uint64 value = 0;
1500 value |= extract_bits(instruction, 4, 4) << 4;
1501 return value;
1502 }
1503
1504
1505 static int64 extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction)
1506 {
1507 int64 value = 0;
1508 value |= extract_bits(instruction, 3, 5) << 3;
1509 value |= extract_bits(instruction, 15, 1) << 8;
1510 value = sign_extend(value, 8);
1511 return value;
1512 }
1513
1514
1515 static uint64 extract_ft_15_14_13_12_11(uint64 instruction)
1516 {
1517 uint64 value = 0;
1518 value |= extract_bits(instruction, 11, 5);
1519 return value;
1520 }
1521
1522
1523 static int64 extract_s__se31_15_to_0_31_to_16(uint64 instruction)
1524 {
1525 int64 value = 0;
1526 value |= extract_bits(instruction, 0, 16) << 16;
1527 value |= extract_bits(instruction, 16, 16);
1528 value = sign_extend(value, 31);
1529 return value;
1530 }
1531
1532
1533 static uint64 extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
1534 {
1535 uint64 value = 0;
1536 value |= extract_bits(instruction, 13, 8);
1537 return value;
1538 }
1539
1540
1541 static uint64 extract_u_17_to_2__s2(uint64 instruction)
1542 {
1543 uint64 value = 0;
1544 value |= extract_bits(instruction, 2, 16) << 2;
1545 return value;
1546 }
1547
1548
1549 static uint64 extract_rd_15_14_13_12_11(uint64 instruction)
1550 {
1551 uint64 value = 0;
1552 value |= extract_bits(instruction, 11, 5);
1553 return value;
1554 }
1555
1556
1557 static uint64 extract_c0s_20_19_18_17_16(uint64 instruction)
1558 {
1559 uint64 value = 0;
1560 value |= extract_bits(instruction, 16, 5);
1561 return value;
1562 }
1563
1564
1565 static uint64 extract_code_1_0(uint64 instruction)
1566 {
1567 uint64 value = 0;
1568 value |= extract_bits(instruction, 0, 2);
1569 return value;
1570 }
1571
1572
1573 static int64 extract_s__se25_0_24_to_1_s1(uint64 instruction)
1574 {
1575 int64 value = 0;
1576 value |= extract_bits(instruction, 0, 1) << 25;
1577 value |= extract_bits(instruction, 1, 24) << 1;
1578 value = sign_extend(value, 25);
1579 return value;
1580 }
1581
1582
1583 static uint64 extract_u_1_0(uint64 instruction)
1584 {
1585 uint64 value = 0;
1586 value |= extract_bits(instruction, 0, 2);
1587 return value;
1588 }
1589
1590
1591 static uint64 extract_u_3_8__s2(uint64 instruction)
1592 {
1593 uint64 value = 0;
1594 value |= extract_bits(instruction, 3, 1) << 3;
1595 value |= extract_bits(instruction, 8, 1) << 2;
1596 return value;
1597 }
1598
1599
1600 static uint64 extract_fd_15_14_13_12_11(uint64 instruction)
1601 {
1602 uint64 value = 0;
1603 value |= extract_bits(instruction, 11, 5);
1604 return value;
1605 }
1606
1607
1608 static uint64 extract_u_4_3_2_1_0__s2(uint64 instruction)
1609 {
1610 uint64 value = 0;
1611 value |= extract_bits(instruction, 0, 5) << 2;
1612 return value;
1613 }
1614
1615
1616 static uint64 extract_rtz4_9_7_6_5(uint64 instruction)
1617 {
1618 uint64 value = 0;
1619 value |= extract_bits(instruction, 5, 3);
1620 value |= extract_bits(instruction, 9, 1) << 3;
1621 return value;
1622 }
1623
1624
1625 static uint64 extract_sel_15_14_13_12_11(uint64 instruction)
1626 {
1627 uint64 value = 0;
1628 value |= extract_bits(instruction, 11, 5);
1629 return value;
1630 }
1631
1632
1633 static uint64 extract_ct_25_24_23_22_21(uint64 instruction)
1634 {
1635 uint64 value = 0;
1636 value |= extract_bits(instruction, 21, 5);
1637 return value;
1638 }
1639
1640
1641 static uint64 extract_u_20_to_2__s2(uint64 instruction)
1642 {
1643 uint64 value = 0;
1644 value |= extract_bits(instruction, 2, 19) << 2;
1645 return value;
1646 }
1647
1648
1649 static int64 extract_s__se3_4_2_1_0(uint64 instruction)
1650 {
1651 int64 value = 0;
1652 value |= extract_bits(instruction, 0, 3);
1653 value |= extract_bits(instruction, 4, 1) << 3;
1654 value = sign_extend(value, 3);
1655 return value;
1656 }
1657
1658
1659 static uint64 extract_u_3_2_1_0__s1(uint64 instruction)
1660 {
1661 uint64 value = 0;
1662 value |= extract_bits(instruction, 0, 4) << 1;
1663 return value;
1664 }
1665
1666
1667
1668 static bool ADDIU_32__cond(uint64 instruction)
1669 {
1670 uint64 rt = extract_rt_25_24_23_22_21(instruction);
1671 return rt != 0;
1672 }
1673
1674
1675 static bool ADDIU_RS5__cond(uint64 instruction)
1676 {
1677 uint64 rt = extract_rt_9_8_7_6_5(instruction);
1678 return rt != 0;
1679 }
1680
1681
1682 static bool BALRSC_cond(uint64 instruction)
1683 {
1684 uint64 rt = extract_rt_25_24_23_22_21(instruction);
1685 return rt != 0;
1686 }
1687
1688
1689 static bool BEQC_16__cond(uint64 instruction)
1690 {
1691 uint64 rs3 = extract_rs3_6_5_4(instruction);
1692 uint64 rt3 = extract_rt3_9_8_7(instruction);
1693 uint64 u = extract_u_3_2_1_0__s1(instruction);
1694 return rs3 < rt3 && u != 0;
1695 }
1696
1697
1698 static bool BNEC_16__cond(uint64 instruction)
1699 {
1700 uint64 rs3 = extract_rs3_6_5_4(instruction);
1701 uint64 rt3 = extract_rt3_9_8_7(instruction);
1702 uint64 u = extract_u_3_2_1_0__s1(instruction);
1703 return rs3 >= rt3 && u != 0;
1704 }
1705
1706
1707 static bool MOVE_cond(uint64 instruction)
1708 {
1709 uint64 rt = extract_rt_9_8_7_6_5(instruction);
1710 return rt != 0;
1711 }
1712
1713
1714 static bool P16_BR1_cond(uint64 instruction)
1715 {
1716 uint64 u = extract_u_3_2_1_0__s1(instruction);
1717 return u != 0;
1718 }
1719
1720
1721 static bool PREF_S9__cond(uint64 instruction)
1722 {
1723 uint64 hint = extract_hint_25_24_23_22_21(instruction);
1724 return hint != 31;
1725 }
1726
1727
1728 static bool PREFE_cond(uint64 instruction)
1729 {
1730 uint64 hint = extract_hint_25_24_23_22_21(instruction);
1731 return hint != 31;
1732 }
1733
1734
1735 static bool SLTU_cond(uint64 instruction)
1736 {
1737 uint64 rd = extract_rd_15_14_13_12_11(instruction);
1738 return rd != 0;
1739 }
1740
1741
1742
1743 /*
1744 * ABS.D fd, fs - Floating Point Absolute Value
1745 *
1746 * 3 2 1
1747 * 10987654321098765432109876543210
1748 * 010001 00000 000101
1749 * fmt -----
1750 * fs -----
1751 * fd -----
1752 */
1753 static std::string ABS_D(uint64 instruction, Dis_info *info)
1754 {
1755 uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1756 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1757
1758 std::string fs = FPR(copy(fs_value));
1759 std::string fd = FPR(copy(fd_value));
1760
1761 return img_format("ABS.D %s, %s", fd, fs);
1762 }
1763
1764
1765 /*
1766 * ABS.S fd, fs - Floating Point Absolute Value
1767 *
1768 * 3 2 1
1769 * 10987654321098765432109876543210
1770 * 010001 00000 000101
1771 * fmt -----
1772 * fd -----
1773 * fs -----
1774 */
1775 static std::string ABS_S(uint64 instruction, Dis_info *info)
1776 {
1777 uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1778 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1779
1780 std::string fs = FPR(copy(fs_value));
1781 std::string fd = FPR(copy(fd_value));
1782
1783 return img_format("ABS.S %s, %s", fd, fs);
1784 }
1785
1786
1787 /*
1788 * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords
1789 * with 16-bit saturation
1790 *
1791 * 3 2 1
1792 * 10987654321098765432109876543210
1793 * 001000 0001000100111111
1794 * rt -----
1795 * rs -----
1796 */
1797 static std::string ABSQ_S_PH(uint64 instruction, Dis_info *info)
1798 {
1799 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1800 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1801
1802 std::string rt = GPR(copy(rt_value));
1803 std::string rs = GPR(copy(rs_value));
1804
1805 return img_format("ABSQ_S.PH %s, %s", rt, rs);
1806 }
1807
1808
1809 /*
1810 * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte values
1811 * with 8-bit saturation
1812 *
1813 * 3 2 1
1814 * 10987654321098765432109876543210
1815 * 001000 0000000100111111
1816 * rt -----
1817 * rs -----
1818 */
1819 static std::string ABSQ_S_QB(uint64 instruction, Dis_info *info)
1820 {
1821 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1822 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1823
1824 std::string rt = GPR(copy(rt_value));
1825 std::string rs = GPR(copy(rs_value));
1826
1827 return img_format("ABSQ_S.QB %s, %s", rt, rs);
1828 }
1829
1830
1831 /*
1832 * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-bit
1833 * saturation
1834 *
1835 * 3 2 1
1836 * 10987654321098765432109876543210
1837 * 001000 0010000100111111
1838 * rt -----
1839 * rs -----
1840 */
1841 static std::string ABSQ_S_W(uint64 instruction, Dis_info *info)
1842 {
1843 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1844 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1845
1846 std::string rt = GPR(copy(rt_value));
1847 std::string rs = GPR(copy(rs_value));
1848
1849 return img_format("ABSQ_S.W %s, %s", rt, rs);
1850 }
1851
1852
1853 /*
1854 *
1855 *
1856 * 3 2 1
1857 * 10987654321098765432109876543210
1858 * 001000 0010000100111111
1859 * rt -----
1860 * rs -----
1861 */
1862 static std::string ACLR(uint64 instruction, Dis_info *info)
1863 {
1864 uint64 bit_value = extract_bit_23_22_21(instruction);
1865 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1866 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
1867
1868 std::string bit = IMMEDIATE(copy(bit_value));
1869 std::string s = IMMEDIATE(copy(s_value));
1870 std::string rs = GPR(copy(rs_value));
1871
1872 return img_format("ACLR %s, %s(%s)", bit, s, rs);
1873 }
1874
1875
1876 /*
1877 *
1878 *
1879 * 3 2 1
1880 * 10987654321098765432109876543210
1881 * 001000 0010000100111111
1882 * rt -----
1883 * rs -----
1884 */
1885 static std::string ADD(uint64 instruction, Dis_info *info)
1886 {
1887 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1888 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1889 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
1890
1891 std::string rd = GPR(copy(rd_value));
1892 std::string rs = GPR(copy(rs_value));
1893 std::string rt = GPR(copy(rt_value));
1894
1895 return img_format("ADD %s, %s, %s", rd, rs, rt);
1896 }
1897
1898
1899 /*
1900 * ADD.D fd, fs, ft - Floating Point Add
1901 *
1902 * 3 2 1
1903 * 10987654321098765432109876543210
1904 * 010001 000101
1905 * fmt -----
1906 * ft -----
1907 * fs -----
1908 * fd -----
1909 */
1910 static std::string ADD_D(uint64 instruction, Dis_info *info)
1911 {
1912 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1913 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1914 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1915
1916 std::string ft = FPR(copy(ft_value));
1917 std::string fs = FPR(copy(fs_value));
1918 std::string fd = FPR(copy(fd_value));
1919
1920 return img_format("ADD.D %s, %s, %s", fd, fs, ft);
1921 }
1922
1923
1924 /*
1925 * ADD.S fd, fs, ft - Floating Point Add
1926 *
1927 * 3 2 1
1928 * 10987654321098765432109876543210
1929 * 010001 000101
1930 * fmt -----
1931 * ft -----
1932 * fs -----
1933 * fd -----
1934 */
1935 static std::string ADD_S(uint64 instruction, Dis_info *info)
1936 {
1937 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1938 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1939 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1940
1941 std::string ft = FPR(copy(ft_value));
1942 std::string fs = FPR(copy(fs_value));
1943 std::string fd = FPR(copy(fd_value));
1944
1945 return img_format("ADD.S %s, %s, %s", fd, fs, ft);
1946 }
1947
1948
1949 /*
1950 *
1951 *
1952 * 3 2 1
1953 * 10987654321098765432109876543210
1954 * 001000 0010000100111111
1955 * rt -----
1956 * rs -----
1957 */
1958 static std::string ADDIU_32_(uint64 instruction, Dis_info *info)
1959 {
1960 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1961 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1962 uint64 u_value = extract_u_15_to_0(instruction);
1963
1964 std::string rt = GPR(copy(rt_value));
1965 std::string rs = GPR(copy(rs_value));
1966 std::string u = IMMEDIATE(copy(u_value));
1967
1968 return img_format("ADDIU %s, %s, %s", rt, rs, u);
1969 }
1970
1971
1972 /*
1973 *
1974 *
1975 * 3 2 1
1976 * 10987654321098765432109876543210
1977 * 001000 0010000100111111
1978 * rt -----
1979 * rs -----
1980 */
1981 static std::string ADDIU_48_(uint64 instruction, Dis_info *info)
1982 {
1983 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
1984 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
1985
1986 std::string rt = GPR(copy(rt_value));
1987 std::string s = IMMEDIATE(copy(s_value));
1988
1989 return img_format("ADDIU %s, %s", rt, s);
1990 }
1991
1992
1993 /*
1994 *
1995 *
1996 * 3 2 1
1997 * 10987654321098765432109876543210
1998 * 001000 0010000100111111
1999 * rt -----
2000 * rs -----
2001 */
2002 static std::string ADDIU_GP48_(uint64 instruction, Dis_info *info)
2003 {
2004 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2005 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2006
2007 std::string rt = GPR(copy(rt_value));
2008 std::string s = IMMEDIATE(copy(s_value));
2009
2010 return img_format("ADDIU %s, $%d, %s", rt, 28, s);
2011 }
2012
2013
2014 /*
2015 *
2016 *
2017 * 3 2 1
2018 * 10987654321098765432109876543210
2019 * 001000 0010000100111111
2020 * rt -----
2021 * rs -----
2022 */
2023 static std::string ADDIU_GP_B_(uint64 instruction, Dis_info *info)
2024 {
2025 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2026 uint64 u_value = extract_u_17_to_0(instruction);
2027
2028 std::string rt = GPR(copy(rt_value));
2029 std::string u = IMMEDIATE(copy(u_value));
2030
2031 return img_format("ADDIU %s, $%d, %s", rt, 28, u);
2032 }
2033
2034
2035 /*
2036 *
2037 *
2038 * 3 2 1
2039 * 10987654321098765432109876543210
2040 * 001000 0010000100111111
2041 * rt -----
2042 * rs -----
2043 */
2044 static std::string ADDIU_GP_W_(uint64 instruction, Dis_info *info)
2045 {
2046 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2047 uint64 u_value = extract_u_20_to_2__s2(instruction);
2048
2049 std::string rt = GPR(copy(rt_value));
2050 std::string u = IMMEDIATE(copy(u_value));
2051
2052 return img_format("ADDIU %s, $%d, %s", rt, 28, u);
2053 }
2054
2055
2056 /*
2057 *
2058 *
2059 * 3 2 1
2060 * 10987654321098765432109876543210
2061 * 001000 0010000100111111
2062 * rt -----
2063 * rs -----
2064 */
2065 static std::string ADDIU_NEG_(uint64 instruction, Dis_info *info)
2066 {
2067 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2068 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2069 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2070
2071 std::string rt = GPR(copy(rt_value));
2072 std::string rs = GPR(copy(rs_value));
2073 std::string u = IMMEDIATE(neg_copy(u_value));
2074
2075 return img_format("ADDIU %s, %s, %s", rt, rs, u);
2076 }
2077
2078
2079 /*
2080 *
2081 *
2082 * 3 2 1
2083 * 10987654321098765432109876543210
2084 * 001000 0010000100111111
2085 * rt -----
2086 * rs -----
2087 */
2088 static std::string ADDIU_R1_SP_(uint64 instruction, Dis_info *info)
2089 {
2090 uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
2091 uint64 rt3_value = extract_rt3_9_8_7(instruction);
2092
2093 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2094 std::string u = IMMEDIATE(copy(u_value));
2095
2096 return img_format("ADDIU %s, $%d, %s", rt3, 29, u);
2097 }
2098
2099
2100 /*
2101 *
2102 *
2103 * 3 2 1
2104 * 10987654321098765432109876543210
2105 * 001000 0010000100111111
2106 * rt -----
2107 * rs -----
2108 */
2109 static std::string ADDIU_R2_(uint64 instruction, Dis_info *info)
2110 {
2111 uint64 rt3_value = extract_rt3_9_8_7(instruction);
2112 uint64 rs3_value = extract_rs3_6_5_4(instruction);
2113 uint64 u_value = extract_u_2_1_0__s2(instruction);
2114
2115 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2116 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2117 std::string u = IMMEDIATE(copy(u_value));
2118
2119 return img_format("ADDIU %s, %s, %s", rt3, rs3, u);
2120 }
2121
2122
2123 /*
2124 * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit
2125 *
2126 * 5432109876543210
2127 * 100100 1
2128 * rt -----
2129 * s - ---
2130 */
2131 static std::string ADDIU_RS5_(uint64 instruction, Dis_info *info)
2132 {
2133 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
2134 int64 s_value = extract_s__se3_4_2_1_0(instruction);
2135
2136 std::string rt = GPR(copy(rt_value));
2137 std::string s = IMMEDIATE(copy(s_value));
2138
2139 return img_format("ADDIU %s, %s", rt, s);
2140 }
2141
2142
2143 /*
2144 *
2145 *
2146 * 3 2 1
2147 * 10987654321098765432109876543210
2148 * 001000 x1110000101
2149 * rt -----
2150 * rs -----
2151 * rd -----
2152 */
2153 static std::string ADDIUPC_32_(uint64 instruction, Dis_info *info)
2154 {
2155 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2156 int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
2157
2158 std::string rt = GPR(copy(rt_value));
2159 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2160
2161 return img_format("ADDIUPC %s, %s", rt, s);
2162 }
2163
2164
2165 /*
2166 *
2167 *
2168 * 3 2 1
2169 * 10987654321098765432109876543210
2170 * 001000 x1110000101
2171 * rt -----
2172 * rs -----
2173 * rd -----
2174 */
2175 static std::string ADDIUPC_48_(uint64 instruction, Dis_info *info)
2176 {
2177 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2178 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2179
2180 std::string rt = GPR(copy(rt_value));
2181 std::string s = ADDRESS(encode_s_from_address(s_value), 6, info);
2182
2183 return img_format("ADDIUPC %s, %s", rt, s);
2184 }
2185
2186
2187 /*
2188 * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors
2189 *
2190 * 3 2 1
2191 * 10987654321098765432109876543210
2192 * 001000 00000001101
2193 * rt -----
2194 * rs -----
2195 * rd -----
2196 */
2197 static std::string ADDQ_PH(uint64 instruction, Dis_info *info)
2198 {
2199 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2200 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2201 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2202
2203 std::string rd = GPR(copy(rd_value));
2204 std::string rs = GPR(copy(rs_value));
2205 std::string rt = GPR(copy(rt_value));
2206
2207 return img_format("ADDQ.PH %s, %s, %s", rd, rs, rt);
2208 }
2209
2210
2211 /*
2212 * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit
2213 * saturation
2214 *
2215 * 3 2 1
2216 * 10987654321098765432109876543210
2217 * 001000 10000001101
2218 * rt -----
2219 * rs -----
2220 * rd -----
2221 */
2222 static std::string ADDQ_S_PH(uint64 instruction, Dis_info *info)
2223 {
2224 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2225 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2226 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2227
2228 std::string rd = GPR(copy(rd_value));
2229 std::string rs = GPR(copy(rs_value));
2230 std::string rt = GPR(copy(rt_value));
2231
2232 return img_format("ADDQ_S.PH %s, %s, %s", rd, rs, rt);
2233 }
2234
2235
2236 /*
2237 * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation
2238 *
2239 * 3 2 1
2240 * 10987654321098765432109876543210
2241 * 001000 x1100000101
2242 * rt -----
2243 * rs -----
2244 * rd -----
2245 */
2246 static std::string ADDQ_S_W(uint64 instruction, Dis_info *info)
2247 {
2248 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2249 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2250 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2251
2252 std::string rd = GPR(copy(rd_value));
2253 std::string rs = GPR(copy(rs_value));
2254 std::string rt = GPR(copy(rt_value));
2255
2256 return img_format("ADDQ_S.W %s, %s, %s", rd, rs, rt);
2257 }
2258
2259
2260 /*
2261 * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift
2262 * right to halve results
2263 *
2264 * 3 2 1
2265 * 10987654321098765432109876543210
2266 * 001000 00001001101
2267 * rt -----
2268 * rs -----
2269 * rd -----
2270 */
2271 static std::string ADDQH_PH(uint64 instruction, Dis_info *info)
2272 {
2273 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2274 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2275 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2276
2277 std::string rd = GPR(copy(rd_value));
2278 std::string rs = GPR(copy(rs_value));
2279 std::string rt = GPR(copy(rt_value));
2280
2281 return img_format("ADDQH.PH %s, %s, %s", rd, rs, rt);
2282 }
2283
2284
2285 /*
2286 * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift
2287 * right to halve results with rounding
2288 *
2289 * 3 2 1
2290 * 10987654321098765432109876543210
2291 * 001000 10001001101
2292 * rt -----
2293 * rs -----
2294 * rd -----
2295 */
2296 static std::string ADDQH_R_PH(uint64 instruction, Dis_info *info)
2297 {
2298 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2299 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2300 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2301
2302 std::string rd = GPR(copy(rd_value));
2303 std::string rs = GPR(copy(rs_value));
2304 std::string rt = GPR(copy(rt_value));
2305
2306 return img_format("ADDQH_R.PH %s, %s, %s", rd, rs, rt);
2307 }
2308
2309
2310 /*
2311 * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to halve
2312 * results with rounding
2313 *
2314 * 3 2 1
2315 * 10987654321098765432109876543210
2316 * 001000 00010001101
2317 * rt -----
2318 * rs -----
2319 * rd -----
2320 */
2321 static std::string ADDQH_R_W(uint64 instruction, Dis_info *info)
2322 {
2323 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2324 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2325 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2326
2327 std::string rd = GPR(copy(rd_value));
2328 std::string rs = GPR(copy(rs_value));
2329 std::string rt = GPR(copy(rt_value));
2330
2331 return img_format("ADDQH_R.W %s, %s, %s", rd, rs, rt);
2332 }
2333
2334
2335 /*
2336 * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve
2337 * results
2338 *
2339 * 3 2 1
2340 * 10987654321098765432109876543210
2341 * 001000 10010001101
2342 * rt -----
2343 * rs -----
2344 * rd -----
2345 */
2346 static std::string ADDQH_W(uint64 instruction, Dis_info *info)
2347 {
2348 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2349 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2350 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2351
2352 std::string rd = GPR(copy(rd_value));
2353 std::string rs = GPR(copy(rs_value));
2354 std::string rt = GPR(copy(rt_value));
2355
2356 return img_format("ADDQH.W %s, %s, %s", rd, rs, rt);
2357 }
2358
2359
2360 /*
2361 * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit
2362 *
2363 * 3 2 1
2364 * 10987654321098765432109876543210
2365 * 001000 x1110000101
2366 * rt -----
2367 * rs -----
2368 * rd -----
2369 */
2370 static std::string ADDSC(uint64 instruction, Dis_info *info)
2371 {
2372 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2373 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2374 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2375
2376 std::string rd = GPR(copy(rd_value));
2377 std::string rs = GPR(copy(rs_value));
2378 std::string rt = GPR(copy(rt_value));
2379
2380 return img_format("ADDSC %s, %s, %s", rd, rs, rt);
2381 }
2382
2383
2384 /*
2385 * ADDU[16] rd3, rs3, rt3 -
2386 *
2387 * 5432109876543210
2388 * 101100 0
2389 * rt3 ---
2390 * rs3 ---
2391 * rd3 ---
2392 */
2393 static std::string ADDU_16_(uint64 instruction, Dis_info *info)
2394 {
2395 uint64 rt3_value = extract_rt3_9_8_7(instruction);
2396 uint64 rs3_value = extract_rs3_6_5_4(instruction);
2397 uint64 rd3_value = extract_rd3_3_2_1(instruction);
2398
2399 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2400 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2401 std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
2402
2403 return img_format("ADDU %s, %s, %s", rd3, rs3, rt3);
2404 }
2405
2406
2407 /*
2408 *
2409 *
2410 * 3 2 1
2411 * 10987654321098765432109876543210
2412 * 001000 x1110000101
2413 * rt -----
2414 * rs -----
2415 * rd -----
2416 */
2417 static std::string ADDU_32_(uint64 instruction, Dis_info *info)
2418 {
2419 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2420 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2421 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2422
2423 std::string rd = GPR(copy(rd_value));
2424 std::string rs = GPR(copy(rs_value));
2425 std::string rt = GPR(copy(rt_value));
2426
2427 return img_format("ADDU %s, %s, %s", rd, rs, rt);
2428 }
2429
2430
2431 /*
2432 *
2433 *
2434 * 3 2 1
2435 * 10987654321098765432109876543210
2436 * 001000 x1110000101
2437 * rt -----
2438 * rs -----
2439 * rd -----
2440 */
2441 static std::string ADDU_4X4_(uint64 instruction, Dis_info *info)
2442 {
2443 uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
2444 uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
2445
2446 std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
2447 std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
2448
2449 return img_format("ADDU %s, %s", rs4, rt4);
2450 }
2451
2452
2453 /*
2454 * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords
2455 *
2456 * 3 2 1
2457 * 10987654321098765432109876543210
2458 * 001000 00100001101
2459 * rt -----
2460 * rs -----
2461 * rd -----
2462 */
2463 static std::string ADDU_PH(uint64 instruction, Dis_info *info)
2464 {
2465 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2466 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2467 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2468
2469 std::string rd = GPR(copy(rd_value));
2470 std::string rs = GPR(copy(rs_value));
2471 std::string rt = GPR(copy(rt_value));
2472
2473 return img_format("ADDU.PH %s, %s, %s", rd, rs, rt);
2474 }
2475
2476
2477 /*
2478 * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2479 *
2480 * 3 2 1
2481 * 10987654321098765432109876543210
2482 * 001000 00011001101
2483 * rt -----
2484 * rs -----
2485 * rd -----
2486 */
2487 static std::string ADDU_QB(uint64 instruction, Dis_info *info)
2488 {
2489 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2490 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2491 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2492
2493 std::string rd = GPR(copy(rd_value));
2494 std::string rs = GPR(copy(rs_value));
2495 std::string rt = GPR(copy(rt_value));
2496
2497 return img_format("ADDU.QB %s, %s, %s", rd, rs, rt);
2498 }
2499
2500
2501 /*
2502 * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 16-bit
2503 * saturation
2504 *
2505 * 3 2 1
2506 * 10987654321098765432109876543210
2507 * 001000 10100001101
2508 * rt -----
2509 * rs -----
2510 * rd -----
2511 */
2512 static std::string ADDU_S_PH(uint64 instruction, Dis_info *info)
2513 {
2514 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2515 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2516 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2517
2518 std::string rd = GPR(copy(rd_value));
2519 std::string rs = GPR(copy(rs_value));
2520 std::string rt = GPR(copy(rt_value));
2521
2522 return img_format("ADDU_S.PH %s, %s, %s", rd, rs, rt);
2523 }
2524
2525
2526 /*
2527 * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2528 *
2529 * 3 2 1
2530 * 10987654321098765432109876543210
2531 * 001000 10011001101
2532 * rt -----
2533 * rs -----
2534 * rd -----
2535 */
2536 static std::string ADDU_S_QB(uint64 instruction, Dis_info *info)
2537 {
2538 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2539 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2540 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2541
2542 std::string rd = GPR(copy(rd_value));
2543 std::string rs = GPR(copy(rs_value));
2544 std::string rt = GPR(copy(rt_value));
2545
2546 return img_format("ADDU_S.QB %s, %s, %s", rd, rs, rt);
2547 }
2548
2549
2550 /*
2551 * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2552 * to Halve Results
2553 *
2554 * 3 2 1
2555 * 10987654321098765432109876543210
2556 * 001000 00101001101
2557 * rt -----
2558 * rs -----
2559 * rd -----
2560 */
2561 static std::string ADDUH_QB(uint64 instruction, Dis_info *info)
2562 {
2563 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2564 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2565 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2566
2567 std::string rd = GPR(copy(rd_value));
2568 std::string rs = GPR(copy(rs_value));
2569 std::string rt = GPR(copy(rt_value));
2570
2571 return img_format("ADDUH.QB %s, %s, %s", rd, rs, rt);
2572 }
2573
2574
2575 /*
2576 * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2577 * to Halve Results
2578 *
2579 * 3 2 1
2580 * 10987654321098765432109876543210
2581 * 001000 10101001101
2582 * rt -----
2583 * rs -----
2584 * rd -----
2585 */
2586 static std::string ADDUH_R_QB(uint64 instruction, Dis_info *info)
2587 {
2588 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2589 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2590 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2591
2592 std::string rd = GPR(copy(rd_value));
2593 std::string rs = GPR(copy(rs_value));
2594 std::string rt = GPR(copy(rt_value));
2595
2596 return img_format("ADDUH_R.QB %s, %s, %s", rd, rs, rt);
2597 }
2598
2599 /*
2600 * ADDWC rd, rt, rs - Add Word with Carry Bit
2601 *
2602 * 3 2 1
2603 * 10987654321098765432109876543210
2604 * 001000 x1111000101
2605 * rt -----
2606 * rs -----
2607 * rd -----
2608 */
2609 static std::string ADDWC(uint64 instruction, Dis_info *info)
2610 {
2611 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2612 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2613 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2614
2615 std::string rd = GPR(copy(rd_value));
2616 std::string rs = GPR(copy(rs_value));
2617 std::string rt = GPR(copy(rt_value));
2618
2619 return img_format("ADDWC %s, %s, %s", rd, rs, rt);
2620 }
2621
2622
2623 /*
2624 *
2625 *
2626 * 3 2 1
2627 * 10987654321098765432109876543210
2628 * 001000 x1110000101
2629 * rt -----
2630 * rs -----
2631 * rd -----
2632 */
2633 static std::string ALUIPC(uint64 instruction, Dis_info *info)
2634 {
2635 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2636 int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
2637
2638 std::string rt = GPR(copy(rt_value));
2639 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2640
2641 return img_format("ALUIPC %s, %%pcrel_hi(%s)", rt, s);
2642 }
2643
2644
2645 /*
2646 * AND[16] rt3, rs3 -
2647 *
2648 * 5432109876543210
2649 * 101100
2650 * rt3 ---
2651 * rs3 ---
2652 * eu ----
2653 */
2654 static std::string AND_16_(uint64 instruction, Dis_info *info)
2655 {
2656 uint64 rt3_value = extract_rt3_9_8_7(instruction);
2657 uint64 rs3_value = extract_rs3_6_5_4(instruction);
2658
2659 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2660 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2661
2662 return img_format("AND %s, %s", rs3, rt3);
2663 }
2664
2665
2666 /*
2667 *
2668 *
2669 * 3 2 1
2670 * 10987654321098765432109876543210
2671 * 001000 x1110000101
2672 * rt -----
2673 * rs -----
2674 * rd -----
2675 */
2676 static std::string AND_32_(uint64 instruction, Dis_info *info)
2677 {
2678 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2679 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2680 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2681
2682 std::string rd = GPR(copy(rd_value));
2683 std::string rs = GPR(copy(rs_value));
2684 std::string rt = GPR(copy(rt_value));
2685
2686 return img_format("AND %s, %s, %s", rd, rs, rt);
2687 }
2688
2689
2690 /*
2691 * ANDI rt, rs, u -
2692 *
2693 * 5432109876543210
2694 * 101100
2695 * rt3 ---
2696 * rs3 ---
2697 * eu ----
2698 */
2699 static std::string ANDI_16_(uint64 instruction, Dis_info *info)
2700 {
2701 uint64 rt3_value = extract_rt3_9_8_7(instruction);
2702 uint64 rs3_value = extract_rs3_6_5_4(instruction);
2703 uint64 eu_value = extract_eu_3_2_1_0(instruction);
2704
2705 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2706 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2707 std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value));
2708
2709 return img_format("ANDI %s, %s, %s", rt3, rs3, eu);
2710 }
2711
2712
2713 /*
2714 *
2715 *
2716 * 3 2 1
2717 * 10987654321098765432109876543210
2718 * 001000 x1110000101
2719 * rt -----
2720 * rs -----
2721 * rd -----
2722 */
2723 static std::string ANDI_32_(uint64 instruction, Dis_info *info)
2724 {
2725 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2726 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2727 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2728
2729 std::string rt = GPR(copy(rt_value));
2730 std::string rs = GPR(copy(rs_value));
2731 std::string u = IMMEDIATE(copy(u_value));
2732
2733 return img_format("ANDI %s, %s, %s", rt, rs, u);
2734 }
2735
2736
2737 /*
2738 *
2739 *
2740 * 3 2 1
2741 * 10987654321098765432109876543210
2742 * 001000 x1110000101
2743 * rt -----
2744 * rs -----
2745 * rd -----
2746 */
2747 static std::string APPEND(uint64 instruction, Dis_info *info)
2748 {
2749 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2750 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2751 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
2752
2753 std::string rt = GPR(copy(rt_value));
2754 std::string rs = GPR(copy(rs_value));
2755 std::string sa = IMMEDIATE(copy(sa_value));
2756
2757 return img_format("APPEND %s, %s, %s", rt, rs, sa);
2758 }
2759
2760
2761 /*
2762 *
2763 *
2764 * 3 2 1
2765 * 10987654321098765432109876543210
2766 * 001000 x1110000101
2767 * rt -----
2768 * rs -----
2769 * rd -----
2770 */
2771 static std::string ASET(uint64 instruction, Dis_info *info)
2772 {
2773 uint64 bit_value = extract_bit_23_22_21(instruction);
2774 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2775 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
2776
2777 std::string bit = IMMEDIATE(copy(bit_value));
2778 std::string s = IMMEDIATE(copy(s_value));
2779 std::string rs = GPR(copy(rs_value));
2780
2781 return img_format("ASET %s, %s(%s)", bit, s, rs);
2782 }
2783
2784
2785 /*
2786 *
2787 *
2788 * 3 2 1
2789 * 10987654321098765432109876543210
2790 * 001000 x1110000101
2791 * rt -----
2792 * rs -----
2793 * rd -----
2794 */
2795 static std::string BALC_16_(uint64 instruction, Dis_info *info)
2796 {
2797 int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2798
2799 std::string s = ADDRESS(encode_s_from_address(s_value), 2, info);
2800
2801 return img_format("BALC %s", s);
2802 }
2803
2804
2805 /*
2806 *
2807 *
2808 * 3 2 1
2809 * 10987654321098765432109876543210
2810 * 001000 x1110000101
2811 * rt -----
2812 * rs -----
2813 * rd -----
2814 */
2815 static std::string BALC_32_(uint64 instruction, Dis_info *info)
2816 {
2817 int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2818
2819 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2820
2821 return img_format("BALC %s", s);
2822 }
2823
2824
2825 /*
2826 *
2827 *
2828 * 3 2 1
2829 * 10987654321098765432109876543210
2830 * 001000 x1110000101
2831 * rt -----
2832 * rs -----
2833 * rd -----
2834 */
2835 static std::string BALRSC(uint64 instruction, Dis_info *info)
2836 {
2837 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2838 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2839
2840 std::string rt = GPR(copy(rt_value));
2841 std::string rs = GPR(copy(rs_value));
2842
2843 return img_format("BALRSC %s, %s", rt, rs);
2844 }
2845
2846
2847 /*
2848 *
2849 *
2850 * 3 2 1
2851 * 10987654321098765432109876543210
2852 * 001000 x1110000101
2853 * rt -----
2854 * rs -----
2855 * rd -----
2856 */
2857 static std::string BBEQZC(uint64 instruction, Dis_info *info)
2858 {
2859 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2860 uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2861 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2862
2863 std::string rt = GPR(copy(rt_value));
2864 std::string bit = IMMEDIATE(copy(bit_value));
2865 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2866
2867 return img_format("BBEQZC %s, %s, %s", rt, bit, s);
2868 }
2869
2870
2871 /*
2872 *
2873 *
2874 * 3 2 1
2875 * 10987654321098765432109876543210
2876 * 001000 x1110000101
2877 * rt -----
2878 * rs -----
2879 * rd -----
2880 */
2881 static std::string BBNEZC(uint64 instruction, Dis_info *info)
2882 {
2883 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2884 uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2885 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2886
2887 std::string rt = GPR(copy(rt_value));
2888 std::string bit = IMMEDIATE(copy(bit_value));
2889 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2890
2891 return img_format("BBNEZC %s, %s, %s", rt, bit, s);
2892 }
2893
2894
2895 /*
2896 *
2897 *
2898 * 3 2 1
2899 * 10987654321098765432109876543210
2900 * 001000 x1110000101
2901 * rt -----
2902 * rs -----
2903 * rd -----
2904 */
2905 static std::string BC_16_(uint64 instruction, Dis_info *info)
2906 {
2907 int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2908
2909 std::string s = ADDRESS(encode_s_from_address(s_value), 2, info);
2910
2911 return img_format("BC %s", s);
2912 }
2913
2914
2915 /*
2916 *
2917 *
2918 * 3 2 1
2919 * 10987654321098765432109876543210
2920 * 001000 x1110000101
2921 * rt -----
2922 * rs -----
2923 * rd -----
2924 */
2925 static std::string BC_32_(uint64 instruction, Dis_info *info)
2926 {
2927 int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2928
2929 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2930
2931 return img_format("BC %s", s);
2932 }
2933
2934
2935 /*
2936 *
2937 *
2938 * 3 2 1
2939 * 10987654321098765432109876543210
2940 * 001000 x1110000101
2941 * rt -----
2942 * rs -----
2943 * rd -----
2944 */
2945 static std::string BC1EQZC(uint64 instruction, Dis_info *info)
2946 {
2947 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2948 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2949
2950 std::string ft = FPR(copy(ft_value));
2951 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2952
2953 return img_format("BC1EQZC %s, %s", ft, s);
2954 }
2955
2956
2957 /*
2958 *
2959 *
2960 * 3 2 1
2961 * 10987654321098765432109876543210
2962 * 001000 x1110000101
2963 * rt -----
2964 * rs -----
2965 * rd -----
2966 */
2967 static std::string BC1NEZC(uint64 instruction, Dis_info *info)
2968 {
2969 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2970 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2971
2972 std::string ft = FPR(copy(ft_value));
2973 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2974
2975 return img_format("BC1NEZC %s, %s", ft, s);
2976 }
2977
2978
2979 /*
2980 *
2981 *
2982 * 3 2 1
2983 * 10987654321098765432109876543210
2984 * 001000 x1110000101
2985 * rt -----
2986 * rs -----
2987 * rd -----
2988 */
2989 static std::string BC2EQZC(uint64 instruction, Dis_info *info)
2990 {
2991 uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
2992 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2993
2994 std::string ct = CPR(copy(ct_value));
2995 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
2996
2997 return img_format("BC2EQZC %s, %s", ct, s);
2998 }
2999
3000
3001 /*
3002 *
3003 *
3004 * 3 2 1
3005 * 10987654321098765432109876543210
3006 * 001000 x1110000101
3007 * rt -----
3008 * rs -----
3009 * rd -----
3010 */
3011 static std::string BC2NEZC(uint64 instruction, Dis_info *info)
3012 {
3013 uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
3014 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3015
3016 std::string ct = CPR(copy(ct_value));
3017 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3018
3019 return img_format("BC2NEZC %s, %s", ct, s);
3020 }
3021
3022
3023 /*
3024 *
3025 *
3026 * 3 2 1
3027 * 10987654321098765432109876543210
3028 * 001000 x1110000101
3029 * rt -----
3030 * rs -----
3031 * rd -----
3032 */
3033 static std::string BEQC_16_(uint64 instruction, Dis_info *info)
3034 {
3035 uint64 rt3_value = extract_rt3_9_8_7(instruction);
3036 uint64 rs3_value = extract_rs3_6_5_4(instruction);
3037 uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3038
3039 std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
3040 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3041 std::string u = ADDRESS(encode_u_from_address(u_value), 2, info);
3042
3043 return img_format("BEQC %s, %s, %s", rs3, rt3, u);
3044 }
3045
3046
3047 /*
3048 *
3049 *
3050 * 3 2 1
3051 * 10987654321098765432109876543210
3052 * 001000 x1110000101
3053 * rt -----
3054 * rs -----
3055 * rd -----
3056 */
3057 static std::string BEQC_32_(uint64 instruction, Dis_info *info)
3058 {
3059 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3060 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3061 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3062
3063 std::string rs = GPR(copy(rs_value));
3064 std::string rt = GPR(copy(rt_value));
3065 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3066
3067 return img_format("BEQC %s, %s, %s", rs, rt, s);
3068 }
3069
3070
3071 /*
3072 *
3073 *
3074 * 3 2 1
3075 * 10987654321098765432109876543210
3076 * 001000 x1110000101
3077 * rt -----
3078 * rs -----
3079 * rd -----
3080 */
3081 static std::string BEQIC(uint64 instruction, Dis_info *info)
3082 {
3083 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3084 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3085 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3086
3087 std::string rt = GPR(copy(rt_value));
3088 std::string u = IMMEDIATE(copy(u_value));
3089 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3090
3091 return img_format("BEQIC %s, %s, %s", rt, u, s);
3092 }
3093
3094
3095 /*
3096 *
3097 *
3098 * 3 2 1
3099 * 10987654321098765432109876543210
3100 * 001000 x1110000101
3101 * rt -----
3102 * rs -----
3103 * rd -----
3104 */
3105 static std::string BEQZC_16_(uint64 instruction, Dis_info *info)
3106 {
3107 uint64 rt3_value = extract_rt3_9_8_7(instruction);
3108 int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3109
3110 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3111 std::string s = ADDRESS(encode_s_from_address(s_value), 2, info);
3112
3113 return img_format("BEQZC %s, %s", rt3, s);
3114 }
3115
3116
3117 /*
3118 *
3119 *
3120 * 3 2 1
3121 * 10987654321098765432109876543210
3122 * 001000 x1110000101
3123 * rt -----
3124 * rs -----
3125 * rd -----
3126 */
3127 static std::string BGEC(uint64 instruction, Dis_info *info)
3128 {
3129 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3130 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3131 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3132
3133 std::string rs = GPR(copy(rs_value));
3134 std::string rt = GPR(copy(rt_value));
3135 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3136
3137 return img_format("BGEC %s, %s, %s", rs, rt, s);
3138 }
3139
3140
3141 /*
3142 *
3143 *
3144 * 3 2 1
3145 * 10987654321098765432109876543210
3146 * 001000 x1110000101
3147 * rt -----
3148 * rs -----
3149 * rd -----
3150 */
3151 static std::string BGEIC(uint64 instruction, Dis_info *info)
3152 {
3153 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3154 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3155 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3156
3157 std::string rt = GPR(copy(rt_value));
3158 std::string u = IMMEDIATE(copy(u_value));
3159 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3160
3161 return img_format("BGEIC %s, %s, %s", rt, u, s);
3162 }
3163
3164
3165 /*
3166 *
3167 *
3168 * 3 2 1
3169 * 10987654321098765432109876543210
3170 * 001000 x1110000101
3171 * rt -----
3172 * rs -----
3173 * rd -----
3174 */
3175 static std::string BGEIUC(uint64 instruction, Dis_info *info)
3176 {
3177 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3178 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3179 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3180
3181 std::string rt = GPR(copy(rt_value));
3182 std::string u = IMMEDIATE(copy(u_value));
3183 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3184
3185 return img_format("BGEIUC %s, %s, %s", rt, u, s);
3186 }
3187
3188
3189 /*
3190 *
3191 *
3192 * 3 2 1
3193 * 10987654321098765432109876543210
3194 * 001000 x1110000101
3195 * rt -----
3196 * rs -----
3197 * rd -----
3198 */
3199 static std::string BGEUC(uint64 instruction, Dis_info *info)
3200 {
3201 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3202 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3203 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3204
3205 std::string rs = GPR(copy(rs_value));
3206 std::string rt = GPR(copy(rt_value));
3207 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3208
3209 return img_format("BGEUC %s, %s, %s", rs, rt, s);
3210 }
3211
3212
3213 /*
3214 *
3215 *
3216 * 3 2 1
3217 * 10987654321098765432109876543210
3218 * 001000 x1110000101
3219 * rt -----
3220 * rs -----
3221 * rd -----
3222 */
3223 static std::string BLTC(uint64 instruction, Dis_info *info)
3224 {
3225 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3226 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3227 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3228
3229 std::string rs = GPR(copy(rs_value));
3230 std::string rt = GPR(copy(rt_value));
3231 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3232
3233 return img_format("BLTC %s, %s, %s", rs, rt, s);
3234 }
3235
3236
3237 /*
3238 *
3239 *
3240 * 3 2 1
3241 * 10987654321098765432109876543210
3242 * 001000 x1110000101
3243 * rt -----
3244 * rs -----
3245 * rd -----
3246 */
3247 static std::string BLTIC(uint64 instruction, Dis_info *info)
3248 {
3249 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3250 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3251 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3252
3253 std::string rt = GPR(copy(rt_value));
3254 std::string u = IMMEDIATE(copy(u_value));
3255 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3256
3257 return img_format("BLTIC %s, %s, %s", rt, u, s);
3258 }
3259
3260
3261 /*
3262 *
3263 *
3264 * 3 2 1
3265 * 10987654321098765432109876543210
3266 * 001000 x1110000101
3267 * rt -----
3268 * rs -----
3269 * rd -----
3270 */
3271 static std::string BLTIUC(uint64 instruction, Dis_info *info)
3272 {
3273 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3274 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3275 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3276
3277 std::string rt = GPR(copy(rt_value));
3278 std::string u = IMMEDIATE(copy(u_value));
3279 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3280
3281 return img_format("BLTIUC %s, %s, %s", rt, u, s);
3282 }
3283
3284
3285 /*
3286 *
3287 *
3288 * 3 2 1
3289 * 10987654321098765432109876543210
3290 * 001000 x1110000101
3291 * rt -----
3292 * rs -----
3293 * rd -----
3294 */
3295 static std::string BLTUC(uint64 instruction, Dis_info *info)
3296 {
3297 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3298 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3299 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3300
3301 std::string rs = GPR(copy(rs_value));
3302 std::string rt = GPR(copy(rt_value));
3303 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3304
3305 return img_format("BLTUC %s, %s, %s", rs, rt, s);
3306 }
3307
3308
3309 /*
3310 *
3311 *
3312 * 3 2 1
3313 * 10987654321098765432109876543210
3314 * 001000 x1110000101
3315 * rt -----
3316 * rs -----
3317 * rd -----
3318 */
3319 static std::string BNEC_16_(uint64 instruction, Dis_info *info)
3320 {
3321 uint64 rt3_value = extract_rt3_9_8_7(instruction);
3322 uint64 rs3_value = extract_rs3_6_5_4(instruction);
3323 uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3324
3325 std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
3326 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3327 std::string u = ADDRESS(encode_u_from_address(u_value), 2, info);
3328
3329 return img_format("BNEC %s, %s, %s", rs3, rt3, u);
3330 }
3331
3332
3333 /*
3334 *
3335 *
3336 * 3 2 1
3337 * 10987654321098765432109876543210
3338 * 001000 x1110000101
3339 * rt -----
3340 * rs -----
3341 * rd -----
3342 */
3343 static std::string BNEC_32_(uint64 instruction, Dis_info *info)
3344 {
3345 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3346 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3347 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3348
3349 std::string rs = GPR(copy(rs_value));
3350 std::string rt = GPR(copy(rt_value));
3351 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3352
3353 return img_format("BNEC %s, %s, %s", rs, rt, s);
3354 }
3355
3356
3357 /*
3358 *
3359 *
3360 * 3 2 1
3361 * 10987654321098765432109876543210
3362 * 001000 x1110000101
3363 * rt -----
3364 * rs -----
3365 * rd -----
3366 */
3367 static std::string BNEIC(uint64 instruction, Dis_info *info)
3368 {
3369 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3370 uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3371 int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3372
3373 std::string rt = GPR(copy(rt_value));
3374 std::string u = IMMEDIATE(copy(u_value));
3375 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3376
3377 return img_format("BNEIC %s, %s, %s", rt, u, s);
3378 }
3379
3380
3381 /*
3382 *
3383 *
3384 * 3 2 1
3385 * 10987654321098765432109876543210
3386 * 001000 x1110000101
3387 * rt -----
3388 * rs -----
3389 * rd -----
3390 */
3391 static std::string BNEZC_16_(uint64 instruction, Dis_info *info)
3392 {
3393 uint64 rt3_value = extract_rt3_9_8_7(instruction);
3394 int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3395
3396 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3397 std::string s = ADDRESS(encode_s_from_address(s_value), 2, info);
3398
3399 return img_format("BNEZC %s, %s", rt3, s);
3400 }
3401
3402
3403 /*
3404 * [DSP] BPOSGE32C offset - Branch on greater than or equal to value 32 in
3405 * DSPControl Pos field
3406 *
3407 * 3 2 1
3408 * 10987654321098765432109876543210
3409 * 100010xxxxx0010001
3410 * s[13:1] -------------
3411 * s[14] -
3412 */
3413 static std::string BPOSGE32C(uint64 instruction, Dis_info *info)
3414 {
3415 int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3416
3417 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
3418
3419 return img_format("BPOSGE32C %s", s);
3420 }
3421
3422
3423 /*
3424 *
3425 *
3426 * 3 2 1
3427 * 10987654321098765432109876543210
3428 * 001000 x1110000101
3429 * rt -----
3430 * rs -----
3431 * rd -----
3432 */
3433 static std::string BREAK_16_(uint64 instruction, Dis_info *info)
3434 {
3435 uint64 code_value = extract_code_2_1_0(instruction);
3436
3437 std::string code = IMMEDIATE(copy(code_value));
3438
3439 return img_format("BREAK %s", code);
3440 }
3441
3442
3443 /*
3444 * BREAK code - Break. Cause a Breakpoint exception
3445 *
3446 * 3 2 1
3447 * 10987654321098765432109876543210
3448 * 001000 x1110000101
3449 * rt -----
3450 * rs -----
3451 * rd -----
3452 */
3453 static std::string BREAK_32_(uint64 instruction, Dis_info *info)
3454 {
3455 uint64 code_value = extract_code_18_to_0(instruction);
3456
3457 std::string code = IMMEDIATE(copy(code_value));
3458
3459 return img_format("BREAK %s", code);
3460 }
3461
3462
3463 /*
3464 *
3465 *
3466 * 3 2 1
3467 * 10987654321098765432109876543210
3468 * 001000 x1110000101
3469 * rt -----
3470 * rs -----
3471 * rd -----
3472 */
3473 static std::string BRSC(uint64 instruction, Dis_info *info)
3474 {
3475 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3476
3477 std::string rs = GPR(copy(rs_value));
3478
3479 return img_format("BRSC %s", rs);
3480 }
3481
3482
3483 /*
3484 *
3485 *
3486 * 3 2 1
3487 * 10987654321098765432109876543210
3488 * 001000 x1110000101
3489 * rt -----
3490 * rs -----
3491 * rd -----
3492 */
3493 static std::string CACHE(uint64 instruction, Dis_info *info)
3494 {
3495 uint64 op_value = extract_op_25_24_23_22_21(instruction);
3496 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3497 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3498
3499 std::string op = IMMEDIATE(copy(op_value));
3500 std::string s = IMMEDIATE(copy(s_value));
3501 std::string rs = GPR(copy(rs_value));
3502
3503 return img_format("CACHE %s, %s(%s)", op, s, rs);
3504 }
3505
3506
3507 /*
3508 *
3509 *
3510 * 3 2 1
3511 * 10987654321098765432109876543210
3512 * 001000 x1110000101
3513 * rt -----
3514 * rs -----
3515 * rd -----
3516 */
3517 static std::string CACHEE(uint64 instruction, Dis_info *info)
3518 {
3519 uint64 op_value = extract_op_25_24_23_22_21(instruction);
3520 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3521 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3522
3523 std::string op = IMMEDIATE(copy(op_value));
3524 std::string s = IMMEDIATE(copy(s_value));
3525 std::string rs = GPR(copy(rs_value));
3526
3527 return img_format("CACHEE %s, %s(%s)", op, s, rs);
3528 }
3529
3530
3531 /*
3532 *
3533 *
3534 * 3 2 1
3535 * 10987654321098765432109876543210
3536 * 001000 x1110000101
3537 * rt -----
3538 * rs -----
3539 * rd -----
3540 */
3541 static std::string CEIL_L_D(uint64 instruction, Dis_info *info)
3542 {
3543 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3544 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3545
3546 std::string ft = FPR(copy(ft_value));
3547 std::string fs = FPR(copy(fs_value));
3548
3549 return img_format("CEIL.L.D %s, %s", ft, fs);
3550 }
3551
3552
3553 /*
3554 *
3555 *
3556 * 3 2 1
3557 * 10987654321098765432109876543210
3558 * 001000 x1110000101
3559 * rt -----
3560 * rs -----
3561 * rd -----
3562 */
3563 static std::string CEIL_L_S(uint64 instruction, Dis_info *info)
3564 {
3565 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3566 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3567
3568 std::string ft = FPR(copy(ft_value));
3569 std::string fs = FPR(copy(fs_value));
3570
3571 return img_format("CEIL.L.S %s, %s", ft, fs);
3572 }
3573
3574
3575 /*
3576 *
3577 *
3578 * 3 2 1
3579 * 10987654321098765432109876543210
3580 * 001000 x1110000101
3581 * rt -----
3582 * rs -----
3583 * rd -----
3584 */
3585 static std::string CEIL_W_D(uint64 instruction, Dis_info *info)
3586 {
3587 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3588 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3589
3590 std::string ft = FPR(copy(ft_value));
3591 std::string fs = FPR(copy(fs_value));
3592
3593 return img_format("CEIL.W.D %s, %s", ft, fs);
3594 }
3595
3596
3597 /*
3598 *
3599 *
3600 * 3 2 1
3601 * 10987654321098765432109876543210
3602 * 001000 x1110000101
3603 * rt -----
3604 * rs -----
3605 * rd -----
3606 */
3607 static std::string CEIL_W_S(uint64 instruction, Dis_info *info)
3608 {
3609 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3610 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3611
3612 std::string ft = FPR(copy(ft_value));
3613 std::string fs = FPR(copy(fs_value));
3614
3615 return img_format("CEIL.W.S %s, %s", ft, fs);
3616 }
3617
3618
3619 /*
3620 *
3621 *
3622 * 3 2 1
3623 * 10987654321098765432109876543210
3624 * 001000 x1110000101
3625 * rt -----
3626 * rs -----
3627 * rd -----
3628 */
3629 static std::string CFC1(uint64 instruction, Dis_info *info)
3630 {
3631 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3632 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3633
3634 std::string rt = GPR(copy(rt_value));
3635 std::string cs = CPR(copy(cs_value));
3636
3637 return img_format("CFC1 %s, %s", rt, cs);
3638 }
3639
3640
3641 /*
3642 *
3643 *
3644 * 3 2 1
3645 * 10987654321098765432109876543210
3646 * 001000 x1110000101
3647 * rt -----
3648 * rs -----
3649 * rd -----
3650 */
3651 static std::string CFC2(uint64 instruction, Dis_info *info)
3652 {
3653 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3654 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3655
3656 std::string rt = GPR(copy(rt_value));
3657 std::string cs = CPR(copy(cs_value));
3658
3659 return img_format("CFC2 %s, %s", rt, cs);
3660 }
3661
3662
3663 /*
3664 *
3665 *
3666 * 3 2 1
3667 * 10987654321098765432109876543210
3668 * 001000 x1110000101
3669 * rt -----
3670 * rs -----
3671 * rd -----
3672 */
3673 static std::string CLASS_D(uint64 instruction, Dis_info *info)
3674 {
3675 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3676 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3677
3678 std::string ft = FPR(copy(ft_value));
3679 std::string fs = FPR(copy(fs_value));
3680
3681 return img_format("CLASS.D %s, %s", ft, fs);
3682 }
3683
3684
3685 /*
3686 *
3687 *
3688 * 3 2 1
3689 * 10987654321098765432109876543210
3690 * 001000 x1110000101
3691 * rt -----
3692 * rs -----
3693 * rd -----
3694 */
3695 static std::string CLASS_S(uint64 instruction, Dis_info *info)
3696 {
3697 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3698 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3699
3700 std::string ft = FPR(copy(ft_value));
3701 std::string fs = FPR(copy(fs_value));
3702
3703 return img_format("CLASS.S %s, %s", ft, fs);
3704 }
3705
3706
3707 /*
3708 *
3709 *
3710 * 3 2 1
3711 * 10987654321098765432109876543210
3712 * 001000 x1110000101
3713 * rt -----
3714 * rs -----
3715 * rd -----
3716 */
3717 static std::string CLO(uint64 instruction, Dis_info *info)
3718 {
3719 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3720 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3721
3722 std::string rt = GPR(copy(rt_value));
3723 std::string rs = GPR(copy(rs_value));
3724
3725 return img_format("CLO %s, %s", rt, rs);
3726 }
3727
3728
3729 /*
3730 *
3731 *
3732 * 3 2 1
3733 * 10987654321098765432109876543210
3734 * 001000 x1110000101
3735 * rt -----
3736 * rs -----
3737 * rd -----
3738 */
3739 static std::string CLZ(uint64 instruction, Dis_info *info)
3740 {
3741 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3742 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3743
3744 std::string rt = GPR(copy(rt_value));
3745 std::string rs = GPR(copy(rs_value));
3746
3747 return img_format("CLZ %s, %s", rt, rs);
3748 }
3749
3750
3751 /*
3752 *
3753 *
3754 * 3 2 1
3755 * 10987654321098765432109876543210
3756 * 001000 x1110000101
3757 * rt -----
3758 * rs -----
3759 * rd -----
3760 */
3761 static std::string CMP_AF_D(uint64 instruction, Dis_info *info)
3762 {
3763 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3764 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3765 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3766
3767 std::string fd = FPR(copy(fd_value));
3768 std::string fs = FPR(copy(fs_value));
3769 std::string ft = FPR(copy(ft_value));
3770
3771 return img_format("CMP.AF.D %s, %s, %s", fd, fs, ft);
3772 }
3773
3774
3775 /*
3776 *
3777 *
3778 * 3 2 1
3779 * 10987654321098765432109876543210
3780 * 001000 x1110000101
3781 * rt -----
3782 * rs -----
3783 * rd -----
3784 */
3785 static std::string CMP_AF_S(uint64 instruction, Dis_info *info)
3786 {
3787 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3788 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3789 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3790
3791 std::string fd = FPR(copy(fd_value));
3792 std::string fs = FPR(copy(fs_value));
3793 std::string ft = FPR(copy(ft_value));
3794
3795 return img_format("CMP.AF.S %s, %s, %s", fd, fs, ft);
3796 }
3797
3798
3799 /*
3800 *
3801 *
3802 * 3 2 1
3803 * 10987654321098765432109876543210
3804 * 001000 x1110000101
3805 * rt -----
3806 * rs -----
3807 * rd -----
3808 */
3809 static std::string CMP_EQ_D(uint64 instruction, Dis_info *info)
3810 {
3811 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3812 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3813 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3814
3815 std::string fd = FPR(copy(fd_value));
3816 std::string fs = FPR(copy(fs_value));
3817 std::string ft = FPR(copy(ft_value));
3818
3819 return img_format("CMP.EQ.D %s, %s, %s", fd, fs, ft);
3820 }
3821
3822
3823 /*
3824 * [DSP] CMP.EQ.PH rs, rt - Compare vectors of signed integer halfword values
3825 *
3826 * 3 2 1
3827 * 10987654321098765432109876543210
3828 * 001000 xxxxxx0000000101
3829 * rt -----
3830 * rs -----
3831 */
3832 static std::string CMP_EQ_PH(uint64 instruction, Dis_info *info)
3833 {
3834 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3835 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3836
3837 std::string rs = GPR(copy(rs_value));
3838 std::string rt = GPR(copy(rt_value));
3839
3840 return img_format("CMP.EQ.PH %s, %s", rs, rt);
3841 }
3842
3843
3844 /*
3845 *
3846 *
3847 * 3 2 1
3848 * 10987654321098765432109876543210
3849 * 001000 x1110000101
3850 * rt -----
3851 * rs -----
3852 * rd -----
3853 */
3854 static std::string CMP_EQ_S(uint64 instruction, Dis_info *info)
3855 {
3856 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3857 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3858 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3859
3860 std::string fd = FPR(copy(fd_value));
3861 std::string fs = FPR(copy(fs_value));
3862 std::string ft = FPR(copy(ft_value));
3863
3864 return img_format("CMP.EQ.S %s, %s, %s", fd, fs, ft);
3865 }
3866
3867
3868 /*
3869 *
3870 *
3871 * 3 2 1
3872 * 10987654321098765432109876543210
3873 * 001000 x1110000101
3874 * rt -----
3875 * rs -----
3876 * rd -----
3877 */
3878 static std::string CMP_LE_D(uint64 instruction, Dis_info *info)
3879 {
3880 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3881 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3882 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3883
3884 std::string fd = FPR(copy(fd_value));
3885 std::string fs = FPR(copy(fs_value));
3886 std::string ft = FPR(copy(ft_value));
3887
3888 return img_format("CMP.LE.D %s, %s, %s", fd, fs, ft);
3889 }
3890
3891
3892 /*
3893 * [DSP] CMP.LE.PH rs, rt - Compare vectors of signed integer halfword values
3894 *
3895 * 3 2 1
3896 * 10987654321098765432109876543210
3897 * 001000 xxxxxx0010000101
3898 * rt -----
3899 * rs -----
3900 */
3901 static std::string CMP_LE_PH(uint64 instruction, Dis_info *info)
3902 {
3903 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3904 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3905
3906 std::string rs = GPR(copy(rs_value));
3907 std::string rt = GPR(copy(rt_value));
3908
3909 return img_format("CMP.LE.PH %s, %s", rs, rt);
3910 }
3911
3912
3913 /*
3914 *
3915 *
3916 * 3 2 1
3917 * 10987654321098765432109876543210
3918 * 001000 x1110000101
3919 * rt -----
3920 * rs -----
3921 * rd -----
3922 */
3923 static std::string CMP_LE_S(uint64 instruction, Dis_info *info)
3924 {
3925 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3926 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3927 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3928
3929 std::string fd = FPR(copy(fd_value));
3930 std::string fs = FPR(copy(fs_value));
3931 std::string ft = FPR(copy(ft_value));
3932
3933 return img_format("CMP.LE.S %s, %s, %s", fd, fs, ft);
3934 }
3935
3936
3937 /*
3938 *
3939 *
3940 * 3 2 1
3941 * 10987654321098765432109876543210
3942 * 001000 x1110000101
3943 * rt -----
3944 * rs -----
3945 * rd -----
3946 */
3947 static std::string CMP_LT_D(uint64 instruction, Dis_info *info)
3948 {
3949 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3950 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3951 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3952
3953 std::string fd = FPR(copy(fd_value));
3954 std::string fs = FPR(copy(fs_value));
3955 std::string ft = FPR(copy(ft_value));
3956
3957 return img_format("CMP.LT.D %s, %s, %s", fd, fs, ft);
3958 }
3959
3960
3961 /*
3962 * [DSP] CMP.LT.PH rs, rt - Compare vectors of signed integer halfword values
3963 *
3964 * 3 2 1
3965 * 10987654321098765432109876543210
3966 * 001000 xxxxxx0001000101
3967 * rt -----
3968 * rs -----
3969 */
3970 static std::string CMP_LT_PH(uint64 instruction, Dis_info *info)
3971 {
3972 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3973 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3974
3975 std::string rs = GPR(copy(rs_value));
3976 std::string rt = GPR(copy(rt_value));
3977
3978 return img_format("CMP.LT.PH %s, %s", rs, rt);
3979 }
3980
3981
3982 /*
3983 *
3984 *
3985 * 3 2 1
3986 * 10987654321098765432109876543210
3987 * 001000 x1110000101
3988 * rt -----
3989 * rs -----
3990 * rd -----
3991 */
3992 static std::string CMP_LT_S(uint64 instruction, Dis_info *info)
3993 {
3994 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3995 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3996 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3997
3998 std::string fd = FPR(copy(fd_value));
3999 std::string fs = FPR(copy(fs_value));
4000 std::string ft = FPR(copy(ft_value));
4001
4002 return img_format("CMP.LT.S %s, %s, %s", fd, fs, ft);
4003 }
4004
4005
4006 /*
4007 *
4008 *
4009 * 3 2 1
4010 * 10987654321098765432109876543210
4011 * 001000 x1110000101
4012 * rt -----
4013 * rs -----
4014 * rd -----
4015 */
4016 static std::string CMP_NE_D(uint64 instruction, Dis_info *info)
4017 {
4018 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4019 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4020 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4021
4022 std::string fd = FPR(copy(fd_value));
4023 std::string fs = FPR(copy(fs_value));
4024 std::string ft = FPR(copy(ft_value));
4025
4026 return img_format("CMP.NE.D %s, %s, %s", fd, fs, ft);
4027 }
4028
4029
4030 /*
4031 *
4032 *
4033 * 3 2 1
4034 * 10987654321098765432109876543210
4035 * 001000 x1110000101
4036 * rt -----
4037 * rs -----
4038 * rd -----
4039 */
4040 static std::string CMP_NE_S(uint64 instruction, Dis_info *info)
4041 {
4042 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4043 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4044 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4045
4046 std::string fd = FPR(copy(fd_value));
4047 std::string fs = FPR(copy(fs_value));
4048 std::string ft = FPR(copy(ft_value));
4049
4050 return img_format("CMP.NE.S %s, %s, %s", fd, fs, ft);
4051 }
4052
4053
4054 /*
4055 *
4056 *
4057 * 3 2 1
4058 * 10987654321098765432109876543210
4059 * 001000 x1110000101
4060 * rt -----
4061 * rs -----
4062 * rd -----
4063 */
4064 static std::string CMP_OR_D(uint64 instruction, Dis_info *info)
4065 {
4066 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4067 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4068 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4069
4070 std::string fd = FPR(copy(fd_value));
4071 std::string fs = FPR(copy(fs_value));
4072 std::string ft = FPR(copy(ft_value));
4073
4074 return img_format("CMP.OR.D %s, %s, %s", fd, fs, ft);
4075 }
4076
4077
4078 /*
4079 *
4080 *
4081 * 3 2 1
4082 * 10987654321098765432109876543210
4083 * 001000 x1110000101
4084 * rt -----
4085 * rs -----
4086 * rd -----
4087 */
4088 static std::string CMP_OR_S(uint64 instruction, Dis_info *info)
4089 {
4090 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4091 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4092 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4093
4094 std::string fd = FPR(copy(fd_value));
4095 std::string fs = FPR(copy(fs_value));
4096 std::string ft = FPR(copy(ft_value));
4097
4098 return img_format("CMP.OR.S %s, %s, %s", fd, fs, ft);
4099 }
4100
4101
4102 /*
4103 *
4104 *
4105 * 3 2 1
4106 * 10987654321098765432109876543210
4107 * 001000 x1110000101
4108 * rt -----
4109 * rs -----
4110 * rd -----
4111 */
4112 static std::string CMP_SAF_D(uint64 instruction, Dis_info *info)
4113 {
4114 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4115 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4116 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4117
4118 std::string fd = FPR(copy(fd_value));
4119 std::string fs = FPR(copy(fs_value));
4120 std::string ft = FPR(copy(ft_value));
4121
4122 return img_format("CMP.SAF.D %s, %s, %s", fd, fs, ft);
4123 }
4124
4125
4126 /*
4127 *
4128 *
4129 * 3 2 1
4130 * 10987654321098765432109876543210
4131 * 001000 x1110000101
4132 * rt -----
4133 * rs -----
4134 * rd -----
4135 */
4136 static std::string CMP_SAF_S(uint64 instruction, Dis_info *info)
4137 {
4138 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4139 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4140 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4141
4142 std::string fd = FPR(copy(fd_value));
4143 std::string fs = FPR(copy(fs_value));
4144 std::string ft = FPR(copy(ft_value));
4145
4146 return img_format("CMP.SAF.S %s, %s, %s", fd, fs, ft);
4147 }
4148
4149
4150 /*
4151 *
4152 *
4153 * 3 2 1
4154 * 10987654321098765432109876543210
4155 * 001000 x1110000101
4156 * rt -----
4157 * rs -----
4158 * rd -----
4159 */
4160 static std::string CMP_SEQ_D(uint64 instruction, Dis_info *info)
4161 {
4162 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4163 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4164 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4165
4166 std::string fd = FPR(copy(fd_value));
4167 std::string fs = FPR(copy(fs_value));
4168 std::string ft = FPR(copy(ft_value));
4169
4170 return img_format("CMP.SEQ.D %s, %s, %s", fd, fs, ft);
4171 }
4172
4173
4174 /*
4175 *
4176 *
4177 * 3 2 1
4178 * 10987654321098765432109876543210
4179 * 001000 x1110000101
4180 * rt -----
4181 * rs -----
4182 * rd -----
4183 */
4184 static std::string CMP_SEQ_S(uint64 instruction, Dis_info *info)
4185 {
4186 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4187 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4188 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4189
4190 std::string fd = FPR(copy(fd_value));
4191 std::string fs = FPR(copy(fs_value));
4192 std::string ft = FPR(copy(ft_value));
4193
4194 return img_format("CMP.SEQ.S %s, %s, %s", fd, fs, ft);
4195 }
4196
4197
4198 /*
4199 *
4200 *
4201 * 3 2 1
4202 * 10987654321098765432109876543210
4203 * 001000 x1110000101
4204 * rt -----
4205 * rs -----
4206 * rd -----
4207 */
4208 static std::string CMP_SLE_D(uint64 instruction, Dis_info *info)
4209 {
4210 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4211 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4212 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4213
4214 std::string fd = FPR(copy(fd_value));
4215 std::string fs = FPR(copy(fs_value));
4216 std::string ft = FPR(copy(ft_value));
4217
4218 return img_format("CMP.SLE.D %s, %s, %s", fd, fs, ft);
4219 }
4220
4221
4222 /*
4223 *
4224 *
4225 * 3 2 1
4226 * 10987654321098765432109876543210
4227 * 001000 x1110000101
4228 * rt -----
4229 * rs -----
4230 * rd -----
4231 */
4232 static std::string CMP_SLE_S(uint64 instruction, Dis_info *info)
4233 {
4234 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4235 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4236 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4237
4238 std::string fd = FPR(copy(fd_value));
4239 std::string fs = FPR(copy(fs_value));
4240 std::string ft = FPR(copy(ft_value));
4241
4242 return img_format("CMP.SLE.S %s, %s, %s", fd, fs, ft);
4243 }
4244
4245
4246 /*
4247 *
4248 *
4249 * 3 2 1
4250 * 10987654321098765432109876543210
4251 * 001000 x1110000101
4252 * rt -----
4253 * rs -----
4254 * rd -----
4255 */
4256 static std::string CMP_SLT_D(uint64 instruction, Dis_info *info)
4257 {
4258 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4259 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4260 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4261
4262 std::string fd = FPR(copy(fd_value));
4263 std::string fs = FPR(copy(fs_value));
4264 std::string ft = FPR(copy(ft_value));
4265
4266 return img_format("CMP.SLT.D %s, %s, %s", fd, fs, ft);
4267 }
4268
4269
4270 /*
4271 *
4272 *
4273 * 3 2 1
4274 * 10987654321098765432109876543210
4275 * 001000 x1110000101
4276 * rt -----
4277 * rs -----
4278 * rd -----
4279 */
4280 static std::string CMP_SLT_S(uint64 instruction, Dis_info *info)
4281 {
4282 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4283 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4284 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4285
4286 std::string fd = FPR(copy(fd_value));
4287 std::string fs = FPR(copy(fs_value));
4288 std::string ft = FPR(copy(ft_value));
4289
4290 return img_format("CMP.SLT.S %s, %s, %s", fd, fs, ft);
4291 }
4292
4293
4294 /*
4295 *
4296 *
4297 * 3 2 1
4298 * 10987654321098765432109876543210
4299 * 001000 x1110000101
4300 * rt -----
4301 * rs -----
4302 * rd -----
4303 */
4304 static std::string CMP_SNE_D(uint64 instruction, Dis_info *info)
4305 {
4306 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4307 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4308 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4309
4310 std::string fd = FPR(copy(fd_value));
4311 std::string fs = FPR(copy(fs_value));
4312 std::string ft = FPR(copy(ft_value));
4313
4314 return img_format("CMP.SNE.D %s, %s, %s", fd, fs, ft);
4315 }
4316
4317
4318 /*
4319 *
4320 *
4321 * 3 2 1
4322 * 10987654321098765432109876543210
4323 * 001000 x1110000101
4324 * rt -----
4325 * rs -----
4326 * rd -----
4327 */
4328 static std::string CMP_SNE_S(uint64 instruction, Dis_info *info)
4329 {
4330 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4331 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4332 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4333
4334 std::string fd = FPR(copy(fd_value));
4335 std::string fs = FPR(copy(fs_value));
4336 std::string ft = FPR(copy(ft_value));
4337
4338 return img_format("CMP.SNE.S %s, %s, %s", fd, fs, ft);
4339 }
4340
4341
4342 /*
4343 *
4344 *
4345 * 3 2 1
4346 * 10987654321098765432109876543210
4347 * 001000 x1110000101
4348 * rt -----
4349 * rs -----
4350 * rd -----
4351 */
4352 static std::string CMP_SOR_D(uint64 instruction, Dis_info *info)
4353 {
4354 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4355 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4356 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4357
4358 std::string fd = FPR(copy(fd_value));
4359 std::string fs = FPR(copy(fs_value));
4360 std::string ft = FPR(copy(ft_value));
4361
4362 return img_format("CMP.SOR.D %s, %s, %s", fd, fs, ft);
4363 }
4364
4365
4366 /*
4367 *
4368 *
4369 * 3 2 1
4370 * 10987654321098765432109876543210
4371 * 001000 x1110000101
4372 * rt -----
4373 * rs -----
4374 * rd -----
4375 */
4376 static std::string CMP_SOR_S(uint64 instruction, Dis_info *info)
4377 {
4378 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4379 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4380 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4381
4382 std::string fd = FPR(copy(fd_value));
4383 std::string fs = FPR(copy(fs_value));
4384 std::string ft = FPR(copy(ft_value));
4385
4386 return img_format("CMP.SOR.S %s, %s, %s", fd, fs, ft);
4387 }
4388
4389
4390 /*
4391 *
4392 *
4393 * 3 2 1
4394 * 10987654321098765432109876543210
4395 * 001000 x1110000101
4396 * rt -----
4397 * rs -----
4398 * rd -----
4399 */
4400 static std::string CMP_SUEQ_D(uint64 instruction, Dis_info *info)
4401 {
4402 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4403 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4404 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4405
4406 std::string fd = FPR(copy(fd_value));
4407 std::string fs = FPR(copy(fs_value));
4408 std::string ft = FPR(copy(ft_value));
4409
4410 return img_format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft);
4411 }
4412
4413
4414 /*
4415 *
4416 *
4417 * 3 2 1
4418 * 10987654321098765432109876543210
4419 * 001000 x1110000101
4420 * rt -----
4421 * rs -----
4422 * rd -----
4423 */
4424 static std::string CMP_SUEQ_S(uint64 instruction, Dis_info *info)
4425 {
4426 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4427 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4428 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4429
4430 std::string fd = FPR(copy(fd_value));
4431 std::string fs = FPR(copy(fs_value));
4432 std::string ft = FPR(copy(ft_value));
4433
4434 return img_format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft);
4435 }
4436
4437
4438 /*
4439 *
4440 *
4441 * 3 2 1
4442 * 10987654321098765432109876543210
4443 * 001000 x1110000101
4444 * rt -----
4445 * rs -----
4446 * rd -----
4447 */
4448 static std::string CMP_SULE_D(uint64 instruction, Dis_info *info)
4449 {
4450 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4451 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4452 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4453
4454 std::string fd = FPR(copy(fd_value));
4455 std::string fs = FPR(copy(fs_value));
4456 std::string ft = FPR(copy(ft_value));
4457
4458 return img_format("CMP.SULE.D %s, %s, %s", fd, fs, ft);
4459 }
4460
4461
4462 /*
4463 *
4464 *
4465 * 3 2 1
4466 * 10987654321098765432109876543210
4467 * 001000 x1110000101
4468 * rt -----
4469 * rs -----
4470 * rd -----
4471 */
4472 static std::string CMP_SULE_S(uint64 instruction, Dis_info *info)
4473 {
4474 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4475 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4476 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4477
4478 std::string fd = FPR(copy(fd_value));
4479 std::string fs = FPR(copy(fs_value));
4480 std::string ft = FPR(copy(ft_value));
4481
4482 return img_format("CMP.SULE.S %s, %s, %s", fd, fs, ft);
4483 }
4484
4485
4486 /*
4487 *
4488 *
4489 * 3 2 1
4490 * 10987654321098765432109876543210
4491 * 001000 x1110000101
4492 * rt -----
4493 * rs -----
4494 * rd -----
4495 */
4496 static std::string CMP_SULT_D(uint64 instruction, Dis_info *info)
4497 {
4498 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4499 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4500 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4501
4502 std::string fd = FPR(copy(fd_value));
4503 std::string fs = FPR(copy(fs_value));
4504 std::string ft = FPR(copy(ft_value));
4505
4506 return img_format("CMP.SULT.D %s, %s, %s", fd, fs, ft);
4507 }
4508
4509
4510 /*
4511 *
4512 *
4513 * 3 2 1
4514 * 10987654321098765432109876543210
4515 * 001000 x1110000101
4516 * rt -----
4517 * rs -----
4518 * rd -----
4519 */
4520 static std::string CMP_SULT_S(uint64 instruction, Dis_info *info)
4521 {
4522 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4523 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4524 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4525
4526 std::string fd = FPR(copy(fd_value));
4527 std::string fs = FPR(copy(fs_value));
4528 std::string ft = FPR(copy(ft_value));
4529
4530 return img_format("CMP.SULT.S %s, %s, %s", fd, fs, ft);
4531 }
4532
4533
4534 /*
4535 *
4536 *
4537 * 3 2 1
4538 * 10987654321098765432109876543210
4539 * 001000 x1110000101
4540 * rt -----
4541 * rs -----
4542 * rd -----
4543 */
4544 static std::string CMP_SUN_D(uint64 instruction, Dis_info *info)
4545 {
4546 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4547 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4548 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4549
4550 std::string fd = FPR(copy(fd_value));
4551 std::string fs = FPR(copy(fs_value));
4552 std::string ft = FPR(copy(ft_value));
4553
4554 return img_format("CMP.SUN.D %s, %s, %s", fd, fs, ft);
4555 }
4556
4557
4558 /*
4559 *
4560 *
4561 * 3 2 1
4562 * 10987654321098765432109876543210
4563 * 001000 x1110000101
4564 * rt -----
4565 * rs -----
4566 * rd -----
4567 */
4568 static std::string CMP_SUNE_D(uint64 instruction, Dis_info *info)
4569 {
4570 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4571 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4572 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4573
4574 std::string fd = FPR(copy(fd_value));
4575 std::string fs = FPR(copy(fs_value));
4576 std::string ft = FPR(copy(ft_value));
4577
4578 return img_format("CMP.SUNE.D %s, %s, %s", fd, fs, ft);
4579 }
4580
4581
4582 /*
4583 *
4584 *
4585 * 3 2 1
4586 * 10987654321098765432109876543210
4587 * 001000 x1110000101
4588 * rt -----
4589 * rs -----
4590 * rd -----
4591 */
4592 static std::string CMP_SUNE_S(uint64 instruction, Dis_info *info)
4593 {
4594 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4595 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4596 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4597
4598 std::string fd = FPR(copy(fd_value));
4599 std::string fs = FPR(copy(fs_value));
4600 std::string ft = FPR(copy(ft_value));
4601
4602 return img_format("CMP.SUNE.S %s, %s, %s", fd, fs, ft);
4603 }
4604
4605
4606 /*
4607 *
4608 *
4609 * 3 2 1
4610 * 10987654321098765432109876543210
4611 * 001000 x1110000101
4612 * rt -----
4613 * rs -----
4614 * rd -----
4615 */
4616 static std::string CMP_SUN_S(uint64 instruction, Dis_info *info)
4617 {
4618 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4619 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4620 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4621
4622 std::string fd = FPR(copy(fd_value));
4623 std::string fs = FPR(copy(fs_value));
4624 std::string ft = FPR(copy(ft_value));
4625
4626 return img_format("CMP.SUN.S %s, %s, %s", fd, fs, ft);
4627 }
4628
4629
4630 /*
4631 *
4632 *
4633 * 3 2 1
4634 * 10987654321098765432109876543210
4635 * 001000 x1110000101
4636 * rt -----
4637 * rs -----
4638 * rd -----
4639 */
4640 static std::string CMP_UEQ_D(uint64 instruction, Dis_info *info)
4641 {
4642 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4643 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4644 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4645
4646 std::string fd = FPR(copy(fd_value));
4647 std::string fs = FPR(copy(fs_value));
4648 std::string ft = FPR(copy(ft_value));
4649
4650 return img_format("CMP.UEQ.D %s, %s, %s", fd, fs, ft);
4651 }
4652
4653
4654 /*
4655 *
4656 *
4657 * 3 2 1
4658 * 10987654321098765432109876543210
4659 * 001000 x1110000101
4660 * rt -----
4661 * rs -----
4662 * rd -----
4663 */
4664 static std::string CMP_UEQ_S(uint64 instruction, Dis_info *info)
4665 {
4666 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4667 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4668 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4669
4670 std::string fd = FPR(copy(fd_value));
4671 std::string fs = FPR(copy(fs_value));
4672 std::string ft = FPR(copy(ft_value));
4673
4674 return img_format("CMP.UEQ.S %s, %s, %s", fd, fs, ft);
4675 }
4676
4677
4678 /*
4679 *
4680 *
4681 * 3 2 1
4682 * 10987654321098765432109876543210
4683 * 001000 x1110000101
4684 * rt -----
4685 * rs -----
4686 * rd -----
4687 */
4688 static std::string CMP_ULE_D(uint64 instruction, Dis_info *info)
4689 {
4690 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4691 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4692 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4693
4694 std::string fd = FPR(copy(fd_value));
4695 std::string fs = FPR(copy(fs_value));
4696 std::string ft = FPR(copy(ft_value));
4697
4698 return img_format("CMP.ULE.D %s, %s, %s", fd, fs, ft);
4699 }
4700
4701
4702 /*
4703 *
4704 *
4705 * 3 2 1
4706 * 10987654321098765432109876543210
4707 * 001000 x1110000101
4708 * rt -----
4709 * rs -----
4710 * rd -----
4711 */
4712 static std::string CMP_ULE_S(uint64 instruction, Dis_info *info)
4713 {
4714 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4715 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4716 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4717
4718 std::string fd = FPR(copy(fd_value));
4719 std::string fs = FPR(copy(fs_value));
4720 std::string ft = FPR(copy(ft_value));
4721
4722 return img_format("CMP.ULE.S %s, %s, %s", fd, fs, ft);
4723 }
4724
4725
4726 /*
4727 *
4728 *
4729 * 3 2 1
4730 * 10987654321098765432109876543210
4731 * 001000 x1110000101
4732 * rt -----
4733 * rs -----
4734 * rd -----
4735 */
4736 static std::string CMP_ULT_D(uint64 instruction, Dis_info *info)
4737 {
4738 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4739 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4740 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4741
4742 std::string fd = FPR(copy(fd_value));
4743 std::string fs = FPR(copy(fs_value));
4744 std::string ft = FPR(copy(ft_value));
4745
4746 return img_format("CMP.ULT.D %s, %s, %s", fd, fs, ft);
4747 }
4748
4749
4750 /*
4751 *
4752 *
4753 * 3 2 1
4754 * 10987654321098765432109876543210
4755 * 001000 x1110000101
4756 * rt -----
4757 * rs -----
4758 * rd -----
4759 */
4760 static std::string CMP_ULT_S(uint64 instruction, Dis_info *info)
4761 {
4762 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4763 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4764 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4765
4766 std::string fd = FPR(copy(fd_value));
4767 std::string fs = FPR(copy(fs_value));
4768 std::string ft = FPR(copy(ft_value));
4769
4770 return img_format("CMP.ULT.S %s, %s, %s", fd, fs, ft);
4771 }
4772
4773
4774 /*
4775 *
4776 *
4777 * 3 2 1
4778 * 10987654321098765432109876543210
4779 * 001000 x1110000101
4780 * rt -----
4781 * rs -----
4782 * rd -----
4783 */
4784 static std::string CMP_UN_D(uint64 instruction, Dis_info *info)
4785 {
4786 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4787 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4788 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4789
4790 std::string fd = FPR(copy(fd_value));
4791 std::string fs = FPR(copy(fs_value));
4792 std::string ft = FPR(copy(ft_value));
4793
4794 return img_format("CMP.UN.D %s, %s, %s", fd, fs, ft);
4795 }
4796
4797
4798 /*
4799 *
4800 *
4801 * 3 2 1
4802 * 10987654321098765432109876543210
4803 * 001000 x1110000101
4804 * rt -----
4805 * rs -----
4806 * rd -----
4807 */
4808 static std::string CMP_UNE_D(uint64 instruction, Dis_info *info)
4809 {
4810 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4811 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4812 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4813
4814 std::string fd = FPR(copy(fd_value));
4815 std::string fs = FPR(copy(fs_value));
4816 std::string ft = FPR(copy(ft_value));
4817
4818 return img_format("CMP.UNE.D %s, %s, %s", fd, fs, ft);
4819 }
4820
4821
4822 /*
4823 *
4824 *
4825 * 3 2 1
4826 * 10987654321098765432109876543210
4827 * 001000 x1110000101
4828 * rt -----
4829 * rs -----
4830 * rd -----
4831 */
4832 static std::string CMP_UNE_S(uint64 instruction, Dis_info *info)
4833 {
4834 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4835 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4836 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4837
4838 std::string fd = FPR(copy(fd_value));
4839 std::string fs = FPR(copy(fs_value));
4840 std::string ft = FPR(copy(ft_value));
4841
4842 return img_format("CMP.UNE.S %s, %s, %s", fd, fs, ft);
4843 }
4844
4845
4846 /*
4847 *
4848 *
4849 * 3 2 1
4850 * 10987654321098765432109876543210
4851 * 001000 x1110000101
4852 * rt -----
4853 * rs -----
4854 * rd -----
4855 */
4856 static std::string CMP_UN_S(uint64 instruction, Dis_info *info)
4857 {
4858 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4859 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4860 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4861
4862 std::string fd = FPR(copy(fd_value));
4863 std::string fs = FPR(copy(fs_value));
4864 std::string ft = FPR(copy(ft_value));
4865
4866 return img_format("CMP.UN.S %s, %s, %s", fd, fs, ft);
4867 }
4868
4869
4870 /*
4871 * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of
4872 * four bytes and write result to GPR and DSPControl
4873 *
4874 * 3 2 1
4875 * 10987654321098765432109876543210
4876 * 001000 x0110000101
4877 * rt -----
4878 * rs -----
4879 * rd -----
4880 */
4881 static std::string CMPGDU_EQ_QB(uint64 instruction, Dis_info *info)
4882 {
4883 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4884 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4885 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4886
4887 std::string rd = GPR(copy(rd_value));
4888 std::string rs = GPR(copy(rs_value));
4889 std::string rt = GPR(copy(rt_value));
4890
4891 return img_format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt);
4892 }
4893
4894
4895 /*
4896 * [DSP] CMPGDU.LE.QB rd, rs, rt - Compare unsigned vector of
4897 * four bytes and write result to GPR and DSPControl
4898 *
4899 * 3 2 1
4900 * 10987654321098765432109876543210
4901 * 001000 x1000000101
4902 * rt -----
4903 * rs -----
4904 * rd -----
4905 */
4906 static std::string CMPGDU_LE_QB(uint64 instruction, Dis_info *info)
4907 {
4908 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4909 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4910 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4911
4912 std::string rd = GPR(copy(rd_value));
4913 std::string rs = GPR(copy(rs_value));
4914 std::string rt = GPR(copy(rt_value));
4915
4916 return img_format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt);
4917 }
4918
4919
4920 /*
4921 * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of
4922 * four bytes and write result to GPR and DSPControl
4923 *
4924 * 3 2 1
4925 * 10987654321098765432109876543210
4926 * 001000 x0111000101
4927 * rt -----
4928 * rs -----
4929 * rd -----
4930 */
4931 static std::string CMPGDU_LT_QB(uint64 instruction, Dis_info *info)
4932 {
4933 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4934 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4935 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4936
4937 std::string rd = GPR(copy(rd_value));
4938 std::string rs = GPR(copy(rs_value));
4939 std::string rt = GPR(copy(rt_value));
4940
4941 return img_format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt);
4942 }
4943
4944
4945 /*
4946 * [DSP] CMPGU.EQ.QB rd, rs, rt - Compare vectors of unsigned
4947 * byte values and write result to a GPR
4948 *
4949 * 3 2 1
4950 * 10987654321098765432109876543210
4951 * 001000 x0011000101
4952 * rt -----
4953 * rs -----
4954 * rd -----
4955 */
4956 static std::string CMPGU_EQ_QB(uint64 instruction, Dis_info *info)
4957 {
4958 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4959 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4960 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4961
4962 std::string rd = GPR(copy(rd_value));
4963 std::string rs = GPR(copy(rs_value));
4964 std::string rt = GPR(copy(rt_value));
4965
4966 return img_format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt);
4967 }
4968
4969
4970 /*
4971 * [DSP] CMPGU.LE.QB rd, rs, rt - Compare vectors of unsigned
4972 * byte values and write result to a GPR
4973 *
4974 * 3 2 1
4975 * 10987654321098765432109876543210
4976 * 001000 x0101000101
4977 * rt -----
4978 * rs -----
4979 * rd -----
4980 */
4981 static std::string CMPGU_LE_QB(uint64 instruction, Dis_info *info)
4982 {
4983 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4984 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4985 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4986
4987 std::string rd = GPR(copy(rd_value));
4988 std::string rs = GPR(copy(rs_value));
4989 std::string rt = GPR(copy(rt_value));
4990
4991 return img_format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt);
4992 }
4993
4994
4995 /*
4996 * [DSP] CMPGU.LT.QB rd, rs, rt - Compare vectors of unsigned
4997 * byte values and write result to a GPR
4998 *
4999 * 3 2 1
5000 * 10987654321098765432109876543210
5001 * 001000 x0100000101
5002 * rt -----
5003 * rs -----
5004 * rd -----
5005 */
5006 static std::string CMPGU_LT_QB(uint64 instruction, Dis_info *info)
5007 {
5008 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5009 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5010 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5011
5012 std::string rd = GPR(copy(rd_value));
5013 std::string rs = GPR(copy(rs_value));
5014 std::string rt = GPR(copy(rt_value));
5015
5016 return img_format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt);
5017 }
5018
5019
5020 /*
5021 * [DSP] CMPU.EQ.QB rd, rs, rt - Compare vectors of unsigned
5022 * byte values
5023 *
5024 * 3 2 1
5025 * 10987654321098765432109876543210
5026 * 001000 xxxxxx1001000101
5027 * rt -----
5028 * rs -----
5029 */
5030 static std::string CMPU_EQ_QB(uint64 instruction, Dis_info *info)
5031 {
5032 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5033 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5034
5035 std::string rs = GPR(copy(rs_value));
5036 std::string rt = GPR(copy(rt_value));
5037
5038 return img_format("CMPU.EQ.QB %s, %s", rs, rt);
5039 }
5040
5041
5042 /*
5043 * [DSP] CMPU.LE.QB rd, rs, rt - Compare vectors of unsigned
5044 * byte values
5045 *
5046 * 3 2 1
5047 * 10987654321098765432109876543210
5048 * 001000 xxxxxx1011000101
5049 * rt -----
5050 * rs -----
5051 */
5052 static std::string CMPU_LE_QB(uint64 instruction, Dis_info *info)
5053 {
5054 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5055 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5056
5057 std::string rs = GPR(copy(rs_value));
5058 std::string rt = GPR(copy(rt_value));
5059
5060 return img_format("CMPU.LE.QB %s, %s", rs, rt);
5061 }
5062
5063
5064 /*
5065 * [DSP] CMPU.LT.QB rd, rs, rt - Compare vectors of unsigned
5066 * byte values
5067 *
5068 * 3 2 1
5069 * 10987654321098765432109876543210
5070 * 001000 xxxxxx1010000101
5071 * rt -----
5072 * rs -----
5073 */
5074 static std::string CMPU_LT_QB(uint64 instruction, Dis_info *info)
5075 {
5076 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5077 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5078
5079 std::string rs = GPR(copy(rs_value));
5080 std::string rt = GPR(copy(rt_value));
5081
5082 return img_format("CMPU.LT.QB %s, %s", rs, rt);
5083 }
5084
5085
5086 /*
5087 *
5088 *
5089 * 3 2 1
5090 * 10987654321098765432109876543210
5091 * 001000 x1110000101
5092 * rt -----
5093 * rs -----
5094 * rd -----
5095 */
5096 static std::string COP2_1(uint64 instruction, Dis_info *info)
5097 {
5098 uint64 cofun_value = extract_cofun_25_24_23(instruction);
5099
5100 std::string cofun = IMMEDIATE(copy(cofun_value));
5101
5102 return img_format("COP2_1 %s", cofun);
5103 }
5104
5105
5106 /*
5107 *
5108 *
5109 * 3 2 1
5110 * 10987654321098765432109876543210
5111 * 001000 x1110000101
5112 * rt -----
5113 * rs -----
5114 * rd -----
5115 */
5116 static std::string CTC1(uint64 instruction, Dis_info *info)
5117 {
5118 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5119 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5120
5121 std::string rt = GPR(copy(rt_value));
5122 std::string cs = CPR(copy(cs_value));
5123
5124 return img_format("CTC1 %s, %s", rt, cs);
5125 }
5126
5127
5128 /*
5129 *
5130 *
5131 * 3 2 1
5132 * 10987654321098765432109876543210
5133 * 001000 x1110000101
5134 * rt -----
5135 * rs -----
5136 * rd -----
5137 */
5138 static std::string CTC2(uint64 instruction, Dis_info *info)
5139 {
5140 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5141 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5142
5143 std::string rt = GPR(copy(rt_value));
5144 std::string cs = CPR(copy(cs_value));
5145
5146 return img_format("CTC2 %s, %s", rt, cs);
5147 }
5148
5149
5150 /*
5151 *
5152 *
5153 * 3 2 1
5154 * 10987654321098765432109876543210
5155 * 001000 x1110000101
5156 * rt -----
5157 * rs -----
5158 * rd -----
5159 */
5160 static std::string CVT_D_L(uint64 instruction, Dis_info *info)
5161 {
5162 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5163 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5164
5165 std::string ft = FPR(copy(ft_value));
5166 std::string fs = FPR(copy(fs_value));
5167
5168 return img_format("CVT.D.L %s, %s", ft, fs);
5169 }
5170
5171
5172 /*
5173 *
5174 *
5175 * 3 2 1
5176 * 10987654321098765432109876543210
5177 * 001000 x1110000101
5178 * rt -----
5179 * rs -----
5180 * rd -----
5181 */
5182 static std::string CVT_D_S(uint64 instruction, Dis_info *info)
5183 {
5184 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5185 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5186
5187 std::string ft = FPR(copy(ft_value));
5188 std::string fs = FPR(copy(fs_value));
5189
5190 return img_format("CVT.D.S %s, %s", ft, fs);
5191 }
5192
5193
5194 /*
5195 *
5196 *
5197 * 3 2 1
5198 * 10987654321098765432109876543210
5199 * 001000 x1110000101
5200 * rt -----
5201 * rs -----
5202 * rd -----
5203 */
5204 static std::string CVT_D_W(uint64 instruction, Dis_info *info)
5205 {
5206 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5207 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5208
5209 std::string ft = FPR(copy(ft_value));
5210 std::string fs = FPR(copy(fs_value));
5211
5212 return img_format("CVT.D.W %s, %s", ft, fs);
5213 }
5214
5215
5216 /*
5217 *
5218 *
5219 * 3 2 1
5220 * 10987654321098765432109876543210
5221 * 001000 x1110000101
5222 * rt -----
5223 * rs -----
5224 * rd -----
5225 */
5226 static std::string CVT_L_D(uint64 instruction, Dis_info *info)
5227 {
5228 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5229 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5230
5231 std::string ft = FPR(copy(ft_value));
5232 std::string fs = FPR(copy(fs_value));
5233
5234 return img_format("CVT.L.D %s, %s", ft, fs);
5235 }
5236
5237
5238 /*
5239 *
5240 *
5241 * 3 2 1
5242 * 10987654321098765432109876543210
5243 * 001000 x1110000101
5244 * rt -----
5245 * rs -----
5246 * rd -----
5247 */
5248 static std::string CVT_L_S(uint64 instruction, Dis_info *info)
5249 {
5250 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5251 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5252
5253 std::string ft = FPR(copy(ft_value));
5254 std::string fs = FPR(copy(fs_value));
5255
5256 return img_format("CVT.L.S %s, %s", ft, fs);
5257 }
5258
5259
5260 /*
5261 *
5262 *
5263 * 3 2 1
5264 * 10987654321098765432109876543210
5265 * 001000 x1110000101
5266 * rt -----
5267 * rs -----
5268 * rd -----
5269 */
5270 static std::string CVT_S_D(uint64 instruction, Dis_info *info)
5271 {
5272 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5273 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5274
5275 std::string ft = FPR(copy(ft_value));
5276 std::string fs = FPR(copy(fs_value));
5277
5278 return img_format("CVT.S.D %s, %s", ft, fs);
5279 }
5280
5281
5282 /*
5283 *
5284 *
5285 * 3 2 1
5286 * 10987654321098765432109876543210
5287 * 001000 x1110000101
5288 * rt -----
5289 * rs -----
5290 * rd -----
5291 */
5292 static std::string CVT_S_L(uint64 instruction, Dis_info *info)
5293 {
5294 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5295 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5296
5297 std::string ft = FPR(copy(ft_value));
5298 std::string fs = FPR(copy(fs_value));
5299
5300 return img_format("CVT.S.L %s, %s", ft, fs);
5301 }
5302
5303
5304 /*
5305 *
5306 *
5307 * 3 2 1
5308 * 10987654321098765432109876543210
5309 * 001000 x1110000101
5310 * rt -----
5311 * rs -----
5312 * rd -----
5313 */
5314 static std::string CVT_S_PL(uint64 instruction, Dis_info *info)
5315 {
5316 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5317 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5318
5319 std::string ft = FPR(copy(ft_value));
5320 std::string fs = FPR(copy(fs_value));
5321
5322 return img_format("CVT.S.PL %s, %s", ft, fs);
5323 }
5324
5325
5326 /*
5327 *
5328 *
5329 * 3 2 1
5330 * 10987654321098765432109876543210
5331 * 001000 x1110000101
5332 * rt -----
5333 * rs -----
5334 * rd -----
5335 */
5336 static std::string CVT_S_PU(uint64 instruction, Dis_info *info)
5337 {
5338 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5339 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5340
5341 std::string ft = FPR(copy(ft_value));
5342 std::string fs = FPR(copy(fs_value));
5343
5344 return img_format("CVT.S.PU %s, %s", ft, fs);
5345 }
5346
5347
5348 /*
5349 *
5350 *
5351 * 3 2 1
5352 * 10987654321098765432109876543210
5353 * 001000 x1110000101
5354 * rt -----
5355 * rs -----
5356 * rd -----
5357 */
5358 static std::string CVT_S_W(uint64 instruction, Dis_info *info)
5359 {
5360 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5361 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5362
5363 std::string ft = FPR(copy(ft_value));
5364 std::string fs = FPR(copy(fs_value));
5365
5366 return img_format("CVT.S.W %s, %s", ft, fs);
5367 }
5368
5369
5370 /*
5371 *
5372 *
5373 * 3 2 1
5374 * 10987654321098765432109876543210
5375 * 001000 x1110000101
5376 * rt -----
5377 * rs -----
5378 * rd -----
5379 */
5380 static std::string CVT_W_D(uint64 instruction, Dis_info *info)
5381 {
5382 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5383 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5384
5385 std::string ft = FPR(copy(ft_value));
5386 std::string fs = FPR(copy(fs_value));
5387
5388 return img_format("CVT.W.D %s, %s", ft, fs);
5389 }
5390
5391
5392 /*
5393 *
5394 *
5395 * 3 2 1
5396 * 10987654321098765432109876543210
5397 * 001000 x1110000101
5398 * rt -----
5399 * rs -----
5400 * rd -----
5401 */
5402 static std::string CVT_W_S(uint64 instruction, Dis_info *info)
5403 {
5404 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5405 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5406
5407 std::string ft = FPR(copy(ft_value));
5408 std::string fs = FPR(copy(fs_value));
5409
5410 return img_format("CVT.W.S %s, %s", ft, fs);
5411 }
5412
5413
5414 /*
5415 *
5416 *
5417 * 3 2 1
5418 * 10987654321098765432109876543210
5419 * 001000 x1110000101
5420 * rt -----
5421 * rs -----
5422 * rd -----
5423 */
5424 static std::string DADDIU_48_(uint64 instruction, Dis_info *info)
5425 {
5426 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5427 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
5428
5429 std::string rt = GPR(copy(rt_value));
5430 std::string s = IMMEDIATE(copy(s_value));
5431
5432 return img_format("DADDIU %s, %s", rt, s);
5433 }
5434
5435
5436 /*
5437 *
5438 *
5439 * 3 2 1
5440 * 10987654321098765432109876543210
5441 * 001000 x1110000101
5442 * rt -----
5443 * rs -----
5444 * rd -----
5445 */
5446 static std::string DADDIU_NEG_(uint64 instruction, Dis_info *info)
5447 {
5448 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5449 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5450 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5451
5452 std::string rt = GPR(copy(rt_value));
5453 std::string rs = GPR(copy(rs_value));
5454 std::string u = IMMEDIATE(neg_copy(u_value));
5455
5456 return img_format("DADDIU %s, %s, %s", rt, rs, u);
5457 }
5458
5459
5460 /*
5461 *
5462 *
5463 * 3 2 1
5464 * 10987654321098765432109876543210
5465 * 001000 x1110000101
5466 * rt -----
5467 * rs -----
5468 * rd -----
5469 */
5470 static std::string DADDIU_U12_(uint64 instruction, Dis_info *info)
5471 {
5472 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5473 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5474 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5475
5476 std::string rt = GPR(copy(rt_value));
5477 std::string rs = GPR(copy(rs_value));
5478 std::string u = IMMEDIATE(copy(u_value));
5479
5480 return img_format("DADDIU %s, %s, %s", rt, rs, u);
5481 }
5482
5483
5484 /*
5485 *
5486 *
5487 * 3 2 1
5488 * 10987654321098765432109876543210
5489 * 001000 x1110000101
5490 * rt -----
5491 * rs -----
5492 * rd -----
5493 */
5494 static std::string DADD(uint64 instruction, Dis_info *info)
5495 {
5496 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5497 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5498 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5499
5500 std::string rd = GPR(copy(rd_value));
5501 std::string rs = GPR(copy(rs_value));
5502 std::string rt = GPR(copy(rt_value));
5503
5504 return img_format("DADD %s, %s, %s", rd, rs, rt);
5505 }
5506
5507
5508 /*
5509 *
5510 *
5511 * 3 2 1
5512 * 10987654321098765432109876543210
5513 * 001000 x1110000101
5514 * rt -----
5515 * rs -----
5516 * rd -----
5517 */
5518 static std::string DADDU(uint64 instruction, Dis_info *info)
5519 {
5520 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5521 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5522 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5523
5524 std::string rd = GPR(copy(rd_value));
5525 std::string rs = GPR(copy(rs_value));
5526 std::string rt = GPR(copy(rt_value));
5527
5528 return img_format("DADDU %s, %s, %s", rd, rs, rt);
5529 }
5530
5531
5532 /*
5533 *
5534 *
5535 * 3 2 1
5536 * 10987654321098765432109876543210
5537 * 001000 x1110000101
5538 * rt -----
5539 * rs -----
5540 * rd -----
5541 */
5542 static std::string DCLO(uint64 instruction, Dis_info *info)
5543 {
5544 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5545 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5546
5547 std::string rt = GPR(copy(rt_value));
5548 std::string rs = GPR(copy(rs_value));
5549
5550 return img_format("DCLO %s, %s", rt, rs);
5551 }
5552
5553
5554 /*
5555 *
5556 *
5557 * 3 2 1
5558 * 10987654321098765432109876543210
5559 * 001000 x1110000101
5560 * rt -----
5561 * rs -----
5562 * rd -----
5563 */
5564 static std::string DCLZ(uint64 instruction, Dis_info *info)
5565 {
5566 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5567 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5568
5569 std::string rt = GPR(copy(rt_value));
5570 std::string rs = GPR(copy(rs_value));
5571
5572 return img_format("DCLZ %s, %s", rt, rs);
5573 }
5574
5575
5576 /*
5577 *
5578 *
5579 * 3 2 1
5580 * 10987654321098765432109876543210
5581 * 001000 x1110000101
5582 * rt -----
5583 * rs -----
5584 * rd -----
5585 */
5586 static std::string DDIV(uint64 instruction, Dis_info *info)
5587 {
5588 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5589 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5590 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5591
5592 std::string rd = GPR(copy(rd_value));
5593 std::string rs = GPR(copy(rs_value));
5594 std::string rt = GPR(copy(rt_value));
5595
5596 return img_format("DDIV %s, %s, %s", rd, rs, rt);
5597 }
5598
5599
5600 /*
5601 *
5602 *
5603 * 3 2 1
5604 * 10987654321098765432109876543210
5605 * 001000 x1110000101
5606 * rt -----
5607 * rs -----
5608 * rd -----
5609 */
5610 static std::string DDIVU(uint64 instruction, Dis_info *info)
5611 {
5612 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5613 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5614 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5615
5616 std::string rd = GPR(copy(rd_value));
5617 std::string rs = GPR(copy(rs_value));
5618 std::string rt = GPR(copy(rt_value));
5619
5620 return img_format("DDIVU %s, %s, %s", rd, rs, rt);
5621 }
5622
5623
5624 /*
5625 *
5626 *
5627 * 3 2 1
5628 * 10987654321098765432109876543210
5629 * 001000 x1110000101
5630 * rt -----
5631 * rs -----
5632 * rd -----
5633 */
5634 static std::string DERET(uint64 instruction, Dis_info *info)
5635 {
5636 (void)instruction;
5637
5638 return "DERET ";
5639 }
5640
5641
5642 /*
5643 *
5644 *
5645 * 3 2 1
5646 * 10987654321098765432109876543210
5647 * 001000 x1110000101
5648 * rt -----
5649 * rs -----
5650 * rd -----
5651 */
5652 static std::string DEXTM(uint64 instruction, Dis_info *info)
5653 {
5654 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5655 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5656 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5657 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5658
5659 std::string rt = GPR(copy(rt_value));
5660 std::string rs = GPR(copy(rs_value));
5661 std::string lsb = IMMEDIATE(copy(lsb_value));
5662 std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5663
5664 return img_format("DEXTM %s, %s, %s, %s", rt, rs, lsb, msbd);
5665 }
5666
5667
5668 /*
5669 *
5670 *
5671 * 3 2 1
5672 * 10987654321098765432109876543210
5673 * 001000 x1110000101
5674 * rt -----
5675 * rs -----
5676 * rd -----
5677 */
5678 static std::string DEXT(uint64 instruction, Dis_info *info)
5679 {
5680 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5681 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5682 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5683 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5684
5685 std::string rt = GPR(copy(rt_value));
5686 std::string rs = GPR(copy(rs_value));
5687 std::string lsb = IMMEDIATE(copy(lsb_value));
5688 std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5689
5690 return img_format("DEXT %s, %s, %s, %s", rt, rs, lsb, msbd);
5691 }
5692
5693
5694 /*
5695 *
5696 *
5697 * 3 2 1
5698 * 10987654321098765432109876543210
5699 * 001000 x1110000101
5700 * rt -----
5701 * rs -----
5702 * rd -----
5703 */
5704 static std::string DEXTU(uint64 instruction, Dis_info *info)
5705 {
5706 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5707 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5708 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5709 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5710
5711 std::string rt = GPR(copy(rt_value));
5712 std::string rs = GPR(copy(rs_value));
5713 std::string lsb = IMMEDIATE(copy(lsb_value));
5714 std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5715
5716 return img_format("DEXTU %s, %s, %s, %s", rt, rs, lsb, msbd);
5717 }
5718
5719
5720 /*
5721 *
5722 *
5723 * 3 2 1
5724 * 10987654321098765432109876543210
5725 * 001000 x1110000101
5726 * rt -----
5727 * rs -----
5728 * rd -----
5729 */
5730 static std::string DINSM(uint64 instruction, Dis_info *info)
5731 {
5732 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5733 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5734 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5735 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5736
5737 std::string rt = GPR(copy(rt_value));
5738 std::string rs = GPR(copy(rs_value));
5739 std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5740 std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5741 /* !!!!!!!!!! - no conversion function */
5742
5743 return img_format("DINSM %s, %s, %s, %s", rt, rs, pos, size);
5744 /* hand edited */
5745 }
5746
5747
5748 /*
5749 *
5750 *
5751 * 3 2 1
5752 * 10987654321098765432109876543210
5753 * 001000 x1110000101
5754 * rt -----
5755 * rs -----
5756 * rd -----
5757 */
5758 static std::string DINS(uint64 instruction, Dis_info *info)
5759 {
5760 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5761 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5762 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5763 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5764
5765 std::string rt = GPR(copy(rt_value));
5766 std::string rs = GPR(copy(rs_value));
5767 std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5768 std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5769 /* !!!!!!!!!! - no conversion function */
5770
5771 return img_format("DINS %s, %s, %s, %s", rt, rs, pos, size);
5772 /* hand edited */
5773 }
5774
5775
5776 /*
5777 *
5778 *
5779 * 3 2 1
5780 * 10987654321098765432109876543210
5781 * 001000 x1110000101
5782 * rt -----
5783 * rs -----
5784 * rd -----
5785 */
5786 static std::string DINSU(uint64 instruction, Dis_info *info)
5787 {
5788 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5789 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5790 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5791 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5792
5793 std::string rt = GPR(copy(rt_value));
5794 std::string rs = GPR(copy(rs_value));
5795 std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5796 std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5797 /* !!!!!!!!!! - no conversion function */
5798
5799 return img_format("DINSU %s, %s, %s, %s", rt, rs, pos, size);
5800 /* hand edited */
5801 }
5802
5803
5804 /*
5805 *
5806 *
5807 * 3 2 1
5808 * 10987654321098765432109876543210
5809 * 001000 x1110000101
5810 * rt -----
5811 * rs -----
5812 * rd -----
5813 */
5814 static std::string DI(uint64 instruction, Dis_info *info)
5815 {
5816 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5817
5818 std::string rt = GPR(copy(rt_value));
5819
5820 return img_format("DI %s", rt);
5821 }
5822
5823
5824 /*
5825 *
5826 *
5827 * 3 2 1
5828 * 10987654321098765432109876543210
5829 * 001000 x1110000101
5830 * rt -----
5831 * rs -----
5832 * rd -----
5833 */
5834 static std::string DIV(uint64 instruction, Dis_info *info)
5835 {
5836 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5837 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5838 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5839
5840 std::string rd = GPR(copy(rd_value));
5841 std::string rs = GPR(copy(rs_value));
5842 std::string rt = GPR(copy(rt_value));
5843
5844 return img_format("DIV %s, %s, %s", rd, rs, rt);
5845 }
5846
5847
5848 /*
5849 *
5850 *
5851 * 3 2 1
5852 * 10987654321098765432109876543210
5853 * 001000 x1110000101
5854 * rt -----
5855 * rs -----
5856 * rd -----
5857 */
5858 static std::string DIV_D(uint64 instruction, Dis_info *info)
5859 {
5860 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5861 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5862 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5863
5864 std::string fd = FPR(copy(fd_value));
5865 std::string fs = FPR(copy(fs_value));
5866 std::string ft = FPR(copy(ft_value));
5867
5868 return img_format("DIV.D %s, %s, %s", fd, fs, ft);
5869 }
5870
5871
5872 /*
5873 *
5874 *
5875 * 3 2 1
5876 * 10987654321098765432109876543210
5877 * 001000 x1110000101
5878 * rt -----
5879 * rs -----
5880 * rd -----
5881 */
5882 static std::string DIV_S(uint64 instruction, Dis_info *info)
5883 {
5884 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5885 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5886 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5887
5888 std::string fd = FPR(copy(fd_value));
5889 std::string fs = FPR(copy(fs_value));
5890 std::string ft = FPR(copy(ft_value));
5891
5892 return img_format("DIV.S %s, %s, %s", fd, fs, ft);
5893 }
5894
5895
5896 /*
5897 *
5898 *
5899 * 3 2 1
5900 * 10987654321098765432109876543210
5901 * 001000 x1110000101
5902 * rt -----
5903 * rs -----
5904 * rd -----
5905 */
5906 static std::string DIVU(uint64 instruction, Dis_info *info)
5907 {
5908 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5909 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5910 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5911
5912 std::string rd = GPR(copy(rd_value));
5913 std::string rs = GPR(copy(rs_value));
5914 std::string rt = GPR(copy(rt_value));
5915
5916 return img_format("DIVU %s, %s, %s", rd, rs, rt);
5917 }
5918
5919
5920 /*
5921 *
5922 *
5923 * 3 2 1
5924 * 10987654321098765432109876543210
5925 * 001000 x1110000101
5926 * rt -----
5927 * rs -----
5928 * rd -----
5929 */
5930 static std::string DLSA(uint64 instruction, Dis_info *info)
5931 {
5932 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5933 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5934 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5935 uint64 u2_value = extract_u2_10_9(instruction);
5936
5937 std::string rd = GPR(copy(rd_value));
5938 std::string rs = GPR(copy(rs_value));
5939 std::string rt = GPR(copy(rt_value));
5940 std::string u2 = IMMEDIATE(copy(u2_value));
5941
5942 return img_format("DLSA %s, %s, %s, %s", rd, rs, rt, u2);
5943 }
5944
5945
5946 /*
5947 *
5948 *
5949 * 3 2 1
5950 * 10987654321098765432109876543210
5951 * 001000 x1110000101
5952 * rt -----
5953 * rs -----
5954 * rd -----
5955 */
5956 static std::string DLUI_48_(uint64 instruction, Dis_info *info)
5957 {
5958 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5959 uint64 u_value = extract_u_31_to_0__s32(instruction);
5960
5961 std::string rt = GPR(copy(rt_value));
5962 std::string u = IMMEDIATE(copy(u_value));
5963
5964 return img_format("DLUI %s, %s", rt, u);
5965 }
5966
5967
5968 /*
5969 *
5970 *
5971 * 3 2 1
5972 * 10987654321098765432109876543210
5973 * 001000 x1110000101
5974 * rt -----
5975 * rs -----
5976 * rd -----
5977 */
5978 static std::string DMFC0(uint64 instruction, Dis_info *info)
5979 {
5980 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5981 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5982 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5983
5984 std::string rt = GPR(copy(rt_value));
5985 std::string c0s = CPR(copy(c0s_value));
5986 std::string sel = IMMEDIATE(copy(sel_value));
5987
5988 return img_format("DMFC0 %s, %s, %s", rt, c0s, sel);
5989 }
5990
5991
5992 /*
5993 *
5994 *
5995 * 3 2 1
5996 * 10987654321098765432109876543210
5997 * 001000 x1110000101
5998 * rt -----
5999 * rs -----
6000 * rd -----
6001 */
6002 static std::string DMFC1(uint64 instruction, Dis_info *info)
6003 {
6004 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6005 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
6006
6007 std::string rt = GPR(copy(rt_value));
6008 std::string fs = FPR(copy(fs_value));
6009
6010 return img_format("DMFC1 %s, %s", rt, fs);
6011 }
6012
6013
6014 /*
6015 *
6016 *
6017 * 3 2 1
6018 * 10987654321098765432109876543210
6019 * 001000 x1110000101
6020 * rt -----
6021 * rs -----
6022 * rd -----
6023 */
6024 static std::string DMFC2(uint64 instruction, Dis_info *info)
6025 {
6026 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6027 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6028
6029 std::string rt = GPR(copy(rt_value));
6030 std::string cs = CPR(copy(cs_value));
6031
6032 return img_format("DMFC2 %s, %s", rt, cs);
6033 }
6034
6035
6036 /*
6037 *
6038 *
6039 * 3 2 1
6040 * 10987654321098765432109876543210
6041 * 001000 x1110000101
6042 * rt -----
6043 * rs -----
6044 * rd -----
6045 */
6046 static std::string DMFGC0(uint64 instruction, Dis_info *info)
6047 {
6048 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6049 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6050 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6051
6052 std::string rt = GPR(copy(rt_value));
6053 std::string c0s = CPR(copy(c0s_value));
6054 std::string sel = IMMEDIATE(copy(sel_value));
6055
6056 return img_format("DMFGC0 %s, %s, %s", rt, c0s, sel);
6057 }
6058
6059
6060 /*
6061 *
6062 *
6063 * 3 2 1
6064 * 10987654321098765432109876543210
6065 * 001000 x1110000101
6066 * rt -----
6067 * rs -----
6068 * rd -----
6069 */
6070 static std::string DMOD(uint64 instruction, Dis_info *info)
6071 {
6072 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6073 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6074 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6075
6076 std::string rd = GPR(copy(rd_value));
6077 std::string rs = GPR(copy(rs_value));
6078 std::string rt = GPR(copy(rt_value));
6079
6080 return img_format("DMOD %s, %s, %s", rd, rs, rt);
6081 }
6082
6083
6084 /*
6085 *
6086 *
6087 * 3 2 1
6088 * 10987654321098765432109876543210
6089 * 001000 x1110000101
6090 * rt -----
6091 * rs -----
6092 * rd -----
6093 */
6094 static std::string DMODU(uint64 instruction, Dis_info *info)
6095 {
6096 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6097 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6098 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6099
6100 std::string rd = GPR(copy(rd_value));
6101 std::string rs = GPR(copy(rs_value));
6102 std::string rt = GPR(copy(rt_value));
6103
6104 return img_format("DMODU %s, %s, %s", rd, rs, rt);
6105 }
6106
6107
6108 /*
6109 *
6110 *
6111 * 3 2 1
6112 * 10987654321098765432109876543210
6113 * 001000 x1110000101
6114 * rt -----
6115 * rs -----
6116 * rd -----
6117 */
6118 static std::string DMTC0(uint64 instruction, Dis_info *info)
6119 {
6120 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6121 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6122 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6123
6124 std::string rt = GPR(copy(rt_value));
6125 std::string c0s = CPR(copy(c0s_value));
6126 std::string sel = IMMEDIATE(copy(sel_value));
6127
6128 return img_format("DMTC0 %s, %s, %s", rt, c0s, sel);
6129 }
6130
6131
6132 /*
6133 *
6134 *
6135 * 3 2 1
6136 * 10987654321098765432109876543210
6137 * 001000 x1110000101
6138 * rt -----
6139 * rs -----
6140 * rd -----
6141 */
6142 static std::string DMTC1(uint64 instruction, Dis_info *info)
6143 {
6144 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6145 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
6146
6147 std::string rt = GPR(copy(rt_value));
6148 std::string fs = FPR(copy(fs_value));
6149
6150 return img_format("DMTC1 %s, %s", rt, fs);
6151 }
6152
6153
6154 /*
6155 *
6156 *
6157 * 3 2 1
6158 * 10987654321098765432109876543210
6159 * 001000 x1110000101
6160 * rt -----
6161 * rs -----
6162 * rd -----
6163 */
6164 static std::string DMTC2(uint64 instruction, Dis_info *info)
6165 {
6166 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6167 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6168
6169 std::string rt = GPR(copy(rt_value));
6170 std::string cs = CPR(copy(cs_value));
6171
6172 return img_format("DMTC2 %s, %s", rt, cs);
6173 }
6174
6175
6176 /*
6177 *
6178 *
6179 * 3 2 1
6180 * 10987654321098765432109876543210
6181 * 001000 x1110000101
6182 * rt -----
6183 * rs -----
6184 * rd -----
6185 */
6186 static std::string DMTGC0(uint64 instruction, Dis_info *info)
6187 {
6188 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6189 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6190 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6191
6192 std::string rt = GPR(copy(rt_value));
6193 std::string c0s = CPR(copy(c0s_value));
6194 std::string sel = IMMEDIATE(copy(sel_value));
6195
6196 return img_format("DMTGC0 %s, %s, %s", rt, c0s, sel);
6197 }
6198
6199
6200 /*
6201 *
6202 *
6203 * 3 2 1
6204 * 10987654321098765432109876543210
6205 * 001000 x1110000101
6206 * rt -----
6207 * rs -----
6208 * rd -----
6209 */
6210 static std::string DMT(uint64 instruction, Dis_info *info)
6211 {
6212 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6213
6214 std::string rt = GPR(copy(rt_value));
6215
6216 return img_format("DMT %s", rt);
6217 }
6218
6219
6220 /*
6221 *
6222 *
6223 * 3 2 1
6224 * 10987654321098765432109876543210
6225 * 001000 x1110000101
6226 * rt -----
6227 * rs -----
6228 * rd -----
6229 */
6230 static std::string DMUH(uint64 instruction, Dis_info *info)
6231 {
6232 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6233 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6234 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6235
6236 std::string rd = GPR(copy(rd_value));
6237 std::string rs = GPR(copy(rs_value));
6238 std::string rt = GPR(copy(rt_value));
6239
6240 return img_format("DMUH %s, %s, %s", rd, rs, rt);
6241 }
6242
6243
6244 /*
6245 *
6246 *
6247 * 3 2 1
6248 * 10987654321098765432109876543210
6249 * 001000 x1110000101
6250 * rt -----
6251 * rs -----
6252 * rd -----
6253 */
6254 static std::string DMUHU(uint64 instruction, Dis_info *info)
6255 {
6256 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6257 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6258 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6259
6260 std::string rd = GPR(copy(rd_value));
6261 std::string rs = GPR(copy(rs_value));
6262 std::string rt = GPR(copy(rt_value));
6263
6264 return img_format("DMUHU %s, %s, %s", rd, rs, rt);
6265 }
6266
6267
6268 /*
6269 *
6270 *
6271 * 3 2 1
6272 * 10987654321098765432109876543210
6273 * 001000 x1110000101
6274 * rt -----
6275 * rs -----
6276 * rd -----
6277 */
6278 static std::string DMUL(uint64 instruction, Dis_info *info)
6279 {
6280 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6281 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6282 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6283
6284 std::string rd = GPR(copy(rd_value));
6285 std::string rs = GPR(copy(rs_value));
6286 std::string rt = GPR(copy(rt_value));
6287
6288 return img_format("DMUL %s, %s, %s", rd, rs, rt);
6289 }
6290
6291
6292 /*
6293 *
6294 *
6295 * 3 2 1
6296 * 10987654321098765432109876543210
6297 * 001000 x1110000101
6298 * rt -----
6299 * rs -----
6300 * rd -----
6301 */
6302 static std::string DMULU(uint64 instruction, Dis_info *info)
6303 {
6304 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6305 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6306 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6307
6308 std::string rd = GPR(copy(rd_value));
6309 std::string rs = GPR(copy(rs_value));
6310 std::string rt = GPR(copy(rt_value));
6311
6312 return img_format("DMULU %s, %s, %s", rd, rs, rt);
6313 }
6314
6315
6316 /*
6317 * [DSP] DPA.W.PH ac, rs, rt - Dot product with accumulate on
6318 * vector integer halfword elements
6319 *
6320 * 3 2 1
6321 * 10987654321098765432109876543210
6322 * 001000 00000010111111
6323 * rt -----
6324 * rs -----
6325 * ac --
6326 */
6327 static std::string DPA_W_PH(uint64 instruction, Dis_info *info)
6328 {
6329 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6330 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6331 uint64 ac_value = extract_ac_15_14(instruction);
6332
6333 std::string ac = AC(copy(ac_value));
6334 std::string rs = GPR(copy(rs_value));
6335 std::string rt = GPR(copy(rt_value));
6336
6337 return img_format("DPA.W.PH %s, %s, %s", ac, rs, rt);
6338 }
6339
6340
6341 /*
6342 *
6343 *
6344 * 3 2 1
6345 * 10987654321098765432109876543210
6346 * 001000 x1110000101
6347 * rt -----
6348 * rs -----
6349 * rd -----
6350 */
6351 static std::string DPAQ_SA_L_W(uint64 instruction, Dis_info *info)
6352 {
6353 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6354 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6355 uint64 ac_value = extract_ac_15_14(instruction);
6356
6357 std::string ac = AC(copy(ac_value));
6358 std::string rs = GPR(copy(rs_value));
6359 std::string rt = GPR(copy(rt_value));
6360
6361 return img_format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt);
6362 }
6363
6364
6365 /*
6366 *
6367 *
6368 * 3 2 1
6369 * 10987654321098765432109876543210
6370 * 001000 x1110000101
6371 * rt -----
6372 * rs -----
6373 * rd -----
6374 */
6375 static std::string DPAQ_S_W_PH(uint64 instruction, Dis_info *info)
6376 {
6377 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6378 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6379 uint64 ac_value = extract_ac_15_14(instruction);
6380
6381 std::string ac = AC(copy(ac_value));
6382 std::string rs = GPR(copy(rs_value));
6383 std::string rt = GPR(copy(rt_value));
6384
6385 return img_format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt);
6386 }
6387
6388
6389 /*
6390 *
6391 *
6392 * 3 2 1
6393 * 10987654321098765432109876543210
6394 * 001000 x1110000101
6395 * rt -----
6396 * rs -----
6397 * rd -----
6398 */
6399 static std::string DPAQX_SA_W_PH(uint64 instruction, Dis_info *info)
6400 {
6401 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6402 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6403 uint64 ac_value = extract_ac_15_14(instruction);
6404
6405 std::string ac = AC(copy(ac_value));
6406 std::string rs = GPR(copy(rs_value));
6407 std::string rt = GPR(copy(rt_value));
6408
6409 return img_format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6410 }
6411
6412
6413 /*
6414 *
6415 *
6416 * 3 2 1
6417 * 10987654321098765432109876543210
6418 * 001000 x1110000101
6419 * rt -----
6420 * rs -----
6421 * rd -----
6422 */
6423 static std::string DPAQX_S_W_PH(uint64 instruction, Dis_info *info)
6424 {
6425 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6426 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6427 uint64 ac_value = extract_ac_15_14(instruction);
6428
6429 std::string ac = AC(copy(ac_value));
6430 std::string rs = GPR(copy(rs_value));
6431 std::string rt = GPR(copy(rt_value));
6432
6433 return img_format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt);
6434 }
6435
6436
6437 /*
6438 *
6439 *
6440 * 3 2 1
6441 * 10987654321098765432109876543210
6442 * 001000 x1110000101
6443 * rt -----
6444 * rs -----
6445 * rd -----
6446 */
6447 static std::string DPAU_H_QBL(uint64 instruction, Dis_info *info)
6448 {
6449 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6450 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6451 uint64 ac_value = extract_ac_15_14(instruction);
6452
6453 std::string ac = AC(copy(ac_value));
6454 std::string rs = GPR(copy(rs_value));
6455 std::string rt = GPR(copy(rt_value));
6456
6457 return img_format("DPAU.H.QBL %s, %s, %s", ac, rs, rt);
6458 }
6459
6460
6461 /*
6462 *
6463 *
6464 * 3 2 1
6465 * 10987654321098765432109876543210
6466 * 001000 x1110000101
6467 * rt -----
6468 * rs -----
6469 * rd -----
6470 */
6471 static std::string DPAU_H_QBR(uint64 instruction, Dis_info *info)
6472 {
6473 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6474 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6475 uint64 ac_value = extract_ac_15_14(instruction);
6476
6477 std::string ac = AC(copy(ac_value));
6478 std::string rs = GPR(copy(rs_value));
6479 std::string rt = GPR(copy(rt_value));
6480
6481 return img_format("DPAU.H.QBR %s, %s, %s", ac, rs, rt);
6482 }
6483
6484
6485 /*
6486 *
6487 *
6488 * 3 2 1
6489 * 10987654321098765432109876543210
6490 * 001000 x1110000101
6491 * rt -----
6492 * rs -----
6493 * rd -----
6494 */
6495 static std::string DPAX_W_PH(uint64 instruction, Dis_info *info)
6496 {
6497 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6498 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6499 uint64 ac_value = extract_ac_15_14(instruction);
6500
6501 std::string ac = AC(copy(ac_value));
6502 std::string rs = GPR(copy(rs_value));
6503 std::string rt = GPR(copy(rt_value));
6504
6505 return img_format("DPAX.W.PH %s, %s, %s", ac, rs, rt);
6506 }
6507
6508
6509 /*
6510 *
6511 *
6512 * 3 2 1
6513 * 10987654321098765432109876543210
6514 * 001000 x1110000101
6515 * rt -----
6516 * rs -----
6517 * rd -----
6518 */
6519 static std::string DPS_W_PH(uint64 instruction, Dis_info *info)
6520 {
6521 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6522 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6523 uint64 ac_value = extract_ac_15_14(instruction);
6524
6525 std::string ac = AC(copy(ac_value));
6526 std::string rs = GPR(copy(rs_value));
6527 std::string rt = GPR(copy(rt_value));
6528
6529 return img_format("DPS.W.PH %s, %s, %s", ac, rs, rt);
6530 }
6531
6532
6533 /*
6534 *
6535 *
6536 * 3 2 1
6537 * 10987654321098765432109876543210
6538 * 001000 x1110000101
6539 * rt -----
6540 * rs -----
6541 * rd -----
6542 */
6543 static std::string DPSQ_SA_L_W(uint64 instruction, Dis_info *info)
6544 {
6545 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6546 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6547 uint64 ac_value = extract_ac_15_14(instruction);
6548
6549 std::string ac = AC(copy(ac_value));
6550 std::string rs = GPR(copy(rs_value));
6551 std::string rt = GPR(copy(rt_value));
6552
6553 return img_format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt);
6554 }
6555
6556
6557 /*
6558 *
6559 *
6560 * 3 2 1
6561 * 10987654321098765432109876543210
6562 * 001000 x1110000101
6563 * rt -----
6564 * rs -----
6565 * rd -----
6566 */
6567 static std::string DPSQ_S_W_PH(uint64 instruction, Dis_info *info)
6568 {
6569 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6570 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6571 uint64 ac_value = extract_ac_15_14(instruction);
6572
6573 std::string ac = AC(copy(ac_value));
6574 std::string rs = GPR(copy(rs_value));
6575 std::string rt = GPR(copy(rt_value));
6576
6577 return img_format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt);
6578 }
6579
6580
6581 /*
6582 *
6583 *
6584 * 3 2 1
6585 * 10987654321098765432109876543210
6586 * 001000 x1110000101
6587 * rt -----
6588 * rs -----
6589 * rd -----
6590 */
6591 static std::string DPSQX_SA_W_PH(uint64 instruction, Dis_info *info)
6592 {
6593 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6594 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6595 uint64 ac_value = extract_ac_15_14(instruction);
6596
6597 std::string ac = AC(copy(ac_value));
6598 std::string rs = GPR(copy(rs_value));
6599 std::string rt = GPR(copy(rt_value));
6600
6601 return img_format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6602 }
6603
6604
6605 /*
6606 *
6607 *
6608 * 3 2 1
6609 * 10987654321098765432109876543210
6610 * 001000 x1110000101
6611 * rt -----
6612 * rs -----
6613 * rd -----
6614 */
6615 static std::string DPSQX_S_W_PH(uint64 instruction, Dis_info *info)
6616 {
6617 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6618 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6619 uint64 ac_value = extract_ac_15_14(instruction);
6620
6621 std::string ac = AC(copy(ac_value));
6622 std::string rs = GPR(copy(rs_value));
6623 std::string rt = GPR(copy(rt_value));
6624
6625 return img_format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt);
6626 }
6627
6628
6629 /*
6630 *
6631 *
6632 * 3 2 1
6633 * 10987654321098765432109876543210
6634 * 001000 x1110000101
6635 * rt -----
6636 * rs -----
6637 * rd -----
6638 */
6639 static std::string DPSU_H_QBL(uint64 instruction, Dis_info *info)
6640 {
6641 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6642 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6643 uint64 ac_value = extract_ac_15_14(instruction);
6644
6645 std::string ac = AC(copy(ac_value));
6646 std::string rs = GPR(copy(rs_value));
6647 std::string rt = GPR(copy(rt_value));
6648
6649 return img_format("DPSU.H.QBL %s, %s, %s", ac, rs, rt);
6650 }
6651
6652
6653 /*
6654 *
6655 *
6656 * 3 2 1
6657 * 10987654321098765432109876543210
6658 * 001000 x1110000101
6659 * rt -----
6660 * rs -----
6661 * rd -----
6662 */
6663 static std::string DPSU_H_QBR(uint64 instruction, Dis_info *info)
6664 {
6665 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6666 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6667 uint64 ac_value = extract_ac_15_14(instruction);
6668
6669 std::string ac = AC(copy(ac_value));
6670 std::string rs = GPR(copy(rs_value));
6671 std::string rt = GPR(copy(rt_value));
6672
6673 return img_format("DPSU.H.QBR %s, %s, %s", ac, rs, rt);
6674 }
6675
6676
6677 /*
6678 *
6679 *
6680 * 3 2 1
6681 * 10987654321098765432109876543210
6682 * 001000 x1110000101
6683 * rt -----
6684 * rs -----
6685 * rd -----
6686 */
6687 static std::string DPSX_W_PH(uint64 instruction, Dis_info *info)
6688 {
6689 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6690 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6691 uint64 ac_value = extract_ac_15_14(instruction);
6692
6693 std::string ac = AC(copy(ac_value));
6694 std::string rs = GPR(copy(rs_value));
6695 std::string rt = GPR(copy(rt_value));
6696
6697 return img_format("DPSX.W.PH %s, %s, %s", ac, rs, rt);
6698 }
6699
6700
6701 /*
6702 * DROTR -
6703 *
6704 * 3 2 1
6705 * 10987654321098765432109876543210
6706 * 001000 x1110000101
6707 * rt -----
6708 * rs -----
6709 * rd -----
6710 */
6711 static std::string DROTR(uint64 instruction, Dis_info *info)
6712 {
6713 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6714 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6715 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6716
6717 std::string rt = GPR(copy(rt_value));
6718 std::string rs = GPR(copy(rs_value));
6719 std::string shift = IMMEDIATE(copy(shift_value));
6720
6721 return img_format("DROTR %s, %s, %s", rt, rs, shift);
6722 }
6723
6724
6725 /*
6726 * DROTR[32] -
6727 *
6728 * 3 2 1
6729 * 10987654321098765432109876543210
6730 * 10o000 1100xxx0110
6731 * rt -----
6732 * rs -----
6733 * shift -----
6734 */
6735 static std::string DROTR32(uint64 instruction, Dis_info *info)
6736 {
6737 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6738 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6739 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6740
6741 std::string rt = GPR(copy(rt_value));
6742 std::string rs = GPR(copy(rs_value));
6743 std::string shift = IMMEDIATE(copy(shift_value));
6744
6745 return img_format("DROTR32 %s, %s, %s", rt, rs, shift);
6746 }
6747
6748
6749 /*
6750 *
6751 *
6752 * 3 2 1
6753 * 10987654321098765432109876543210
6754 * 001000 x1110000101
6755 * rt -----
6756 * rs -----
6757 * rd -----
6758 */
6759 static std::string DROTRV(uint64 instruction, Dis_info *info)
6760 {
6761 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6762 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6763 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6764
6765 std::string rd = GPR(copy(rd_value));
6766 std::string rs = GPR(copy(rs_value));
6767 std::string rt = GPR(copy(rt_value));
6768
6769 return img_format("DROTRV %s, %s, %s", rd, rs, rt);
6770 }
6771
6772
6773 /*
6774 *
6775 *
6776 * 3 2 1
6777 * 10987654321098765432109876543210
6778 * 001000 x1110000101
6779 * rt -----
6780 * rs -----
6781 * rd -----
6782 */
6783 static std::string DROTX(uint64 instruction, Dis_info *info)
6784 {
6785 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6786 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6787 uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
6788 uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
6789
6790 std::string rt = GPR(copy(rt_value));
6791 std::string rs = GPR(copy(rs_value));
6792 std::string shift = IMMEDIATE(copy(shift_value));
6793 std::string shiftx = IMMEDIATE(copy(shiftx_value));
6794
6795 return img_format("DROTX %s, %s, %s, %s", rt, rs, shift, shiftx);
6796 }
6797
6798
6799 /*
6800 * DSLL -
6801 *
6802 * 3 2 1
6803 * 10987654321098765432109876543210
6804 * 10o000 1100xxx0000
6805 * rt -----
6806 * rs -----
6807 * shift -----
6808 */
6809 static std::string DSLL(uint64 instruction, Dis_info *info)
6810 {
6811 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6812 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6813 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6814
6815 std::string rt = GPR(copy(rt_value));
6816 std::string rs = GPR(copy(rs_value));
6817 std::string shift = IMMEDIATE(copy(shift_value));
6818
6819 return img_format("DSLL %s, %s, %s", rt, rs, shift);
6820 }
6821
6822
6823 /*
6824 * DSLL[32] -
6825 *
6826 * 3 2 1
6827 * 10987654321098765432109876543210
6828 * 10o000 1100xxx0000
6829 * rt -----
6830 * rs -----
6831 * shift -----
6832 */
6833 static std::string DSLL32(uint64 instruction, Dis_info *info)
6834 {
6835 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6836 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6837 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6838
6839 std::string rt = GPR(copy(rt_value));
6840 std::string rs = GPR(copy(rs_value));
6841 std::string shift = IMMEDIATE(copy(shift_value));
6842
6843 return img_format("DSLL32 %s, %s, %s", rt, rs, shift);
6844 }
6845
6846
6847 /*
6848 *
6849 *
6850 * 3 2 1
6851 * 10987654321098765432109876543210
6852 * 001000 x1110000101
6853 * rt -----
6854 * rs -----
6855 * rd -----
6856 */
6857 static std::string DSLLV(uint64 instruction, Dis_info *info)
6858 {
6859 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6860 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6861 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6862
6863 std::string rd = GPR(copy(rd_value));
6864 std::string rs = GPR(copy(rs_value));
6865 std::string rt = GPR(copy(rt_value));
6866
6867 return img_format("DSLLV %s, %s, %s", rd, rs, rt);
6868 }
6869
6870
6871 /*
6872 * DSRA -
6873 *
6874 * 3 2 1
6875 * 10987654321098765432109876543210
6876 * 10o000 1100xxx0100
6877 * rt -----
6878 * rs -----
6879 * shift -----
6880 */
6881 static std::string DSRA(uint64 instruction, Dis_info *info)
6882 {
6883 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6884 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6885 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6886
6887 std::string rt = GPR(copy(rt_value));
6888 std::string rs = GPR(copy(rs_value));
6889 std::string shift = IMMEDIATE(copy(shift_value));
6890
6891 return img_format("DSRA %s, %s, %s", rt, rs, shift);
6892 }
6893
6894
6895 /*
6896 * DSRA[32] -
6897 *
6898 * 3 2 1
6899 * 10987654321098765432109876543210
6900 * 10o000 1100xxx0100
6901 * rt -----
6902 * rs -----
6903 * shift -----
6904 */
6905 static std::string DSRA32(uint64 instruction, Dis_info *info)
6906 {
6907 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6908 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6909 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6910
6911 std::string rt = GPR(copy(rt_value));
6912 std::string rs = GPR(copy(rs_value));
6913 std::string shift = IMMEDIATE(copy(shift_value));
6914
6915 return img_format("DSRA32 %s, %s, %s", rt, rs, shift);
6916 }
6917
6918
6919 /*
6920 *
6921 *
6922 * 3 2 1
6923 * 10987654321098765432109876543210
6924 * 001000 x1110000101
6925 * rt -----
6926 * rs -----
6927 * rd -----
6928 */
6929 static std::string DSRAV(uint64 instruction, Dis_info *info)
6930 {
6931 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6932 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6933 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6934
6935 std::string rd = GPR(copy(rd_value));
6936 std::string rs = GPR(copy(rs_value));
6937 std::string rt = GPR(copy(rt_value));
6938
6939 return img_format("DSRAV %s, %s, %s", rd, rs, rt);
6940 }
6941
6942
6943 /*
6944 * DSRL -
6945 *
6946 * 3 2 1
6947 * 10987654321098765432109876543210
6948 * 10o000 1100xxx0100
6949 * rt -----
6950 * rs -----
6951 * shift -----
6952 */
6953 static std::string DSRL(uint64 instruction, Dis_info *info)
6954 {
6955 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6956 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6957 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6958
6959 std::string rt = GPR(copy(rt_value));
6960 std::string rs = GPR(copy(rs_value));
6961 std::string shift = IMMEDIATE(copy(shift_value));
6962
6963 return img_format("DSRL %s, %s, %s", rt, rs, shift);
6964 }
6965
6966
6967 /*
6968 * DSRL[32] -
6969 *
6970 * 3 2 1
6971 * 10987654321098765432109876543210
6972 * 10o000 1100xxx0010
6973 * rt -----
6974 * rs -----
6975 * shift -----
6976 */
6977 static std::string DSRL32(uint64 instruction, Dis_info *info)
6978 {
6979 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6980 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6981 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6982
6983 std::string rt = GPR(copy(rt_value));
6984 std::string rs = GPR(copy(rs_value));
6985 std::string shift = IMMEDIATE(copy(shift_value));
6986
6987 return img_format("DSRL32 %s, %s, %s", rt, rs, shift);
6988 }
6989
6990
6991 /*
6992 *
6993 *
6994 * 3 2 1
6995 * 10987654321098765432109876543210
6996 * 001000 x1110000101
6997 * rt -----
6998 * rs -----
6999 * rd -----
7000 */
7001 static std::string DSRLV(uint64 instruction, Dis_info *info)
7002 {
7003 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7004 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7005 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7006
7007 std::string rd = GPR(copy(rd_value));
7008 std::string rs = GPR(copy(rs_value));
7009 std::string rt = GPR(copy(rt_value));
7010
7011 return img_format("DSRLV %s, %s, %s", rd, rs, rt);
7012 }
7013
7014
7015 /*
7016 *
7017 *
7018 * 3 2 1
7019 * 10987654321098765432109876543210
7020 * 001000 x1110000101
7021 * rt -----
7022 * rs -----
7023 * rd -----
7024 */
7025 static std::string DSUB(uint64 instruction, Dis_info *info)
7026 {
7027 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7028 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7029 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7030
7031 std::string rd = GPR(copy(rd_value));
7032 std::string rs = GPR(copy(rs_value));
7033 std::string rt = GPR(copy(rt_value));
7034
7035 return img_format("DSUB %s, %s, %s", rd, rs, rt);
7036 }
7037
7038
7039 /*
7040 *
7041 *
7042 * 3 2 1
7043 * 10987654321098765432109876543210
7044 * 001000 x1110000101
7045 * rt -----
7046 * rs -----
7047 * rd -----
7048 */
7049 static std::string DSUBU(uint64 instruction, Dis_info *info)
7050 {
7051 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7052 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7053 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7054
7055 std::string rd = GPR(copy(rd_value));
7056 std::string rs = GPR(copy(rs_value));
7057 std::string rt = GPR(copy(rt_value));
7058
7059 return img_format("DSUBU %s, %s, %s", rd, rs, rt);
7060 }
7061
7062
7063 /*
7064 *
7065 *
7066 * 3 2 1
7067 * 10987654321098765432109876543210
7068 * 001000 x1110000101
7069 * rt -----
7070 * rs -----
7071 * rd -----
7072 */
7073 static std::string DVPE(uint64 instruction, Dis_info *info)
7074 {
7075 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7076
7077 std::string rt = GPR(copy(rt_value));
7078
7079 return img_format("DVPE %s", rt);
7080 }
7081
7082
7083 /*
7084 *
7085 *
7086 * 3 2 1
7087 * 10987654321098765432109876543210
7088 * 001000 x1110000101
7089 * rt -----
7090 * rs -----
7091 * rd -----
7092 */
7093 static std::string DVP(uint64 instruction, Dis_info *info)
7094 {
7095 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7096
7097 std::string rt = GPR(copy(rt_value));
7098
7099 return img_format("DVP %s", rt);
7100 }
7101
7102
7103 /*
7104 *
7105 *
7106 * 3 2 1
7107 * 10987654321098765432109876543210
7108 * 001000 x1110000101
7109 * rt -----
7110 * rs -----
7111 * rd -----
7112 */
7113 static std::string EHB(uint64 instruction, Dis_info *info)
7114 {
7115 (void)instruction;
7116
7117 return "EHB ";
7118 }
7119
7120
7121 /*
7122 *
7123 *
7124 * 3 2 1
7125 * 10987654321098765432109876543210
7126 * 001000 x1110000101
7127 * rt -----
7128 * rs -----
7129 * rd -----
7130 */
7131 static std::string EI(uint64 instruction, Dis_info *info)
7132 {
7133 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7134
7135 std::string rt = GPR(copy(rt_value));
7136
7137 return img_format("EI %s", rt);
7138 }
7139
7140
7141 /*
7142 *
7143 *
7144 * 3 2 1
7145 * 10987654321098765432109876543210
7146 * 001000 x1110000101
7147 * rt -----
7148 * rs -----
7149 * rd -----
7150 */
7151 static std::string EMT(uint64 instruction, Dis_info *info)
7152 {
7153 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7154
7155 std::string rt = GPR(copy(rt_value));
7156
7157 return img_format("EMT %s", rt);
7158 }
7159
7160
7161 /*
7162 *
7163 *
7164 * 3 2 1
7165 * 10987654321098765432109876543210
7166 * 001000 x1110000101
7167 * rt -----
7168 * rs -----
7169 * rd -----
7170 */
7171 static std::string ERET(uint64 instruction, Dis_info *info)
7172 {
7173 (void)instruction;
7174
7175 return "ERET ";
7176 }
7177
7178
7179 /*
7180 *
7181 *
7182 * 3 2 1
7183 * 10987654321098765432109876543210
7184 * 001000 x1110000101
7185 * rt -----
7186 * rs -----
7187 * rd -----
7188 */
7189 static std::string ERETNC(uint64 instruction, Dis_info *info)
7190 {
7191 (void)instruction;
7192
7193 return "ERETNC ";
7194 }
7195
7196
7197 /*
7198 *
7199 *
7200 * 3 2 1
7201 * 10987654321098765432109876543210
7202 * 001000 x1110000101
7203 * rt -----
7204 * rs -----
7205 * rd -----
7206 */
7207 static std::string EVP(uint64 instruction, Dis_info *info)
7208 {
7209 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7210
7211 std::string rt = GPR(copy(rt_value));
7212
7213 return img_format("EVP %s", rt);
7214 }
7215
7216
7217 /*
7218 *
7219 *
7220 * 3 2 1
7221 * 10987654321098765432109876543210
7222 * 001000 x1110000101
7223 * rt -----
7224 * rs -----
7225 * rd -----
7226 */
7227 static std::string EVPE(uint64 instruction, Dis_info *info)
7228 {
7229 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7230
7231 std::string rt = GPR(copy(rt_value));
7232
7233 return img_format("EVPE %s", rt);
7234 }
7235
7236
7237 /*
7238 *
7239 *
7240 * 3 2 1
7241 * 10987654321098765432109876543210
7242 * 001000 x1110000101
7243 * rt -----
7244 * rs -----
7245 * rd -----
7246 */
7247 static std::string EXT(uint64 instruction, Dis_info *info)
7248 {
7249 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7250 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7251 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7252 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7253
7254 std::string rt = GPR(copy(rt_value));
7255 std::string rs = GPR(copy(rs_value));
7256 std::string lsb = IMMEDIATE(copy(lsb_value));
7257 std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
7258
7259 return img_format("EXT %s, %s, %s, %s", rt, rs, lsb, msbd);
7260 }
7261
7262
7263 /*
7264 *
7265 *
7266 * 3 2 1
7267 * 10987654321098765432109876543210
7268 * 001000 x1110000101
7269 * rt -----
7270 * rs -----
7271 * rd -----
7272 */
7273 static std::string EXTD(uint64 instruction, Dis_info *info)
7274 {
7275 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7276 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7277 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7278 uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7279
7280 std::string rd = GPR(copy(rd_value));
7281 std::string rs = GPR(copy(rs_value));
7282 std::string rt = GPR(copy(rt_value));
7283 std::string shift = IMMEDIATE(copy(shift_value));
7284
7285 return img_format("EXTD %s, %s, %s, %s", rd, rs, rt, shift);
7286 }
7287
7288
7289 /*
7290 *
7291 *
7292 * 3 2 1
7293 * 10987654321098765432109876543210
7294 * 001000 x1110000101
7295 * rt -----
7296 * rs -----
7297 * rd -----
7298 */
7299 static std::string EXTD32(uint64 instruction, Dis_info *info)
7300 {
7301 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7302 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7303 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7304 uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7305
7306 std::string rd = GPR(copy(rd_value));
7307 std::string rs = GPR(copy(rs_value));
7308 std::string rt = GPR(copy(rt_value));
7309 std::string shift = IMMEDIATE(copy(shift_value));
7310
7311 return img_format("EXTD32 %s, %s, %s, %s", rd, rs, rt, shift);
7312 }
7313
7314
7315 /*
7316 *
7317 *
7318 * 3 2 1
7319 * 10987654321098765432109876543210
7320 * 001000 x1110000101
7321 * rt -----
7322 * rs -----
7323 * rd -----
7324 */
7325 static std::string EXTPDP(uint64 instruction, Dis_info *info)
7326 {
7327 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7328 uint64 size_value = extract_size_20_19_18_17_16(instruction);
7329 uint64 ac_value = extract_ac_15_14(instruction);
7330
7331 std::string rt = GPR(copy(rt_value));
7332 std::string ac = AC(copy(ac_value));
7333 std::string size = IMMEDIATE(copy(size_value));
7334
7335 return img_format("EXTPDP %s, %s, %s", rt, ac, size);
7336 }
7337
7338
7339 /*
7340 *
7341 *
7342 * 3 2 1
7343 * 10987654321098765432109876543210
7344 * 001000 x1110000101
7345 * rt -----
7346 * rs -----
7347 * rd -----
7348 */
7349 static std::string EXTPDPV(uint64 instruction, Dis_info *info)
7350 {
7351 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7352 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7353 uint64 ac_value = extract_ac_15_14(instruction);
7354
7355 std::string rt = GPR(copy(rt_value));
7356 std::string ac = AC(copy(ac_value));
7357 std::string rs = GPR(copy(rs_value));
7358
7359 return img_format("EXTPDPV %s, %s, %s", rt, ac, rs);
7360 }
7361
7362
7363 /*
7364 *
7365 *
7366 * 3 2 1
7367 * 10987654321098765432109876543210
7368 * 001000 x1110000101
7369 * rt -----
7370 * rs -----
7371 * rd -----
7372 */
7373 static std::string EXTP(uint64 instruction, Dis_info *info)
7374 {
7375 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7376 uint64 size_value = extract_size_20_19_18_17_16(instruction);
7377 uint64 ac_value = extract_ac_15_14(instruction);
7378
7379 std::string rt = GPR(copy(rt_value));
7380 std::string ac = AC(copy(ac_value));
7381 std::string size = IMMEDIATE(copy(size_value));
7382
7383 return img_format("EXTP %s, %s, %s", rt, ac, size);
7384 }
7385
7386
7387 /*
7388 *
7389 *
7390 * 3 2 1
7391 * 10987654321098765432109876543210
7392 * 001000 x1110000101
7393 * rt -----
7394 * rs -----
7395 * rd -----
7396 */
7397 static std::string EXTPV(uint64 instruction, Dis_info *info)
7398 {
7399 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7400 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7401 uint64 ac_value = extract_ac_15_14(instruction);
7402
7403 std::string rt = GPR(copy(rt_value));
7404 std::string ac = AC(copy(ac_value));
7405 std::string rs = GPR(copy(rs_value));
7406
7407 return img_format("EXTPV %s, %s, %s", rt, ac, rs);
7408 }
7409
7410
7411 /*
7412 * [DSP] EXTR_RS.W rt, ac, shift - Extract word value from accumulator to GPR
7413 * with right shift
7414 *
7415 * 3 2 1
7416 * 10987654321098765432109876543210
7417 * 001000 10111001111111
7418 * rt -----
7419 * shift -----
7420 * ac --
7421 */
7422 static std::string EXTR_RS_W(uint64 instruction, Dis_info *info)
7423 {
7424 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7425 uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7426 uint64 ac_value = extract_ac_15_14(instruction);
7427
7428 std::string rt = GPR(copy(rt_value));
7429 std::string ac = AC(copy(ac_value));
7430 std::string shift = IMMEDIATE(copy(shift_value));
7431
7432 return img_format("EXTR_RS.W %s, %s, %s", rt, ac, shift);
7433 }
7434
7435
7436 /*
7437 * [DSP] EXTR_R.W rt, ac, shift - Extract word value from accumulator to GPR
7438 * with right shift
7439 *
7440 * 3 2 1
7441 * 10987654321098765432109876543210
7442 * 001000 01111001111111
7443 * rt -----
7444 * shift -----
7445 * ac --
7446 */
7447 static std::string EXTR_R_W(uint64 instruction, Dis_info *info)
7448 {
7449 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7450 uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7451 uint64 ac_value = extract_ac_15_14(instruction);
7452
7453 std::string rt = GPR(copy(rt_value));
7454 std::string ac = AC(copy(ac_value));
7455 std::string shift = IMMEDIATE(copy(shift_value));
7456
7457 return img_format("EXTR_R.W %s, %s, %s", rt, ac, shift);
7458 }
7459
7460
7461 /*
7462 * [DSP] EXTR_S.H rt, ac, shift - Extract halfword value from accumulator
7463 * to GPR with right shift and saturate
7464 *
7465 * 3 2 1
7466 * 10987654321098765432109876543210
7467 * 001000 11111001111111
7468 * rt -----
7469 * shift -----
7470 * ac --
7471 */
7472 static std::string EXTR_S_H(uint64 instruction, Dis_info *info)
7473 {
7474 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7475 uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7476 uint64 ac_value = extract_ac_15_14(instruction);
7477
7478 std::string rt = GPR(copy(rt_value));
7479 std::string ac = AC(copy(ac_value));
7480 std::string shift = IMMEDIATE(copy(shift_value));
7481
7482 return img_format("EXTR_S.H %s, %s, %s", rt, ac, shift);
7483 }
7484
7485
7486 /*
7487 * [DSP] EXTR.W rt, ac, shift - Extract word value from accumulator to GPR
7488 * with right shift
7489 *
7490 * 3 2 1
7491 * 10987654321098765432109876543210
7492 * 001000 00111001111111
7493 * rt -----
7494 * shift -----
7495 * ac --
7496 */
7497 static std::string EXTR_W(uint64 instruction, Dis_info *info)
7498 {
7499 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7500 uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7501 uint64 ac_value = extract_ac_15_14(instruction);
7502
7503 std::string rt = GPR(copy(rt_value));
7504 std::string ac = AC(copy(ac_value));
7505 std::string shift = IMMEDIATE(copy(shift_value));
7506
7507 return img_format("EXTR.W %s, %s, %s", rt, ac, shift);
7508 }
7509
7510
7511 /*
7512 * [DSP] EXTRV_RS.W rt, ac, rs - Extract word value with variable
7513 * right shift from accumulator to GPR
7514 *
7515 * 3 2 1
7516 * 10987654321098765432109876543210
7517 * 001000 10111010111111
7518 * rt -----
7519 * rs -----
7520 * ac --
7521 */
7522 static std::string EXTRV_RS_W(uint64 instruction, Dis_info *info)
7523 {
7524 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7525 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7526 uint64 ac_value = extract_ac_15_14(instruction);
7527
7528 std::string rt = GPR(copy(rt_value));
7529 std::string ac = AC(copy(ac_value));
7530 std::string rs = GPR(copy(rs_value));
7531
7532 return img_format("EXTRV_RS.W %s, %s, %s", rt, ac, rs);
7533 }
7534
7535
7536 /*
7537 * [DSP] EXTRV_R.W rt, ac, rs - Extract word value with variable
7538 * right shift from accumulator to GPR
7539 *
7540 * 3 2 1
7541 * 10987654321098765432109876543210
7542 * 001000 01111010111111
7543 * rt -----
7544 * rs -----
7545 * ac --
7546 */
7547 static std::string EXTRV_R_W(uint64 instruction, Dis_info *info)
7548 {
7549 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7550 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7551 uint64 ac_value = extract_ac_15_14(instruction);
7552
7553 std::string rt = GPR(copy(rt_value));
7554 std::string ac = AC(copy(ac_value));
7555 std::string rs = GPR(copy(rs_value));
7556
7557 return img_format("EXTRV_R.W %s, %s, %s", rt, ac, rs);
7558 }
7559
7560
7561 /*
7562 * [DSP] EXTRV_S.H rt, ac, rs - Extract halfword value variable from
7563 * accumulator to GPR with right shift and saturate
7564 *
7565 * 3 2 1
7566 * 10987654321098765432109876543210
7567 * 001000 11111010111111
7568 * rt -----
7569 * rs -----
7570 * ac --
7571 */
7572 static std::string EXTRV_S_H(uint64 instruction, Dis_info *info)
7573 {
7574 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7575 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7576 uint64 ac_value = extract_ac_15_14(instruction);
7577
7578 std::string rt = GPR(copy(rt_value));
7579 std::string ac = AC(copy(ac_value));
7580 std::string rs = GPR(copy(rs_value));
7581
7582 return img_format("EXTRV_S.H %s, %s, %s", rt, ac, rs);
7583 }
7584
7585
7586 /*
7587 * [DSP] EXTRV.W rt, ac, rs - Extract word value with variable
7588 * right shift from accumulator to GPR
7589 *
7590 * 3 2 1
7591 * 10987654321098765432109876543210
7592 * 001000 00111010111111
7593 * rt -----
7594 * rs -----
7595 * ac --
7596 */
7597 static std::string EXTRV_W(uint64 instruction, Dis_info *info)
7598 {
7599 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7600 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7601 uint64 ac_value = extract_ac_15_14(instruction);
7602
7603 std::string rt = GPR(copy(rt_value));
7604 std::string ac = AC(copy(ac_value));
7605 std::string rs = GPR(copy(rs_value));
7606
7607 return img_format("EXTRV.W %s, %s, %s", rt, ac, rs);
7608 }
7609
7610
7611 /*
7612 * EXTW - Extract Word
7613 *
7614 * 3 2 1
7615 * 10987654321098765432109876543210
7616 * 001000 011111
7617 * rt -----
7618 * rs -----
7619 * rd -----
7620 * shift -----
7621 */
7622 static std::string EXTW(uint64 instruction, Dis_info *info)
7623 {
7624 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7625 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7626 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7627 uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7628
7629 std::string rd = GPR(copy(rd_value));
7630 std::string rs = GPR(copy(rs_value));
7631 std::string rt = GPR(copy(rt_value));
7632 std::string shift = IMMEDIATE(copy(shift_value));
7633
7634 return img_format("EXTW %s, %s, %s, %s", rd, rs, rt, shift);
7635 }
7636
7637
7638 /*
7639 *
7640 *
7641 * 3 2 1
7642 * 10987654321098765432109876543210
7643 * 001000 x1110000101
7644 * rt -----
7645 * rs -----
7646 * rd -----
7647 */
7648 static std::string FLOOR_L_D(uint64 instruction, Dis_info *info)
7649 {
7650 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7651 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7652
7653 std::string ft = FPR(copy(ft_value));
7654 std::string fs = FPR(copy(fs_value));
7655
7656 return img_format("FLOOR.L.D %s, %s", ft, fs);
7657 }
7658
7659
7660 /*
7661 *
7662 *
7663 * 3 2 1
7664 * 10987654321098765432109876543210
7665 * 001000 x1110000101
7666 * rt -----
7667 * rs -----
7668 * rd -----
7669 */
7670 static std::string FLOOR_L_S(uint64 instruction, Dis_info *info)
7671 {
7672 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7673 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7674
7675 std::string ft = FPR(copy(ft_value));
7676 std::string fs = FPR(copy(fs_value));
7677
7678 return img_format("FLOOR.L.S %s, %s", ft, fs);
7679 }
7680
7681
7682 /*
7683 *
7684 *
7685 * 3 2 1
7686 * 10987654321098765432109876543210
7687 * 001000 x1110000101
7688 * rt -----
7689 * rs -----
7690 * rd -----
7691 */
7692 static std::string FLOOR_W_D(uint64 instruction, Dis_info *info)
7693 {
7694 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7695 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7696
7697 std::string ft = FPR(copy(ft_value));
7698 std::string fs = FPR(copy(fs_value));
7699
7700 return img_format("FLOOR.W.D %s, %s", ft, fs);
7701 }
7702
7703
7704 /*
7705 *
7706 *
7707 * 3 2 1
7708 * 10987654321098765432109876543210
7709 * 001000 x1110000101
7710 * rt -----
7711 * rs -----
7712 * rd -----
7713 */
7714 static std::string FLOOR_W_S(uint64 instruction, Dis_info *info)
7715 {
7716 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7717 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7718
7719 std::string ft = FPR(copy(ft_value));
7720 std::string fs = FPR(copy(fs_value));
7721
7722 return img_format("FLOOR.W.S %s, %s", ft, fs);
7723 }
7724
7725
7726 /*
7727 *
7728 *
7729 * 3 2 1
7730 * 10987654321098765432109876543210
7731 * 001000 x1110000101
7732 * rt -----
7733 * rs -----
7734 * rd -----
7735 */
7736 static std::string FORK(uint64 instruction, Dis_info *info)
7737 {
7738 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7739 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7740 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7741
7742 std::string rd = GPR(copy(rd_value));
7743 std::string rs = GPR(copy(rs_value));
7744 std::string rt = GPR(copy(rt_value));
7745
7746 return img_format("FORK %s, %s, %s", rd, rs, rt);
7747 }
7748
7749
7750 /*
7751 *
7752 *
7753 * 3 2 1
7754 * 10987654321098765432109876543210
7755 * 001000 x1110000101
7756 * rt -----
7757 * rs -----
7758 * rd -----
7759 */
7760 static std::string HYPCALL(uint64 instruction, Dis_info *info)
7761 {
7762 uint64 code_value = extract_code_17_to_0(instruction);
7763
7764 std::string code = IMMEDIATE(copy(code_value));
7765
7766 return img_format("HYPCALL %s", code);
7767 }
7768
7769
7770 /*
7771 *
7772 *
7773 * 3 2 1
7774 * 10987654321098765432109876543210
7775 * 001000 x1110000101
7776 * rt -----
7777 * rs -----
7778 * rd -----
7779 */
7780 static std::string HYPCALL_16_(uint64 instruction, Dis_info *info)
7781 {
7782 uint64 code_value = extract_code_1_0(instruction);
7783
7784 std::string code = IMMEDIATE(copy(code_value));
7785
7786 return img_format("HYPCALL %s", code);
7787 }
7788
7789
7790 /*
7791 *
7792 *
7793 * 3 2 1
7794 * 10987654321098765432109876543210
7795 * 001000 x1110000101
7796 * rt -----
7797 * rs -----
7798 * rd -----
7799 */
7800 static std::string INS(uint64 instruction, Dis_info *info)
7801 {
7802 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7803 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7804 uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7805 uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7806
7807 std::string rt = GPR(copy(rt_value));
7808 std::string rs = GPR(copy(rs_value));
7809 std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
7810 std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
7811 /* !!!!!!!!!! - no conversion function */
7812
7813 return img_format("INS %s, %s, %s, %s", rt, rs, pos, size);
7814 /* hand edited */
7815 }
7816
7817
7818 /*
7819 * [DSP] INSV rt, rs - Insert bit field variable
7820 *
7821 * 3 2 1
7822 * 10987654321098765432109876543210
7823 * 001000 0100000100111111
7824 * rt -----
7825 * rs -----
7826 */
7827 static std::string INSV(uint64 instruction, Dis_info *info)
7828 {
7829 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7830 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7831
7832 std::string rt = GPR(copy(rt_value));
7833 std::string rs = GPR(copy(rs_value));
7834
7835 return img_format("INSV %s, %s", rt, rs);
7836 }
7837
7838
7839 /*
7840 *
7841 *
7842 * 3 2 1
7843 * 10987654321098765432109876543210
7844 * 001000 x1110000101
7845 * rt -----
7846 * rs -----
7847 * rd -----
7848 */
7849 static std::string IRET(uint64 instruction, Dis_info *info)
7850 {
7851 (void)instruction;
7852
7853 return "IRET ";
7854 }
7855
7856
7857 /*
7858 *
7859 *
7860 * 3 2 1
7861 * 10987654321098765432109876543210
7862 * 001000 x1110000101
7863 * rt -----
7864 * rs -----
7865 * rd -----
7866 */
7867 static std::string JALRC_16_(uint64 instruction, Dis_info *info)
7868 {
7869 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7870
7871 std::string rt = GPR(copy(rt_value));
7872
7873 return img_format("JALRC $%d, %s", 31, rt);
7874 }
7875
7876
7877 /*
7878 *
7879 *
7880 * 3 2 1
7881 * 10987654321098765432109876543210
7882 * 001000 x1110000101
7883 * rt -----
7884 * rs -----
7885 * rd -----
7886 */
7887 static std::string JALRC_32_(uint64 instruction, Dis_info *info)
7888 {
7889 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7890 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7891
7892 std::string rt = GPR(copy(rt_value));
7893 std::string rs = GPR(copy(rs_value));
7894
7895 return img_format("JALRC %s, %s", rt, rs);
7896 }
7897
7898
7899 /*
7900 *
7901 *
7902 * 3 2 1
7903 * 10987654321098765432109876543210
7904 * 001000 x1110000101
7905 * rt -----
7906 * rs -----
7907 * rd -----
7908 */
7909 static std::string JALRC_HB(uint64 instruction, Dis_info *info)
7910 {
7911 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7912 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7913
7914 std::string rt = GPR(copy(rt_value));
7915 std::string rs = GPR(copy(rs_value));
7916
7917 return img_format("JALRC.HB %s, %s", rt, rs);
7918 }
7919
7920
7921 /*
7922 *
7923 *
7924 * 3 2 1
7925 * 10987654321098765432109876543210
7926 * 001000 x1110000101
7927 * rt -----
7928 * rs -----
7929 * rd -----
7930 */
7931 static std::string JRC(uint64 instruction, Dis_info *info)
7932 {
7933 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7934
7935 std::string rt = GPR(copy(rt_value));
7936
7937 return img_format("JRC %s", rt);
7938 }
7939
7940
7941 /*
7942 *
7943 *
7944 * 3 2 1
7945 * 10987654321098765432109876543210
7946 * 001000 x1110000101
7947 * rt -----
7948 * rs -----
7949 * rd -----
7950 */
7951 static std::string LB_16_(uint64 instruction, Dis_info *info)
7952 {
7953 uint64 rt3_value = extract_rt3_9_8_7(instruction);
7954 uint64 rs3_value = extract_rs3_6_5_4(instruction);
7955 uint64 u_value = extract_u_1_0(instruction);
7956
7957 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7958 std::string u = IMMEDIATE(copy(u_value));
7959 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
7960
7961 return img_format("LB %s, %s(%s)", rt3, u, rs3);
7962 }
7963
7964
7965 /*
7966 *
7967 *
7968 * 3 2 1
7969 * 10987654321098765432109876543210
7970 * 001000 x1110000101
7971 * rt -----
7972 * rs -----
7973 * rd -----
7974 */
7975 static std::string LB_GP_(uint64 instruction, Dis_info *info)
7976 {
7977 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7978 uint64 u_value = extract_u_17_to_0(instruction);
7979
7980 std::string rt = GPR(copy(rt_value));
7981 std::string u = IMMEDIATE(copy(u_value));
7982
7983 return img_format("LB %s, %s($%d)", rt, u, 28);
7984 }
7985
7986
7987 /*
7988 *
7989 *
7990 * 3 2 1
7991 * 10987654321098765432109876543210
7992 * 001000 x1110000101
7993 * rt -----
7994 * rs -----
7995 * rd -----
7996 */
7997 static std::string LB_S9_(uint64 instruction, Dis_info *info)
7998 {
7999 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8000 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8001 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8002
8003 std::string rt = GPR(copy(rt_value));
8004 std::string s = IMMEDIATE(copy(s_value));
8005 std::string rs = GPR(copy(rs_value));
8006
8007 return img_format("LB %s, %s(%s)", rt, s, rs);
8008 }
8009
8010
8011 /*
8012 *
8013 *
8014 * 3 2 1
8015 * 10987654321098765432109876543210
8016 * 001000 x1110000101
8017 * rt -----
8018 * rs -----
8019 * rd -----
8020 */
8021 static std::string LB_U12_(uint64 instruction, Dis_info *info)
8022 {
8023 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8024 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8025 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8026
8027 std::string rt = GPR(copy(rt_value));
8028 std::string u = IMMEDIATE(copy(u_value));
8029 std::string rs = GPR(copy(rs_value));
8030
8031 return img_format("LB %s, %s(%s)", rt, u, rs);
8032 }
8033
8034
8035 /*
8036 *
8037 *
8038 * 3 2 1
8039 * 10987654321098765432109876543210
8040 * 001000 x1110000101
8041 * rt -----
8042 * rs -----
8043 * rd -----
8044 */
8045 static std::string LBE(uint64 instruction, Dis_info *info)
8046 {
8047 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8048 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8049 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8050
8051 std::string rt = GPR(copy(rt_value));
8052 std::string s = IMMEDIATE(copy(s_value));
8053 std::string rs = GPR(copy(rs_value));
8054
8055 return img_format("LBE %s, %s(%s)", rt, s, rs);
8056 }
8057
8058
8059 /*
8060 *
8061 *
8062 * 3 2 1
8063 * 10987654321098765432109876543210
8064 * 001000 x1110000101
8065 * rt -----
8066 * rs -----
8067 * rd -----
8068 */
8069 static std::string LBU_16_(uint64 instruction, Dis_info *info)
8070 {
8071 uint64 rt3_value = extract_rt3_9_8_7(instruction);
8072 uint64 rs3_value = extract_rs3_6_5_4(instruction);
8073 uint64 u_value = extract_u_1_0(instruction);
8074
8075 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8076 std::string u = IMMEDIATE(copy(u_value));
8077 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8078
8079 return img_format("LBU %s, %s(%s)", rt3, u, rs3);
8080 }
8081
8082
8083 /*
8084 *
8085 *
8086 * 3 2 1
8087 * 10987654321098765432109876543210
8088 * 001000 x1110000101
8089 * rt -----
8090 * rs -----
8091 * rd -----
8092 */
8093 static std::string LBU_GP_(uint64 instruction, Dis_info *info)
8094 {
8095 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8096 uint64 u_value = extract_u_17_to_0(instruction);
8097
8098 std::string rt = GPR(copy(rt_value));
8099 std::string u = IMMEDIATE(copy(u_value));
8100
8101 return img_format("LBU %s, %s($%d)", rt, u, 28);
8102 }
8103
8104
8105 /*
8106 *
8107 *
8108 * 3 2 1
8109 * 10987654321098765432109876543210
8110 * 001000 x1110000101
8111 * rt -----
8112 * rs -----
8113 * rd -----
8114 */
8115 static std::string LBU_S9_(uint64 instruction, Dis_info *info)
8116 {
8117 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8118 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8119 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8120
8121 std::string rt = GPR(copy(rt_value));
8122 std::string s = IMMEDIATE(copy(s_value));
8123 std::string rs = GPR(copy(rs_value));
8124
8125 return img_format("LBU %s, %s(%s)", rt, s, rs);
8126 }
8127
8128
8129 /*
8130 *
8131 *
8132 * 3 2 1
8133 * 10987654321098765432109876543210
8134 * 001000 x1110000101
8135 * rt -----
8136 * rs -----
8137 * rd -----
8138 */
8139 static std::string LBU_U12_(uint64 instruction, Dis_info *info)
8140 {
8141 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8142 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8143 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8144
8145 std::string rt = GPR(copy(rt_value));
8146 std::string u = IMMEDIATE(copy(u_value));
8147 std::string rs = GPR(copy(rs_value));
8148
8149 return img_format("LBU %s, %s(%s)", rt, u, rs);
8150 }
8151
8152
8153 /*
8154 *
8155 *
8156 * 3 2 1
8157 * 10987654321098765432109876543210
8158 * 001000 x1110000101
8159 * rt -----
8160 * rs -----
8161 * rd -----
8162 */
8163 static std::string LBUE(uint64 instruction, Dis_info *info)
8164 {
8165 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8166 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8167 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8168
8169 std::string rt = GPR(copy(rt_value));
8170 std::string s = IMMEDIATE(copy(s_value));
8171 std::string rs = GPR(copy(rs_value));
8172
8173 return img_format("LBUE %s, %s(%s)", rt, s, rs);
8174 }
8175
8176
8177 /*
8178 *
8179 *
8180 * 3 2 1
8181 * 10987654321098765432109876543210
8182 * 001000 x1110000101
8183 * rt -----
8184 * rs -----
8185 * rd -----
8186 */
8187 static std::string LBUX(uint64 instruction, Dis_info *info)
8188 {
8189 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8190 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8191 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8192
8193 std::string rd = GPR(copy(rd_value));
8194 std::string rs = GPR(copy(rs_value));
8195 std::string rt = GPR(copy(rt_value));
8196
8197 return img_format("LBUX %s, %s(%s)", rd, rs, rt);
8198 }
8199
8200
8201 /*
8202 *
8203 *
8204 * 3 2 1
8205 * 10987654321098765432109876543210
8206 * 001000 x1110000101
8207 * rt -----
8208 * rs -----
8209 * rd -----
8210 */
8211 static std::string LBX(uint64 instruction, Dis_info *info)
8212 {
8213 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8214 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8215 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8216
8217 std::string rd = GPR(copy(rd_value));
8218 std::string rs = GPR(copy(rs_value));
8219 std::string rt = GPR(copy(rt_value));
8220
8221 return img_format("LBX %s, %s(%s)", rd, rs, rt);
8222 }
8223
8224
8225 /*
8226 *
8227 *
8228 * 3 2 1
8229 * 10987654321098765432109876543210
8230 * 001000 x1110000101
8231 * rt -----
8232 * rs -----
8233 * rd -----
8234 */
8235 static std::string LD_GP_(uint64 instruction, Dis_info *info)
8236 {
8237 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8238 uint64 u_value = extract_u_20_to_3__s3(instruction);
8239
8240 std::string rt = GPR(copy(rt_value));
8241 std::string u = IMMEDIATE(copy(u_value));
8242
8243 return img_format("LD %s, %s($%d)", rt, u, 28);
8244 }
8245
8246
8247 /*
8248 *
8249 *
8250 * 3 2 1
8251 * 10987654321098765432109876543210
8252 * 001000 x1110000101
8253 * rt -----
8254 * rs -----
8255 * rd -----
8256 */
8257 static std::string LD_S9_(uint64 instruction, Dis_info *info)
8258 {
8259 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8260 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8261 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8262
8263 std::string rt = GPR(copy(rt_value));
8264 std::string s = IMMEDIATE(copy(s_value));
8265 std::string rs = GPR(copy(rs_value));
8266
8267 return img_format("LD %s, %s(%s)", rt, s, rs);
8268 }
8269
8270
8271 /*
8272 *
8273 *
8274 * 3 2 1
8275 * 10987654321098765432109876543210
8276 * 001000 x1110000101
8277 * rt -----
8278 * rs -----
8279 * rd -----
8280 */
8281 static std::string LD_U12_(uint64 instruction, Dis_info *info)
8282 {
8283 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8284 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8285 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8286
8287 std::string rt = GPR(copy(rt_value));
8288 std::string u = IMMEDIATE(copy(u_value));
8289 std::string rs = GPR(copy(rs_value));
8290
8291 return img_format("LD %s, %s(%s)", rt, u, rs);
8292 }
8293
8294
8295 /*
8296 *
8297 *
8298 * 3 2 1
8299 * 10987654321098765432109876543210
8300 * 001000 x1110000101
8301 * rt -----
8302 * rs -----
8303 * rd -----
8304 */
8305 static std::string LDC1_GP_(uint64 instruction, Dis_info *info)
8306 {
8307 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8308 uint64 u_value = extract_u_17_to_2__s2(instruction);
8309
8310 std::string ft = FPR(copy(ft_value));
8311 std::string u = IMMEDIATE(copy(u_value));
8312
8313 return img_format("LDC1 %s, %s($%d)", ft, u, 28);
8314 }
8315
8316
8317 /*
8318 *
8319 *
8320 * 3 2 1
8321 * 10987654321098765432109876543210
8322 * 001000 x1110000101
8323 * rt -----
8324 * rs -----
8325 * rd -----
8326 */
8327 static std::string LDC1_S9_(uint64 instruction, Dis_info *info)
8328 {
8329 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8330 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8331 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8332
8333 std::string ft = FPR(copy(ft_value));
8334 std::string s = IMMEDIATE(copy(s_value));
8335 std::string rs = GPR(copy(rs_value));
8336
8337 return img_format("LDC1 %s, %s(%s)", ft, s, rs);
8338 }
8339
8340
8341 /*
8342 *
8343 *
8344 * 3 2 1
8345 * 10987654321098765432109876543210
8346 * 001000 x1110000101
8347 * rt -----
8348 * rs -----
8349 * rd -----
8350 */
8351 static std::string LDC1_U12_(uint64 instruction, Dis_info *info)
8352 {
8353 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8354 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8355 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8356
8357 std::string ft = FPR(copy(ft_value));
8358 std::string u = IMMEDIATE(copy(u_value));
8359 std::string rs = GPR(copy(rs_value));
8360
8361 return img_format("LDC1 %s, %s(%s)", ft, u, rs);
8362 }
8363
8364
8365 /*
8366 *
8367 *
8368 * 3 2 1
8369 * 10987654321098765432109876543210
8370 * 001000 x1110000101
8371 * rt -----
8372 * rs -----
8373 * rd -----
8374 */
8375 static std::string LDC1XS(uint64 instruction, Dis_info *info)
8376 {
8377 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8378 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8379 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8380
8381 std::string ft = FPR(copy(ft_value));
8382 std::string rs = GPR(copy(rs_value));
8383 std::string rt = GPR(copy(rt_value));
8384
8385 return img_format("LDC1XS %s, %s(%s)", ft, rs, rt);
8386 }
8387
8388
8389 /*
8390 *
8391 *
8392 * 3 2 1
8393 * 10987654321098765432109876543210
8394 * 001000 x1110000101
8395 * rt -----
8396 * rs -----
8397 * rd -----
8398 */
8399 static std::string LDC1X(uint64 instruction, Dis_info *info)
8400 {
8401 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8402 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8403 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8404
8405 std::string ft = FPR(copy(ft_value));
8406 std::string rs = GPR(copy(rs_value));
8407 std::string rt = GPR(copy(rt_value));
8408
8409 return img_format("LDC1X %s, %s(%s)", ft, rs, rt);
8410 }
8411
8412
8413 /*
8414 *
8415 *
8416 * 3 2 1
8417 * 10987654321098765432109876543210
8418 * 001000 x1110000101
8419 * rt -----
8420 * rs -----
8421 * rd -----
8422 */
8423 static std::string LDC2(uint64 instruction, Dis_info *info)
8424 {
8425 uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
8426 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8427 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8428
8429 std::string ct = CPR(copy(ct_value));
8430 std::string s = IMMEDIATE(copy(s_value));
8431 std::string rs = GPR(copy(rs_value));
8432
8433 return img_format("LDC2 %s, %s(%s)", ct, s, rs);
8434 }
8435
8436
8437 /*
8438 *
8439 *
8440 * 3 2 1
8441 * 10987654321098765432109876543210
8442 * 001000 x1110000101
8443 * rt -----
8444 * rs -----
8445 * rd -----
8446 */
8447 static std::string LDM(uint64 instruction, Dis_info *info)
8448 {
8449 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8450 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8451 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8452 uint64 count3_value = extract_count3_14_13_12(instruction);
8453
8454 std::string rt = GPR(copy(rt_value));
8455 std::string s = IMMEDIATE(copy(s_value));
8456 std::string rs = GPR(copy(rs_value));
8457 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
8458
8459 return img_format("LDM %s, %s(%s), %s", rt, s, rs, count3);
8460 }
8461
8462
8463 /*
8464 *
8465 *
8466 * 3 2 1
8467 * 10987654321098765432109876543210
8468 * 001000 x1110000101
8469 * rt -----
8470 * rs -----
8471 * rd -----
8472 */
8473 static std::string LDPC_48_(uint64 instruction, Dis_info *info)
8474 {
8475 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8476 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8477
8478 std::string rt = GPR(copy(rt_value));
8479 std::string s = ADDRESS(encode_s_from_address(s_value), 6, info);
8480
8481 return img_format("LDPC %s, %s", rt, s);
8482 }
8483
8484
8485 /*
8486 *
8487 *
8488 * 3 2 1
8489 * 10987654321098765432109876543210
8490 * 001000 x1110000101
8491 * rt -----
8492 * rs -----
8493 * rd -----
8494 */
8495 static std::string LDX(uint64 instruction, Dis_info *info)
8496 {
8497 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8498 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8499 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8500
8501 std::string rd = GPR(copy(rd_value));
8502 std::string rs = GPR(copy(rs_value));
8503 std::string rt = GPR(copy(rt_value));
8504
8505 return img_format("LDX %s, %s(%s)", rd, rs, rt);
8506 }
8507
8508
8509 /*
8510 *
8511 *
8512 * 3 2 1
8513 * 10987654321098765432109876543210
8514 * 001000 x1110000101
8515 * rt -----
8516 * rs -----
8517 * rd -----
8518 */
8519 static std::string LDXS(uint64 instruction, Dis_info *info)
8520 {
8521 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8522 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8523 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8524
8525 std::string rd = GPR(copy(rd_value));
8526 std::string rs = GPR(copy(rs_value));
8527 std::string rt = GPR(copy(rt_value));
8528
8529 return img_format("LDXS %s, %s(%s)", rd, rs, rt);
8530 }
8531
8532
8533 /*
8534 *
8535 *
8536 * 3 2 1
8537 * 10987654321098765432109876543210
8538 * 001000 x1110000101
8539 * rt -----
8540 * rs -----
8541 * rd -----
8542 */
8543 static std::string LH_16_(uint64 instruction, Dis_info *info)
8544 {
8545 uint64 rt3_value = extract_rt3_9_8_7(instruction);
8546 uint64 rs3_value = extract_rs3_6_5_4(instruction);
8547 uint64 u_value = extract_u_2_1__s1(instruction);
8548
8549 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8550 std::string u = IMMEDIATE(copy(u_value));
8551 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8552
8553 return img_format("LH %s, %s(%s)", rt3, u, rs3);
8554 }
8555
8556
8557 /*
8558 *
8559 *
8560 * 3 2 1
8561 * 10987654321098765432109876543210
8562 * 001000 x1110000101
8563 * rt -----
8564 * rs -----
8565 * rd -----
8566 */
8567 static std::string LH_GP_(uint64 instruction, Dis_info *info)
8568 {
8569 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8570 uint64 u_value = extract_u_17_to_1__s1(instruction);
8571
8572 std::string rt = GPR(copy(rt_value));
8573 std::string u = IMMEDIATE(copy(u_value));
8574
8575 return img_format("LH %s, %s($%d)", rt, u, 28);
8576 }
8577
8578
8579 /*
8580 *
8581 *
8582 * 3 2 1
8583 * 10987654321098765432109876543210
8584 * 001000 x1110000101
8585 * rt -----
8586 * rs -----
8587 * rd -----
8588 */
8589 static std::string LH_S9_(uint64 instruction, Dis_info *info)
8590 {
8591 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8592 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8593 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8594
8595 std::string rt = GPR(copy(rt_value));
8596 std::string s = IMMEDIATE(copy(s_value));
8597 std::string rs = GPR(copy(rs_value));
8598
8599 return img_format("LH %s, %s(%s)", rt, s, rs);
8600 }
8601
8602
8603 /*
8604 *
8605 *
8606 * 3 2 1
8607 * 10987654321098765432109876543210
8608 * 001000 x1110000101
8609 * rt -----
8610 * rs -----
8611 * rd -----
8612 */
8613 static std::string LH_U12_(uint64 instruction, Dis_info *info)
8614 {
8615 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8616 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8617 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8618
8619 std::string rt = GPR(copy(rt_value));
8620 std::string u = IMMEDIATE(copy(u_value));
8621 std::string rs = GPR(copy(rs_value));
8622
8623 return img_format("LH %s, %s(%s)", rt, u, rs);
8624 }
8625
8626
8627 /*
8628 *
8629 *
8630 * 3 2 1
8631 * 10987654321098765432109876543210
8632 * 001000 x1110000101
8633 * rt -----
8634 * rs -----
8635 * rd -----
8636 */
8637 static std::string LHE(uint64 instruction, Dis_info *info)
8638 {
8639 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8640 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8641 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8642
8643 std::string rt = GPR(copy(rt_value));
8644 std::string s = IMMEDIATE(copy(s_value));
8645 std::string rs = GPR(copy(rs_value));
8646
8647 return img_format("LHE %s, %s(%s)", rt, s, rs);
8648 }
8649
8650
8651 /*
8652 *
8653 *
8654 * 3 2 1
8655 * 10987654321098765432109876543210
8656 * 001000 x1110000101
8657 * rt -----
8658 * rs -----
8659 * rd -----
8660 */
8661 static std::string LHU_16_(uint64 instruction, Dis_info *info)
8662 {
8663 uint64 rt3_value = extract_rt3_9_8_7(instruction);
8664 uint64 rs3_value = extract_rs3_6_5_4(instruction);
8665 uint64 u_value = extract_u_2_1__s1(instruction);
8666
8667 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8668 std::string u = IMMEDIATE(copy(u_value));
8669 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8670
8671 return img_format("LHU %s, %s(%s)", rt3, u, rs3);
8672 }
8673
8674
8675 /*
8676 *
8677 *
8678 * 3 2 1
8679 * 10987654321098765432109876543210
8680 * 001000 x1110000101
8681 * rt -----
8682 * rs -----
8683 * rd -----
8684 */
8685 static std::string LHU_GP_(uint64 instruction, Dis_info *info)
8686 {
8687 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8688 uint64 u_value = extract_u_17_to_1__s1(instruction);
8689
8690 std::string rt = GPR(copy(rt_value));
8691 std::string u = IMMEDIATE(copy(u_value));
8692
8693 return img_format("LHU %s, %s($%d)", rt, u, 28);
8694 }
8695
8696
8697 /*
8698 *
8699 *
8700 * 3 2 1
8701 * 10987654321098765432109876543210
8702 * 001000 x1110000101
8703 * rt -----
8704 * rs -----
8705 * rd -----
8706 */
8707 static std::string LHU_S9_(uint64 instruction, Dis_info *info)
8708 {
8709 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8710 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8711 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8712
8713 std::string rt = GPR(copy(rt_value));
8714 std::string s = IMMEDIATE(copy(s_value));
8715 std::string rs = GPR(copy(rs_value));
8716
8717 return img_format("LHU %s, %s(%s)", rt, s, rs);
8718 }
8719
8720
8721 /*
8722 *
8723 *
8724 * 3 2 1
8725 * 10987654321098765432109876543210
8726 * 001000 x1110000101
8727 * rt -----
8728 * rs -----
8729 * rd -----
8730 */
8731 static std::string LHU_U12_(uint64 instruction, Dis_info *info)
8732 {
8733 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8734 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8735 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8736
8737 std::string rt = GPR(copy(rt_value));
8738 std::string u = IMMEDIATE(copy(u_value));
8739 std::string rs = GPR(copy(rs_value));
8740
8741 return img_format("LHU %s, %s(%s)", rt, u, rs);
8742 }
8743
8744
8745 /*
8746 *
8747 *
8748 * 3 2 1
8749 * 10987654321098765432109876543210
8750 * 001000 x1110000101
8751 * rt -----
8752 * rs -----
8753 * rd -----
8754 */
8755 static std::string LHUE(uint64 instruction, Dis_info *info)
8756 {
8757 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8758 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8759 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8760
8761 std::string rt = GPR(copy(rt_value));
8762 std::string s = IMMEDIATE(copy(s_value));
8763 std::string rs = GPR(copy(rs_value));
8764
8765 return img_format("LHUE %s, %s(%s)", rt, s, rs);
8766 }
8767
8768
8769 /*
8770 *
8771 *
8772 * 3 2 1
8773 * 10987654321098765432109876543210
8774 * 001000 x1110000101
8775 * rt -----
8776 * rs -----
8777 * rd -----
8778 */
8779 static std::string LHUX(uint64 instruction, Dis_info *info)
8780 {
8781 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8782 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8783 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8784
8785 std::string rd = GPR(copy(rd_value));
8786 std::string rs = GPR(copy(rs_value));
8787 std::string rt = GPR(copy(rt_value));
8788
8789 return img_format("LHUX %s, %s(%s)", rd, rs, rt);
8790 }
8791
8792
8793 /*
8794 *
8795 *
8796 * 3 2 1
8797 * 10987654321098765432109876543210
8798 * 001000 x1110000101
8799 * rt -----
8800 * rs -----
8801 * rd -----
8802 */
8803 static std::string LHUXS(uint64 instruction, Dis_info *info)
8804 {
8805 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8806 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8807 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8808
8809 std::string rd = GPR(copy(rd_value));
8810 std::string rs = GPR(copy(rs_value));
8811 std::string rt = GPR(copy(rt_value));
8812
8813 return img_format("LHUXS %s, %s(%s)", rd, rs, rt);
8814 }
8815
8816
8817 /*
8818 *
8819 *
8820 * 3 2 1
8821 * 10987654321098765432109876543210
8822 * 001000 x1110000101
8823 * rt -----
8824 * rs -----
8825 * rd -----
8826 */
8827 static std::string LHXS(uint64 instruction, Dis_info *info)
8828 {
8829 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8830 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8831 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8832
8833 std::string rd = GPR(copy(rd_value));
8834 std::string rs = GPR(copy(rs_value));
8835 std::string rt = GPR(copy(rt_value));
8836
8837 return img_format("LHXS %s, %s(%s)", rd, rs, rt);
8838 }
8839
8840
8841 /*
8842 *
8843 *
8844 * 3 2 1
8845 * 10987654321098765432109876543210
8846 * 001000 x1110000101
8847 * rt -----
8848 * rs -----
8849 * rd -----
8850 */
8851 static std::string LHX(uint64 instruction, Dis_info *info)
8852 {
8853 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8854 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8855 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8856
8857 std::string rd = GPR(copy(rd_value));
8858 std::string rs = GPR(copy(rs_value));
8859 std::string rt = GPR(copy(rt_value));
8860
8861 return img_format("LHX %s, %s(%s)", rd, rs, rt);
8862 }
8863
8864
8865 /*
8866 *
8867 *
8868 * 3 2 1
8869 * 10987654321098765432109876543210
8870 * 001000 x1110000101
8871 * rt -----
8872 * rs -----
8873 * rd -----
8874 */
8875 static std::string LI_16_(uint64 instruction, Dis_info *info)
8876 {
8877 uint64 rt3_value = extract_rt3_9_8_7(instruction);
8878 uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
8879
8880 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8881 std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
8882
8883 return img_format("LI %s, %s", rt3, eu);
8884 }
8885
8886
8887 /*
8888 *
8889 *
8890 * 3 2 1
8891 * 10987654321098765432109876543210
8892 * 001000 x1110000101
8893 * rt -----
8894 * rs -----
8895 * rd -----
8896 */
8897 static std::string LI_48_(uint64 instruction, Dis_info *info)
8898 {
8899 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8900 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8901
8902 std::string rt = GPR(copy(rt_value));
8903 std::string s = IMMEDIATE(copy(s_value));
8904
8905 return img_format("LI %s, %s", rt, s);
8906 }
8907
8908
8909 /*
8910 *
8911 *
8912 * 3 2 1
8913 * 10987654321098765432109876543210
8914 * 001000 x1110000101
8915 * rt -----
8916 * rs -----
8917 * rd -----
8918 */
8919 static std::string LL(uint64 instruction, Dis_info *info)
8920 {
8921 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8922 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8923 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8924
8925 std::string rt = GPR(copy(rt_value));
8926 std::string s = IMMEDIATE(copy(s_value));
8927 std::string rs = GPR(copy(rs_value));
8928
8929 return img_format("LL %s, %s(%s)", rt, s, rs);
8930 }
8931
8932
8933 /*
8934 *
8935 *
8936 * 3 2 1
8937 * 10987654321098765432109876543210
8938 * 001000 x1110000101
8939 * rt -----
8940 * rs -----
8941 * rd -----
8942 */
8943 static std::string LLD(uint64 instruction, Dis_info *info)
8944 {
8945 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8946 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8947 int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
8948
8949 std::string rt = GPR(copy(rt_value));
8950 std::string s = IMMEDIATE(copy(s_value));
8951 std::string rs = GPR(copy(rs_value));
8952
8953 return img_format("LLD %s, %s(%s)", rt, s, rs);
8954 }
8955
8956
8957 /*
8958 *
8959 *
8960 * 3 2 1
8961 * 10987654321098765432109876543210
8962 * 001000 x1110000101
8963 * rt -----
8964 * rs -----
8965 * rd -----
8966 */
8967 static std::string LLDP(uint64 instruction, Dis_info *info)
8968 {
8969 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8970 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8971 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8972
8973 std::string rt = GPR(copy(rt_value));
8974 std::string ru = GPR(copy(ru_value));
8975 std::string rs = GPR(copy(rs_value));
8976
8977 return img_format("LLDP %s, %s, (%s)", rt, ru, rs);
8978 }
8979
8980
8981 /*
8982 *
8983 *
8984 * 3 2 1
8985 * 10987654321098765432109876543210
8986 * 001000 x1110000101
8987 * rt -----
8988 * rs -----
8989 * rd -----
8990 */
8991 static std::string LLE(uint64 instruction, Dis_info *info)
8992 {
8993 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8994 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8995 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8996
8997 std::string rt = GPR(copy(rt_value));
8998 std::string s = IMMEDIATE(copy(s_value));
8999 std::string rs = GPR(copy(rs_value));
9000
9001 return img_format("LLE %s, %s(%s)", rt, s, rs);
9002 }
9003
9004
9005 /*
9006 *
9007 *
9008 * 3 2 1
9009 * 10987654321098765432109876543210
9010 * 001000 x1110000101
9011 * rt -----
9012 * rs -----
9013 * rd -----
9014 */
9015 static std::string LLWP(uint64 instruction, Dis_info *info)
9016 {
9017 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9018 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9019 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
9020
9021 std::string rt = GPR(copy(rt_value));
9022 std::string ru = GPR(copy(ru_value));
9023 std::string rs = GPR(copy(rs_value));
9024
9025 return img_format("LLWP %s, %s, (%s)", rt, ru, rs);
9026 }
9027
9028
9029 /*
9030 *
9031 *
9032 * 3 2 1
9033 * 10987654321098765432109876543210
9034 * 001000 x1110000101
9035 * rt -----
9036 * rs -----
9037 * rd -----
9038 */
9039 static std::string LLWPE(uint64 instruction, Dis_info *info)
9040 {
9041 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9042 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9043 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
9044
9045 std::string rt = GPR(copy(rt_value));
9046 std::string ru = GPR(copy(ru_value));
9047 std::string rs = GPR(copy(rs_value));
9048
9049 return img_format("LLWPE %s, %s, (%s)", rt, ru, rs);
9050 }
9051
9052
9053 /*
9054 *
9055 *
9056 * 3 2 1
9057 * 10987654321098765432109876543210
9058 * 001000 x1110000101
9059 * rt -----
9060 * rs -----
9061 * rd -----
9062 */
9063 static std::string LSA(uint64 instruction, Dis_info *info)
9064 {
9065 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9066 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9067 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9068 uint64 u2_value = extract_u2_10_9(instruction);
9069
9070 std::string rd = GPR(copy(rd_value));
9071 std::string rs = GPR(copy(rs_value));
9072 std::string rt = GPR(copy(rt_value));
9073 std::string u2 = IMMEDIATE(copy(u2_value));
9074
9075 return img_format("LSA %s, %s, %s, %s", rd, rs, rt, u2);
9076 }
9077
9078
9079 /*
9080 *
9081 *
9082 * 3 2 1
9083 * 10987654321098765432109876543210
9084 * 001000 x1110000101
9085 * rt -----
9086 * rs -----
9087 * rd -----
9088 */
9089 static std::string LUI(uint64 instruction, Dis_info *info)
9090 {
9091 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9092 int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
9093
9094 std::string rt = GPR(copy(rt_value));
9095 std::string s = IMMEDIATE(copy(s_value));
9096
9097 return img_format("LUI %s, %%hi(%s)", rt, s);
9098 }
9099
9100
9101 /*
9102 *
9103 *
9104 * 3 2 1
9105 * 10987654321098765432109876543210
9106 * 001000 x1110000101
9107 * rt -----
9108 * rs -----
9109 * rd -----
9110 */
9111 static std::string LW_16_(uint64 instruction, Dis_info *info)
9112 {
9113 uint64 rt3_value = extract_rt3_9_8_7(instruction);
9114 uint64 rs3_value = extract_rs3_6_5_4(instruction);
9115 uint64 u_value = extract_u_3_2_1_0__s2(instruction);
9116
9117 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9118 std::string u = IMMEDIATE(copy(u_value));
9119 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9120
9121 return img_format("LW %s, %s(%s)", rt3, u, rs3);
9122 }
9123
9124
9125 /*
9126 *
9127 *
9128 * 3 2 1
9129 * 10987654321098765432109876543210
9130 * 001000 x1110000101
9131 * rt -----
9132 * rs -----
9133 * rd -----
9134 */
9135 static std::string LW_4X4_(uint64 instruction, Dis_info *info)
9136 {
9137 uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
9138 uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
9139 uint64 u_value = extract_u_3_8__s2(instruction);
9140
9141 std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
9142 std::string u = IMMEDIATE(copy(u_value));
9143 std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
9144
9145 return img_format("LW %s, %s(%s)", rt4, u, rs4);
9146 }
9147
9148
9149 /*
9150 *
9151 *
9152 * 3 2 1
9153 * 10987654321098765432109876543210
9154 * 001000 x1110000101
9155 * rt -----
9156 * rs -----
9157 * rd -----
9158 */
9159 static std::string LW_GP_(uint64 instruction, Dis_info *info)
9160 {
9161 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9162 uint64 u_value = extract_u_20_to_2__s2(instruction);
9163
9164 std::string rt = GPR(copy(rt_value));
9165 std::string u = IMMEDIATE(copy(u_value));
9166
9167 return img_format("LW %s, %s($%d)", rt, u, 28);
9168 }
9169
9170
9171 /*
9172 *
9173 *
9174 * 3 2 1
9175 * 10987654321098765432109876543210
9176 * 001000 x1110000101
9177 * rt -----
9178 * rs -----
9179 * rd -----
9180 */
9181 static std::string LW_GP16_(uint64 instruction, Dis_info *info)
9182 {
9183 uint64 rt3_value = extract_rt3_9_8_7(instruction);
9184 uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
9185
9186 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9187 std::string u = IMMEDIATE(copy(u_value));
9188
9189 return img_format("LW %s, %s($%d)", rt3, u, 28);
9190 }
9191
9192
9193 /*
9194 *
9195 *
9196 * 3 2 1
9197 * 10987654321098765432109876543210
9198 * 001000 x1110000101
9199 * rt -----
9200 * rs -----
9201 * rd -----
9202 */
9203 static std::string LW_S9_(uint64 instruction, Dis_info *info)
9204 {
9205 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9206 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9207 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9208
9209 std::string rt = GPR(copy(rt_value));
9210 std::string s = IMMEDIATE(copy(s_value));
9211 std::string rs = GPR(copy(rs_value));
9212
9213 return img_format("LW %s, %s(%s)", rt, s, rs);
9214 }
9215
9216
9217 /*
9218 *
9219 *
9220 * 3 2 1
9221 * 10987654321098765432109876543210
9222 * 001000 x1110000101
9223 * rt -----
9224 * rs -----
9225 * rd -----
9226 */
9227 static std::string LW_SP_(uint64 instruction, Dis_info *info)
9228 {
9229 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
9230 uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
9231
9232 std::string rt = GPR(copy(rt_value));
9233 std::string u = IMMEDIATE(copy(u_value));
9234
9235 return img_format("LW %s, %s($%d)", rt, u, 29);
9236 }
9237
9238
9239 /*
9240 *
9241 *
9242 * 3 2 1
9243 * 10987654321098765432109876543210
9244 * 001000 x1110000101
9245 * rt -----
9246 * rs -----
9247 * rd -----
9248 */
9249 static std::string LW_U12_(uint64 instruction, Dis_info *info)
9250 {
9251 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9252 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9253 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9254
9255 std::string rt = GPR(copy(rt_value));
9256 std::string u = IMMEDIATE(copy(u_value));
9257 std::string rs = GPR(copy(rs_value));
9258
9259 return img_format("LW %s, %s(%s)", rt, u, rs);
9260 }
9261
9262
9263 /*
9264 *
9265 *
9266 * 3 2 1
9267 * 10987654321098765432109876543210
9268 * 001000 x1110000101
9269 * rt -----
9270 * rs -----
9271 * rd -----
9272 */
9273 static std::string LWC1_GP_(uint64 instruction, Dis_info *info)
9274 {
9275 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9276 uint64 u_value = extract_u_17_to_2__s2(instruction);
9277
9278 std::string ft = FPR(copy(ft_value));
9279 std::string u = IMMEDIATE(copy(u_value));
9280
9281 return img_format("LWC1 %s, %s($%d)", ft, u, 28);
9282 }
9283
9284
9285 /*
9286 *
9287 *
9288 * 3 2 1
9289 * 10987654321098765432109876543210
9290 * 001000 x1110000101
9291 * rt -----
9292 * rs -----
9293 * rd -----
9294 */
9295 static std::string LWC1_S9_(uint64 instruction, Dis_info *info)
9296 {
9297 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9298 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9299 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9300
9301 std::string ft = FPR(copy(ft_value));
9302 std::string s = IMMEDIATE(copy(s_value));
9303 std::string rs = GPR(copy(rs_value));
9304
9305 return img_format("LWC1 %s, %s(%s)", ft, s, rs);
9306 }
9307
9308
9309 /*
9310 *
9311 *
9312 * 3 2 1
9313 * 10987654321098765432109876543210
9314 * 001000 x1110000101
9315 * rt -----
9316 * rs -----
9317 * rd -----
9318 */
9319 static std::string LWC1_U12_(uint64 instruction, Dis_info *info)
9320 {
9321 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9322 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9323 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9324
9325 std::string ft = FPR(copy(ft_value));
9326 std::string u = IMMEDIATE(copy(u_value));
9327 std::string rs = GPR(copy(rs_value));
9328
9329 return img_format("LWC1 %s, %s(%s)", ft, u, rs);
9330 }
9331
9332
9333 /*
9334 *
9335 *
9336 * 3 2 1
9337 * 10987654321098765432109876543210
9338 * 001000 x1110000101
9339 * rt -----
9340 * rs -----
9341 * rd -----
9342 */
9343 static std::string LWC1X(uint64 instruction, Dis_info *info)
9344 {
9345 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9346 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9347 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9348
9349 std::string ft = FPR(copy(ft_value));
9350 std::string rs = GPR(copy(rs_value));
9351 std::string rt = GPR(copy(rt_value));
9352
9353 return img_format("LWC1X %s, %s(%s)", ft, rs, rt);
9354 }
9355
9356
9357 /*
9358 *
9359 *
9360 * 3 2 1
9361 * 10987654321098765432109876543210
9362 * 001000 x1110000101
9363 * rt -----
9364 * rs -----
9365 * rd -----
9366 */
9367 static std::string LWC1XS(uint64 instruction, Dis_info *info)
9368 {
9369 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9370 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9371 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9372
9373 std::string ft = FPR(copy(ft_value));
9374 std::string rs = GPR(copy(rs_value));
9375 std::string rt = GPR(copy(rt_value));
9376
9377 return img_format("LWC1XS %s, %s(%s)", ft, rs, rt);
9378 }
9379
9380
9381 /*
9382 *
9383 *
9384 * 3 2 1
9385 * 10987654321098765432109876543210
9386 * 001000 x1110000101
9387 * rt -----
9388 * rs -----
9389 * rd -----
9390 */
9391 static std::string LWC2(uint64 instruction, Dis_info *info)
9392 {
9393 uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
9394 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9395 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9396
9397 std::string ct = CPR(copy(ct_value));
9398 std::string s = IMMEDIATE(copy(s_value));
9399 std::string rs = GPR(copy(rs_value));
9400
9401 return img_format("LWC2 %s, %s(%s)", ct, s, rs);
9402 }
9403
9404
9405 /*
9406 *
9407 *
9408 * 3 2 1
9409 * 10987654321098765432109876543210
9410 * 001000 x1110000101
9411 * rt -----
9412 * rs -----
9413 * rd -----
9414 */
9415 static std::string LWE(uint64 instruction, Dis_info *info)
9416 {
9417 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9418 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9419 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9420
9421 std::string rt = GPR(copy(rt_value));
9422 std::string s = IMMEDIATE(copy(s_value));
9423 std::string rs = GPR(copy(rs_value));
9424
9425 return img_format("LWE %s, %s(%s)", rt, s, rs);
9426 }
9427
9428
9429 /*
9430 *
9431 *
9432 * 3 2 1
9433 * 10987654321098765432109876543210
9434 * 001000 x1110000101
9435 * rt -----
9436 * rs -----
9437 * rd -----
9438 */
9439 static std::string LWM(uint64 instruction, Dis_info *info)
9440 {
9441 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9442 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9443 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9444 uint64 count3_value = extract_count3_14_13_12(instruction);
9445
9446 std::string rt = GPR(copy(rt_value));
9447 std::string s = IMMEDIATE(copy(s_value));
9448 std::string rs = GPR(copy(rs_value));
9449 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
9450
9451 return img_format("LWM %s, %s(%s), %s", rt, s, rs, count3);
9452 }
9453
9454
9455 /*
9456 *
9457 *
9458 * 3 2 1
9459 * 10987654321098765432109876543210
9460 * 001000 x1110000101
9461 * rt -----
9462 * rs -----
9463 * rd -----
9464 */
9465 static std::string LWPC_48_(uint64 instruction, Dis_info *info)
9466 {
9467 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
9468 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
9469
9470 std::string rt = GPR(copy(rt_value));
9471 std::string s = ADDRESS(encode_s_from_address(s_value), 6, info);
9472
9473 return img_format("LWPC %s, %s", rt, s);
9474 }
9475
9476
9477 /*
9478 *
9479 *
9480 * 3 2 1
9481 * 10987654321098765432109876543210
9482 * 001000 x1110000101
9483 * rt -----
9484 * rs -----
9485 * rd -----
9486 */
9487 static std::string LWU_GP_(uint64 instruction, Dis_info *info)
9488 {
9489 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9490 uint64 u_value = extract_u_17_to_2__s2(instruction);
9491
9492 std::string rt = GPR(copy(rt_value));
9493 std::string u = IMMEDIATE(copy(u_value));
9494
9495 return img_format("LWU %s, %s($%d)", rt, u, 28);
9496 }
9497
9498
9499 /*
9500 *
9501 *
9502 * 3 2 1
9503 * 10987654321098765432109876543210
9504 * 001000 x1110000101
9505 * rt -----
9506 * rs -----
9507 * rd -----
9508 */
9509 static std::string LWU_S9_(uint64 instruction, Dis_info *info)
9510 {
9511 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9512 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9513 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9514
9515 std::string rt = GPR(copy(rt_value));
9516 std::string s = IMMEDIATE(copy(s_value));
9517 std::string rs = GPR(copy(rs_value));
9518
9519 return img_format("LWU %s, %s(%s)", rt, s, rs);
9520 }
9521
9522
9523 /*
9524 *
9525 *
9526 * 3 2 1
9527 * 10987654321098765432109876543210
9528 * 001000 x1110000101
9529 * rt -----
9530 * rs -----
9531 * rd -----
9532 */
9533 static std::string LWU_U12_(uint64 instruction, Dis_info *info)
9534 {
9535 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9536 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9537 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9538
9539 std::string rt = GPR(copy(rt_value));
9540 std::string u = IMMEDIATE(copy(u_value));
9541 std::string rs = GPR(copy(rs_value));
9542
9543 return img_format("LWU %s, %s(%s)", rt, u, rs);
9544 }
9545
9546
9547 /*
9548 *
9549 *
9550 * 3 2 1
9551 * 10987654321098765432109876543210
9552 * 001000 x1110000101
9553 * rt -----
9554 * rs -----
9555 * rd -----
9556 */
9557 static std::string LWUX(uint64 instruction, Dis_info *info)
9558 {
9559 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9560 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9561 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9562
9563 std::string rd = GPR(copy(rd_value));
9564 std::string rs = GPR(copy(rs_value));
9565 std::string rt = GPR(copy(rt_value));
9566
9567 return img_format("LWUX %s, %s(%s)", rd, rs, rt);
9568 }
9569
9570
9571 /*
9572 *
9573 *
9574 * 3 2 1
9575 * 10987654321098765432109876543210
9576 * 001000 x1110000101
9577 * rt -----
9578 * rs -----
9579 * rd -----
9580 */
9581 static std::string LWUXS(uint64 instruction, Dis_info *info)
9582 {
9583 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9584 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9585 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9586
9587 std::string rd = GPR(copy(rd_value));
9588 std::string rs = GPR(copy(rs_value));
9589 std::string rt = GPR(copy(rt_value));
9590
9591 return img_format("LWUXS %s, %s(%s)", rd, rs, rt);
9592 }
9593
9594
9595 /*
9596 *
9597 *
9598 * 3 2 1
9599 * 10987654321098765432109876543210
9600 * 001000 x1110000101
9601 * rt -----
9602 * rs -----
9603 * rd -----
9604 */
9605 static std::string LWX(uint64 instruction, Dis_info *info)
9606 {
9607 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9608 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9609 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9610
9611 std::string rd = GPR(copy(rd_value));
9612 std::string rs = GPR(copy(rs_value));
9613 std::string rt = GPR(copy(rt_value));
9614
9615 return img_format("LWX %s, %s(%s)", rd, rs, rt);
9616 }
9617
9618
9619 /*
9620 *
9621 *
9622 * 3 2 1
9623 * 10987654321098765432109876543210
9624 * 001000 x1110000101
9625 * rt -----
9626 * rs -----
9627 * rd -----
9628 */
9629 static std::string LWXS_16_(uint64 instruction, Dis_info *info)
9630 {
9631 uint64 rt3_value = extract_rt3_9_8_7(instruction);
9632 uint64 rs3_value = extract_rs3_6_5_4(instruction);
9633 uint64 rd3_value = extract_rd3_3_2_1(instruction);
9634
9635 std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
9636 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9637 std::string rt3 = IMMEDIATE(decode_gpr_gpr3(rt3_value));
9638
9639 return img_format("LWXS %s, %s(%s)", rd3, rs3, rt3);
9640 }
9641
9642
9643 /*
9644 *
9645 *
9646 * 3 2 1
9647 * 10987654321098765432109876543210
9648 * 001000 x1110000101
9649 * rt -----
9650 * rs -----
9651 * rd -----
9652 */
9653 static std::string LWXS_32_(uint64 instruction, Dis_info *info)
9654 {
9655 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9656 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9657 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9658
9659 std::string rd = GPR(copy(rd_value));
9660 std::string rs = GPR(copy(rs_value));
9661 std::string rt = GPR(copy(rt_value));
9662
9663 return img_format("LWXS %s, %s(%s)", rd, rs, rt);
9664 }
9665
9666
9667 /*
9668 * [DSP] MADD ac, rs, rt - Multiply two words and add to the specified
9669 * accumulator
9670 *
9671 * 3 2 1
9672 * 10987654321098765432109876543210
9673 * 001000 x1110000101
9674 * rt -----
9675 * rs -----
9676 * rd -----
9677 */
9678 static std::string MADD_DSP_(uint64 instruction, Dis_info *info)
9679 {
9680 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9681 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9682 uint64 ac_value = extract_ac_15_14(instruction);
9683
9684 std::string ac = AC(copy(ac_value));
9685 std::string rs = GPR(copy(rs_value));
9686 std::string rt = GPR(copy(rt_value));
9687
9688 return img_format("MADD %s, %s, %s", ac, rs, rt);
9689 }
9690
9691
9692 /*
9693 *
9694 *
9695 * 3 2 1
9696 * 10987654321098765432109876543210
9697 * 001000 x1110000101
9698 * rt -----
9699 * rs -----
9700 * rd -----
9701 */
9702 static std::string MADDF_D(uint64 instruction, Dis_info *info)
9703 {
9704 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9705 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9706 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9707
9708 std::string fd = FPR(copy(fd_value));
9709 std::string fs = FPR(copy(fs_value));
9710 std::string ft = FPR(copy(ft_value));
9711
9712 return img_format("MADDF.D %s, %s, %s", fd, fs, ft);
9713 }
9714
9715
9716 /*
9717 *
9718 *
9719 * 3 2 1
9720 * 10987654321098765432109876543210
9721 * 001000 x1110000101
9722 * rt -----
9723 * rs -----
9724 * rd -----
9725 */
9726 static std::string MADDF_S(uint64 instruction, Dis_info *info)
9727 {
9728 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9729 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9730 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9731
9732 std::string fd = FPR(copy(fd_value));
9733 std::string fs = FPR(copy(fs_value));
9734 std::string ft = FPR(copy(ft_value));
9735
9736 return img_format("MADDF.S %s, %s, %s", fd, fs, ft);
9737 }
9738
9739
9740 /*
9741 * [DSP] MADDU ac, rs, rt - Multiply two unsigned words and add to the
9742 * specified accumulator
9743 *
9744 * 3 2 1
9745 * 10987654321098765432109876543210
9746 * 001000 x1110000101
9747 * rt -----
9748 * rs -----
9749 * rd -----
9750 */
9751 static std::string MADDU_DSP_(uint64 instruction, Dis_info *info)
9752 {
9753 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9754 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9755 uint64 ac_value = extract_ac_15_14(instruction);
9756
9757 std::string ac = AC(copy(ac_value));
9758 std::string rs = GPR(copy(rs_value));
9759 std::string rt = GPR(copy(rt_value));
9760
9761 return img_format("MADDU %s, %s, %s", ac, rs, rt);
9762 }
9763
9764
9765 /*
9766 * [DSP] MAQ_S.W.PHL ac, rs, rt - Multiply the left-most single vector
9767 * fractional halfword elements with accumulation
9768 *
9769 * 3 2 1
9770 * 10987654321098765432109876543210
9771 * 001000 x1110000101
9772 * rt -----
9773 * rs -----
9774 * rd -----
9775 */
9776 static std::string MAQ_S_W_PHL(uint64 instruction, Dis_info *info)
9777 {
9778 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9779 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9780 uint64 ac_value = extract_ac_15_14(instruction);
9781
9782 std::string ac = AC(copy(ac_value));
9783 std::string rs = GPR(copy(rs_value));
9784 std::string rt = GPR(copy(rt_value));
9785
9786 return img_format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt);
9787 }
9788
9789
9790 /*
9791 * [DSP] MAQ_S.W.PHR ac, rs, rt - Multiply the right-most single vector
9792 * fractional halfword elements with accumulation
9793 *
9794 * 3 2 1
9795 * 10987654321098765432109876543210
9796 * 001000 x1110000101
9797 * rt -----
9798 * rs -----
9799 * rd -----
9800 */
9801 static std::string MAQ_S_W_PHR(uint64 instruction, Dis_info *info)
9802 {
9803 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9804 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9805 uint64 ac_value = extract_ac_15_14(instruction);
9806
9807 std::string ac = AC(copy(ac_value));
9808 std::string rs = GPR(copy(rs_value));
9809 std::string rt = GPR(copy(rt_value));
9810
9811 return img_format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt);
9812 }
9813
9814
9815 /*
9816 * [DSP] MAQ_SA.W.PHL ac, rs, rt - Multiply the left-most single vector
9817 * fractional halfword elements with saturating accumulation
9818 *
9819 * 3 2 1
9820 * 10987654321098765432109876543210
9821 * 001000 x1110000101
9822 * rt -----
9823 * rs -----
9824 * rd -----
9825 */
9826 static std::string MAQ_SA_W_PHL(uint64 instruction, Dis_info *info)
9827 {
9828 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9829 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9830 uint64 ac_value = extract_ac_15_14(instruction);
9831
9832 std::string ac = AC(copy(ac_value));
9833 std::string rs = GPR(copy(rs_value));
9834 std::string rt = GPR(copy(rt_value));
9835
9836 return img_format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt);
9837 }
9838
9839
9840 /*
9841 * [DSP] MAQ_SA.W.PHR ac, rs, rt - Multiply the right-most single vector
9842 * fractional halfword elements with saturating accumulation
9843 *
9844 * 3 2 1
9845 * 10987654321098765432109876543210
9846 * 001000 x1110000101
9847 * rt -----
9848 * rs -----
9849 * rd -----
9850 */
9851 static std::string MAQ_SA_W_PHR(uint64 instruction, Dis_info *info)
9852 {
9853 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9854 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9855 uint64 ac_value = extract_ac_15_14(instruction);
9856
9857 std::string ac = AC(copy(ac_value));
9858 std::string rs = GPR(copy(rs_value));
9859 std::string rt = GPR(copy(rt_value));
9860
9861 return img_format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt);
9862 }
9863
9864
9865 /*
9866 *
9867 *
9868 * 3 2 1
9869 * 10987654321098765432109876543210
9870 * 001000 x1110000101
9871 * rt -----
9872 * rs -----
9873 * rd -----
9874 */
9875 static std::string MAX_D(uint64 instruction, Dis_info *info)
9876 {
9877 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9878 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9879 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9880
9881 std::string fd = FPR(copy(fd_value));
9882 std::string fs = FPR(copy(fs_value));
9883 std::string ft = FPR(copy(ft_value));
9884
9885 return img_format("MAX.D %s, %s, %s", fd, fs, ft);
9886 }
9887
9888
9889 /*
9890 *
9891 *
9892 * 3 2 1
9893 * 10987654321098765432109876543210
9894 * 001000 x1110000101
9895 * rt -----
9896 * rs -----
9897 * rd -----
9898 */
9899 static std::string MAX_S(uint64 instruction, Dis_info *info)
9900 {
9901 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9902 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9903 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9904
9905 std::string fd = FPR(copy(fd_value));
9906 std::string fs = FPR(copy(fs_value));
9907 std::string ft = FPR(copy(ft_value));
9908
9909 return img_format("MAX.S %s, %s, %s", fd, fs, ft);
9910 }
9911
9912
9913 /*
9914 *
9915 *
9916 * 3 2 1
9917 * 10987654321098765432109876543210
9918 * 001000 x1110000101
9919 * rt -----
9920 * rs -----
9921 * rd -----
9922 */
9923 static std::string MAXA_D(uint64 instruction, Dis_info *info)
9924 {
9925 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9926 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9927 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9928
9929 std::string fd = FPR(copy(fd_value));
9930 std::string fs = FPR(copy(fs_value));
9931 std::string ft = FPR(copy(ft_value));
9932
9933 return img_format("MAXA.D %s, %s, %s", fd, fs, ft);
9934 }
9935
9936
9937 /*
9938 *
9939 *
9940 * 3 2 1
9941 * 10987654321098765432109876543210
9942 * 001000 x1110000101
9943 * rt -----
9944 * rs -----
9945 * rd -----
9946 */
9947 static std::string MAXA_S(uint64 instruction, Dis_info *info)
9948 {
9949 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9950 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9951 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9952
9953 std::string fd = FPR(copy(fd_value));
9954 std::string fs = FPR(copy(fs_value));
9955 std::string ft = FPR(copy(ft_value));
9956
9957 return img_format("MAXA.S %s, %s, %s", fd, fs, ft);
9958 }
9959
9960
9961 /*
9962 *
9963 *
9964 * 3 2 1
9965 * 10987654321098765432109876543210
9966 * 001000 x1110000101
9967 * rt -----
9968 * rs -----
9969 * rd -----
9970 */
9971 static std::string MFC0(uint64 instruction, Dis_info *info)
9972 {
9973 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9974 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9975 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9976
9977 std::string rt = GPR(copy(rt_value));
9978 std::string c0s = CPR(copy(c0s_value));
9979 std::string sel = IMMEDIATE(copy(sel_value));
9980
9981 return img_format("MFC0 %s, %s, %s", rt, c0s, sel);
9982 }
9983
9984
9985 /*
9986 *
9987 *
9988 * 3 2 1
9989 * 10987654321098765432109876543210
9990 * 001000 x1110000101
9991 * rt -----
9992 * rs -----
9993 * rd -----
9994 */
9995 static std::string MFC1(uint64 instruction, Dis_info *info)
9996 {
9997 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9998 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9999
10000 std::string rt = GPR(copy(rt_value));
10001 std::string fs = FPR(copy(fs_value));
10002
10003 return img_format("MFC1 %s, %s", rt, fs);
10004 }
10005
10006
10007 /*
10008 *
10009 *
10010 * 3 2 1
10011 * 10987654321098765432109876543210
10012 * 001000 x1110000101
10013 * rt -----
10014 * rs -----
10015 * rd -----
10016 */
10017 static std::string MFC2(uint64 instruction, Dis_info *info)
10018 {
10019 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10020 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10021
10022 std::string rt = GPR(copy(rt_value));
10023 std::string cs = CPR(copy(cs_value));
10024
10025 return img_format("MFC2 %s, %s", rt, cs);
10026 }
10027
10028
10029 /*
10030 *
10031 *
10032 * 3 2 1
10033 * 10987654321098765432109876543210
10034 * 001000 x1110000101
10035 * rt -----
10036 * rs -----
10037 * rd -----
10038 */
10039 static std::string MFGC0(uint64 instruction, Dis_info *info)
10040 {
10041 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10042 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10043 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10044
10045 std::string rt = GPR(copy(rt_value));
10046 std::string c0s = CPR(copy(c0s_value));
10047 std::string sel = IMMEDIATE(copy(sel_value));
10048
10049 return img_format("MFGC0 %s, %s, %s", rt, c0s, sel);
10050 }
10051
10052
10053 /*
10054 *
10055 *
10056 * 3 2 1
10057 * 10987654321098765432109876543210
10058 * 001000 x1110000101
10059 * rt -----
10060 * rs -----
10061 * rd -----
10062 */
10063 static std::string MFHC0(uint64 instruction, Dis_info *info)
10064 {
10065 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10066 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10067 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10068
10069 std::string rt = GPR(copy(rt_value));
10070 std::string c0s = CPR(copy(c0s_value));
10071 std::string sel = IMMEDIATE(copy(sel_value));
10072
10073 return img_format("MFHC0 %s, %s, %s", rt, c0s, sel);
10074 }
10075
10076
10077 /*
10078 *
10079 *
10080 * 3 2 1
10081 * 10987654321098765432109876543210
10082 * 001000 x1110000101
10083 * rt -----
10084 * rs -----
10085 * rd -----
10086 */
10087 static std::string MFHC1(uint64 instruction, Dis_info *info)
10088 {
10089 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10090 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10091
10092 std::string rt = GPR(copy(rt_value));
10093 std::string fs = FPR(copy(fs_value));
10094
10095 return img_format("MFHC1 %s, %s", rt, fs);
10096 }
10097
10098
10099 /*
10100 *
10101 *
10102 * 3 2 1
10103 * 10987654321098765432109876543210
10104 * 001000 x1110000101
10105 * rt -----
10106 * rs -----
10107 * rd -----
10108 */
10109 static std::string MFHC2(uint64 instruction, Dis_info *info)
10110 {
10111 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10112 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10113
10114 std::string rt = GPR(copy(rt_value));
10115 std::string cs = CPR(copy(cs_value));
10116
10117 return img_format("MFHC2 %s, %s", rt, cs);
10118 }
10119
10120
10121 /*
10122 *
10123 *
10124 * 3 2 1
10125 * 10987654321098765432109876543210
10126 * 001000 x1110000101
10127 * rt -----
10128 * rs -----
10129 * rd -----
10130 */
10131 static std::string MFHGC0(uint64 instruction, Dis_info *info)
10132 {
10133 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10134 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10135 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10136
10137 std::string rt = GPR(copy(rt_value));
10138 std::string c0s = CPR(copy(c0s_value));
10139 std::string sel = IMMEDIATE(copy(sel_value));
10140
10141 return img_format("MFHGC0 %s, %s, %s", rt, c0s, sel);
10142 }
10143
10144
10145 /*
10146 * [DSP] MFHI rs, ac - Move from HI register
10147 *
10148 * 3 2 1
10149 * 10987654321098765432109876543210
10150 * 001000 xxxxx 00000001111111
10151 * rt -----
10152 * ac --
10153 */
10154 static std::string MFHI_DSP_(uint64 instruction, Dis_info *info)
10155 {
10156 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10157 uint64 ac_value = extract_ac_15_14(instruction);
10158
10159 std::string rt = GPR(copy(rt_value));
10160 std::string ac = AC(copy(ac_value));
10161
10162 return img_format("MFHI %s, %s", rt, ac);
10163 }
10164
10165
10166 /*
10167 *
10168 *
10169 * 3 2 1
10170 * 10987654321098765432109876543210
10171 * 001000 x1110000101
10172 * rt -----
10173 * rs -----
10174 * rd -----
10175 */
10176 static std::string MFHTR(uint64 instruction, Dis_info *info)
10177 {
10178 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10179 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10180 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10181 uint64 u_value = extract_u_10(instruction);
10182
10183 std::string rt = GPR(copy(rt_value));
10184 std::string c0s = IMMEDIATE(copy(c0s_value));
10185 std::string u = IMMEDIATE(copy(u_value));
10186 std::string sel = IMMEDIATE(copy(sel_value));
10187
10188 return img_format("MFHTR %s, %s, %s, %s", rt, c0s, u, sel);
10189 }
10190
10191
10192 /*
10193 * [DSP] MFLO rs, ac - Move from HI register
10194 *
10195 * 3 2 1
10196 * 10987654321098765432109876543210
10197 * 001000 xxxxx 01000001111111
10198 * rt -----
10199 * ac --
10200 */
10201 static std::string MFLO_DSP_(uint64 instruction, Dis_info *info)
10202 {
10203 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10204 uint64 ac_value = extract_ac_15_14(instruction);
10205
10206 std::string rt = GPR(copy(rt_value));
10207 std::string ac = AC(copy(ac_value));
10208
10209 return img_format("MFLO %s, %s", rt, ac);
10210 }
10211
10212
10213 /*
10214 *
10215 *
10216 * 3 2 1
10217 * 10987654321098765432109876543210
10218 * 001000 x1110000101
10219 * rt -----
10220 * rs -----
10221 * rd -----
10222 */
10223 static std::string MFTR(uint64 instruction, Dis_info *info)
10224 {
10225 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10226 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10227 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10228 uint64 u_value = extract_u_10(instruction);
10229
10230 std::string rt = GPR(copy(rt_value));
10231 std::string c0s = IMMEDIATE(copy(c0s_value));
10232 std::string u = IMMEDIATE(copy(u_value));
10233 std::string sel = IMMEDIATE(copy(sel_value));
10234
10235 return img_format("MFTR %s, %s, %s, %s", rt, c0s, u, sel);
10236 }
10237
10238
10239 /*
10240 *
10241 *
10242 * 3 2 1
10243 * 10987654321098765432109876543210
10244 * 001000 x1110000101
10245 * rt -----
10246 * rs -----
10247 * rd -----
10248 */
10249 static std::string MIN_D(uint64 instruction, Dis_info *info)
10250 {
10251 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10252 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10253 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10254
10255 std::string fd = FPR(copy(fd_value));
10256 std::string fs = FPR(copy(fs_value));
10257 std::string ft = FPR(copy(ft_value));
10258
10259 return img_format("MIN.D %s, %s, %s", fd, fs, ft);
10260 }
10261
10262
10263 /*
10264 *
10265 *
10266 * 3 2 1
10267 * 10987654321098765432109876543210
10268 * 001000 x1110000101
10269 * rt -----
10270 * rs -----
10271 * rd -----
10272 */
10273 static std::string MIN_S(uint64 instruction, Dis_info *info)
10274 {
10275 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10276 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10277 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10278
10279 std::string fd = FPR(copy(fd_value));
10280 std::string fs = FPR(copy(fs_value));
10281 std::string ft = FPR(copy(ft_value));
10282
10283 return img_format("MIN.S %s, %s, %s", fd, fs, ft);
10284 }
10285
10286
10287 /*
10288 *
10289 *
10290 * 3 2 1
10291 * 10987654321098765432109876543210
10292 * 001000 x1110000101
10293 * rt -----
10294 * rs -----
10295 * rd -----
10296 */
10297 static std::string MINA_D(uint64 instruction, Dis_info *info)
10298 {
10299 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10300 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10301 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10302
10303 std::string fd = FPR(copy(fd_value));
10304 std::string fs = FPR(copy(fs_value));
10305 std::string ft = FPR(copy(ft_value));
10306
10307 return img_format("MINA.D %s, %s, %s", fd, fs, ft);
10308 }
10309
10310
10311 /*
10312 *
10313 *
10314 * 3 2 1
10315 * 10987654321098765432109876543210
10316 * 001000 x1110000101
10317 * rt -----
10318 * rs -----
10319 * rd -----
10320 */
10321 static std::string MINA_S(uint64 instruction, Dis_info *info)
10322 {
10323 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10324 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10325 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10326
10327 std::string fd = FPR(copy(fd_value));
10328 std::string fs = FPR(copy(fs_value));
10329 std::string ft = FPR(copy(ft_value));
10330
10331 return img_format("MINA.S %s, %s, %s", fd, fs, ft);
10332 }
10333
10334
10335 /*
10336 *
10337 *
10338 * 3 2 1
10339 * 10987654321098765432109876543210
10340 * 001000 x1110000101
10341 * rt -----
10342 * rs -----
10343 * rd -----
10344 */
10345 static std::string MOD(uint64 instruction, Dis_info *info)
10346 {
10347 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10348 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10349 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10350
10351 std::string rd = GPR(copy(rd_value));
10352 std::string rs = GPR(copy(rs_value));
10353 std::string rt = GPR(copy(rt_value));
10354
10355 return img_format("MOD %s, %s, %s", rd, rs, rt);
10356 }
10357
10358
10359 /*
10360 * [DSP] MODSUB rd, rs, rt - Modular subtraction on an index value
10361 *
10362 * 3 2 1
10363 * 10987654321098765432109876543210
10364 * 001000 x1110000101
10365 * rt -----
10366 * rs -----
10367 * rd -----
10368 */
10369 static std::string MODSUB(uint64 instruction, Dis_info *info)
10370 {
10371 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10372 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10373 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10374
10375 std::string rd = GPR(copy(rd_value));
10376 std::string rs = GPR(copy(rs_value));
10377 std::string rt = GPR(copy(rt_value));
10378
10379 return img_format("MODSUB %s, %s, %s", rd, rs, rt);
10380 }
10381
10382
10383 /*
10384 *
10385 *
10386 * 3 2 1
10387 * 10987654321098765432109876543210
10388 * 001000 x1010010101
10389 * rt -----
10390 * rs -----
10391 * rd -----
10392 */
10393 static std::string MODU(uint64 instruction, Dis_info *info)
10394 {
10395 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10396 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10397 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10398
10399 std::string rd = GPR(copy(rd_value));
10400 std::string rs = GPR(copy(rs_value));
10401 std::string rt = GPR(copy(rt_value));
10402
10403 return img_format("MODU %s, %s, %s", rd, rs, rt);
10404 }
10405
10406
10407 /*
10408 *
10409 *
10410 * 3 2 1
10411 * 10987654321098765432109876543210
10412 * 001000 x1110000101
10413 * rt -----
10414 * rs -----
10415 * rd -----
10416 */
10417 static std::string MOV_D(uint64 instruction, Dis_info *info)
10418 {
10419 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10420 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10421
10422 std::string ft = FPR(copy(ft_value));
10423 std::string fs = FPR(copy(fs_value));
10424
10425 return img_format("MOV.D %s, %s", ft, fs);
10426 }
10427
10428
10429 /*
10430 *
10431 *
10432 * 3 2 1
10433 * 10987654321098765432109876543210
10434 * 001000 x1110000101
10435 * rt -----
10436 * rs -----
10437 * rd -----
10438 */
10439 static std::string MOV_S(uint64 instruction, Dis_info *info)
10440 {
10441 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10442 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10443
10444 std::string ft = FPR(copy(ft_value));
10445 std::string fs = FPR(copy(fs_value));
10446
10447 return img_format("MOV.S %s, %s", ft, fs);
10448 }
10449
10450
10451 /*
10452 *
10453 *
10454 * 3 2 1
10455 * 10987654321098765432109876543210
10456 * 001000 x1110000101
10457 * rt -----
10458 * rs -----
10459 * rd -----
10460 */
10461 static std::string MOVE_BALC(uint64 instruction, Dis_info *info)
10462 {
10463 uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
10464 uint64 rd1_value = extract_rdl_25_24(instruction);
10465 int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
10466
10467 std::string rd1 = GPR(decode_gpr_gpr1(rd1_value));
10468 std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
10469 std::string s = ADDRESS(encode_s_from_address(s_value), 4, info);
10470
10471 return img_format("MOVE.BALC %s, %s, %s", rd1, rtz4, s);
10472 }
10473
10474
10475 /*
10476 *
10477 *
10478 * 3 2 1
10479 * 10987654321098765432109876543210
10480 * 001000 x1110000101
10481 * rt -----
10482 * rs -----
10483 * rd -----
10484 */
10485 static std::string MOVEP(uint64 instruction, Dis_info *info)
10486 {
10487 uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
10488 uint64 rd2_value = extract_rd2_3_8(instruction);
10489 uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
10490
10491 std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
10492 std::string re2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
10493 /* !!!!!!!!!! - no conversion function */
10494 std::string rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value));
10495 std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
10496
10497 return img_format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4);
10498 /* hand edited */
10499 }
10500
10501
10502 /*
10503 *
10504 *
10505 * 3 2 1
10506 * 10987654321098765432109876543210
10507 * 001000 x1110000101
10508 * rt -----
10509 * rs -----
10510 * rd -----
10511 */
10512 static std::string MOVEP_REV_(uint64 instruction, Dis_info *info)
10513 {
10514 uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10515 uint64 rd2_value = extract_rd2_3_8(instruction);
10516 uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10517
10518 std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
10519 std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
10520 std::string rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value));
10521 std::string rs2 = GPR(decode_gpr_gpr2_reg2(rd2_value));
10522 /* !!!!!!!!!! - no conversion function */
10523
10524 return img_format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2);
10525 /* hand edited */
10526 }
10527
10528
10529 /*
10530 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10531 *
10532 * 3 2 1
10533 * 10987654321098765432109876543210
10534 * 001000 00010001101
10535 * rt -----
10536 * rs -----
10537 * rd -----
10538 */
10539 static std::string MOVE(uint64 instruction, Dis_info *info)
10540 {
10541 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
10542 uint64 rs_value = extract_rs_4_3_2_1_0(instruction);
10543
10544 std::string rt = GPR(copy(rt_value));
10545 std::string rs = GPR(copy(rs_value));
10546
10547 return img_format("MOVE %s, %s", rt, rs);
10548 }
10549
10550
10551 /*
10552 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10553 *
10554 * 3 2 1
10555 * 10987654321098765432109876543210
10556 * 001000 00010001101
10557 * rt -----
10558 * rs -----
10559 * rd -----
10560 */
10561 static std::string MOVN(uint64 instruction, Dis_info *info)
10562 {
10563 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10564 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10565 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10566
10567 std::string rd = GPR(copy(rd_value));
10568 std::string rs = GPR(copy(rs_value));
10569 std::string rt = GPR(copy(rt_value));
10570
10571 return img_format("MOVN %s, %s, %s", rd, rs, rt);
10572 }
10573
10574
10575 /*
10576 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10577 *
10578 * 3 2 1
10579 * 10987654321098765432109876543210
10580 * 001000 00010001101
10581 * rt -----
10582 * rs -----
10583 * rd -----
10584 */
10585 static std::string MOVZ(uint64 instruction, Dis_info *info)
10586 {
10587 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10588 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10589 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10590
10591 std::string rd = GPR(copy(rd_value));
10592 std::string rs = GPR(copy(rs_value));
10593 std::string rt = GPR(copy(rt_value));
10594
10595 return img_format("MOVZ %s, %s, %s", rd, rs, rt);
10596 }
10597
10598
10599 /*
10600 * [DSP] MSUB ac, rs, rt - Multiply word and subtract from accumulator
10601 *
10602 * 3 2 1
10603 * 10987654321098765432109876543210
10604 * 001000 10101010111111
10605 * rt -----
10606 * rs -----
10607 * ac --
10608 */
10609 static std::string MSUB_DSP_(uint64 instruction, Dis_info *info)
10610 {
10611 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10612 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10613 uint64 ac_value = extract_ac_15_14(instruction);
10614
10615 std::string ac = AC(copy(ac_value));
10616 std::string rs = GPR(copy(rs_value));
10617 std::string rt = GPR(copy(rt_value));
10618
10619 return img_format("MSUB %s, %s, %s", ac, rs, rt);
10620 }
10621
10622
10623 /*
10624 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10625 *
10626 * 3 2 1
10627 * 10987654321098765432109876543210
10628 * 001000 00010001101
10629 * rt -----
10630 * rs -----
10631 * rd -----
10632 */
10633 static std::string MSUBF_D(uint64 instruction, Dis_info *info)
10634 {
10635 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10636 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10637 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10638
10639 std::string fd = FPR(copy(fd_value));
10640 std::string fs = FPR(copy(fs_value));
10641 std::string ft = FPR(copy(ft_value));
10642
10643 return img_format("MSUBF.D %s, %s, %s", fd, fs, ft);
10644 }
10645
10646
10647 /*
10648 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10649 *
10650 * 3 2 1
10651 * 10987654321098765432109876543210
10652 * 001000 00010001101
10653 * rt -----
10654 * rs -----
10655 * rd -----
10656 */
10657 static std::string MSUBF_S(uint64 instruction, Dis_info *info)
10658 {
10659 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10660 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10661 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10662
10663 std::string fd = FPR(copy(fd_value));
10664 std::string fs = FPR(copy(fs_value));
10665 std::string ft = FPR(copy(ft_value));
10666
10667 return img_format("MSUBF.S %s, %s, %s", fd, fs, ft);
10668 }
10669
10670
10671 /*
10672 * [DSP] MSUBU ac, rs, rt - Multiply word and add to accumulator
10673 *
10674 * 3 2 1
10675 * 10987654321098765432109876543210
10676 * 001000 11101010111111
10677 * rt -----
10678 * rs -----
10679 * ac --
10680 */
10681 static std::string MSUBU_DSP_(uint64 instruction, Dis_info *info)
10682 {
10683 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10684 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10685 uint64 ac_value = extract_ac_15_14(instruction);
10686
10687 std::string ac = AC(copy(ac_value));
10688 std::string rs = GPR(copy(rs_value));
10689 std::string rt = GPR(copy(rt_value));
10690
10691 return img_format("MSUBU %s, %s, %s", ac, rs, rt);
10692 }
10693
10694
10695 /*
10696 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10697 *
10698 * 3 2 1
10699 * 10987654321098765432109876543210
10700 * 001000 00010001101
10701 * rt -----
10702 * rs -----
10703 * rd -----
10704 */
10705 static std::string MTC0(uint64 instruction, Dis_info *info)
10706 {
10707 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10708 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10709 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10710
10711 std::string rt = GPR(copy(rt_value));
10712 std::string c0s = CPR(copy(c0s_value));
10713 std::string sel = IMMEDIATE(copy(sel_value));
10714
10715 return img_format("MTC0 %s, %s, %s", rt, c0s, sel);
10716 }
10717
10718
10719 /*
10720 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10721 *
10722 * 3 2 1
10723 * 10987654321098765432109876543210
10724 * 001000 00010001101
10725 * rt -----
10726 * rs -----
10727 * rd -----
10728 */
10729 static std::string MTC1(uint64 instruction, Dis_info *info)
10730 {
10731 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10732 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10733
10734 std::string rt = GPR(copy(rt_value));
10735 std::string fs = FPR(copy(fs_value));
10736
10737 return img_format("MTC1 %s, %s", rt, fs);
10738 }
10739
10740
10741 /*
10742 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10743 *
10744 * 3 2 1
10745 * 10987654321098765432109876543210
10746 * 001000 00010001101
10747 * rt -----
10748 * rs -----
10749 * rd -----
10750 */
10751 static std::string MTC2(uint64 instruction, Dis_info *info)
10752 {
10753 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10754 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10755
10756 std::string rt = GPR(copy(rt_value));
10757 std::string cs = CPR(copy(cs_value));
10758
10759 return img_format("MTC2 %s, %s", rt, cs);
10760 }
10761
10762
10763 /*
10764 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10765 *
10766 * 3 2 1
10767 * 10987654321098765432109876543210
10768 * 001000 00010001101
10769 * rt -----
10770 * rs -----
10771 * rd -----
10772 */
10773 static std::string MTGC0(uint64 instruction, Dis_info *info)
10774 {
10775 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10776 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10777 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10778
10779 std::string rt = GPR(copy(rt_value));
10780 std::string c0s = CPR(copy(c0s_value));
10781 std::string sel = IMMEDIATE(copy(sel_value));
10782
10783 return img_format("MTGC0 %s, %s, %s", rt, c0s, sel);
10784 }
10785
10786
10787 /*
10788 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10789 *
10790 * 3 2 1
10791 * 10987654321098765432109876543210
10792 * 001000 00010001101
10793 * rt -----
10794 * rs -----
10795 * rd -----
10796 */
10797 static std::string MTHC0(uint64 instruction, Dis_info *info)
10798 {
10799 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10800 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10801 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10802
10803 std::string rt = GPR(copy(rt_value));
10804 std::string c0s = CPR(copy(c0s_value));
10805 std::string sel = IMMEDIATE(copy(sel_value));
10806
10807 return img_format("MTHC0 %s, %s, %s", rt, c0s, sel);
10808 }
10809
10810
10811 /*
10812 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10813 *
10814 * 3 2 1
10815 * 10987654321098765432109876543210
10816 * 001000 00010001101
10817 * rt -----
10818 * rs -----
10819 * rd -----
10820 */
10821 static std::string MTHC1(uint64 instruction, Dis_info *info)
10822 {
10823 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10824 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10825
10826 std::string rt = GPR(copy(rt_value));
10827 std::string fs = FPR(copy(fs_value));
10828
10829 return img_format("MTHC1 %s, %s", rt, fs);
10830 }
10831
10832
10833 /*
10834 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10835 *
10836 * 3 2 1
10837 * 10987654321098765432109876543210
10838 * 001000 00010001101
10839 * rt -----
10840 * rs -----
10841 * rd -----
10842 */
10843 static std::string MTHC2(uint64 instruction, Dis_info *info)
10844 {
10845 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10846 uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10847
10848 std::string rt = GPR(copy(rt_value));
10849 std::string cs = CPR(copy(cs_value));
10850
10851 return img_format("MTHC2 %s, %s", rt, cs);
10852 }
10853
10854
10855 /*
10856 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10857 *
10858 * 3 2 1
10859 * 10987654321098765432109876543210
10860 * 001000 00010001101
10861 * rt -----
10862 * rs -----
10863 * rd -----
10864 */
10865 static std::string MTHGC0(uint64 instruction, Dis_info *info)
10866 {
10867 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10868 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10869 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10870
10871 std::string rt = GPR(copy(rt_value));
10872 std::string c0s = CPR(copy(c0s_value));
10873 std::string sel = IMMEDIATE(copy(sel_value));
10874
10875 return img_format("MTHGC0 %s, %s, %s", rt, c0s, sel);
10876 }
10877
10878
10879 /*
10880 * [DSP] MTHI rs, ac - Move to HI register
10881 *
10882 * 3 2 1
10883 * 10987654321098765432109876543210
10884 * 001000xxxxx 10000001111111
10885 * rs -----
10886 * ac --
10887 */
10888 static std::string MTHI_DSP_(uint64 instruction, Dis_info *info)
10889 {
10890 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10891 uint64 ac_value = extract_ac_15_14(instruction);
10892
10893 std::string rs = GPR(copy(rs_value));
10894 std::string ac = AC(copy(ac_value));
10895
10896 return img_format("MTHI %s, %s", rs, ac);
10897 }
10898
10899
10900 /*
10901 * [DSP] MTHLIP rs, ac - Copy LO to HI and a GPR to LO and increment pos by 32
10902 *
10903 * 3 2 1
10904 * 10987654321098765432109876543210
10905 * 001000xxxxx 00001001111111
10906 * rs -----
10907 * ac --
10908 */
10909 static std::string MTHLIP(uint64 instruction, Dis_info *info)
10910 {
10911 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10912 uint64 ac_value = extract_ac_15_14(instruction);
10913
10914 std::string rs = GPR(copy(rs_value));
10915 std::string ac = AC(copy(ac_value));
10916
10917 return img_format("MTHLIP %s, %s", rs, ac);
10918 }
10919
10920
10921 /*
10922 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10923 *
10924 * 3 2 1
10925 * 10987654321098765432109876543210
10926 * 001000 00010001101
10927 * rt -----
10928 * rs -----
10929 * rd -----
10930 */
10931 static std::string MTHTR(uint64 instruction, Dis_info *info)
10932 {
10933 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10934 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10935 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10936 uint64 u_value = extract_u_10(instruction);
10937
10938 std::string rt = GPR(copy(rt_value));
10939 std::string c0s = IMMEDIATE(copy(c0s_value));
10940 std::string u = IMMEDIATE(copy(u_value));
10941 std::string sel = IMMEDIATE(copy(sel_value));
10942
10943 return img_format("MTHTR %s, %s, %s, %s", rt, c0s, u, sel);
10944 }
10945
10946
10947 /*
10948 * [DSP] MTLO rs, ac - Move to LO register
10949 *
10950 * 3 2 1
10951 * 10987654321098765432109876543210
10952 * 001000xxxxx 11000001111111
10953 * rs -----
10954 * ac --
10955 */
10956 static std::string MTLO_DSP_(uint64 instruction, Dis_info *info)
10957 {
10958 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10959 uint64 ac_value = extract_ac_15_14(instruction);
10960
10961 std::string rs = GPR(copy(rs_value));
10962 std::string ac = AC(copy(ac_value));
10963
10964 return img_format("MTLO %s, %s", rs, ac);
10965 }
10966
10967
10968 /*
10969 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10970 *
10971 * 3 2 1
10972 * 10987654321098765432109876543210
10973 * 001000 00010001101
10974 * rt -----
10975 * rs -----
10976 * rd -----
10977 */
10978 static std::string MTTR(uint64 instruction, Dis_info *info)
10979 {
10980 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10981 uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10982 uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10983 uint64 u_value = extract_u_10(instruction);
10984
10985 std::string rt = GPR(copy(rt_value));
10986 std::string c0s = IMMEDIATE(copy(c0s_value));
10987 std::string u = IMMEDIATE(copy(u_value));
10988 std::string sel = IMMEDIATE(copy(sel_value));
10989
10990 return img_format("MTTR %s, %s, %s, %s", rt, c0s, u, sel);
10991 }
10992
10993
10994 /*
10995 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10996 *
10997 * 3 2 1
10998 * 10987654321098765432109876543210
10999 * 001000 00010001101
11000 * rt -----
11001 * rs -----
11002 * rd -----
11003 */
11004 static std::string MUH(uint64 instruction, Dis_info *info)
11005 {
11006 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11007 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11008 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11009
11010 std::string rd = GPR(copy(rd_value));
11011 std::string rs = GPR(copy(rs_value));
11012 std::string rt = GPR(copy(rt_value));
11013
11014 return img_format("MUH %s, %s, %s", rd, rs, rt);
11015 }
11016
11017
11018 /*
11019 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11020 *
11021 * 3 2 1
11022 * 10987654321098765432109876543210
11023 * 001000 00010001101
11024 * rt -----
11025 * rs -----
11026 * rd -----
11027 */
11028 static std::string MUHU(uint64 instruction, Dis_info *info)
11029 {
11030 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11031 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11032 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11033
11034 std::string rd = GPR(copy(rd_value));
11035 std::string rs = GPR(copy(rs_value));
11036 std::string rt = GPR(copy(rt_value));
11037
11038 return img_format("MUHU %s, %s, %s", rd, rs, rt);
11039 }
11040
11041
11042 /*
11043 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11044 *
11045 * 3 2 1
11046 * 10987654321098765432109876543210
11047 * 001000 00010001101
11048 * rt -----
11049 * rs -----
11050 * rd -----
11051 */
11052 static std::string MUL_32_(uint64 instruction, Dis_info *info)
11053 {
11054 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11055 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11056 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11057
11058 std::string rd = GPR(copy(rd_value));
11059 std::string rs = GPR(copy(rs_value));
11060 std::string rt = GPR(copy(rt_value));
11061
11062 return img_format("MUL %s, %s, %s", rd, rs, rt);
11063 }
11064
11065
11066 /*
11067 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11068 *
11069 * 3 2 1
11070 * 10987654321098765432109876543210
11071 * 001000 00010001101
11072 * rt -----
11073 * rs -----
11074 * rd -----
11075 */
11076 static std::string MUL_4X4_(uint64 instruction, Dis_info *info)
11077 {
11078 uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
11079 uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
11080
11081 std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
11082 std::string rt4 = GPR(decode_gpr_gpr4(rt4_value));
11083
11084 return img_format("MUL %s, %s", rs4, rt4);
11085 }
11086
11087
11088 /*
11089 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11090 *
11091 * 3 2 1
11092 * 10987654321098765432109876543210
11093 * 001000 00010001101
11094 * rt -----
11095 * rs -----
11096 * rd -----
11097 */
11098 static std::string MUL_D(uint64 instruction, Dis_info *info)
11099 {
11100 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11101 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11102 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11103
11104 std::string fd = FPR(copy(fd_value));
11105 std::string fs = FPR(copy(fs_value));
11106 std::string ft = FPR(copy(ft_value));
11107
11108 return img_format("MUL.D %s, %s, %s", fd, fs, ft);
11109 }
11110
11111
11112 /*
11113 * [DSP] MUL.PH rd, rs, rt - Multiply vector integer half words to same size
11114 * products
11115 *
11116 * 3 2 1
11117 * 10987654321098765432109876543210
11118 * 001000 00000101101
11119 * rt -----
11120 * rs -----
11121 * rd -----
11122 */
11123 static std::string MUL_PH(uint64 instruction, Dis_info *info)
11124 {
11125 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11126 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11127 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11128
11129 std::string rd = GPR(copy(rd_value));
11130 std::string rs = GPR(copy(rs_value));
11131 std::string rt = GPR(copy(rt_value));
11132
11133 return img_format("MUL.PH %s, %s, %s", rd, rs, rt);
11134 }
11135
11136
11137 /*
11138 * [DSP] MUL_S.PH rd, rs, rt - Multiply vector integer half words to same size
11139 * products (saturated)
11140 *
11141 * 3 2 1
11142 * 10987654321098765432109876543210
11143 * 001000 10000101101
11144 * rt -----
11145 * rs -----
11146 * rd -----
11147 */
11148 static std::string MUL_S_PH(uint64 instruction, Dis_info *info)
11149 {
11150 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11151 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11152 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11153
11154 std::string rd = GPR(copy(rd_value));
11155 std::string rs = GPR(copy(rs_value));
11156 std::string rt = GPR(copy(rt_value));
11157
11158 return img_format("MUL_S.PH %s, %s, %s", rd, rs, rt);
11159 }
11160
11161
11162 /*
11163 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11164 *
11165 * 3 2 1
11166 * 10987654321098765432109876543210
11167 * 001000 00010001101
11168 * rt -----
11169 * rs -----
11170 * rd -----
11171 */
11172 static std::string MUL_S(uint64 instruction, Dis_info *info)
11173 {
11174 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11175 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11176 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11177
11178 std::string fd = FPR(copy(fd_value));
11179 std::string fs = FPR(copy(fs_value));
11180 std::string ft = FPR(copy(ft_value));
11181
11182 return img_format("MUL.S %s, %s, %s", fd, fs, ft);
11183 }
11184
11185
11186 /*
11187 * [DSP] MULEQ_S.W.PHL rd, rs, rt - Multiply vector fractional left halfwords
11188 * to expanded width products
11189 *
11190 * 3 2 1
11191 * 10987654321098765432109876543210
11192 * 001000 x0000100101
11193 * rt -----
11194 * rs -----
11195 * rd -----
11196 */
11197 static std::string MULEQ_S_W_PHL(uint64 instruction, Dis_info *info)
11198 {
11199 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11200 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11201 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11202
11203 std::string rd = GPR(copy(rd_value));
11204 std::string rs = GPR(copy(rs_value));
11205 std::string rt = GPR(copy(rt_value));
11206
11207 return img_format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt);
11208 }
11209
11210
11211 /*
11212 * [DSP] MULEQ_S.W.PHR rd, rs, rt - Multiply vector fractional right halfwords
11213 * to expanded width products
11214 *
11215 * 3 2 1
11216 * 10987654321098765432109876543210
11217 * 001000 x0001100101
11218 * rt -----
11219 * rs -----
11220 * rd -----
11221 */
11222 static std::string MULEQ_S_W_PHR(uint64 instruction, Dis_info *info)
11223 {
11224 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11225 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11226 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11227
11228 std::string rd = GPR(copy(rd_value));
11229 std::string rs = GPR(copy(rs_value));
11230 std::string rt = GPR(copy(rt_value));
11231
11232 return img_format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt);
11233 }
11234
11235
11236 /*
11237 * [DSP] MULEU_S.PH.QBL rd, rs, rt - Multiply vector fractional left bytes
11238 * by halfwords to halfword products
11239 *
11240 * 3 2 1
11241 * 10987654321098765432109876543210
11242 * 001000 x0010010101
11243 * rt -----
11244 * rs -----
11245 * rd -----
11246 */
11247 static std::string MULEU_S_PH_QBL(uint64 instruction, Dis_info *info)
11248 {
11249 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11250 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11251 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11252
11253 std::string rd = GPR(copy(rd_value));
11254 std::string rs = GPR(copy(rs_value));
11255 std::string rt = GPR(copy(rt_value));
11256
11257 return img_format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt);
11258 }
11259
11260
11261 /*
11262 * [DSP] MULEU_S.PH.QBR rd, rs, rt - Multiply vector fractional right bytes
11263 * by halfwords to halfword products
11264 *
11265 * 3 2 1
11266 * 10987654321098765432109876543210
11267 * 001000 x0011010101
11268 * rt -----
11269 * rs -----
11270 * rd -----
11271 */
11272 static std::string MULEU_S_PH_QBR(uint64 instruction, Dis_info *info)
11273 {
11274 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11275 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11276 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11277
11278 std::string rd = GPR(copy(rd_value));
11279 std::string rs = GPR(copy(rs_value));
11280 std::string rt = GPR(copy(rt_value));
11281
11282 return img_format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt);
11283 }
11284
11285
11286 /*
11287 * [DSP] MULQ_RS.PH rd, rs, rt - Multiply vector fractional halfwords
11288 * to fractional halfword products
11289 *
11290 * 3 2 1
11291 * 10987654321098765432109876543210
11292 * 001000 x0100010101
11293 * rt -----
11294 * rs -----
11295 * rd -----
11296 */
11297 static std::string MULQ_RS_PH(uint64 instruction, Dis_info *info)
11298 {
11299 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11300 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11301 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11302
11303 std::string rd = GPR(copy(rd_value));
11304 std::string rs = GPR(copy(rs_value));
11305 std::string rt = GPR(copy(rt_value));
11306
11307 return img_format("MULQ_RS.PH %s, %s, %s", rd, rs, rt);
11308 }
11309
11310
11311 /*
11312 * [DSP] MULQ_RS.W rd, rs, rt - Multiply fractional words to same size
11313 * product with saturation and rounding
11314 *
11315 * 3 2 1
11316 * 10987654321098765432109876543210
11317 * 001000 x0110010101
11318 * rt -----
11319 * rs -----
11320 * rd -----
11321 */
11322 static std::string MULQ_RS_W(uint64 instruction, Dis_info *info)
11323 {
11324 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11325 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11326 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11327
11328 std::string rd = GPR(copy(rd_value));
11329 std::string rs = GPR(copy(rs_value));
11330 std::string rt = GPR(copy(rt_value));
11331
11332 return img_format("MULQ_RS.W %s, %s, %s", rd, rs, rt);
11333 }
11334
11335
11336 /*
11337 * [DSP] MULQ_S.PH rd, rs, rt - Multiply fractional halfwords to same size
11338 * products
11339 *
11340 * 3 2 1
11341 * 10987654321098765432109876543210
11342 * 001000 x0101010101
11343 * rt -----
11344 * rs -----
11345 * rd -----
11346 */
11347 static std::string MULQ_S_PH(uint64 instruction, Dis_info *info)
11348 {
11349 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11350 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11351 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11352
11353 std::string rd = GPR(copy(rd_value));
11354 std::string rs = GPR(copy(rs_value));
11355 std::string rt = GPR(copy(rt_value));
11356
11357 return img_format("MULQ_S.PH %s, %s, %s", rd, rs, rt);
11358 }
11359
11360
11361 /*
11362 * [DSP] MULQ_S.W rd, rs, rt - Multiply fractional words to same size product
11363 * with saturation
11364 *
11365 * 3 2 1
11366 * 10987654321098765432109876543210
11367 * 001000 x0111010101
11368 * rt -----
11369 * rs -----
11370 * rd -----
11371 */
11372 static std::string MULQ_S_W(uint64 instruction, Dis_info *info)
11373 {
11374 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11375 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11376 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11377
11378 std::string rd = GPR(copy(rd_value));
11379 std::string rs = GPR(copy(rs_value));
11380 std::string rt = GPR(copy(rt_value));
11381
11382 return img_format("MULQ_S.W %s, %s, %s", rd, rs, rt);
11383 }
11384
11385
11386 /*
11387 * [DSP] MULSA.W.PH ac, rs, rt - Multiply and subtract vector integer halfword
11388 * elements and accumulate
11389 *
11390 * 3 2 1
11391 * 10987654321098765432109876543210
11392 * 001000 10110010111111
11393 * rt -----
11394 * rs -----
11395 * ac --
11396 */
11397 static std::string MULSA_W_PH(uint64 instruction, Dis_info *info)
11398 {
11399 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11400 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11401 uint64 ac_value = extract_ac_15_14(instruction);
11402
11403 std::string ac = AC(copy(ac_value));
11404 std::string rs = GPR(copy(rs_value));
11405 std::string rt = GPR(copy(rt_value));
11406
11407 return img_format("MULSA.W.PH %s, %s, %s", ac, rs, rt);
11408 }
11409
11410
11411 /*
11412 * [DSP] MULSAQ_S.W.PH ac, rs, rt - Multiply and subtract vector fractional
11413 * halfwords and accumulate
11414 *
11415 * 3 2 1
11416 * 10987654321098765432109876543210
11417 * 001000 11110010111111
11418 * rt -----
11419 * rs -----
11420 * ac --
11421 */
11422 static std::string MULSAQ_S_W_PH(uint64 instruction, Dis_info *info)
11423 {
11424 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11425 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11426 uint64 ac_value = extract_ac_15_14(instruction);
11427
11428 std::string ac = AC(copy(ac_value));
11429 std::string rs = GPR(copy(rs_value));
11430 std::string rt = GPR(copy(rt_value));
11431
11432 return img_format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt);
11433 }
11434
11435
11436 /*
11437 * [DSP] MULT ac, rs, rt - Multiply word
11438 *
11439 * 3 2 1
11440 * 10987654321098765432109876543210
11441 * 001000 00110010111111
11442 * rt -----
11443 * rs -----
11444 * ac --
11445 */
11446 static std::string MULT_DSP_(uint64 instruction, Dis_info *info)
11447 {
11448 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11449 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11450 uint64 ac_value = extract_ac_15_14(instruction);
11451
11452 std::string ac = AC(copy(ac_value));
11453 std::string rs = GPR(copy(rs_value));
11454 std::string rt = GPR(copy(rt_value));
11455
11456 return img_format("MULT %s, %s, %s", ac, rs, rt);
11457 }
11458
11459
11460 /*
11461 * [DSP] MULTU ac, rs, rt - Multiply unsigned word
11462 *
11463 * 3 2 1
11464 * 10987654321098765432109876543210
11465 * 001000 01110010111111
11466 * rt -----
11467 * rs -----
11468 * ac --
11469 */
11470 static std::string MULTU_DSP_(uint64 instruction, Dis_info *info)
11471 {
11472 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11473 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11474 uint64 ac_value = extract_ac_15_14(instruction);
11475
11476 std::string ac = AC(copy(ac_value));
11477 std::string rs = GPR(copy(rs_value));
11478 std::string rt = GPR(copy(rt_value));
11479
11480 return img_format("MULTU %s, %s, %s", ac, rs, rt);
11481 }
11482
11483
11484 /*
11485 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11486 *
11487 * 3 2 1
11488 * 10987654321098765432109876543210
11489 * 001000 00010001101
11490 * rt -----
11491 * rs -----
11492 * rd -----
11493 */
11494 static std::string MULU(uint64 instruction, Dis_info *info)
11495 {
11496 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11497 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11498 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11499
11500 std::string rd = GPR(copy(rd_value));
11501 std::string rs = GPR(copy(rs_value));
11502 std::string rt = GPR(copy(rt_value));
11503
11504 return img_format("MULU %s, %s, %s", rd, rs, rt);
11505 }
11506
11507
11508 /*
11509 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11510 *
11511 * 3 2 1
11512 * 10987654321098765432109876543210
11513 * 001000 00010001101
11514 * rt -----
11515 * rs -----
11516 * rd -----
11517 */
11518 static std::string NEG_D(uint64 instruction, Dis_info *info)
11519 {
11520 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11521 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11522
11523 std::string ft = FPR(copy(ft_value));
11524 std::string fs = FPR(copy(fs_value));
11525
11526 return img_format("NEG.D %s, %s", ft, fs);
11527 }
11528
11529
11530 /*
11531 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11532 *
11533 * 3 2 1
11534 * 10987654321098765432109876543210
11535 * 001000 00010001101
11536 * rt -----
11537 * rs -----
11538 * rd -----
11539 */
11540 static std::string NEG_S(uint64 instruction, Dis_info *info)
11541 {
11542 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11543 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11544
11545 std::string ft = FPR(copy(ft_value));
11546 std::string fs = FPR(copy(fs_value));
11547
11548 return img_format("NEG.S %s, %s", ft, fs);
11549 }
11550
11551
11552 /*
11553 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11554 *
11555 * 3 2 1
11556 * 10987654321098765432109876543210
11557 * 001000 00010001101
11558 * rt -----
11559 * rs -----
11560 * rd -----
11561 */
11562 static std::string NOP_16_(uint64 instruction, Dis_info *info)
11563 {
11564 (void)instruction;
11565
11566 return "NOP ";
11567 }
11568
11569
11570 /*
11571 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11572 *
11573 * 3 2 1
11574 * 10987654321098765432109876543210
11575 * 001000 00010001101
11576 * rt -----
11577 * rs -----
11578 * rd -----
11579 */
11580 static std::string NOP_32_(uint64 instruction, Dis_info *info)
11581 {
11582 (void)instruction;
11583
11584 return "NOP ";
11585 }
11586
11587
11588 /*
11589 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11590 *
11591 * 3 2 1
11592 * 10987654321098765432109876543210
11593 * 001000 00010001101
11594 * rt -----
11595 * rs -----
11596 * rd -----
11597 */
11598 static std::string NOR(uint64 instruction, Dis_info *info)
11599 {
11600 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11601 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11602 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11603
11604 std::string rd = GPR(copy(rd_value));
11605 std::string rs = GPR(copy(rs_value));
11606 std::string rt = GPR(copy(rt_value));
11607
11608 return img_format("NOR %s, %s, %s", rd, rs, rt);
11609 }
11610
11611
11612 /*
11613 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11614 *
11615 * 3 2 1
11616 * 10987654321098765432109876543210
11617 * 001000 00010001101
11618 * rt -----
11619 * rs -----
11620 * rd -----
11621 */
11622 static std::string NOT_16_(uint64 instruction, Dis_info *info)
11623 {
11624 uint64 rt3_value = extract_rt3_9_8_7(instruction);
11625 uint64 rs3_value = extract_rs3_6_5_4(instruction);
11626
11627 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11628 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11629
11630 return img_format("NOT %s, %s", rt3, rs3);
11631 }
11632
11633
11634 /*
11635 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11636 *
11637 * 3 2 1
11638 * 10987654321098765432109876543210
11639 * 001000 00010001101
11640 * rt -----
11641 * rs -----
11642 * rd -----
11643 */
11644 static std::string OR_16_(uint64 instruction, Dis_info *info)
11645 {
11646 uint64 rt3_value = extract_rt3_9_8_7(instruction);
11647 uint64 rs3_value = extract_rs3_6_5_4(instruction);
11648
11649 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11650 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11651
11652 return img_format("OR %s, %s", rs3, rt3);
11653 }
11654
11655
11656 /*
11657 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11658 *
11659 * 3 2 1
11660 * 10987654321098765432109876543210
11661 * 001000 00010001101
11662 * rt -----
11663 * rs -----
11664 * rd -----
11665 */
11666 static std::string OR_32_(uint64 instruction, Dis_info *info)
11667 {
11668 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11669 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11670 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11671
11672 std::string rd = GPR(copy(rd_value));
11673 std::string rs = GPR(copy(rs_value));
11674 std::string rt = GPR(copy(rt_value));
11675
11676 return img_format("OR %s, %s, %s", rd, rs, rt);
11677 }
11678
11679
11680 /*
11681 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11682 *
11683 * 3 2 1
11684 * 10987654321098765432109876543210
11685 * 001000 00010001101
11686 * rt -----
11687 * rs -----
11688 * rd -----
11689 */
11690 static std::string ORI(uint64 instruction, Dis_info *info)
11691 {
11692 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11693 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11694 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
11695
11696 std::string rt = GPR(copy(rt_value));
11697 std::string rs = GPR(copy(rs_value));
11698 std::string u = IMMEDIATE(copy(u_value));
11699
11700 return img_format("ORI %s, %s, %s", rt, rs, u);
11701 }
11702
11703
11704 /*
11705 * [DSP] PACKRL.PH rd, rs, rt - Pack a word using the right halfword from one
11706 * source register and left halfword from another source register
11707 *
11708 * 3 2 1
11709 * 10987654321098765432109876543210
11710 * 001000 00010001101
11711 * rt -----
11712 * rs -----
11713 * rd -----
11714 */
11715 static std::string PACKRL_PH(uint64 instruction, Dis_info *info)
11716 {
11717 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11718 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11719 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11720
11721 std::string rd = GPR(copy(rd_value));
11722 std::string rs = GPR(copy(rs_value));
11723 std::string rt = GPR(copy(rt_value));
11724
11725 return img_format("PACKRL.PH %s, %s, %s", rd, rs, rt);
11726 }
11727
11728
11729 /*
11730 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11731 *
11732 * 3 2 1
11733 * 10987654321098765432109876543210
11734 * 001000 00010001101
11735 * rt -----
11736 * rs -----
11737 * rd -----
11738 */
11739 static std::string PAUSE(uint64 instruction, Dis_info *info)
11740 {
11741 (void)instruction;
11742
11743 return "PAUSE ";
11744 }
11745
11746
11747 /*
11748 * [DSP] PICK.PH rd, rs, rt - Pick a vector of halfwords based on condition
11749 * code bits
11750 *
11751 * 3 2 1
11752 * 10987654321098765432109876543210
11753 * 001000 00010001101
11754 * rt -----
11755 * rs -----
11756 * rd -----
11757 */
11758 static std::string PICK_PH(uint64 instruction, Dis_info *info)
11759 {
11760 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11761 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11762 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11763
11764 std::string rd = GPR(copy(rd_value));
11765 std::string rs = GPR(copy(rs_value));
11766 std::string rt = GPR(copy(rt_value));
11767
11768 return img_format("PICK.PH %s, %s, %s", rd, rs, rt);
11769 }
11770
11771
11772 /*
11773 * [DSP] PICK.QB rd, rs, rt - Pick a vector of byte values based on condition
11774 * code bits
11775 *
11776 * 3 2 1
11777 * 10987654321098765432109876543210
11778 * 001000 00010001101
11779 * rt -----
11780 * rs -----
11781 * rd -----
11782 */
11783 static std::string PICK_QB(uint64 instruction, Dis_info *info)
11784 {
11785 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11786 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11787 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11788
11789 std::string rd = GPR(copy(rd_value));
11790 std::string rs = GPR(copy(rs_value));
11791 std::string rt = GPR(copy(rt_value));
11792
11793 return img_format("PICK.QB %s, %s, %s", rd, rs, rt);
11794 }
11795
11796
11797 /*
11798 * [DSP] PRECEQ.W.PHL rt, rs - Expand the precision of the left-most element
11799 * of a paired halfword
11800 *
11801 * 3 2 1
11802 * 10987654321098765432109876543210
11803 * 001000 00010001101
11804 * rt -----
11805 * rs -----
11806 * rd -----
11807 */
11808 static std::string PRECEQ_W_PHL(uint64 instruction, Dis_info *info)
11809 {
11810 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11811 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11812
11813 std::string rt = GPR(copy(rt_value));
11814 std::string rs = GPR(copy(rs_value));
11815
11816 return img_format("PRECEQ.W.PHL %s, %s", rt, rs);
11817 }
11818
11819
11820 /*
11821 * [DSP] PRECEQ.W.PHR rt, rs - Expand the precision of the right-most element
11822 * of a paired halfword
11823 *
11824 * 3 2 1
11825 * 10987654321098765432109876543210
11826 * 001000 00010001101
11827 * rt -----
11828 * rs -----
11829 * rd -----
11830 */
11831 static std::string PRECEQ_W_PHR(uint64 instruction, Dis_info *info)
11832 {
11833 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11834 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11835
11836 std::string rt = GPR(copy(rt_value));
11837 std::string rs = GPR(copy(rs_value));
11838
11839 return img_format("PRECEQ.W.PHR %s, %s", rt, rs);
11840 }
11841
11842
11843 /*
11844 * [DSP] PRECEQU.PH.QBLA rt, rs - Expand the precision of the two
11845 * left-alternate elements of a quad byte vector
11846 *
11847 * 3 2 1
11848 * 10987654321098765432109876543210
11849 * 001000 00010001101
11850 * rt -----
11851 * rs -----
11852 * rd -----
11853 */
11854 static std::string PRECEQU_PH_QBLA(uint64 instruction, Dis_info *info)
11855 {
11856 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11857 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11858
11859 std::string rt = GPR(copy(rt_value));
11860 std::string rs = GPR(copy(rs_value));
11861
11862 return img_format("PRECEQU.PH.QBLA %s, %s", rt, rs);
11863 }
11864
11865
11866 /*
11867 * [DSP] PRECEQU.PH.QBL rt, rs - Expand the precision of the two left-most
11868 * elements of a quad byte vector
11869 *
11870 * 3 2 1
11871 * 10987654321098765432109876543210
11872 * 001000 00010001101
11873 * rt -----
11874 * rs -----
11875 * rd -----
11876 */
11877 static std::string PRECEQU_PH_QBL(uint64 instruction, Dis_info *info)
11878 {
11879 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11880 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11881
11882 std::string rt = GPR(copy(rt_value));
11883 std::string rs = GPR(copy(rs_value));
11884
11885 return img_format("PRECEQU.PH.QBL %s, %s", rt, rs);
11886 }
11887
11888
11889 /*
11890 * [DSP] PRECEQU.PH.QBRA rt, rs - Expand the precision of the two
11891 * right-alternate elements of a quad byte vector
11892 *
11893 * 3 2 1
11894 * 10987654321098765432109876543210
11895 * 001000 00010001101
11896 * rt -----
11897 * rs -----
11898 * rd -----
11899 */
11900 static std::string PRECEQU_PH_QBRA(uint64 instruction, Dis_info *info)
11901 {
11902 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11903 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11904
11905 std::string rt = GPR(copy(rt_value));
11906 std::string rs = GPR(copy(rs_value));
11907
11908 return img_format("PRECEQU.PH.QBRA %s, %s", rt, rs);
11909 }
11910
11911
11912 /*
11913 * [DSP] PRECEQU.PH.QBR rt, rs - Expand the precision of the two right-most
11914 * elements of a quad byte vector
11915 *
11916 * 3 2 1
11917 * 10987654321098765432109876543210
11918 * 001000 00010001101
11919 * rt -----
11920 * rs -----
11921 * rd -----
11922 */
11923 static std::string PRECEQU_PH_QBR(uint64 instruction, Dis_info *info)
11924 {
11925 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11926 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11927
11928 std::string rt = GPR(copy(rt_value));
11929 std::string rs = GPR(copy(rs_value));
11930
11931 return img_format("PRECEQU.PH.QBR %s, %s", rt, rs);
11932 }
11933
11934
11935 /*
11936 * [DSP] PRECEU.PH.QBLA rt, rs - Expand the precision of the two
11937 * left-alternate elements of a quad byte vector to four unsigned
11938 * halfwords
11939 *
11940 * 3 2 1
11941 * 10987654321098765432109876543210
11942 * 001000 00010001101
11943 * rt -----
11944 * rs -----
11945 * rd -----
11946 */
11947 static std::string PRECEU_PH_QBLA(uint64 instruction, Dis_info *info)
11948 {
11949 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11950 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11951
11952 std::string rt = GPR(copy(rt_value));
11953 std::string rs = GPR(copy(rs_value));
11954
11955 return img_format("PRECEU.PH.QBLA %s, %s", rt, rs);
11956 }
11957
11958
11959 /*
11960 * [DSP] PRECEU.PH.QBL rt, rs - Expand the precision of the two left-most
11961 * elements of a quad byte vector to form unsigned halfwords
11962 *
11963 * 3 2 1
11964 * 10987654321098765432109876543210
11965 * 001000 00010001101
11966 * rt -----
11967 * rs -----
11968 * rd -----
11969 */
11970 static std::string PRECEU_PH_QBL(uint64 instruction, Dis_info *info)
11971 {
11972 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11973 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11974
11975 std::string rt = GPR(copy(rt_value));
11976 std::string rs = GPR(copy(rs_value));
11977
11978 return img_format("PRECEU.PH.QBL %s, %s", rt, rs);
11979 }
11980
11981
11982 /*
11983 * [DSP] PRECEU.PH.QBRA rt, rs - Expand the precision of the two
11984 * right-alternate elements of a quad byte vector to form four
11985 * unsigned halfwords
11986 *
11987 * 3 2 1
11988 * 10987654321098765432109876543210
11989 * 001000 00010001101
11990 * rt -----
11991 * rs -----
11992 * rd -----
11993 */
11994 static std::string PRECEU_PH_QBRA(uint64 instruction, Dis_info *info)
11995 {
11996 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11997 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11998
11999 std::string rt = GPR(copy(rt_value));
12000 std::string rs = GPR(copy(rs_value));
12001
12002 return img_format("PRECEU.PH.QBRA %s, %s", rt, rs);
12003 }
12004
12005
12006 /*
12007 * [DSP] PRECEU.PH.QBR rt, rs - Expand the precision of the two right-most
12008 * elements of a quad byte vector to form unsigned halfwords
12009 *
12010 * 3 2 1
12011 * 10987654321098765432109876543210
12012 * 001000 00010001101
12013 * rt -----
12014 * rs -----
12015 * rd -----
12016 */
12017 static std::string PRECEU_PH_QBR(uint64 instruction, Dis_info *info)
12018 {
12019 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12020 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12021
12022 std::string rt = GPR(copy(rt_value));
12023 std::string rs = GPR(copy(rs_value));
12024
12025 return img_format("PRECEU.PH.QBR %s, %s", rt, rs);
12026 }
12027
12028
12029 /*
12030 * [DSP] PRECR.QB.PH rd, rs, rt - Reduce the precision of four integer
12031 * halfwords to four bytes
12032 *
12033 * 3 2 1
12034 * 10987654321098765432109876543210
12035 * 001000 x0001101101
12036 * rt -----
12037 * rs -----
12038 * rd -----
12039 */
12040 static std::string PRECR_QB_PH(uint64 instruction, Dis_info *info)
12041 {
12042 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12043 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12044 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12045
12046 std::string rd = GPR(copy(rd_value));
12047 std::string rs = GPR(copy(rs_value));
12048 std::string rt = GPR(copy(rt_value));
12049
12050 return img_format("PRECR.QB.PH %s, %s, %s", rd, rs, rt);
12051 }
12052
12053
12054 /*
12055 * [DSP] PRECR_SRA.PH.W rt, rs, sa - Reduce the precision of two integer
12056 * words to halfwords after a right shift
12057 *
12058 * 3 2 1
12059 * 10987654321098765432109876543210
12060 * 001000 x1110000101
12061 * rt -----
12062 * rs -----
12063 * rd -----
12064 */
12065 static std::string PRECR_SRA_PH_W(uint64 instruction, Dis_info *info)
12066 {
12067 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12068 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12069 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12070
12071 std::string rt = GPR(copy(rt_value));
12072 std::string rs = GPR(copy(rs_value));
12073 std::string sa = IMMEDIATE(copy(sa_value));
12074
12075 return img_format("PRECR_SRA.PH.W %s, %s, %s", rt, rs, sa);
12076 }
12077
12078
12079 /*
12080 * [DSP] PRECR_SRA_R.PH.W rt, rs, sa - Reduce the precision of two integer
12081 * words to halfwords after a right shift with rounding
12082 *
12083 * 3 2 1
12084 * 10987654321098765432109876543210
12085 * 001000 x1110000101
12086 * rt -----
12087 * rs -----
12088 * rd -----
12089 */
12090 static std::string PRECR_SRA_R_PH_W(uint64 instruction, Dis_info *info)
12091 {
12092 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12093 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12094 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12095
12096 std::string rt = GPR(copy(rt_value));
12097 std::string rs = GPR(copy(rs_value));
12098 std::string sa = IMMEDIATE(copy(sa_value));
12099
12100 return img_format("PRECR_SRA_R.PH.W %s, %s, %s", rt, rs, sa);
12101 }
12102
12103
12104 /*
12105 * [DSP] PRECRQ.PH.W rd, rs, rt - Reduce the precision of fractional
12106 * words to fractional halfwords
12107 *
12108 * 3 2 1
12109 * 10987654321098765432109876543210
12110 * 001000 x1110000101
12111 * rt -----
12112 * rs -----
12113 * rd -----
12114 */
12115 static std::string PRECRQ_PH_W(uint64 instruction, Dis_info *info)
12116 {
12117 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12118 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12119 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12120
12121 std::string rd = GPR(copy(rd_value));
12122 std::string rs = GPR(copy(rs_value));
12123 std::string rt = GPR(copy(rt_value));
12124
12125 return img_format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt);
12126 }
12127
12128
12129 /*
12130 * [DSP] PRECRQ.QB.PH rd, rs, rt - Reduce the precision of four fractional
12131 * halfwords to four bytes
12132 *
12133 * 3 2 1
12134 * 10987654321098765432109876543210
12135 * 001000 x0010101101
12136 * rt -----
12137 * rs -----
12138 * rd -----
12139 */
12140 static std::string PRECRQ_QB_PH(uint64 instruction, Dis_info *info)
12141 {
12142 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12143 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12144 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12145
12146 std::string rd = GPR(copy(rd_value));
12147 std::string rs = GPR(copy(rs_value));
12148 std::string rt = GPR(copy(rt_value));
12149
12150 return img_format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt);
12151 }
12152
12153
12154 /*
12155 * [DSP] PRECRQ_RS.PH.W rd, rs, rt - Reduce the precision of fractional
12156 * words to halfwords with rounding and saturation
12157 *
12158 * 3 2 1
12159 * 10987654321098765432109876543210
12160 * 001000 x1110000101
12161 * rt -----
12162 * rs -----
12163 * rd -----
12164 */
12165 static std::string PRECRQ_RS_PH_W(uint64 instruction, Dis_info *info)
12166 {
12167 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12168 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12169 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12170
12171 std::string rd = GPR(copy(rd_value));
12172 std::string rs = GPR(copy(rs_value));
12173 std::string rt = GPR(copy(rt_value));
12174
12175 return img_format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt);
12176 }
12177
12178
12179 /*
12180 * [DSP] PRECRQU_S.QB.PH rd, rs, rt - Reduce the precision of fractional
12181 * halfwords to unsigned bytes with saturation
12182 *
12183 * 3 2 1
12184 * 10987654321098765432109876543210
12185 * 001000 x1110000101
12186 * rt -----
12187 * rs -----
12188 * rd -----
12189 */
12190 static std::string PRECRQU_S_QB_PH(uint64 instruction, Dis_info *info)
12191 {
12192 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12193 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12194 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12195
12196 std::string rd = GPR(copy(rd_value));
12197 std::string rs = GPR(copy(rs_value));
12198 std::string rt = GPR(copy(rt_value));
12199
12200 return img_format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt);
12201 }
12202
12203
12204 /*
12205 *
12206 *
12207 * 3 2 1
12208 * 10987654321098765432109876543210
12209 * 001000 x1110000101
12210 * rt -----
12211 * rs -----
12212 * rd -----
12213 */
12214 static std::string PREF_S9_(uint64 instruction, Dis_info *info)
12215 {
12216 uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12217 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12218 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12219
12220 std::string hint = IMMEDIATE(copy(hint_value));
12221 std::string s = IMMEDIATE(copy(s_value));
12222 std::string rs = GPR(copy(rs_value));
12223
12224 return img_format("PREF %s, %s(%s)", hint, s, rs);
12225 }
12226
12227
12228 /*
12229 *
12230 *
12231 * 3 2 1
12232 * 10987654321098765432109876543210
12233 * 001000 x1110000101
12234 * rt -----
12235 * rs -----
12236 * rd -----
12237 */
12238 static std::string PREF_U12_(uint64 instruction, Dis_info *info)
12239 {
12240 uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12241 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12242 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12243
12244 std::string hint = IMMEDIATE(copy(hint_value));
12245 std::string u = IMMEDIATE(copy(u_value));
12246 std::string rs = GPR(copy(rs_value));
12247
12248 return img_format("PREF %s, %s(%s)", hint, u, rs);
12249 }
12250
12251
12252 /*
12253 *
12254 *
12255 * 3 2 1
12256 * 10987654321098765432109876543210
12257 * 001000 x1110000101
12258 * rt -----
12259 * rs -----
12260 * rd -----
12261 */
12262 static std::string PREFE(uint64 instruction, Dis_info *info)
12263 {
12264 uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12265 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12266 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12267
12268 std::string hint = IMMEDIATE(copy(hint_value));
12269 std::string s = IMMEDIATE(copy(s_value));
12270 std::string rs = GPR(copy(rs_value));
12271
12272 return img_format("PREFE %s, %s(%s)", hint, s, rs);
12273 }
12274
12275
12276 /*
12277 * [DSP] PREPEND rt, rs, sa - Right shift and prepend bits to the MSB
12278 *
12279 * 3 2 1
12280 * 10987654321098765432109876543210
12281 * 001000 x1110000101
12282 * rt -----
12283 * rs -----
12284 * rd -----
12285 */
12286 static std::string PREPEND(uint64 instruction, Dis_info *info)
12287 {
12288 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12289 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12290 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12291
12292 std::string rt = GPR(copy(rt_value));
12293 std::string rs = GPR(copy(rs_value));
12294 std::string sa = IMMEDIATE(copy(sa_value));
12295
12296 return img_format("PREPEND %s, %s, %s", rt, rs, sa);
12297 }
12298
12299
12300 /*
12301 * [DSP] RADDU.W.QB rt, rs - Unsigned reduction add of vector quad bytes
12302 *
12303 * 3 2 1
12304 * 10987654321098765432109876543210
12305 * 001000 1111000100111111
12306 * rt -----
12307 * rs -----
12308 */
12309 static std::string RADDU_W_QB(uint64 instruction, Dis_info *info)
12310 {
12311 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12312 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12313
12314 std::string rt = GPR(copy(rt_value));
12315 std::string rs = GPR(copy(rs_value));
12316
12317 return img_format("RADDU.W.QB %s, %s", rt, rs);
12318 }
12319
12320
12321 /*
12322 * [DSP] RDDSP rt, mask - Read DSPControl register fields to a GPR
12323 *
12324 * 3 2 1
12325 * 10987654321098765432109876543210
12326 * 001000 00011001111111
12327 * rt -----
12328 * mask -------
12329 */
12330 static std::string RDDSP(uint64 instruction, Dis_info *info)
12331 {
12332 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12333 uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
12334
12335 std::string rt = GPR(copy(rt_value));
12336 std::string mask = IMMEDIATE(copy(mask_value));
12337
12338 return img_format("RDDSP %s, %s", rt, mask);
12339 }
12340
12341
12342 /*
12343 *
12344 *
12345 * 3 2 1
12346 * 10987654321098765432109876543210
12347 * 001000 x1110000101
12348 * rt -----
12349 * rs -----
12350 * rd -----
12351 */
12352 static std::string RDHWR(uint64 instruction, Dis_info *info)
12353 {
12354 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12355 uint64 hs_value = extract_hs_20_19_18_17_16(instruction);
12356 uint64 sel_value = extract_sel_13_12_11(instruction);
12357
12358 std::string rt = GPR(copy(rt_value));
12359 std::string hs = CPR(copy(hs_value));
12360 std::string sel = IMMEDIATE(copy(sel_value));
12361
12362 return img_format("RDHWR %s, %s, %s", rt, hs, sel);
12363 }
12364
12365
12366 /*
12367 *
12368 *
12369 * 3 2 1
12370 * 10987654321098765432109876543210
12371 * 001000 x1110000101
12372 * rt -----
12373 * rs -----
12374 * rd -----
12375 */
12376 static std::string RDPGPR(uint64 instruction, Dis_info *info)
12377 {
12378 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12379 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12380
12381 std::string rt = GPR(copy(rt_value));
12382 std::string rs = GPR(copy(rs_value));
12383
12384 return img_format("RDPGPR %s, %s", rt, rs);
12385 }
12386
12387
12388 /*
12389 *
12390 *
12391 * 3 2 1
12392 * 10987654321098765432109876543210
12393 * 001000 x1110000101
12394 * rt -----
12395 * rs -----
12396 * rd -----
12397 */
12398 static std::string RECIP_D(uint64 instruction, Dis_info *info)
12399 {
12400 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12401 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12402
12403 std::string ft = FPR(copy(ft_value));
12404 std::string fs = FPR(copy(fs_value));
12405
12406 return img_format("RECIP.D %s, %s", ft, fs);
12407 }
12408
12409
12410 /*
12411 *
12412 *
12413 * 3 2 1
12414 * 10987654321098765432109876543210
12415 * 001000 x1110000101
12416 * rt -----
12417 * rs -----
12418 * rd -----
12419 */
12420 static std::string RECIP_S(uint64 instruction, Dis_info *info)
12421 {
12422 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12423 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12424
12425 std::string ft = FPR(copy(ft_value));
12426 std::string fs = FPR(copy(fs_value));
12427
12428 return img_format("RECIP.S %s, %s", ft, fs);
12429 }
12430
12431
12432 /*
12433 * [DSP] REPL.PH rd, s - Replicate immediate integer into all vector element
12434 * positions
12435 *
12436 * 3 2 1
12437 * 10987654321098765432109876543210
12438 * 001000 x0000111101
12439 * rt -----
12440 * s ----------
12441 */
12442 static std::string REPL_PH(uint64 instruction, Dis_info *info)
12443 {
12444 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12445 int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction);
12446
12447 std::string rt = GPR(copy(rt_value));
12448 std::string s = IMMEDIATE(copy(s_value));
12449
12450 return img_format("REPL.PH %s, %s", rt, s);
12451 }
12452
12453
12454 /*
12455 * [DSP] REPL.QB rd, u - Replicate immediate integer into all vector element
12456 * positions
12457 *
12458 * 3 2 1
12459 * 10987654321098765432109876543210
12460 * 001000 x010111111111
12461 * rt -----
12462 * u --------
12463 */
12464 static std::string REPL_QB(uint64 instruction, Dis_info *info)
12465 {
12466 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12467 uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction);
12468
12469 std::string rt = GPR(copy(rt_value));
12470 std::string u = IMMEDIATE(copy(u_value));
12471
12472 return img_format("REPL.QB %s, %s", rt, u);
12473 }
12474
12475
12476 /*
12477 * [DSP] REPLV.PH rt, rs - Replicate a halfword into all vector element
12478 * positions
12479 *
12480 * 3 2 1
12481 * 10987654321098765432109876543210
12482 * 001000 0000001100111111
12483 * rt -----
12484 * rs -----
12485 */
12486 static std::string REPLV_PH(uint64 instruction, Dis_info *info)
12487 {
12488 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12489 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12490
12491 std::string rt = GPR(copy(rt_value));
12492 std::string rs = GPR(copy(rs_value));
12493
12494 return img_format("REPLV.PH %s, %s", rt, rs);
12495 }
12496
12497
12498 /*
12499 * [DSP] REPLV.QB rt, rs - Replicate byte into all vector element positions
12500 *
12501 * 3 2 1
12502 * 10987654321098765432109876543210
12503 * 001000 0001001100111111
12504 * rt -----
12505 * rs -----
12506 */
12507 static std::string REPLV_QB(uint64 instruction, Dis_info *info)
12508 {
12509 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12510 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12511
12512 std::string rt = GPR(copy(rt_value));
12513 std::string rs = GPR(copy(rs_value));
12514
12515 return img_format("REPLV.QB %s, %s", rt, rs);
12516 }
12517
12518
12519 /*
12520 *
12521 *
12522 * 3 2 1
12523 * 10987654321098765432109876543210
12524 * 001000 x1110000101
12525 * rt -----
12526 * rs -----
12527 * rd -----
12528 */
12529 static std::string RESTORE_32_(uint64 instruction, Dis_info *info)
12530 {
12531 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12532 uint64 count_value = extract_count_19_18_17_16(instruction);
12533 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12534 uint64 gp_value = extract_gp_2(instruction);
12535
12536 std::string u = IMMEDIATE(copy(u_value));
12537 return img_format("RESTORE %s%s", u,
12538 save_restore_list(rt_value, count_value, gp_value));
12539 }
12540
12541
12542 /*
12543 *
12544 *
12545 * 3 2 1
12546 * 10987654321098765432109876543210
12547 * 001000 x1110000101
12548 * rt -----
12549 * rs -----
12550 * rd -----
12551 */
12552 static std::string RESTORE_JRC_16_(uint64 instruction, Dis_info *info)
12553 {
12554 uint64 rt1_value = extract_rtl_11(instruction);
12555 uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12556 uint64 count_value = extract_count_3_2_1_0(instruction);
12557
12558 std::string u = IMMEDIATE(copy(u_value));
12559 return img_format("RESTORE.JRC %s%s", u,
12560 save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12561 }
12562
12563
12564 /*
12565 *
12566 *
12567 * 3 2 1
12568 * 10987654321098765432109876543210
12569 * 001000 x1110000101
12570 * rt -----
12571 * rs -----
12572 * rd -----
12573 */
12574 static std::string RESTORE_JRC_32_(uint64 instruction, Dis_info *info)
12575 {
12576 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12577 uint64 count_value = extract_count_19_18_17_16(instruction);
12578 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12579 uint64 gp_value = extract_gp_2(instruction);
12580
12581 std::string u = IMMEDIATE(copy(u_value));
12582 return img_format("RESTORE.JRC %s%s", u,
12583 save_restore_list(rt_value, count_value, gp_value));
12584 }
12585
12586
12587 /*
12588 *
12589 *
12590 * 3 2 1
12591 * 10987654321098765432109876543210
12592 * 001000 x1110000101
12593 * rt -----
12594 * rs -----
12595 * rd -----
12596 */
12597 static std::string RESTOREF(uint64 instruction, Dis_info *info)
12598 {
12599 uint64 count_value = extract_count_19_18_17_16(instruction);
12600 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12601
12602 std::string u = IMMEDIATE(copy(u_value));
12603 std::string count = IMMEDIATE(copy(count_value));
12604
12605 return img_format("RESTOREF %s, %s", u, count);
12606 }
12607
12608
12609 /*
12610 *
12611 *
12612 * 3 2 1
12613 * 10987654321098765432109876543210
12614 * 001000 x1110000101
12615 * rt -----
12616 * rs -----
12617 * rd -----
12618 */
12619 static std::string RINT_D(uint64 instruction, Dis_info *info)
12620 {
12621 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12622 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12623
12624 std::string ft = FPR(copy(ft_value));
12625 std::string fs = FPR(copy(fs_value));
12626
12627 return img_format("RINT.D %s, %s", ft, fs);
12628 }
12629
12630
12631 /*
12632 *
12633 *
12634 * 3 2 1
12635 * 10987654321098765432109876543210
12636 * 001000 x1110000101
12637 * rt -----
12638 * rs -----
12639 * rd -----
12640 */
12641 static std::string RINT_S(uint64 instruction, Dis_info *info)
12642 {
12643 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12644 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12645
12646 std::string ft = FPR(copy(ft_value));
12647 std::string fs = FPR(copy(fs_value));
12648
12649 return img_format("RINT.S %s, %s", ft, fs);
12650 }
12651
12652
12653 /*
12654 *
12655 *
12656 * 3 2 1
12657 * 10987654321098765432109876543210
12658 * 001000 x1110000101
12659 * rt -----
12660 * rs -----
12661 * rd -----
12662 */
12663 static std::string ROTR(uint64 instruction, Dis_info *info)
12664 {
12665 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12666 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12667 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12668
12669 std::string rt = GPR(copy(rt_value));
12670 std::string rs = GPR(copy(rs_value));
12671 std::string shift = IMMEDIATE(copy(shift_value));
12672
12673 return img_format("ROTR %s, %s, %s", rt, rs, shift);
12674 }
12675
12676
12677 /*
12678 *
12679 *
12680 * 3 2 1
12681 * 10987654321098765432109876543210
12682 * 001000 x1110000101
12683 * rt -----
12684 * rs -----
12685 * rd -----
12686 */
12687 static std::string ROTRV(uint64 instruction, Dis_info *info)
12688 {
12689 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12690 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12691 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12692
12693 std::string rd = GPR(copy(rd_value));
12694 std::string rs = GPR(copy(rs_value));
12695 std::string rt = GPR(copy(rt_value));
12696
12697 return img_format("ROTRV %s, %s, %s", rd, rs, rt);
12698 }
12699
12700
12701 /*
12702 *
12703 *
12704 * 3 2 1
12705 * 10987654321098765432109876543210
12706 * 001000 x1110000101
12707 * rt -----
12708 * rs -----
12709 * rd -----
12710 */
12711 static std::string ROTX(uint64 instruction, Dis_info *info)
12712 {
12713 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12714 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12715 uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction);
12716 uint64 stripe_value = extract_stripe_6(instruction);
12717 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12718
12719 std::string rt = GPR(copy(rt_value));
12720 std::string rs = GPR(copy(rs_value));
12721 std::string shift = IMMEDIATE(copy(shift_value));
12722 std::string shiftx = IMMEDIATE(copy(shiftx_value));
12723 std::string stripe = IMMEDIATE(copy(stripe_value));
12724
12725 return img_format("ROTX %s, %s, %s, %s, %s",
12726 rt, rs, shift, shiftx, stripe);
12727 }
12728
12729
12730 /*
12731 *
12732 *
12733 * 3 2 1
12734 * 10987654321098765432109876543210
12735 * 001000 x1110000101
12736 * rt -----
12737 * rs -----
12738 * rd -----
12739 */
12740 static std::string ROUND_L_D(uint64 instruction, Dis_info *info)
12741 {
12742 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12743 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12744
12745 std::string ft = FPR(copy(ft_value));
12746 std::string fs = FPR(copy(fs_value));
12747
12748 return img_format("ROUND.L.D %s, %s", ft, fs);
12749 }
12750
12751
12752 /*
12753 *
12754 *
12755 * 3 2 1
12756 * 10987654321098765432109876543210
12757 * 001000 x1110000101
12758 * rt -----
12759 * rs -----
12760 * rd -----
12761 */
12762 static std::string ROUND_L_S(uint64 instruction, Dis_info *info)
12763 {
12764 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12765 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12766
12767 std::string ft = FPR(copy(ft_value));
12768 std::string fs = FPR(copy(fs_value));
12769
12770 return img_format("ROUND.L.S %s, %s", ft, fs);
12771 }
12772
12773
12774 /*
12775 *
12776 *
12777 * 3 2 1
12778 * 10987654321098765432109876543210
12779 * 001000 x1110000101
12780 * rt -----
12781 * rs -----
12782 * rd -----
12783 */
12784 static std::string ROUND_W_D(uint64 instruction, Dis_info *info)
12785 {
12786 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12787 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12788
12789 std::string ft = FPR(copy(ft_value));
12790 std::string fs = FPR(copy(fs_value));
12791
12792 return img_format("ROUND.W.D %s, %s", ft, fs);
12793 }
12794
12795
12796 /*
12797 *
12798 *
12799 * 3 2 1
12800 * 10987654321098765432109876543210
12801 * 001000 x1110000101
12802 * rt -----
12803 * rs -----
12804 * rd -----
12805 */
12806 static std::string ROUND_W_S(uint64 instruction, Dis_info *info)
12807 {
12808 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12809 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12810
12811 std::string ft = FPR(copy(ft_value));
12812 std::string fs = FPR(copy(fs_value));
12813
12814 return img_format("ROUND.W.S %s, %s", ft, fs);
12815 }
12816
12817
12818 /*
12819 *
12820 *
12821 * 3 2 1
12822 * 10987654321098765432109876543210
12823 * 001000 x1110000101
12824 * rt -----
12825 * rs -----
12826 * rd -----
12827 */
12828 static std::string RSQRT_D(uint64 instruction, Dis_info *info)
12829 {
12830 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12831 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12832
12833 std::string ft = FPR(copy(ft_value));
12834 std::string fs = FPR(copy(fs_value));
12835
12836 return img_format("RSQRT.D %s, %s", ft, fs);
12837 }
12838
12839
12840 /*
12841 *
12842 *
12843 * 3 2 1
12844 * 10987654321098765432109876543210
12845 * 001000 x1110000101
12846 * rt -----
12847 * rs -----
12848 * rd -----
12849 */
12850 static std::string RSQRT_S(uint64 instruction, Dis_info *info)
12851 {
12852 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12853 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12854
12855 std::string ft = FPR(copy(ft_value));
12856 std::string fs = FPR(copy(fs_value));
12857
12858 return img_format("RSQRT.S %s, %s", ft, fs);
12859 }
12860
12861
12862 /*
12863 *
12864 *
12865 * 3 2 1
12866 * 10987654321098765432109876543210
12867 * 001000 01001001101
12868 * rt -----
12869 * rs -----
12870 * rd -----
12871 */
12872 static std::string SAVE_16_(uint64 instruction, Dis_info *info)
12873 {
12874 uint64 rt1_value = extract_rtl_11(instruction);
12875 uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12876 uint64 count_value = extract_count_3_2_1_0(instruction);
12877
12878 std::string u = IMMEDIATE(copy(u_value));
12879 return img_format("SAVE %s%s", u,
12880 save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12881 }
12882
12883
12884 /*
12885 *
12886 *
12887 * 3 2 1
12888 * 10987654321098765432109876543210
12889 * 001000 01001001101
12890 * rt -----
12891 * rs -----
12892 * rd -----
12893 */
12894 static std::string SAVE_32_(uint64 instruction, Dis_info *info)
12895 {
12896 uint64 count_value = extract_count_19_18_17_16(instruction);
12897 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12898 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12899 uint64 gp_value = extract_gp_2(instruction);
12900
12901 std::string u = IMMEDIATE(copy(u_value));
12902 return img_format("SAVE %s%s", u,
12903 save_restore_list(rt_value, count_value, gp_value));
12904 }
12905
12906
12907 /*
12908 *
12909 *
12910 * 3 2 1
12911 * 10987654321098765432109876543210
12912 * 001000 01001001101
12913 * rt -----
12914 * rs -----
12915 * rd -----
12916 */
12917 static std::string SAVEF(uint64 instruction, Dis_info *info)
12918 {
12919 uint64 count_value = extract_count_19_18_17_16(instruction);
12920 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12921
12922 std::string u = IMMEDIATE(copy(u_value));
12923 std::string count = IMMEDIATE(copy(count_value));
12924
12925 return img_format("SAVEF %s, %s", u, count);
12926 }
12927
12928
12929 /*
12930 *
12931 *
12932 * 3 2 1
12933 * 10987654321098765432109876543210
12934 * 001000 01001001101
12935 * rt -----
12936 * rs -----
12937 * rd -----
12938 */
12939 static std::string SB_16_(uint64 instruction, Dis_info *info)
12940 {
12941 uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
12942 uint64 rs3_value = extract_rs3_6_5_4(instruction);
12943 uint64 u_value = extract_u_1_0(instruction);
12944
12945 std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
12946 std::string u = IMMEDIATE(copy(u_value));
12947 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
12948
12949 return img_format("SB %s, %s(%s)", rtz3, u, rs3);
12950 }
12951
12952
12953 /*
12954 *
12955 *
12956 * 3 2 1
12957 * 10987654321098765432109876543210
12958 * 001000 01001001101
12959 * rt -----
12960 * rs -----
12961 * rd -----
12962 */
12963 static std::string SB_GP_(uint64 instruction, Dis_info *info)
12964 {
12965 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12966 uint64 u_value = extract_u_17_to_0(instruction);
12967
12968 std::string rt = GPR(copy(rt_value));
12969 std::string u = IMMEDIATE(copy(u_value));
12970
12971 return img_format("SB %s, %s($%d)", rt, u, 28);
12972 }
12973
12974
12975 /*
12976 *
12977 *
12978 * 3 2 1
12979 * 10987654321098765432109876543210
12980 * 001000 01001001101
12981 * rt -----
12982 * rs -----
12983 * rd -----
12984 */
12985 static std::string SB_S9_(uint64 instruction, Dis_info *info)
12986 {
12987 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12988 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12989 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12990
12991 std::string rt = GPR(copy(rt_value));
12992 std::string s = IMMEDIATE(copy(s_value));
12993 std::string rs = GPR(copy(rs_value));
12994
12995 return img_format("SB %s, %s(%s)", rt, s, rs);
12996 }
12997
12998
12999 /*
13000 *
13001 *
13002 * 3 2 1
13003 * 10987654321098765432109876543210
13004 * 001000 01001001101
13005 * rt -----
13006 * rs -----
13007 * rd -----
13008 */
13009 static std::string SB_U12_(uint64 instruction, Dis_info *info)
13010 {
13011 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13012 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13013 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13014
13015 std::string rt = GPR(copy(rt_value));
13016 std::string u = IMMEDIATE(copy(u_value));
13017 std::string rs = GPR(copy(rs_value));
13018
13019 return img_format("SB %s, %s(%s)", rt, u, rs);
13020 }
13021
13022
13023 /*
13024 *
13025 *
13026 * 3 2 1
13027 * 10987654321098765432109876543210
13028 * 001000 01001001101
13029 * rt -----
13030 * rs -----
13031 * rd -----
13032 */
13033 static std::string SBE(uint64 instruction, Dis_info *info)
13034 {
13035 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13036 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13037 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13038
13039 std::string rt = GPR(copy(rt_value));
13040 std::string s = IMMEDIATE(copy(s_value));
13041 std::string rs = GPR(copy(rs_value));
13042
13043 return img_format("SBE %s, %s(%s)", rt, s, rs);
13044 }
13045
13046
13047 /*
13048 *
13049 *
13050 * 3 2 1
13051 * 10987654321098765432109876543210
13052 * 001000 01001001101
13053 * rt -----
13054 * rs -----
13055 * rd -----
13056 */
13057 static std::string SBX(uint64 instruction, Dis_info *info)
13058 {
13059 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13060 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13061 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13062
13063 std::string rd = GPR(copy(rd_value));
13064 std::string rs = GPR(copy(rs_value));
13065 std::string rt = GPR(copy(rt_value));
13066
13067 return img_format("SBX %s, %s(%s)", rd, rs, rt);
13068 }
13069
13070
13071 /*
13072 *
13073 *
13074 * 3 2 1
13075 * 10987654321098765432109876543210
13076 * 001000 01001001101
13077 * rt -----
13078 * rs -----
13079 * rd -----
13080 */
13081 static std::string SC(uint64 instruction, Dis_info *info)
13082 {
13083 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13084 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13085 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
13086
13087 std::string rt = GPR(copy(rt_value));
13088 std::string s = IMMEDIATE(copy(s_value));
13089 std::string rs = GPR(copy(rs_value));
13090
13091 return img_format("SC %s, %s(%s)", rt, s, rs);
13092 }
13093
13094
13095 /*
13096 *
13097 *
13098 * 3 2 1
13099 * 10987654321098765432109876543210
13100 * 001000 01001001101
13101 * rt -----
13102 * rs -----
13103 * rd -----
13104 */
13105 static std::string SCD(uint64 instruction, Dis_info *info)
13106 {
13107 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13108 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13109 int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
13110
13111 std::string rt = GPR(copy(rt_value));
13112 std::string s = IMMEDIATE(copy(s_value));
13113 std::string rs = GPR(copy(rs_value));
13114
13115 return img_format("SCD %s, %s(%s)", rt, s, rs);
13116 }
13117
13118
13119 /*
13120 *
13121 *
13122 * 3 2 1
13123 * 10987654321098765432109876543210
13124 * 001000 01001001101
13125 * rt -----
13126 * rs -----
13127 * rd -----
13128 */
13129 static std::string SCDP(uint64 instruction, Dis_info *info)
13130 {
13131 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13132 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13133 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13134
13135 std::string rt = GPR(copy(rt_value));
13136 std::string ru = GPR(copy(ru_value));
13137 std::string rs = GPR(copy(rs_value));
13138
13139 return img_format("SCDP %s, %s, (%s)", rt, ru, rs);
13140 }
13141
13142
13143 /*
13144 *
13145 *
13146 * 3 2 1
13147 * 10987654321098765432109876543210
13148 * 001000 01001001101
13149 * rt -----
13150 * rs -----
13151 * rd -----
13152 */
13153 static std::string SCE(uint64 instruction, Dis_info *info)
13154 {
13155 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13156 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13157 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
13158
13159 std::string rt = GPR(copy(rt_value));
13160 std::string s = IMMEDIATE(copy(s_value));
13161 std::string rs = GPR(copy(rs_value));
13162
13163 return img_format("SCE %s, %s(%s)", rt, s, rs);
13164 }
13165
13166
13167 /*
13168 *
13169 *
13170 * 3 2 1
13171 * 10987654321098765432109876543210
13172 * 001000 01001001101
13173 * rt -----
13174 * rs -----
13175 * rd -----
13176 */
13177 static std::string SCWP(uint64 instruction, Dis_info *info)
13178 {
13179 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13180 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13181 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13182
13183 std::string rt = GPR(copy(rt_value));
13184 std::string ru = GPR(copy(ru_value));
13185 std::string rs = GPR(copy(rs_value));
13186
13187 return img_format("SCWP %s, %s, (%s)", rt, ru, rs);
13188 }
13189
13190
13191 /*
13192 *
13193 *
13194 * 3 2 1
13195 * 10987654321098765432109876543210
13196 * 001000 01001001101
13197 * rt -----
13198 * rs -----
13199 * rd -----
13200 */
13201 static std::string SCWPE(uint64 instruction, Dis_info *info)
13202 {
13203 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13204 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13205 uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13206
13207 std::string rt = GPR(copy(rt_value));
13208 std::string ru = GPR(copy(ru_value));
13209 std::string rs = GPR(copy(rs_value));
13210
13211 return img_format("SCWPE %s, %s, (%s)", rt, ru, rs);
13212 }
13213
13214
13215 /*
13216 *
13217 *
13218 * 3 2 1
13219 * 10987654321098765432109876543210
13220 * 001000 01001001101
13221 * rt -----
13222 * rs -----
13223 * rd -----
13224 */
13225 static std::string SD_GP_(uint64 instruction, Dis_info *info)
13226 {
13227 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13228 uint64 u_value = extract_u_20_to_3__s3(instruction);
13229
13230 std::string rt = GPR(copy(rt_value));
13231 std::string u = IMMEDIATE(copy(u_value));
13232
13233 return img_format("SD %s, %s($%d)", rt, u, 28);
13234 }
13235
13236
13237 /*
13238 *
13239 *
13240 * 3 2 1
13241 * 10987654321098765432109876543210
13242 * 001000 01001001101
13243 * rt -----
13244 * rs -----
13245 * rd -----
13246 */
13247 static std::string SD_S9_(uint64 instruction, Dis_info *info)
13248 {
13249 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13250 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13251 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13252
13253 std::string rt = GPR(copy(rt_value));
13254 std::string s = IMMEDIATE(copy(s_value));
13255 std::string rs = GPR(copy(rs_value));
13256
13257 return img_format("SD %s, %s(%s)", rt, s, rs);
13258 }
13259
13260
13261 /*
13262 *
13263 *
13264 * 3 2 1
13265 * 10987654321098765432109876543210
13266 * 001000 01001001101
13267 * rt -----
13268 * rs -----
13269 * rd -----
13270 */
13271 static std::string SD_U12_(uint64 instruction, Dis_info *info)
13272 {
13273 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13274 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13275 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13276
13277 std::string rt = GPR(copy(rt_value));
13278 std::string u = IMMEDIATE(copy(u_value));
13279 std::string rs = GPR(copy(rs_value));
13280
13281 return img_format("SD %s, %s(%s)", rt, u, rs);
13282 }
13283
13284
13285 /*
13286 *
13287 *
13288 * 3 2 1
13289 * 10987654321098765432109876543210
13290 * 001000 01001001101
13291 * rt -----
13292 * rs -----
13293 * rd -----
13294 */
13295 static std::string SDBBP_16_(uint64 instruction, Dis_info *info)
13296 {
13297 uint64 code_value = extract_code_2_1_0(instruction);
13298
13299 std::string code = IMMEDIATE(copy(code_value));
13300
13301 return img_format("SDBBP %s", code);
13302 }
13303
13304
13305 /*
13306 *
13307 *
13308 * 3 2 1
13309 * 10987654321098765432109876543210
13310 * 001000 01001001101
13311 * rt -----
13312 * rs -----
13313 * rd -----
13314 */
13315 static std::string SDBBP_32_(uint64 instruction, Dis_info *info)
13316 {
13317 uint64 code_value = extract_code_18_to_0(instruction);
13318
13319 std::string code = IMMEDIATE(copy(code_value));
13320
13321 return img_format("SDBBP %s", code);
13322 }
13323
13324
13325 /*
13326 *
13327 *
13328 * 3 2 1
13329 * 10987654321098765432109876543210
13330 * 001000 01001001101
13331 * rt -----
13332 * rs -----
13333 * rd -----
13334 */
13335 static std::string SDC1_GP_(uint64 instruction, Dis_info *info)
13336 {
13337 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13338 uint64 u_value = extract_u_17_to_2__s2(instruction);
13339
13340 std::string ft = FPR(copy(ft_value));
13341 std::string u = IMMEDIATE(copy(u_value));
13342
13343 return img_format("SDC1 %s, %s($%d)", ft, u, 28);
13344 }
13345
13346
13347 /*
13348 *
13349 *
13350 * 3 2 1
13351 * 10987654321098765432109876543210
13352 * 001000 01001001101
13353 * rt -----
13354 * rs -----
13355 * rd -----
13356 */
13357 static std::string SDC1_S9_(uint64 instruction, Dis_info *info)
13358 {
13359 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13360 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13361 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13362
13363 std::string ft = FPR(copy(ft_value));
13364 std::string s = IMMEDIATE(copy(s_value));
13365 std::string rs = GPR(copy(rs_value));
13366
13367 return img_format("SDC1 %s, %s(%s)", ft, s, rs);
13368 }
13369
13370
13371 /*
13372 *
13373 *
13374 * 3 2 1
13375 * 10987654321098765432109876543210
13376 * 001000 01001001101
13377 * rt -----
13378 * rs -----
13379 * rd -----
13380 */
13381 static std::string SDC1_U12_(uint64 instruction, Dis_info *info)
13382 {
13383 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13384 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13385 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13386
13387 std::string ft = FPR(copy(ft_value));
13388 std::string u = IMMEDIATE(copy(u_value));
13389 std::string rs = GPR(copy(rs_value));
13390
13391 return img_format("SDC1 %s, %s(%s)", ft, u, rs);
13392 }
13393
13394
13395 /*
13396 *
13397 *
13398 * 3 2 1
13399 * 10987654321098765432109876543210
13400 * 001000 01001001101
13401 * rt -----
13402 * rs -----
13403 * rd -----
13404 */
13405 static std::string SDC1X(uint64 instruction, Dis_info *info)
13406 {
13407 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13408 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13409 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13410
13411 std::string ft = FPR(copy(ft_value));
13412 std::string rs = GPR(copy(rs_value));
13413 std::string rt = GPR(copy(rt_value));
13414
13415 return img_format("SDC1X %s, %s(%s)", ft, rs, rt);
13416 }
13417
13418
13419 /*
13420 *
13421 *
13422 * 3 2 1
13423 * 10987654321098765432109876543210
13424 * 001000 01001001101
13425 * rt -----
13426 * rs -----
13427 * rd -----
13428 */
13429 static std::string SDC1XS(uint64 instruction, Dis_info *info)
13430 {
13431 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13432 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13433 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13434
13435 std::string ft = FPR(copy(ft_value));
13436 std::string rs = GPR(copy(rs_value));
13437 std::string rt = GPR(copy(rt_value));
13438
13439 return img_format("SDC1XS %s, %s(%s)", ft, rs, rt);
13440 }
13441
13442
13443 /*
13444 *
13445 *
13446 * 3 2 1
13447 * 10987654321098765432109876543210
13448 * 001000 01001001101
13449 * rt -----
13450 * rs -----
13451 * rd -----
13452 */
13453 static std::string SDC2(uint64 instruction, Dis_info *info)
13454 {
13455 uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
13456 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13457 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13458
13459 std::string cs = CPR(copy(cs_value));
13460 std::string s = IMMEDIATE(copy(s_value));
13461 std::string rs = GPR(copy(rs_value));
13462
13463 return img_format("SDC2 %s, %s(%s)", cs, s, rs);
13464 }
13465
13466
13467 /*
13468 *
13469 *
13470 * 3 2 1
13471 * 10987654321098765432109876543210
13472 * 001000 01001001101
13473 * rt -----
13474 * rs -----
13475 * rd -----
13476 */
13477 static std::string SDM(uint64 instruction, Dis_info *info)
13478 {
13479 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13480 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13481 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13482 uint64 count3_value = extract_count3_14_13_12(instruction);
13483
13484 std::string rt = GPR(copy(rt_value));
13485 std::string s = IMMEDIATE(copy(s_value));
13486 std::string rs = GPR(copy(rs_value));
13487 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
13488
13489 return img_format("SDM %s, %s(%s), %s", rt, s, rs, count3);
13490 }
13491
13492
13493 /*
13494 *
13495 *
13496 * 3 2 1
13497 * 10987654321098765432109876543210
13498 * 001000 01001001101
13499 * rt -----
13500 * rs -----
13501 * rd -----
13502 */
13503 static std::string SDPC_48_(uint64 instruction, Dis_info *info)
13504 {
13505 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
13506 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
13507
13508 std::string rt = GPR(copy(rt_value));
13509 std::string s = ADDRESS(encode_s_from_address(s_value), 6, info);
13510
13511 return img_format("SDPC %s, %s", rt, s);
13512 }
13513
13514
13515 /*
13516 *
13517 *
13518 * 3 2 1
13519 * 10987654321098765432109876543210
13520 * 001000 01001001101
13521 * rt -----
13522 * rs -----
13523 * rd -----
13524 */
13525 static std::string SDXS(uint64 instruction, Dis_info *info)
13526 {
13527 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13528 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13529 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13530
13531 std::string rd = GPR(copy(rd_value));
13532 std::string rs = GPR(copy(rs_value));
13533 std::string rt = GPR(copy(rt_value));
13534
13535 return img_format("SDXS %s, %s(%s)", rd, rs, rt);
13536 }
13537
13538
13539 /*
13540 *
13541 *
13542 * 3 2 1
13543 * 10987654321098765432109876543210
13544 * 001000 01001001101
13545 * rt -----
13546 * rs -----
13547 * rd -----
13548 */
13549 static std::string SDX(uint64 instruction, Dis_info *info)
13550 {
13551 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13552 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13553 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13554
13555 std::string rd = GPR(copy(rd_value));
13556 std::string rs = GPR(copy(rs_value));
13557 std::string rt = GPR(copy(rt_value));
13558
13559 return img_format("SDX %s, %s(%s)", rd, rs, rt);
13560 }
13561
13562
13563 /*
13564 *
13565 *
13566 * 3 2 1
13567 * 10987654321098765432109876543210
13568 * 001000 01001001101
13569 * rt -----
13570 * rs -----
13571 * rd -----
13572 */
13573 static std::string SEB(uint64 instruction, Dis_info *info)
13574 {
13575 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13576 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13577
13578 std::string rt = GPR(copy(rt_value));
13579 std::string rs = GPR(copy(rs_value));
13580
13581 return img_format("SEB %s, %s", rt, rs);
13582 }
13583
13584
13585 /*
13586 *
13587 *
13588 * 3 2 1
13589 * 10987654321098765432109876543210
13590 * 001000 01001001101
13591 * rt -----
13592 * rs -----
13593 * rd -----
13594 */
13595 static std::string SEH(uint64 instruction, Dis_info *info)
13596 {
13597 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13598 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13599
13600 std::string rt = GPR(copy(rt_value));
13601 std::string rs = GPR(copy(rs_value));
13602
13603 return img_format("SEH %s, %s", rt, rs);
13604 }
13605
13606
13607 /*
13608 *
13609 *
13610 * 3 2 1
13611 * 10987654321098765432109876543210
13612 * 001000 01001001101
13613 * rt -----
13614 * rs -----
13615 * rd -----
13616 */
13617 static std::string SEL_D(uint64 instruction, Dis_info *info)
13618 {
13619 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13620 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13621 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13622
13623 std::string fd = FPR(copy(fd_value));
13624 std::string fs = FPR(copy(fs_value));
13625 std::string ft = FPR(copy(ft_value));
13626
13627 return img_format("SEL.D %s, %s, %s", fd, fs, ft);
13628 }
13629
13630
13631 /*
13632 *
13633 *
13634 * 3 2 1
13635 * 10987654321098765432109876543210
13636 * 001000 01001001101
13637 * rt -----
13638 * rs -----
13639 * rd -----
13640 */
13641 static std::string SEL_S(uint64 instruction, Dis_info *info)
13642 {
13643 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13644 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13645 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13646
13647 std::string fd = FPR(copy(fd_value));
13648 std::string fs = FPR(copy(fs_value));
13649 std::string ft = FPR(copy(ft_value));
13650
13651 return img_format("SEL.S %s, %s, %s", fd, fs, ft);
13652 }
13653
13654
13655 /*
13656 *
13657 *
13658 * 3 2 1
13659 * 10987654321098765432109876543210
13660 * 001000 01001001101
13661 * rt -----
13662 * rs -----
13663 * rd -----
13664 */
13665 static std::string SELEQZ_D(uint64 instruction, Dis_info *info)
13666 {
13667 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13668 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13669 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13670
13671 std::string fd = FPR(copy(fd_value));
13672 std::string fs = FPR(copy(fs_value));
13673 std::string ft = FPR(copy(ft_value));
13674
13675 return img_format("SELEQZ.D %s, %s, %s", fd, fs, ft);
13676 }
13677
13678
13679 /*
13680 *
13681 *
13682 * 3 2 1
13683 * 10987654321098765432109876543210
13684 * 001000 01001001101
13685 * rt -----
13686 * rs -----
13687 * rd -----
13688 */
13689 static std::string SELEQZ_S(uint64 instruction, Dis_info *info)
13690 {
13691 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13692 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13693 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13694
13695 std::string fd = FPR(copy(fd_value));
13696 std::string fs = FPR(copy(fs_value));
13697 std::string ft = FPR(copy(ft_value));
13698
13699 return img_format("SELEQZ.S %s, %s, %s", fd, fs, ft);
13700 }
13701
13702
13703 /*
13704 *
13705 *
13706 * 3 2 1
13707 * 10987654321098765432109876543210
13708 * 001000 01001001101
13709 * rt -----
13710 * rs -----
13711 * rd -----
13712 */
13713 static std::string SELNEZ_D(uint64 instruction, Dis_info *info)
13714 {
13715 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13716 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13717 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13718
13719 std::string fd = FPR(copy(fd_value));
13720 std::string fs = FPR(copy(fs_value));
13721 std::string ft = FPR(copy(ft_value));
13722
13723 return img_format("SELNEZ.D %s, %s, %s", fd, fs, ft);
13724 }
13725
13726
13727 /*
13728 *
13729 *
13730 * 3 2 1
13731 * 10987654321098765432109876543210
13732 * 001000 01001001101
13733 * rt -----
13734 * rs -----
13735 * rd -----
13736 */
13737 static std::string SELNEZ_S(uint64 instruction, Dis_info *info)
13738 {
13739 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13740 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13741 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13742
13743 std::string fd = FPR(copy(fd_value));
13744 std::string fs = FPR(copy(fs_value));
13745 std::string ft = FPR(copy(ft_value));
13746
13747 return img_format("SELNEZ.S %s, %s, %s", fd, fs, ft);
13748 }
13749
13750
13751 /*
13752 *
13753 *
13754 * 3 2 1
13755 * 10987654321098765432109876543210
13756 * 001000 01001001101
13757 * rt -----
13758 * rs -----
13759 * rd -----
13760 */
13761 static std::string SEQI(uint64 instruction, Dis_info *info)
13762 {
13763 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13764 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13765 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13766
13767 std::string rt = GPR(copy(rt_value));
13768 std::string rs = GPR(copy(rs_value));
13769 std::string u = IMMEDIATE(copy(u_value));
13770
13771 return img_format("SEQI %s, %s, %s", rt, rs, u);
13772 }
13773
13774
13775 /*
13776 *
13777 *
13778 * 3 2 1
13779 * 10987654321098765432109876543210
13780 * 001000 01001001101
13781 * rt -----
13782 * rs -----
13783 * rd -----
13784 */
13785 static std::string SH_16_(uint64 instruction, Dis_info *info)
13786 {
13787 uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
13788 uint64 rs3_value = extract_rs3_6_5_4(instruction);
13789 uint64 u_value = extract_u_2_1__s1(instruction);
13790
13791 std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
13792 std::string u = IMMEDIATE(copy(u_value));
13793 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
13794
13795 return img_format("SH %s, %s(%s)", rtz3, u, rs3);
13796 }
13797
13798
13799 /*
13800 *
13801 *
13802 * 3 2 1
13803 * 10987654321098765432109876543210
13804 * 001000 01001001101
13805 * rt -----
13806 * rs -----
13807 * rd -----
13808 */
13809 static std::string SH_GP_(uint64 instruction, Dis_info *info)
13810 {
13811 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13812 uint64 u_value = extract_u_17_to_1__s1(instruction);
13813
13814 std::string rt = GPR(copy(rt_value));
13815 std::string u = IMMEDIATE(copy(u_value));
13816
13817 return img_format("SH %s, %s($%d)", rt, u, 28);
13818 }
13819
13820
13821 /*
13822 *
13823 *
13824 * 3 2 1
13825 * 10987654321098765432109876543210
13826 * 001000 01001001101
13827 * rt -----
13828 * rs -----
13829 * rd -----
13830 */
13831 static std::string SH_S9_(uint64 instruction, Dis_info *info)
13832 {
13833 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13834 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13835 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13836
13837 std::string rt = GPR(copy(rt_value));
13838 std::string s = IMMEDIATE(copy(s_value));
13839 std::string rs = GPR(copy(rs_value));
13840
13841 return img_format("SH %s, %s(%s)", rt, s, rs);
13842 }
13843
13844
13845 /*
13846 *
13847 *
13848 * 3 2 1
13849 * 10987654321098765432109876543210
13850 * 001000 01001001101
13851 * rt -----
13852 * rs -----
13853 * rd -----
13854 */
13855 static std::string SH_U12_(uint64 instruction, Dis_info *info)
13856 {
13857 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13858 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13859 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13860
13861 std::string rt = GPR(copy(rt_value));
13862 std::string u = IMMEDIATE(copy(u_value));
13863 std::string rs = GPR(copy(rs_value));
13864
13865 return img_format("SH %s, %s(%s)", rt, u, rs);
13866 }
13867
13868
13869 /*
13870 *
13871 *
13872 * 3 2 1
13873 * 10987654321098765432109876543210
13874 * 001000 01001001101
13875 * rt -----
13876 * rs -----
13877 * rd -----
13878 */
13879 static std::string SHE(uint64 instruction, Dis_info *info)
13880 {
13881 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13882 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13883 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13884
13885 std::string rt = GPR(copy(rt_value));
13886 std::string s = IMMEDIATE(copy(s_value));
13887 std::string rs = GPR(copy(rs_value));
13888
13889 return img_format("SHE %s, %s(%s)", rt, s, rs);
13890 }
13891
13892
13893 /*
13894 * [DSP] SHILO ac, shift - Shift an accumulator value leaving the result in
13895 * the same accumulator
13896 *
13897 * 3 2 1
13898 * 10987654321098765432109876543210
13899 * 001000xxxx xxxx0000011101
13900 * shift ------
13901 * ac --
13902 */
13903 static std::string SHILO(uint64 instruction, Dis_info *info)
13904 {
13905 int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction);
13906 uint64 ac_value = extract_ac_15_14(instruction);
13907
13908 std::string shift = IMMEDIATE(copy(shift_value));
13909 std::string ac = AC(copy(ac_value));
13910
13911 return img_format("SHILO %s, %s", ac, shift);
13912 }
13913
13914
13915 /*
13916 * [DSP] SHILOV ac, rs - Variable shift of accumulator value leaving the result
13917 * in the same accumulator
13918 *
13919 * 3 2 1
13920 * 10987654321098765432109876543210
13921 * 001000xxxxx 01001001111111
13922 * rs -----
13923 * ac --
13924 */
13925 static std::string SHILOV(uint64 instruction, Dis_info *info)
13926 {
13927 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13928 uint64 ac_value = extract_ac_15_14(instruction);
13929
13930 std::string rs = GPR(copy(rs_value));
13931 std::string ac = AC(copy(ac_value));
13932
13933 return img_format("SHILOV %s, %s", ac, rs);
13934 }
13935
13936
13937 /*
13938 * [DSP] SHLL.PH rt, rs, sa - Shift left logical vector pair halfwords
13939 *
13940 * 3 2 1
13941 * 10987654321098765432109876543210
13942 * 001000 001110110101
13943 * rt -----
13944 * rs -----
13945 * sa ----
13946 */
13947 static std::string SHLL_PH(uint64 instruction, Dis_info *info)
13948 {
13949 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13950 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13951 uint64 sa_value = extract_sa_15_14_13_12(instruction);
13952
13953 std::string rt = GPR(copy(rt_value));
13954 std::string rs = GPR(copy(rs_value));
13955 std::string sa = IMMEDIATE(copy(sa_value));
13956
13957 return img_format("SHLL.PH %s, %s, %s", rt, rs, sa);
13958 }
13959
13960
13961 /*
13962 * [DSP] SHLL.QB rt, rs, sa - Shift left logical vector quad bytes
13963 *
13964 * 3 2 1
13965 * 10987654321098765432109876543210
13966 * 001000 0100001111111
13967 * rt -----
13968 * rs -----
13969 * sa ---
13970 */
13971 static std::string SHLL_QB(uint64 instruction, Dis_info *info)
13972 {
13973 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13974 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13975 uint64 sa_value = extract_sa_15_14_13(instruction);
13976
13977 std::string rt = GPR(copy(rt_value));
13978 std::string rs = GPR(copy(rs_value));
13979 std::string sa = IMMEDIATE(copy(sa_value));
13980
13981 return img_format("SHLL.QB %s, %s, %s", rt, rs, sa);
13982 }
13983
13984
13985 /*
13986 * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical vector pair halfwords
13987 * with saturation
13988 *
13989 * 3 2 1
13990 * 10987654321098765432109876543210
13991 * 001000 001110110101
13992 * rt -----
13993 * rs -----
13994 * sa ----
13995 */
13996 static std::string SHLL_S_PH(uint64 instruction, Dis_info *info)
13997 {
13998 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13999 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14000 uint64 sa_value = extract_sa_15_14_13_12(instruction);
14001
14002 std::string rt = GPR(copy(rt_value));
14003 std::string rs = GPR(copy(rs_value));
14004 std::string sa = IMMEDIATE(copy(sa_value));
14005
14006 return img_format("SHLL_S.PH %s, %s, %s", rt, rs, sa);
14007 }
14008
14009
14010 /*
14011 * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical word with saturation
14012 *
14013 * 3 2 1
14014 * 10987654321098765432109876543210
14015 * 001000 x1111110101
14016 * rt -----
14017 * rs -----
14018 * sa -----
14019 */
14020 static std::string SHLL_S_W(uint64 instruction, Dis_info *info)
14021 {
14022 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14023 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14024 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14025
14026 std::string rt = GPR(copy(rt_value));
14027 std::string rs = GPR(copy(rs_value));
14028 std::string sa = IMMEDIATE(copy(sa_value));
14029
14030 return img_format("SHLL_S.W %s, %s, %s", rt, rs, sa);
14031 }
14032
14033
14034 /*
14035 * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair
14036 * halfwords
14037 *
14038 * 3 2 1
14039 * 10987654321098765432109876543210
14040 * 001000 01110001101
14041 * rt -----
14042 * rs -----
14043 * rd -----
14044 */
14045 static std::string SHLLV_PH(uint64 instruction, Dis_info *info)
14046 {
14047 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14048 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14049 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14050
14051 std::string rd = GPR(copy(rd_value));
14052 std::string rt = GPR(copy(rt_value));
14053 std::string rs = GPR(copy(rs_value));
14054
14055 return img_format("SHLLV.PH %s, %s, %s", rd, rt, rs);
14056 }
14057
14058
14059 /*
14060 * [DSP] SHLLV_S.QB rd, rt, rs - Shift left logical variable vector quad bytes
14061 *
14062 * 3 2 1
14063 * 10987654321098765432109876543210
14064 * 001000 x1110010101
14065 * rt -----
14066 * rs -----
14067 * rd -----
14068 */
14069 static std::string SHLLV_QB(uint64 instruction, Dis_info *info)
14070 {
14071 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14072 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14073 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14074
14075 std::string rd = GPR(copy(rd_value));
14076 std::string rt = GPR(copy(rt_value));
14077 std::string rs = GPR(copy(rs_value));
14078
14079 return img_format("SHLLV.QB %s, %s, %s", rd, rt, rs);
14080 }
14081
14082
14083 /*
14084 * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair
14085 * halfwords with saturation
14086 *
14087 * 3 2 1
14088 * 10987654321098765432109876543210
14089 * 001000 11110001101
14090 * rt -----
14091 * rs -----
14092 * rd -----
14093 */
14094 static std::string SHLLV_S_PH(uint64 instruction, Dis_info *info)
14095 {
14096 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14097 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14098 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14099
14100 std::string rd = GPR(copy(rd_value));
14101 std::string rt = GPR(copy(rt_value));
14102 std::string rs = GPR(copy(rs_value));
14103
14104 return img_format("SHLLV_S.PH %s, %s, %s", rd, rt, rs);
14105 }
14106
14107
14108 /*
14109 * [DSP] SHLLV_S.W rd, rt, rs - Shift left logical variable vector word
14110 *
14111 * 3 2 1
14112 * 10987654321098765432109876543210
14113 * 001000 x1111010101
14114 * rt -----
14115 * rs -----
14116 * rd -----
14117 */
14118 static std::string SHLLV_S_W(uint64 instruction, Dis_info *info)
14119 {
14120 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14121 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14122 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14123
14124 std::string rd = GPR(copy(rd_value));
14125 std::string rt = GPR(copy(rt_value));
14126 std::string rs = GPR(copy(rs_value));
14127
14128 return img_format("SHLLV_S.W %s, %s, %s", rd, rt, rs);
14129 }
14130
14131
14132 /*
14133 *
14134 *
14135 * 3 2 1
14136 * 10987654321098765432109876543210
14137 * 001000 01001001101
14138 * rt -----
14139 * rs -----
14140 * rd -----
14141 */
14142 static std::string SHRA_PH(uint64 instruction, Dis_info *info)
14143 {
14144 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14145 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14146 uint64 sa_value = extract_sa_15_14_13_12(instruction);
14147
14148 std::string rt = GPR(copy(rt_value));
14149 std::string rs = GPR(copy(rs_value));
14150 std::string sa = IMMEDIATE(copy(sa_value));
14151
14152 return img_format("SHRA.PH %s, %s, %s", rt, rs, sa);
14153 }
14154
14155
14156 /*
14157 *
14158 *
14159 * 3 2 1
14160 * 10987654321098765432109876543210
14161 * 001000 01001001101
14162 * rt -----
14163 * rs -----
14164 * rd -----
14165 */
14166 static std::string SHRA_QB(uint64 instruction, Dis_info *info)
14167 {
14168 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14169 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14170 uint64 sa_value = extract_sa_15_14_13(instruction);
14171
14172 std::string rt = GPR(copy(rt_value));
14173 std::string rs = GPR(copy(rs_value));
14174 std::string sa = IMMEDIATE(copy(sa_value));
14175
14176 return img_format("SHRA.QB %s, %s, %s", rt, rs, sa);
14177 }
14178
14179
14180 /*
14181 *
14182 *
14183 * 3 2 1
14184 * 10987654321098765432109876543210
14185 * 001000 01001001101
14186 * rt -----
14187 * rs -----
14188 * rd -----
14189 */
14190 static std::string SHRA_R_PH(uint64 instruction, Dis_info *info)
14191 {
14192 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14193 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14194 uint64 sa_value = extract_sa_15_14_13_12(instruction);
14195
14196 std::string rt = GPR(copy(rt_value));
14197 std::string rs = GPR(copy(rs_value));
14198 std::string sa = IMMEDIATE(copy(sa_value));
14199
14200 return img_format("SHRA_R.PH %s, %s, %s", rt, rs, sa);
14201 }
14202
14203
14204 /*
14205 *
14206 *
14207 * 3 2 1
14208 * 10987654321098765432109876543210
14209 * 001000 01001001101
14210 * rt -----
14211 * rs -----
14212 * rd -----
14213 */
14214 static std::string SHRA_R_QB(uint64 instruction, Dis_info *info)
14215 {
14216 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14217 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14218 uint64 sa_value = extract_sa_15_14_13(instruction);
14219
14220 std::string rt = GPR(copy(rt_value));
14221 std::string rs = GPR(copy(rs_value));
14222 std::string sa = IMMEDIATE(copy(sa_value));
14223
14224 return img_format("SHRA_R.QB %s, %s, %s", rt, rs, sa);
14225 }
14226
14227
14228 /*
14229 *
14230 *
14231 * 3 2 1
14232 * 10987654321098765432109876543210
14233 * 001000 01001001101
14234 * rt -----
14235 * rs -----
14236 * rd -----
14237 */
14238 static std::string SHRA_R_W(uint64 instruction, Dis_info *info)
14239 {
14240 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14241 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14242 uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14243
14244 std::string rt = GPR(copy(rt_value));
14245 std::string rs = GPR(copy(rs_value));
14246 std::string sa = IMMEDIATE(copy(sa_value));
14247
14248 return img_format("SHRA_R.W %s, %s, %s", rt, rs, sa);
14249 }
14250
14251
14252 /*
14253 *
14254 *
14255 * 3 2 1
14256 * 10987654321098765432109876543210
14257 * 001000 01001001101
14258 * rt -----
14259 * rs -----
14260 * rd -----
14261 */
14262 static std::string SHRAV_PH(uint64 instruction, Dis_info *info)
14263 {
14264 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14265 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14266 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14267
14268 std::string rd = GPR(copy(rd_value));
14269 std::string rt = GPR(copy(rt_value));
14270 std::string rs = GPR(copy(rs_value));
14271
14272 return img_format("SHRAV.PH %s, %s, %s", rd, rt, rs);
14273 }
14274
14275
14276 /*
14277 *
14278 *
14279 * 3 2 1
14280 * 10987654321098765432109876543210
14281 * 001000 01001001101
14282 * rt -----
14283 * rs -----
14284 * rd -----
14285 */
14286 static std::string SHRAV_QB(uint64 instruction, Dis_info *info)
14287 {
14288 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14289 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14290 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14291
14292 std::string rd = GPR(copy(rd_value));
14293 std::string rt = GPR(copy(rt_value));
14294 std::string rs = GPR(copy(rs_value));
14295
14296 return img_format("SHRAV.QB %s, %s, %s", rd, rt, rs);
14297 }
14298
14299
14300 /*
14301 *
14302 *
14303 * 3 2 1
14304 * 10987654321098765432109876543210
14305 * 001000 01001001101
14306 * rt -----
14307 * rs -----
14308 * rd -----
14309 */
14310 static std::string SHRAV_R_PH(uint64 instruction, Dis_info *info)
14311 {
14312 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14313 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14314 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14315
14316 std::string rd = GPR(copy(rd_value));
14317 std::string rt = GPR(copy(rt_value));
14318 std::string rs = GPR(copy(rs_value));
14319
14320 return img_format("SHRAV_R.PH %s, %s, %s", rd, rt, rs);
14321 }
14322
14323
14324 /*
14325 *
14326 *
14327 * 3 2 1
14328 * 10987654321098765432109876543210
14329 * 001000 01001001101
14330 * rt -----
14331 * rs -----
14332 * rd -----
14333 */
14334 static std::string SHRAV_R_QB(uint64 instruction, Dis_info *info)
14335 {
14336 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14337 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14338 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14339
14340 std::string rd = GPR(copy(rd_value));
14341 std::string rt = GPR(copy(rt_value));
14342 std::string rs = GPR(copy(rs_value));
14343
14344 return img_format("SHRAV_R.QB %s, %s, %s", rd, rt, rs);
14345 }
14346
14347
14348 /*
14349 *
14350 *
14351 * 3 2 1
14352 * 10987654321098765432109876543210
14353 * 001000 01001001101
14354 * rt -----
14355 * rs -----
14356 * rd -----
14357 */
14358 static std::string SHRAV_R_W(uint64 instruction, Dis_info *info)
14359 {
14360 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14361 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14362 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14363
14364 std::string rd = GPR(copy(rd_value));
14365 std::string rt = GPR(copy(rt_value));
14366 std::string rs = GPR(copy(rs_value));
14367
14368 return img_format("SHRAV_R.W %s, %s, %s", rd, rt, rs);
14369 }
14370
14371
14372 /*
14373 * [DSP] SHRL.PH rt, rs, sa - Shift right logical two halfwords
14374 *
14375 * 3 2 1
14376 * 10987654321098765432109876543210
14377 * 001000 001111111111
14378 * rt -----
14379 * rs -----
14380 * sa ----
14381 */
14382 static std::string SHRL_PH(uint64 instruction, Dis_info *info)
14383 {
14384 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14385 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14386 uint64 sa_value = extract_sa_15_14_13_12(instruction);
14387
14388 std::string rt = GPR(copy(rt_value));
14389 std::string rs = GPR(copy(rs_value));
14390 std::string sa = IMMEDIATE(copy(sa_value));
14391
14392 return img_format("SHRL.PH %s, %s, %s", rt, rs, sa);
14393 }
14394
14395
14396 /*
14397 * [DSP] SHRL.QB rt, rs, sa - Shift right logical vector quad bytes
14398 *
14399 * 3 2 1
14400 * 10987654321098765432109876543210
14401 * 001000 1100001111111
14402 * rt -----
14403 * rs -----
14404 * sa ---
14405 */
14406 static std::string SHRL_QB(uint64 instruction, Dis_info *info)
14407 {
14408 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14409 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14410 uint64 sa_value = extract_sa_15_14_13(instruction);
14411
14412 std::string rt = GPR(copy(rt_value));
14413 std::string rs = GPR(copy(rs_value));
14414 std::string sa = IMMEDIATE(copy(sa_value));
14415
14416 return img_format("SHRL.QB %s, %s, %s", rt, rs, sa);
14417 }
14418
14419
14420 /*
14421 * [DSP] SHLLV.PH rd, rt, rs - Shift right logical variable vector pair of
14422 * halfwords
14423 *
14424 * 3 2 1
14425 * 10987654321098765432109876543210
14426 * 001000 x1100010101
14427 * rt -----
14428 * rs -----
14429 * rd -----
14430 */
14431 static std::string SHRLV_PH(uint64 instruction, Dis_info *info)
14432 {
14433 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14434 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14435 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14436
14437 std::string rd = GPR(copy(rd_value));
14438 std::string rt = GPR(copy(rt_value));
14439 std::string rs = GPR(copy(rs_value));
14440
14441 return img_format("SHRLV.PH %s, %s, %s", rd, rt, rs);
14442 }
14443
14444
14445 /*
14446 * [DSP] SHLLV.QB rd, rt, rs - Shift right logical variable vector quad bytes
14447 *
14448 * 3 2 1
14449 * 10987654321098765432109876543210
14450 * 001000 x1101010101
14451 * rt -----
14452 * rs -----
14453 * rd -----
14454 */
14455 static std::string SHRLV_QB(uint64 instruction, Dis_info *info)
14456 {
14457 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14458 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14459 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14460
14461 std::string rd = GPR(copy(rd_value));
14462 std::string rt = GPR(copy(rt_value));
14463 std::string rs = GPR(copy(rs_value));
14464
14465 return img_format("SHRLV.QB %s, %s, %s", rd, rt, rs);
14466 }
14467
14468
14469 /*
14470 *
14471 *
14472 * 3 2 1
14473 * 10987654321098765432109876543210
14474 * 001000 01001001101
14475 * rt -----
14476 * rs -----
14477 * rd -----
14478 */
14479 static std::string SHX(uint64 instruction, Dis_info *info)
14480 {
14481 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14482 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14483 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14484
14485 std::string rd = GPR(copy(rd_value));
14486 std::string rs = GPR(copy(rs_value));
14487 std::string rt = GPR(copy(rt_value));
14488
14489 return img_format("SHX %s, %s(%s)", rd, rs, rt);
14490 }
14491
14492
14493 /*
14494 *
14495 *
14496 * 3 2 1
14497 * 10987654321098765432109876543210
14498 * 001000 01001001101
14499 * rt -----
14500 * rs -----
14501 * rd -----
14502 */
14503 static std::string SHXS(uint64 instruction, Dis_info *info)
14504 {
14505 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14506 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14507 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14508
14509 std::string rd = GPR(copy(rd_value));
14510 std::string rs = GPR(copy(rs_value));
14511 std::string rt = GPR(copy(rt_value));
14512
14513 return img_format("SHXS %s, %s(%s)", rd, rs, rt);
14514 }
14515
14516
14517 /*
14518 *
14519 *
14520 * 3 2 1
14521 * 10987654321098765432109876543210
14522 * 001000 01001001101
14523 * rt -----
14524 * rs -----
14525 * rd -----
14526 */
14527 static std::string SIGRIE(uint64 instruction, Dis_info *info)
14528 {
14529 uint64 code_value = extract_code_18_to_0(instruction);
14530
14531 std::string code = IMMEDIATE(copy(code_value));
14532
14533 return img_format("SIGRIE %s", code);
14534 }
14535
14536
14537 /*
14538 *
14539 *
14540 * 3 2 1
14541 * 10987654321098765432109876543210
14542 * 001000 01001001101
14543 * rt -----
14544 * rs -----
14545 * rd -----
14546 */
14547 static std::string SLL_16_(uint64 instruction, Dis_info *info)
14548 {
14549 uint64 rt3_value = extract_rt3_9_8_7(instruction);
14550 uint64 rs3_value = extract_rs3_6_5_4(instruction);
14551 uint64 shift3_value = extract_shift3_2_1_0(instruction);
14552
14553 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14554 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14555 std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14556
14557 return img_format("SLL %s, %s, %s", rt3, rs3, shift3);
14558 }
14559
14560
14561 /*
14562 *
14563 *
14564 * 3 2 1
14565 * 10987654321098765432109876543210
14566 * 001000 01001001101
14567 * rt -----
14568 * rs -----
14569 * rd -----
14570 */
14571 static std::string SLL_32_(uint64 instruction, Dis_info *info)
14572 {
14573 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14574 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14575 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14576
14577 std::string rt = GPR(copy(rt_value));
14578 std::string rs = GPR(copy(rs_value));
14579 std::string shift = IMMEDIATE(copy(shift_value));
14580
14581 return img_format("SLL %s, %s, %s", rt, rs, shift);
14582 }
14583
14584
14585 /*
14586 *
14587 *
14588 * 3 2 1
14589 * 10987654321098765432109876543210
14590 * 001000 01001001101
14591 * rt -----
14592 * rs -----
14593 * rd -----
14594 */
14595 static std::string SLLV(uint64 instruction, Dis_info *info)
14596 {
14597 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14598 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14599 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14600
14601 std::string rd = GPR(copy(rd_value));
14602 std::string rs = GPR(copy(rs_value));
14603 std::string rt = GPR(copy(rt_value));
14604
14605 return img_format("SLLV %s, %s, %s", rd, rs, rt);
14606 }
14607
14608
14609 /*
14610 *
14611 *
14612 * 3 2 1
14613 * 10987654321098765432109876543210
14614 * 001000 01001001101
14615 * rt -----
14616 * rs -----
14617 * rd -----
14618 */
14619 static std::string SLT(uint64 instruction, Dis_info *info)
14620 {
14621 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14622 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14623 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14624
14625 std::string rd = GPR(copy(rd_value));
14626 std::string rs = GPR(copy(rs_value));
14627 std::string rt = GPR(copy(rt_value));
14628
14629 return img_format("SLT %s, %s, %s", rd, rs, rt);
14630 }
14631
14632
14633 /*
14634 *
14635 *
14636 * 3 2 1
14637 * 10987654321098765432109876543210
14638 * 001000 01001001101
14639 * rt -----
14640 * rs -----
14641 * rd -----
14642 */
14643 static std::string SLTI(uint64 instruction, Dis_info *info)
14644 {
14645 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14646 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14647 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14648
14649 std::string rt = GPR(copy(rt_value));
14650 std::string rs = GPR(copy(rs_value));
14651 std::string u = IMMEDIATE(copy(u_value));
14652
14653 return img_format("SLTI %s, %s, %s", rt, rs, u);
14654 }
14655
14656
14657 /*
14658 *
14659 *
14660 * 3 2 1
14661 * 10987654321098765432109876543210
14662 * 001000 01001001101
14663 * rt -----
14664 * rs -----
14665 * rd -----
14666 */
14667 static std::string SLTIU(uint64 instruction, Dis_info *info)
14668 {
14669 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14670 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14671 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14672
14673 std::string rt = GPR(copy(rt_value));
14674 std::string rs = GPR(copy(rs_value));
14675 std::string u = IMMEDIATE(copy(u_value));
14676
14677 return img_format("SLTIU %s, %s, %s", rt, rs, u);
14678 }
14679
14680
14681 /*
14682 *
14683 *
14684 * 3 2 1
14685 * 10987654321098765432109876543210
14686 * 001000 01001001101
14687 * rt -----
14688 * rs -----
14689 * rd -----
14690 */
14691 static std::string SLTU(uint64 instruction, Dis_info *info)
14692 {
14693 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14694 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14695 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14696
14697 std::string rd = GPR(copy(rd_value));
14698 std::string rs = GPR(copy(rs_value));
14699 std::string rt = GPR(copy(rt_value));
14700
14701 return img_format("SLTU %s, %s, %s", rd, rs, rt);
14702 }
14703
14704
14705 /*
14706 *
14707 *
14708 * 3 2 1
14709 * 10987654321098765432109876543210
14710 * 001000 01001001101
14711 * rt -----
14712 * rs -----
14713 * rd -----
14714 */
14715 static std::string SOV(uint64 instruction, Dis_info *info)
14716 {
14717 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14718 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14719 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14720
14721 std::string rd = GPR(copy(rd_value));
14722 std::string rs = GPR(copy(rs_value));
14723 std::string rt = GPR(copy(rt_value));
14724
14725 return img_format("SOV %s, %s, %s", rd, rs, rt);
14726 }
14727
14728
14729 /*
14730 *
14731 *
14732 * 3 2 1
14733 * 10987654321098765432109876543210
14734 * 001000 01001001101
14735 * rt -----
14736 * rs -----
14737 * rd -----
14738 */
14739 static std::string SPECIAL2(uint64 instruction, Dis_info *info)
14740 {
14741 uint64 op_value = extract_op_25_to_3(instruction);
14742
14743 std::string op = IMMEDIATE(copy(op_value));
14744
14745 return img_format("SPECIAL2 %s", op);
14746 }
14747
14748
14749 /*
14750 *
14751 *
14752 * 3 2 1
14753 * 10987654321098765432109876543210
14754 * 001000 01001001101
14755 * rt -----
14756 * rs -----
14757 * rd -----
14758 */
14759 static std::string SQRT_D(uint64 instruction, Dis_info *info)
14760 {
14761 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14762 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14763
14764 std::string ft = FPR(copy(ft_value));
14765 std::string fs = FPR(copy(fs_value));
14766
14767 return img_format("SQRT.D %s, %s", ft, fs);
14768 }
14769
14770
14771 /*
14772 *
14773 *
14774 * 3 2 1
14775 * 10987654321098765432109876543210
14776 * 001000 01001001101
14777 * rt -----
14778 * rs -----
14779 * rd -----
14780 */
14781 static std::string SQRT_S(uint64 instruction, Dis_info *info)
14782 {
14783 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14784 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14785
14786 std::string ft = FPR(copy(ft_value));
14787 std::string fs = FPR(copy(fs_value));
14788
14789 return img_format("SQRT.S %s, %s", ft, fs);
14790 }
14791
14792
14793 /*
14794 * SRA rd, rt, sa - Shift Word Right Arithmetic
14795 *
14796 * 3 2 1
14797 * 10987654321098765432109876543210
14798 * 00000000000 000011
14799 * rt -----
14800 * rd -----
14801 * sa -----
14802 */
14803 static std::string SRA(uint64 instruction, Dis_info *info)
14804 {
14805 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14806 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14807 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14808
14809 std::string rt = GPR(copy(rt_value));
14810 std::string rs = GPR(copy(rs_value));
14811 std::string shift = IMMEDIATE(copy(shift_value));
14812
14813 return img_format("SRA %s, %s, %s", rt, rs, shift);
14814 }
14815
14816
14817 /*
14818 * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable
14819 *
14820 * 3 2 1
14821 * 10987654321098765432109876543210
14822 * 001000 00000000111
14823 * rs -----
14824 * rt -----
14825 * rd -----
14826 */
14827 static std::string SRAV(uint64 instruction, Dis_info *info)
14828 {
14829 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14830 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14831 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14832
14833 std::string rd = GPR(copy(rd_value));
14834 std::string rs = GPR(copy(rs_value));
14835 std::string rt = GPR(copy(rt_value));
14836
14837 return img_format("SRAV %s, %s, %s", rd, rs, rt);
14838 }
14839
14840
14841 /*
14842 *
14843 *
14844 * 3 2 1
14845 * 10987654321098765432109876543210
14846 * 001000 00000000111
14847 * rs -----
14848 * rt -----
14849 * rd -----
14850 */
14851 static std::string SRL_16_(uint64 instruction, Dis_info *info)
14852 {
14853 uint64 rt3_value = extract_rt3_9_8_7(instruction);
14854 uint64 rs3_value = extract_rs3_6_5_4(instruction);
14855 uint64 shift3_value = extract_shift3_2_1_0(instruction);
14856
14857 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14858 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14859 std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14860
14861 return img_format("SRL %s, %s, %s", rt3, rs3, shift3);
14862 }
14863
14864
14865 /*
14866 *
14867 *
14868 * 3 2 1
14869 * 10987654321098765432109876543210
14870 * 001000 01001001101
14871 * rt -----
14872 * rs -----
14873 * rd -----
14874 */
14875 static std::string SRL_32_(uint64 instruction, Dis_info *info)
14876 {
14877 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14878 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14879 uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14880
14881 std::string rt = GPR(copy(rt_value));
14882 std::string rs = GPR(copy(rs_value));
14883 std::string shift = IMMEDIATE(copy(shift_value));
14884
14885 return img_format("SRL %s, %s, %s", rt, rs, shift);
14886 }
14887
14888
14889 /*
14890 *
14891 *
14892 * 3 2 1
14893 * 10987654321098765432109876543210
14894 * 001000 01001001101
14895 * rt -----
14896 * rs -----
14897 * rd -----
14898 */
14899 static std::string SRLV(uint64 instruction, Dis_info *info)
14900 {
14901 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14902 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14903 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14904
14905 std::string rd = GPR(copy(rd_value));
14906 std::string rs = GPR(copy(rs_value));
14907 std::string rt = GPR(copy(rt_value));
14908
14909 return img_format("SRLV %s, %s, %s", rd, rs, rt);
14910 }
14911
14912
14913 /*
14914 *
14915 *
14916 * 3 2 1
14917 * 10987654321098765432109876543210
14918 * 001000 01001001101
14919 * rt -----
14920 * rs -----
14921 * rd -----
14922 */
14923 static std::string SUB(uint64 instruction, Dis_info *info)
14924 {
14925 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14926 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14927 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14928
14929 std::string rd = GPR(copy(rd_value));
14930 std::string rs = GPR(copy(rs_value));
14931 std::string rt = GPR(copy(rt_value));
14932
14933 return img_format("SUB %s, %s, %s", rd, rs, rt);
14934 }
14935
14936
14937 /*
14938 *
14939 *
14940 * 3 2 1
14941 * 10987654321098765432109876543210
14942 * 001000 01001001101
14943 * rt -----
14944 * rs -----
14945 * rd -----
14946 */
14947 static std::string SUB_D(uint64 instruction, Dis_info *info)
14948 {
14949 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14950 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14951 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14952
14953 std::string fd = FPR(copy(fd_value));
14954 std::string fs = FPR(copy(fs_value));
14955 std::string ft = FPR(copy(ft_value));
14956
14957 return img_format("SUB.D %s, %s, %s", fd, fs, ft);
14958 }
14959
14960
14961 /*
14962 *
14963 *
14964 * 3 2 1
14965 * 10987654321098765432109876543210
14966 * 001000 01001001101
14967 * rt -----
14968 * rs -----
14969 * rd -----
14970 */
14971 static std::string SUB_S(uint64 instruction, Dis_info *info)
14972 {
14973 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14974 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14975 uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14976
14977 std::string fd = FPR(copy(fd_value));
14978 std::string fs = FPR(copy(fs_value));
14979 std::string ft = FPR(copy(ft_value));
14980
14981 return img_format("SUB.S %s, %s, %s", fd, fs, ft);
14982 }
14983
14984
14985 /*
14986 *
14987 *
14988 * 3 2 1
14989 * 10987654321098765432109876543210
14990 * 001000 01001001101
14991 * rt -----
14992 * rs -----
14993 * rd -----
14994 */
14995 static std::string SUBQ_PH(uint64 instruction, Dis_info *info)
14996 {
14997 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14998 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14999 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15000
15001 std::string rd = GPR(copy(rd_value));
15002 std::string rs = GPR(copy(rs_value));
15003 std::string rt = GPR(copy(rt_value));
15004
15005 return img_format("SUBQ.PH %s, %s, %s", rd, rs, rt);
15006 }
15007
15008
15009 /*
15010 * [DSP] SUBQ.S.PH rd, rt, rs - Subtract fractional halfword vectors and shift
15011 * right to halve results
15012 *
15013 * 3 2 1
15014 * 10987654321098765432109876543210
15015 * 001000 01001001101
15016 * rt -----
15017 * rs -----
15018 * rd -----
15019 */
15020 static std::string SUBQ_S_PH(uint64 instruction, Dis_info *info)
15021 {
15022 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15023 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15024 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15025
15026 std::string rd = GPR(copy(rd_value));
15027 std::string rs = GPR(copy(rs_value));
15028 std::string rt = GPR(copy(rt_value));
15029
15030 return img_format("SUBQ_S.PH %s, %s, %s", rd, rs, rt);
15031 }
15032
15033
15034 /*
15035 * [DSP] SUBQ.S.W rd, rt, rs - Subtract fractional halfword vectors and shift
15036 * right to halve results
15037 *
15038 * 3 2 1
15039 * 10987654321098765432109876543210
15040 * 001000 01001001101
15041 * rt -----
15042 * rs -----
15043 * rd -----
15044 */
15045 static std::string SUBQ_S_W(uint64 instruction, Dis_info *info)
15046 {
15047 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15048 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15049 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15050
15051 std::string rd = GPR(copy(rd_value));
15052 std::string rs = GPR(copy(rs_value));
15053 std::string rt = GPR(copy(rt_value));
15054
15055 return img_format("SUBQ_S.W %s, %s, %s", rd, rs, rt);
15056 }
15057
15058
15059 /*
15060 * [DSP] SUBQH.PH rd, rt, rs - Subtract fractional halfword vectors and shift
15061 * right to halve results
15062 *
15063 * 3 2 1
15064 * 10987654321098765432109876543210
15065 * 001000 01001001101
15066 * rt -----
15067 * rs -----
15068 * rd -----
15069 */
15070 static std::string SUBQH_PH(uint64 instruction, Dis_info *info)
15071 {
15072 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15073 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15074 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15075
15076 std::string rd = GPR(copy(rd_value));
15077 std::string rs = GPR(copy(rs_value));
15078 std::string rt = GPR(copy(rt_value));
15079
15080 return img_format("SUBQH.PH %s, %s, %s", rd, rs, rt);
15081 }
15082
15083
15084 /*
15085 * [DSP] SUBQH_R.PH rd, rt, rs - Subtract fractional halfword vectors and shift
15086 * right to halve results
15087 *
15088 * 3 2 1
15089 * 10987654321098765432109876543210
15090 * 001000 01001001101
15091 * rt -----
15092 * rs -----
15093 * rd -----
15094 */
15095 static std::string SUBQH_R_PH(uint64 instruction, Dis_info *info)
15096 {
15097 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15098 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15099 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15100
15101 std::string rd = GPR(copy(rd_value));
15102 std::string rs = GPR(copy(rs_value));
15103 std::string rt = GPR(copy(rt_value));
15104
15105 return img_format("SUBQH_R.PH %s, %s, %s", rd, rs, rt);
15106 }
15107
15108
15109 /*
15110 * [DSP] SUBQH_R.W rd, rt, rs - Subtract fractional halfword vectors and shift
15111 * right to halve results with rounding
15112 *
15113 * 3 2 1
15114 * 10987654321098765432109876543210
15115 * 001000 11001001101
15116 * rt -----
15117 * rs -----
15118 * rd -----
15119 */
15120 static std::string SUBQH_R_W(uint64 instruction, Dis_info *info)
15121 {
15122 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15123 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15124 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15125
15126 std::string rd = GPR(copy(rd_value));
15127 std::string rs = GPR(copy(rs_value));
15128 std::string rt = GPR(copy(rt_value));
15129
15130 return img_format("SUBQH_R.W %s, %s, %s", rd, rs, rt);
15131 }
15132
15133
15134 /*
15135 * [DSP] SUBQH.W rd, rs, rt - Subtract fractional words and shift right to
15136 * halve results
15137 *
15138 * 3 2 1
15139 * 10987654321098765432109876543210
15140 * 001000 01010001101
15141 * rt -----
15142 * rs -----
15143 * rd -----
15144 */
15145 static std::string SUBQH_W(uint64 instruction, Dis_info *info)
15146 {
15147 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15148 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15149 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15150
15151 std::string rd = GPR(copy(rd_value));
15152 std::string rs = GPR(copy(rs_value));
15153 std::string rt = GPR(copy(rt_value));
15154
15155 return img_format("SUBQH.W %s, %s, %s", rd, rs, rt);
15156 }
15157
15158
15159 /*
15160 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15161 *
15162 * 3 2 1
15163 * 10987654321098765432109876543210
15164 * 001000 00010001101
15165 * rt -----
15166 * rs -----
15167 * rd -----
15168 */
15169 static std::string SUBU_16_(uint64 instruction, Dis_info *info)
15170 {
15171 uint64 rt3_value = extract_rt3_9_8_7(instruction);
15172 uint64 rs3_value = extract_rs3_6_5_4(instruction);
15173 uint64 rd3_value = extract_rd3_3_2_1(instruction);
15174
15175 std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
15176 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15177 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
15178
15179 return img_format("SUBU %s, %s, %s", rd3, rs3, rt3);
15180 }
15181
15182
15183 /*
15184 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15185 *
15186 * 3 2 1
15187 * 10987654321098765432109876543210
15188 * 001000 00010001101
15189 * rt -----
15190 * rs -----
15191 * rd -----
15192 */
15193 static std::string SUBU_32_(uint64 instruction, Dis_info *info)
15194 {
15195 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15196 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15197 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15198
15199 std::string rd = GPR(copy(rd_value));
15200 std::string rs = GPR(copy(rs_value));
15201 std::string rt = GPR(copy(rt_value));
15202
15203 return img_format("SUBU %s, %s, %s", rd, rs, rt);
15204 }
15205
15206
15207 /*
15208 * [DSP] SUBU.PH rd, rs, rt - Subtract unsigned unsigned halfwords
15209 *
15210 * 3 2 1
15211 * 10987654321098765432109876543210
15212 * 001000 01100001101
15213 * rt -----
15214 * rs -----
15215 * rd -----
15216 */
15217 static std::string SUBU_PH(uint64 instruction, Dis_info *info)
15218 {
15219 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15220 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15221 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15222
15223 std::string rd = GPR(copy(rd_value));
15224 std::string rs = GPR(copy(rs_value));
15225 std::string rt = GPR(copy(rt_value));
15226
15227 return img_format("SUBU.PH %s, %s, %s", rd, rs, rt);
15228 }
15229
15230
15231 /*
15232 * [DSP] SUBU.QB rd, rs, rt - Subtract unsigned quad byte vectors
15233 *
15234 * 3 2 1
15235 * 10987654321098765432109876543210
15236 * 001000 01011001101
15237 * rt -----
15238 * rs -----
15239 * rd -----
15240 */
15241 static std::string SUBU_QB(uint64 instruction, Dis_info *info)
15242 {
15243 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15244 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15245 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15246
15247 std::string rd = GPR(copy(rd_value));
15248 std::string rs = GPR(copy(rs_value));
15249 std::string rt = GPR(copy(rt_value));
15250
15251 return img_format("SUBU.QB %s, %s, %s", rd, rs, rt);
15252 }
15253
15254
15255 /*
15256 * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with
15257 * 8-bit saturation
15258 *
15259 * 3 2 1
15260 * 10987654321098765432109876543210
15261 * 001000 11100001101
15262 * rt -----
15263 * rs -----
15264 * rd -----
15265 */
15266 static std::string SUBU_S_PH(uint64 instruction, Dis_info *info)
15267 {
15268 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15269 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15270 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15271
15272 std::string rd = GPR(copy(rd_value));
15273 std::string rs = GPR(copy(rs_value));
15274 std::string rt = GPR(copy(rt_value));
15275
15276 return img_format("SUBU_S.PH %s, %s, %s", rd, rs, rt);
15277 }
15278
15279
15280 /*
15281 * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with
15282 * 8-bit saturation
15283 *
15284 * 3 2 1
15285 * 10987654321098765432109876543210
15286 * 001000 11011001101
15287 * rt -----
15288 * rs -----
15289 * rd -----
15290 */
15291 static std::string SUBU_S_QB(uint64 instruction, Dis_info *info)
15292 {
15293 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15294 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15295 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15296
15297 std::string rd = GPR(copy(rd_value));
15298 std::string rs = GPR(copy(rs_value));
15299 std::string rt = GPR(copy(rt_value));
15300
15301 return img_format("SUBU_S.QB %s, %s, %s", rd, rs, rt);
15302 }
15303
15304
15305 /*
15306 * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift
15307 * to halve results
15308 *
15309 * 3 2 1
15310 * 10987654321098765432109876543210
15311 * 001000 01101001101
15312 * rt -----
15313 * rs -----
15314 * rd -----
15315 */
15316 static std::string SUBUH_QB(uint64 instruction, Dis_info *info)
15317 {
15318 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15319 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15320 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15321
15322 std::string rd = GPR(copy(rd_value));
15323 std::string rs = GPR(copy(rs_value));
15324 std::string rt = GPR(copy(rt_value));
15325
15326 return img_format("SUBUH.QB %s, %s, %s", rd, rs, rt);
15327 }
15328
15329
15330 /*
15331 * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift
15332 * to halve results with rounding
15333 *
15334 * 3 2 1
15335 * 10987654321098765432109876543210
15336 * 001000 11101001101
15337 * rt -----
15338 * rs -----
15339 * rd -----
15340 */
15341 static std::string SUBUH_R_QB(uint64 instruction, Dis_info *info)
15342 {
15343 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15344 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15345 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15346
15347 std::string rd = GPR(copy(rd_value));
15348 std::string rs = GPR(copy(rs_value));
15349 std::string rt = GPR(copy(rt_value));
15350
15351 return img_format("SUBUH_R.QB %s, %s, %s", rd, rs, rt);
15352 }
15353
15354
15355 /*
15356 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15357 *
15358 * 3 2 1
15359 * 10987654321098765432109876543210
15360 * 001000 00010001101
15361 * rt -----
15362 * rs -----
15363 * rd -----
15364 */
15365 static std::string SW_16_(uint64 instruction, Dis_info *info)
15366 {
15367 uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15368 uint64 rs3_value = extract_rs3_6_5_4(instruction);
15369 uint64 u_value = extract_u_3_2_1_0__s2(instruction);
15370
15371 std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15372 std::string u = IMMEDIATE(copy(u_value));
15373 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15374
15375 return img_format("SW %s, %s(%s)", rtz3, u, rs3);
15376 }
15377
15378
15379 /*
15380 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15381 *
15382 * 3 2 1
15383 * 10987654321098765432109876543210
15384 * 001000 00010001101
15385 * rt -----
15386 * rs -----
15387 * rd -----
15388 */
15389 static std::string SW_4X4_(uint64 instruction, Dis_info *info)
15390 {
15391 uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
15392 uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
15393 uint64 u_value = extract_u_3_8__s2(instruction);
15394
15395 std::string rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value));
15396 std::string u = IMMEDIATE(copy(u_value));
15397 std::string rs4 = GPR(decode_gpr_gpr4(rs4_value));
15398
15399 return img_format("SW %s, %s(%s)", rtz4, u, rs4);
15400 }
15401
15402
15403 /*
15404 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15405 *
15406 * 3 2 1
15407 * 10987654321098765432109876543210
15408 * 001000 00010001101
15409 * rt -----
15410 * rs -----
15411 * rd -----
15412 */
15413 static std::string SW_GP16_(uint64 instruction, Dis_info *info)
15414 {
15415 uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
15416 uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15417
15418 std::string rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value));
15419 std::string u = IMMEDIATE(copy(u_value));
15420
15421 return img_format("SW %s, %s($%d)", rtz3, u, 28);
15422 }
15423
15424
15425 /*
15426 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15427 *
15428 * 3 2 1
15429 * 10987654321098765432109876543210
15430 * 001000 00010001101
15431 * rt -----
15432 * rs -----
15433 * rd -----
15434 */
15435 static std::string SW_GP_(uint64 instruction, Dis_info *info)
15436 {
15437 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15438 uint64 u_value = extract_u_20_to_2__s2(instruction);
15439
15440 std::string rt = GPR(copy(rt_value));
15441 std::string u = IMMEDIATE(copy(u_value));
15442
15443 return img_format("SW %s, %s($%d)", rt, u, 28);
15444 }
15445
15446
15447 /*
15448 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15449 *
15450 * 3 2 1
15451 * 10987654321098765432109876543210
15452 * 001000 00010001101
15453 * rt -----
15454 * rs -----
15455 * rd -----
15456 */
15457 static std::string SW_S9_(uint64 instruction, Dis_info *info)
15458 {
15459 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15460 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15461 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15462
15463 std::string rt = GPR(copy(rt_value));
15464 std::string s = IMMEDIATE(copy(s_value));
15465 std::string rs = GPR(copy(rs_value));
15466
15467 return img_format("SW %s, %s(%s)", rt, s, rs);
15468 }
15469
15470
15471 /*
15472 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15473 *
15474 * 3 2 1
15475 * 10987654321098765432109876543210
15476 * 001000 00010001101
15477 * rt -----
15478 * rs -----
15479 * rd -----
15480 */
15481 static std::string SW_SP_(uint64 instruction, Dis_info *info)
15482 {
15483 uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
15484 uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
15485
15486 std::string rt = GPR(copy(rt_value));
15487 std::string u = IMMEDIATE(copy(u_value));
15488
15489 return img_format("SW %s, %s($%d)", rt, u, 29);
15490 }
15491
15492
15493 /*
15494 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15495 *
15496 * 3 2 1
15497 * 10987654321098765432109876543210
15498 * 001000 00010001101
15499 * rt -----
15500 * rs -----
15501 * rd -----
15502 */
15503 static std::string SW_U12_(uint64 instruction, Dis_info *info)
15504 {
15505 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15506 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15507 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15508
15509 std::string rt = GPR(copy(rt_value));
15510 std::string u = IMMEDIATE(copy(u_value));
15511 std::string rs = GPR(copy(rs_value));
15512
15513 return img_format("SW %s, %s(%s)", rt, u, rs);
15514 }
15515
15516
15517 /*
15518 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15519 *
15520 * 3 2 1
15521 * 10987654321098765432109876543210
15522 * 001000 00010001101
15523 * rt -----
15524 * rs -----
15525 * rd -----
15526 */
15527 static std::string SWC1_GP_(uint64 instruction, Dis_info *info)
15528 {
15529 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15530 uint64 u_value = extract_u_17_to_2__s2(instruction);
15531
15532 std::string ft = FPR(copy(ft_value));
15533 std::string u = IMMEDIATE(copy(u_value));
15534
15535 return img_format("SWC1 %s, %s($%d)", ft, u, 28);
15536 }
15537
15538
15539 /*
15540 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15541 *
15542 * 3 2 1
15543 * 10987654321098765432109876543210
15544 * 001000 00010001101
15545 * rt -----
15546 * rs -----
15547 * rd -----
15548 */
15549 static std::string SWC1_S9_(uint64 instruction, Dis_info *info)
15550 {
15551 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15552 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15553 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15554
15555 std::string ft = FPR(copy(ft_value));
15556 std::string s = IMMEDIATE(copy(s_value));
15557 std::string rs = GPR(copy(rs_value));
15558
15559 return img_format("SWC1 %s, %s(%s)", ft, s, rs);
15560 }
15561
15562
15563 /*
15564 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15565 *
15566 * 3 2 1
15567 * 10987654321098765432109876543210
15568 * 001000 00010001101
15569 * rt -----
15570 * rs -----
15571 * rd -----
15572 */
15573 static std::string SWC1_U12_(uint64 instruction, Dis_info *info)
15574 {
15575 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15576 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15577 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15578
15579 std::string ft = FPR(copy(ft_value));
15580 std::string u = IMMEDIATE(copy(u_value));
15581 std::string rs = GPR(copy(rs_value));
15582
15583 return img_format("SWC1 %s, %s(%s)", ft, u, rs);
15584 }
15585
15586
15587 /*
15588 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15589 *
15590 * 3 2 1
15591 * 10987654321098765432109876543210
15592 * 001000 00010001101
15593 * rt -----
15594 * rs -----
15595 * rd -----
15596 */
15597 static std::string SWC1X(uint64 instruction, Dis_info *info)
15598 {
15599 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15600 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15601 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15602
15603 std::string ft = FPR(copy(ft_value));
15604 std::string rs = GPR(copy(rs_value));
15605 std::string rt = GPR(copy(rt_value));
15606
15607 return img_format("SWC1X %s, %s(%s)", ft, rs, rt);
15608 }
15609
15610
15611 /*
15612 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15613 *
15614 * 3 2 1
15615 * 10987654321098765432109876543210
15616 * 001000 00010001101
15617 * rt -----
15618 * rs -----
15619 * rd -----
15620 */
15621 static std::string SWC1XS(uint64 instruction, Dis_info *info)
15622 {
15623 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15624 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15625 uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15626
15627 std::string ft = FPR(copy(ft_value));
15628 std::string rs = GPR(copy(rs_value));
15629 std::string rt = GPR(copy(rt_value));
15630
15631 return img_format("SWC1XS %s, %s(%s)", ft, rs, rt);
15632 }
15633
15634
15635 /*
15636 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15637 *
15638 * 3 2 1
15639 * 10987654321098765432109876543210
15640 * 001000 00010001101
15641 * rt -----
15642 * rs -----
15643 * rd -----
15644 */
15645 static std::string SWC2(uint64 instruction, Dis_info *info)
15646 {
15647 uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
15648 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15649 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15650
15651 std::string cs = CPR(copy(cs_value));
15652 std::string s = IMMEDIATE(copy(s_value));
15653 std::string rs = GPR(copy(rs_value));
15654
15655 return img_format("SWC2 %s, %s(%s)", cs, s, rs);
15656 }
15657
15658
15659 /*
15660 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15661 *
15662 * 3 2 1
15663 * 10987654321098765432109876543210
15664 * 001000 00010001101
15665 * rt -----
15666 * rs -----
15667 * rd -----
15668 */
15669 static std::string SWE(uint64 instruction, Dis_info *info)
15670 {
15671 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15672 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15673 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15674
15675 std::string rt = GPR(copy(rt_value));
15676 std::string s = IMMEDIATE(copy(s_value));
15677 std::string rs = GPR(copy(rs_value));
15678
15679 return img_format("SWE %s, %s(%s)", rt, s, rs);
15680 }
15681
15682
15683 /*
15684 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15685 *
15686 * 3 2 1
15687 * 10987654321098765432109876543210
15688 * 001000 00010001101
15689 * rt -----
15690 * rs -----
15691 * rd -----
15692 */
15693 static std::string SWM(uint64 instruction, Dis_info *info)
15694 {
15695 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15696 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15697 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15698 uint64 count3_value = extract_count3_14_13_12(instruction);
15699
15700 std::string rt = GPR(copy(rt_value));
15701 std::string s = IMMEDIATE(copy(s_value));
15702 std::string rs = GPR(copy(rs_value));
15703 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
15704
15705 return img_format("SWM %s, %s(%s), %s", rt, s, rs, count3);
15706 }
15707
15708
15709 /*
15710 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15711 *
15712 * 3 2 1
15713 * 10987654321098765432109876543210
15714 * 001000 00010001101
15715 * rt -----
15716 * rs -----
15717 * rd -----
15718 */
15719 static std::string SWPC_48_(uint64 instruction, Dis_info *info)
15720 {
15721 uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
15722 int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
15723
15724 std::string rt = GPR(copy(rt_value));
15725 std::string s = ADDRESS(encode_s_from_address(s_value), 6, info);
15726
15727 return img_format("SWPC %s, %s", rt, s);
15728 }
15729
15730
15731 /*
15732 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15733 *
15734 * 3 2 1
15735 * 10987654321098765432109876543210
15736 * 001000 00010001101
15737 * rt -----
15738 * rs -----
15739 * rd -----
15740 */
15741 static std::string SWX(uint64 instruction, Dis_info *info)
15742 {
15743 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15744 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15745 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15746
15747 std::string rd = GPR(copy(rd_value));
15748 std::string rs = GPR(copy(rs_value));
15749 std::string rt = GPR(copy(rt_value));
15750
15751 return img_format("SWX %s, %s(%s)", rd, rs, rt);
15752 }
15753
15754
15755 /*
15756 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15757 *
15758 * 3 2 1
15759 * 10987654321098765432109876543210
15760 * 001000 00010001101
15761 * rt -----
15762 * rs -----
15763 * rd -----
15764 */
15765 static std::string SWXS(uint64 instruction, Dis_info *info)
15766 {
15767 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15768 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15769 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15770
15771 std::string rd = GPR(copy(rd_value));
15772 std::string rs = GPR(copy(rs_value));
15773 std::string rt = GPR(copy(rt_value));
15774
15775 return img_format("SWXS %s, %s(%s)", rd, rs, rt);
15776 }
15777
15778
15779 /*
15780 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15781 *
15782 * 3 2 1
15783 * 10987654321098765432109876543210
15784 * 001000 00010001101
15785 * rt -----
15786 * rs -----
15787 * rd -----
15788 */
15789 static std::string SYNC(uint64 instruction, Dis_info *info)
15790 {
15791 uint64 stype_value = extract_stype_20_19_18_17_16(instruction);
15792
15793 std::string stype = IMMEDIATE(copy(stype_value));
15794
15795 return img_format("SYNC %s", stype);
15796 }
15797
15798
15799 /*
15800 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15801 *
15802 * 3 2 1
15803 * 10987654321098765432109876543210
15804 * 001000 00010001101
15805 * rt -----
15806 * rs -----
15807 * rd -----
15808 */
15809 static std::string SYNCI(uint64 instruction, Dis_info *info)
15810 {
15811 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15812 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15813
15814 std::string s = IMMEDIATE(copy(s_value));
15815 std::string rs = GPR(copy(rs_value));
15816
15817 return img_format("SYNCI %s(%s)", s, rs);
15818 }
15819
15820
15821 /*
15822 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15823 *
15824 * 3 2 1
15825 * 10987654321098765432109876543210
15826 * 001000 00010001101
15827 * rt -----
15828 * rs -----
15829 * rd -----
15830 */
15831 static std::string SYNCIE(uint64 instruction, Dis_info *info)
15832 {
15833 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15834 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15835
15836 std::string s = IMMEDIATE(copy(s_value));
15837 std::string rs = GPR(copy(rs_value));
15838
15839 return img_format("SYNCIE %s(%s)", s, rs);
15840 }
15841
15842
15843 /*
15844 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15845 *
15846 * 3 2 1
15847 * 10987654321098765432109876543210
15848 * 001000 00010001101
15849 * rt -----
15850 * rs -----
15851 * rd -----
15852 */
15853 static std::string SYSCALL_16_(uint64 instruction, Dis_info *info)
15854 {
15855 uint64 code_value = extract_code_1_0(instruction);
15856
15857 std::string code = IMMEDIATE(copy(code_value));
15858
15859 return img_format("SYSCALL %s", code);
15860 }
15861
15862
15863 /*
15864 * SYSCALL code - System Call. Cause a System Call Exception
15865 *
15866 * 3 2 1
15867 * 10987654321098765432109876543210
15868 * 00000000000010
15869 * code ------------------
15870 */
15871 static std::string SYSCALL_32_(uint64 instruction, Dis_info *info)
15872 {
15873 uint64 code_value = extract_code_17_to_0(instruction);
15874
15875 std::string code = IMMEDIATE(copy(code_value));
15876
15877 return img_format("SYSCALL %s", code);
15878 }
15879
15880
15881 /*
15882 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15883 *
15884 * 3 2 1
15885 * 10987654321098765432109876543210
15886 * 001000 00010001101
15887 * rt -----
15888 * rs -----
15889 * rd -----
15890 */
15891 static std::string TEQ(uint64 instruction, Dis_info *info)
15892 {
15893 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15894 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15895
15896 std::string rs = GPR(copy(rs_value));
15897 std::string rt = GPR(copy(rt_value));
15898
15899 return img_format("TEQ %s, %s", rs, rt);
15900 }
15901
15902
15903 /*
15904 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15905 *
15906 * 3 2 1
15907 * 10987654321098765432109876543210
15908 * 001000 00010001101
15909 * rt -----
15910 * rs -----
15911 * rd -----
15912 */
15913 static std::string TLBGINV(uint64 instruction, Dis_info *info)
15914 {
15915 (void)instruction;
15916
15917 return "TLBGINV ";
15918 }
15919
15920
15921 /*
15922 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15923 *
15924 * 3 2 1
15925 * 10987654321098765432109876543210
15926 * 001000 00010001101
15927 * rt -----
15928 * rs -----
15929 * rd -----
15930 */
15931 static std::string TLBGINVF(uint64 instruction, Dis_info *info)
15932 {
15933 (void)instruction;
15934
15935 return "TLBGINVF ";
15936 }
15937
15938
15939 /*
15940 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15941 *
15942 * 3 2 1
15943 * 10987654321098765432109876543210
15944 * 001000 00010001101
15945 * rt -----
15946 * rs -----
15947 * rd -----
15948 */
15949 static std::string TLBGP(uint64 instruction, Dis_info *info)
15950 {
15951 (void)instruction;
15952
15953 return "TLBGP ";
15954 }
15955
15956
15957 /*
15958 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15959 *
15960 * 3 2 1
15961 * 10987654321098765432109876543210
15962 * 001000 00010001101
15963 * rt -----
15964 * rs -----
15965 * rd -----
15966 */
15967 static std::string TLBGR(uint64 instruction, Dis_info *info)
15968 {
15969 (void)instruction;
15970
15971 return "TLBGR ";
15972 }
15973
15974
15975 /*
15976 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15977 *
15978 * 3 2 1
15979 * 10987654321098765432109876543210
15980 * 001000 00010001101
15981 * rt -----
15982 * rs -----
15983 * rd -----
15984 */
15985 static std::string TLBGWI(uint64 instruction, Dis_info *info)
15986 {
15987 (void)instruction;
15988
15989 return "TLBGWI ";
15990 }
15991
15992
15993 /*
15994 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15995 *
15996 * 3 2 1
15997 * 10987654321098765432109876543210
15998 * 001000 00010001101
15999 * rt -----
16000 * rs -----
16001 * rd -----
16002 */
16003 static std::string TLBGWR(uint64 instruction, Dis_info *info)
16004 {
16005 (void)instruction;
16006
16007 return "TLBGWR ";
16008 }
16009
16010
16011 /*
16012 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16013 *
16014 * 3 2 1
16015 * 10987654321098765432109876543210
16016 * 001000 00010001101
16017 * rt -----
16018 * rs -----
16019 * rd -----
16020 */
16021 static std::string TLBINV(uint64 instruction, Dis_info *info)
16022 {
16023 (void)instruction;
16024
16025 return "TLBINV ";
16026 }
16027
16028
16029 /*
16030 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16031 *
16032 * 3 2 1
16033 * 10987654321098765432109876543210
16034 * 001000 00010001101
16035 * rt -----
16036 * rs -----
16037 * rd -----
16038 */
16039 static std::string TLBINVF(uint64 instruction, Dis_info *info)
16040 {
16041 (void)instruction;
16042
16043 return "TLBINVF ";
16044 }
16045
16046
16047 /*
16048 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16049 *
16050 * 3 2 1
16051 * 10987654321098765432109876543210
16052 * 001000 00010001101
16053 * rt -----
16054 * rs -----
16055 * rd -----
16056 */
16057 static std::string TLBP(uint64 instruction, Dis_info *info)
16058 {
16059 (void)instruction;
16060
16061 return "TLBP ";
16062 }
16063
16064
16065 /*
16066 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16067 *
16068 * 3 2 1
16069 * 10987654321098765432109876543210
16070 * 001000 00010001101
16071 * rt -----
16072 * rs -----
16073 * rd -----
16074 */
16075 static std::string TLBR(uint64 instruction, Dis_info *info)
16076 {
16077 (void)instruction;
16078
16079 return "TLBR ";
16080 }
16081
16082
16083 /*
16084 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16085 *
16086 * 3 2 1
16087 * 10987654321098765432109876543210
16088 * 001000 00010001101
16089 * rt -----
16090 * rs -----
16091 * rd -----
16092 */
16093 static std::string TLBWI(uint64 instruction, Dis_info *info)
16094 {
16095 (void)instruction;
16096
16097 return "TLBWI ";
16098 }
16099
16100
16101 /*
16102 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16103 *
16104 * 3 2 1
16105 * 10987654321098765432109876543210
16106 * 001000 00010001101
16107 * rt -----
16108 * rs -----
16109 * rd -----
16110 */
16111 static std::string TLBWR(uint64 instruction, Dis_info *info)
16112 {
16113 (void)instruction;
16114
16115 return "TLBWR ";
16116 }
16117
16118
16119 /*
16120 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16121 *
16122 * 3 2 1
16123 * 10987654321098765432109876543210
16124 * 001000 00010001101
16125 * rt -----
16126 * rs -----
16127 * rd -----
16128 */
16129 static std::string TNE(uint64 instruction, Dis_info *info)
16130 {
16131 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16132 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16133
16134 std::string rs = GPR(copy(rs_value));
16135 std::string rt = GPR(copy(rt_value));
16136
16137 return img_format("TNE %s, %s", rs, rt);
16138 }
16139
16140
16141 /*
16142 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16143 *
16144 * 3 2 1
16145 * 10987654321098765432109876543210
16146 * 001000 00010001101
16147 * rt -----
16148 * rs -----
16149 * rd -----
16150 */
16151 static std::string TRUNC_L_D(uint64 instruction, Dis_info *info)
16152 {
16153 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16154 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16155
16156 std::string ft = FPR(copy(ft_value));
16157 std::string fs = FPR(copy(fs_value));
16158
16159 return img_format("TRUNC.L.D %s, %s", ft, fs);
16160 }
16161
16162
16163 /*
16164 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16165 *
16166 * 3 2 1
16167 * 10987654321098765432109876543210
16168 * 001000 00010001101
16169 * rt -----
16170 * rs -----
16171 * rd -----
16172 */
16173 static std::string TRUNC_L_S(uint64 instruction, Dis_info *info)
16174 {
16175 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16176 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16177
16178 std::string ft = FPR(copy(ft_value));
16179 std::string fs = FPR(copy(fs_value));
16180
16181 return img_format("TRUNC.L.S %s, %s", ft, fs);
16182 }
16183
16184
16185 /*
16186 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16187 *
16188 * 3 2 1
16189 * 10987654321098765432109876543210
16190 * 001000 00010001101
16191 * rt -----
16192 * rs -----
16193 * rd -----
16194 */
16195 static std::string TRUNC_W_D(uint64 instruction, Dis_info *info)
16196 {
16197 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16198 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16199
16200 std::string ft = FPR(copy(ft_value));
16201 std::string fs = FPR(copy(fs_value));
16202
16203 return img_format("TRUNC.W.D %s, %s", ft, fs);
16204 }
16205
16206
16207 /*
16208 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16209 *
16210 * 3 2 1
16211 * 10987654321098765432109876543210
16212 * 001000 00010001101
16213 * rt -----
16214 * rs -----
16215 * rd -----
16216 */
16217 static std::string TRUNC_W_S(uint64 instruction, Dis_info *info)
16218 {
16219 uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16220 uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16221
16222 std::string ft = FPR(copy(ft_value));
16223 std::string fs = FPR(copy(fs_value));
16224
16225 return img_format("TRUNC.W.S %s, %s", ft, fs);
16226 }
16227
16228
16229 /*
16230 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16231 *
16232 * 3 2 1
16233 * 10987654321098765432109876543210
16234 * 001000 00010001101
16235 * rt -----
16236 * rs -----
16237 * rd -----
16238 */
16239 static std::string UALDM(uint64 instruction, Dis_info *info)
16240 {
16241 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16242 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16243 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16244 uint64 count3_value = extract_count3_14_13_12(instruction);
16245
16246 std::string rt = GPR(copy(rt_value));
16247 std::string s = IMMEDIATE(copy(s_value));
16248 std::string rs = GPR(copy(rs_value));
16249 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16250
16251 return img_format("UALDM %s, %s(%s), %s", rt, s, rs, count3);
16252 }
16253
16254
16255 /*
16256 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16257 *
16258 * 3 2 1
16259 * 10987654321098765432109876543210
16260 * 001000 00010001101
16261 * rt -----
16262 * rs -----
16263 * rd -----
16264 */
16265 static std::string UALH(uint64 instruction, Dis_info *info)
16266 {
16267 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16268 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16269 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16270
16271 std::string rt = GPR(copy(rt_value));
16272 std::string s = IMMEDIATE(copy(s_value));
16273 std::string rs = GPR(copy(rs_value));
16274
16275 return img_format("UALH %s, %s(%s)", rt, s, rs);
16276 }
16277
16278
16279 /*
16280 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16281 *
16282 * 3 2 1
16283 * 10987654321098765432109876543210
16284 * 001000 00010001101
16285 * rt -----
16286 * rs -----
16287 * rd -----
16288 */
16289 static std::string UALWM(uint64 instruction, Dis_info *info)
16290 {
16291 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16292 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16293 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16294 uint64 count3_value = extract_count3_14_13_12(instruction);
16295
16296 std::string rt = GPR(copy(rt_value));
16297 std::string s = IMMEDIATE(copy(s_value));
16298 std::string rs = GPR(copy(rs_value));
16299 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16300
16301 return img_format("UALWM %s, %s(%s), %s", rt, s, rs, count3);
16302 }
16303
16304
16305 /*
16306 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16307 *
16308 * 3 2 1
16309 * 10987654321098765432109876543210
16310 * 001000 00010001101
16311 * rt -----
16312 * rs -----
16313 * rd -----
16314 */
16315 static std::string UASDM(uint64 instruction, Dis_info *info)
16316 {
16317 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16318 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16319 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16320 uint64 count3_value = extract_count3_14_13_12(instruction);
16321
16322 std::string rt = GPR(copy(rt_value));
16323 std::string s = IMMEDIATE(copy(s_value));
16324 std::string rs = GPR(copy(rs_value));
16325 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16326
16327 return img_format("UASDM %s, %s(%s), %s", rt, s, rs, count3);
16328 }
16329
16330
16331 /*
16332 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16333 *
16334 * 3 2 1
16335 * 10987654321098765432109876543210
16336 * 001000 00010001101
16337 * rt -----
16338 * rs -----
16339 * rd -----
16340 */
16341 static std::string UASH(uint64 instruction, Dis_info *info)
16342 {
16343 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16344 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16345 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16346
16347 std::string rt = GPR(copy(rt_value));
16348 std::string s = IMMEDIATE(copy(s_value));
16349 std::string rs = GPR(copy(rs_value));
16350
16351 return img_format("UASH %s, %s(%s)", rt, s, rs);
16352 }
16353
16354
16355 /*
16356 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16357 *
16358 * 3 2 1
16359 * 10987654321098765432109876543210
16360 * 001000 00010001101
16361 * rt -----
16362 * rs -----
16363 * rd -----
16364 */
16365 static std::string UASWM(uint64 instruction, Dis_info *info)
16366 {
16367 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16368 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16369 int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16370 uint64 count3_value = extract_count3_14_13_12(instruction);
16371
16372 std::string rt = GPR(copy(rt_value));
16373 std::string s = IMMEDIATE(copy(s_value));
16374 std::string rs = GPR(copy(rs_value));
16375 std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16376
16377 return img_format("UASWM %s, %s(%s), %s", rt, s, rs, count3);
16378 }
16379
16380
16381 /*
16382 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16383 *
16384 * 3 2 1
16385 * 10987654321098765432109876543210
16386 * 001000 00010001101
16387 * rt -----
16388 * rs -----
16389 * rd -----
16390 */
16391 static std::string UDI(uint64 instruction, Dis_info *info)
16392 {
16393 uint64 op_value = extract_op_25_to_3(instruction);
16394
16395 std::string op = IMMEDIATE(copy(op_value));
16396
16397 return img_format("UDI %s", op);
16398 }
16399
16400
16401 /*
16402 * WAIT code - Enter Wait State
16403 *
16404 * 3 2 1
16405 * 10987654321098765432109876543210
16406 * 001000 1100001101111111
16407 * code ----------
16408 */
16409 static std::string WAIT(uint64 instruction, Dis_info *info)
16410 {
16411 uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction);
16412
16413 std::string code = IMMEDIATE(copy(code_value));
16414
16415 return img_format("WAIT %s", code);
16416 }
16417
16418
16419 /*
16420 * [DSP] WRDSP rt, mask - Write selected fields from a GPR to the DSPControl
16421 * register
16422 *
16423 * 3 2 1
16424 * 10987654321098765432109876543210
16425 * 001000 01011001111111
16426 * rt -----
16427 * mask -------
16428 */
16429 static std::string WRDSP(uint64 instruction, Dis_info *info)
16430 {
16431 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16432 uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
16433
16434 std::string rt = GPR(copy(rt_value));
16435 std::string mask = IMMEDIATE(copy(mask_value));
16436
16437 return img_format("WRDSP %s, %s", rt, mask);
16438 }
16439
16440
16441 /*
16442 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16443 *
16444 * 3 2 1
16445 * 10987654321098765432109876543210
16446 * 001000 00010001101
16447 * rt -----
16448 * rs -----
16449 * rd -----
16450 */
16451 static std::string WRPGPR(uint64 instruction, Dis_info *info)
16452 {
16453 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16454 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16455
16456 std::string rt = GPR(copy(rt_value));
16457 std::string rs = GPR(copy(rs_value));
16458
16459 return img_format("WRPGPR %s, %s", rt, rs);
16460 }
16461
16462
16463 /*
16464 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16465 *
16466 * 3 2 1
16467 * 10987654321098765432109876543210
16468 * 001000 00010001101
16469 * rt -----
16470 * rs -----
16471 * rd -----
16472 */
16473 static std::string XOR_16_(uint64 instruction, Dis_info *info)
16474 {
16475 uint64 rt3_value = extract_rt3_9_8_7(instruction);
16476 uint64 rs3_value = extract_rs3_6_5_4(instruction);
16477
16478 std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
16479 std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
16480
16481 return img_format("XOR %s, %s", rs3, rt3);
16482 }
16483
16484
16485 /*
16486 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16487 *
16488 * 3 2 1
16489 * 10987654321098765432109876543210
16490 * 001000 00010001101
16491 * rt -----
16492 * rs -----
16493 * rd -----
16494 */
16495 static std::string XOR_32_(uint64 instruction, Dis_info *info)
16496 {
16497 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16498 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16499 uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
16500
16501 std::string rd = GPR(copy(rd_value));
16502 std::string rs = GPR(copy(rs_value));
16503 std::string rt = GPR(copy(rt_value));
16504
16505 return img_format("XOR %s, %s, %s", rd, rs, rt);
16506 }
16507
16508
16509 /*
16510 * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16511 *
16512 * 3 2 1
16513 * 10987654321098765432109876543210
16514 * 001000 00010001101
16515 * rt -----
16516 * rs -----
16517 * rd -----
16518 */
16519 static std::string XORI(uint64 instruction, Dis_info *info)
16520 {
16521 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16522 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16523 uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
16524
16525 std::string rt = GPR(copy(rt_value));
16526 std::string rs = GPR(copy(rs_value));
16527 std::string u = IMMEDIATE(copy(u_value));
16528
16529 return img_format("XORI %s, %s, %s", rt, rs, u);
16530 }
16531
16532
16533 /*
16534 * YIELD rt, rs -
16535 *
16536 * 3 2 1
16537 * 10987654321098765432109876543210
16538 * 001000 00010001101
16539 * rt -----
16540 * rs -----
16541 */
16542 static std::string YIELD(uint64 instruction, Dis_info *info)
16543 {
16544 uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16545 uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16546
16547 std::string rt = GPR(copy(rt_value));
16548 std::string rs = GPR(copy(rs_value));
16549
16550 return img_format("YIELD %s, %s", rt, rs);
16551 }
16552
16553
16554
16555 /*
16556 * nanoMIPS instruction pool organization
16557 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16558 *
16559 *
16560 * ā”Œā”€ P.ADDIU ā”€ā”€ā”€ P.RI ā”€ā”€ā”€ P.SYSCALL
16561 * ā”‚
16562 * ā”‚ ā”Œā”€ P.TRAP
16563 * ā”‚ ā”‚
16564 * ā”‚ ā”Œā”€ _POOL32A0_0 ā”€ā”¼ā”€ P.CMOVE
16565 * ā”‚ ā”‚ ā”‚
16566 * ā”‚ ā”‚ ā””ā”€ P.SLTU
16567 * ā”‚ ā”Œā”€ _POOL32A0 ā”€ā”¤
16568 * ā”‚ ā”‚ ā”‚
16569 * ā”‚ ā”‚ ā”‚
16570 * ā”‚ ā”‚ ā””ā”€ _POOL32A0_1 ā”€ā”€ā”€ CRC32
16571 * ā”‚ ā”‚
16572 * ā”œā”€ P32A ā”€ā”¤
16573 * ā”‚ ā”‚ ā”Œā”€ PP.LSX
16574 * ā”‚ ā”‚ ā”Œā”€ P.LSX ā”€ā”€ā”€ā”€ā”€ā”¤
16575 * ā”‚ ā”‚ ā”‚ ā””ā”€ PP.LSXS
16576 * ā”‚ ā””ā”€ _POOL32A7 ā”€ā”¤
16577 * ā”‚ ā”‚ ā”Œā”€ POOL32Axf_4
16578 * ā”‚ ā””ā”€ POOL32Axf ā”€ā”¤
16579 * ā”‚ ā””ā”€ POOL32Axf_5
16580 * ā”‚
16581 * ā”œā”€ PBAL
16582 * ā”‚
16583 * ā”œā”€ P.GP.W ā”Œā”€ PP.LSX
16584 * ā”Œā”€ P32 ā”€ā”¤ ā”‚
16585 * ā”‚ ā”œā”€ P.GP.BH ā”€ā”“ā”€ PP.LSXS
16586 * ā”‚ ā”‚
16587 * ā”‚ ā”œā”€ P.J ā”€ā”€ā”€ā”€ā”€ā”€ā”€ PP.BALRSC
16588 * ā”‚ ā”‚
16589 * ā”‚ ā”œā”€ P48I
16590 * ā”‚ ā”‚ ā”Œā”€ P.SR
16591 * ā”‚ ā”‚ ā”‚
16592 * ā”‚ ā”‚ ā”œā”€ P.SHIFT
16593 * ā”‚ ā”‚ ā”‚
16594 * ā”‚ ā”œā”€ P.U12 ā”€ā”€ā”€ā”¼ā”€ P.ROTX
16595 * ā”‚ ā”‚ ā”‚
16596 * ā”‚ ā”‚ ā”œā”€ P.INS
16597 * ā”‚ ā”‚ ā”‚
16598 * ā”‚ ā”‚ ā””ā”€ P.EXT
16599 * ā”‚ ā”‚
16600 * ā”‚ ā”œā”€ P.LS.U12 ā”€ā”€ P.PREF.U12
16601 * ā”‚ ā”‚
16602 * ā”‚ ā”œā”€ P.BR1 ā”€ā”€ā”€ā”€ā”€ P.BR3A
16603 * ā”‚ ā”‚
16604 * ā”‚ ā”‚ ā”Œā”€ P.LS.S0 ā”€ā”€ā”€ P16.SYSCALL
16605 * ā”‚ ā”‚ ā”‚
16606 * ā”‚ ā”‚ ā”‚ ā”Œā”€ P.LL
16607 * ā”‚ ā”‚ ā”œā”€ P.LS.S1 ā”€ā”¤
16608 * ā”‚ ā”‚ ā”‚ ā””ā”€ P.SC
16609 * ā”‚ ā”‚ ā”‚
16610 * ā”‚ ā”‚ ā”‚ ā”Œā”€ P.PREFE
16611 * MAJOR ā”€ā”¤ ā”œā”€ P.LS.S9 ā”€ā”¤ ā”‚
16612 * ā”‚ ā”‚ ā”œā”€ P.LS.E0 ā”€ā”¼ā”€ P.LLE
16613 * ā”‚ ā”‚ ā”‚ ā”‚
16614 * ā”‚ ā”‚ ā”‚ ā””ā”€ P.SCE
16615 * ā”‚ ā”‚ ā”‚
16616 * ā”‚ ā”‚ ā”œā”€ P.LS.WM
16617 * ā”‚ ā”‚ ā”‚
16618 * ā”‚ ā”‚ ā””ā”€ P.LS.UAWM
16619 * ā”‚ ā”‚
16620 * ā”‚ ā”‚
16621 * ā”‚ ā”œā”€ P.BR2
16622 * ā”‚ ā”‚
16623 * ā”‚ ā”œā”€ P.BRI
16624 * ā”‚ ā”‚
16625 * ā”‚ ā””ā”€ P.LUI
16626 * ā”‚
16627 * ā”‚
16628 * ā”‚ ā”Œā”€ P16.MV ā”€ā”€ā”€ā”€ P16.RI ā”€ā”€ā”€ P16.SYSCALL
16629 * ā”‚ ā”‚
16630 * ā”‚ ā”œā”€ P16.SR
16631 * ā”‚ ā”‚
16632 * ā”‚ ā”œā”€ P16.SHIFT
16633 * ā”‚ ā”‚
16634 * ā”‚ ā”œā”€ P16.4x4
16635 * ā”‚ ā”‚
16636 * ā”‚ ā”œā”€ P16C ā”€ā”€ā”€ā”€ā”€ā”€ POOL16C_0 ā”€ā”€ POOL16C_00
16637 * ā”‚ ā”‚
16638 * ā””ā”€ P16 ā”€ā”¼ā”€ P16.LB
16639 * ā”‚
16640 * ā”œā”€ P16.A1
16641 * ā”‚
16642 * ā”œā”€ P16.LH
16643 * ā”‚
16644 * ā”œā”€ P16.A2 ā”€ā”€ā”€ā”€ P.ADDIU[RS5]
16645 * ā”‚
16646 * ā”œā”€ P16.ADDU
16647 * ā”‚
16648 * ā””ā”€ P16.BR ā”€ā”€ā”¬ā”€ P16.JRC
16649 * ā”‚
16650 * ā””ā”€ P16.BR1
16651 *
16652 *
16653 * (FP, DPS, and some minor instruction pools are omitted from the diagram)
16654 *
16655 */
16656
16657 static const Pool P_SYSCALL[2] = {
16658 { instruction , 0 , 0 , 32,
16659 0xfffc0000, 0x00080000, &SYSCALL_32_ , 0,
16660 0x0 }, /* SYSCALL[32] */
16661 { instruction , 0 , 0 , 32,
16662 0xfffc0000, 0x000c0000, &HYPCALL , 0,
16663 CP0_ | VZ_ }, /* HYPCALL */
16664 };
16665
16666
16667 static const Pool P_RI[4] = {
16668 { instruction , 0 , 0 , 32,
16669 0xfff80000, 0x00000000, &SIGRIE , 0,
16670 0x0 }, /* SIGRIE */
16671 { pool , P_SYSCALL , 2 , 32,
16672 0xfff80000, 0x00080000, 0 , 0,
16673 0x0 }, /* P.SYSCALL */
16674 { instruction , 0 , 0 , 32,
16675 0xfff80000, 0x00100000, &BREAK_32_ , 0,
16676 0x0 }, /* BREAK[32] */
16677 { instruction , 0 , 0 , 32,
16678 0xfff80000, 0x00180000, &SDBBP_32_ , 0,
16679 EJTAG_ }, /* SDBBP[32] */
16680 };
16681
16682
16683 static const Pool P_ADDIU[2] = {
16684 { pool , P_RI , 4 , 32,
16685 0xffe00000, 0x00000000, 0 , 0,
16686 0x0 }, /* P.RI */
16687 { instruction , 0 , 0 , 32,
16688 0xfc000000, 0x00000000, &ADDIU_32_ , &ADDIU_32__cond ,
16689 0x0 }, /* ADDIU[32] */
16690 };
16691
16692
16693 static const Pool P_TRAP[2] = {
16694 { instruction , 0 , 0 , 32,
16695 0xfc0007ff, 0x20000000, &TEQ , 0,
16696 XMMS_ }, /* TEQ */
16697 { instruction , 0 , 0 , 32,
16698 0xfc0007ff, 0x20000400, &TNE , 0,
16699 XMMS_ }, /* TNE */
16700 };
16701
16702
16703 static const Pool P_CMOVE[2] = {
16704 { instruction , 0 , 0 , 32,
16705 0xfc0007ff, 0x20000210, &MOVZ , 0,
16706 0x0 }, /* MOVZ */
16707 { instruction , 0 , 0 , 32,
16708 0xfc0007ff, 0x20000610, &MOVN , 0,
16709 0x0 }, /* MOVN */
16710 };
16711
16712
16713 static const Pool P_D_MT_VPE[2] = {
16714 { instruction , 0 , 0 , 32,
16715 0xfc1f3fff, 0x20010ab0, &DMT , 0,
16716 MT_ }, /* DMT */
16717 { instruction , 0 , 0 , 32,
16718 0xfc1f3fff, 0x20000ab0, &DVPE , 0,
16719 MT_ }, /* DVPE */
16720 };
16721
16722
16723 static const Pool P_E_MT_VPE[2] = {
16724 { instruction , 0 , 0 , 32,
16725 0xfc1f3fff, 0x20010eb0, &EMT , 0,
16726 MT_ }, /* EMT */
16727 { instruction , 0 , 0 , 32,
16728 0xfc1f3fff, 0x20000eb0, &EVPE , 0,
16729 MT_ }, /* EVPE */
16730 };
16731
16732
16733 static const Pool _P_MT_VPE[2] = {
16734 { pool , P_D_MT_VPE , 2 , 32,
16735 0xfc003fff, 0x20000ab0, 0 , 0,
16736 0x0 }, /* P.D_MT_VPE */
16737 { pool , P_E_MT_VPE , 2 , 32,
16738 0xfc003fff, 0x20000eb0, 0 , 0,
16739 0x0 }, /* P.E_MT_VPE */
16740 };
16741
16742
16743 static const Pool P_MT_VPE[8] = {
16744 { reserved_block , 0 , 0 , 32,
16745 0xfc003bff, 0x200002b0, 0 , 0,
16746 0x0 }, /* P.MT_VPE~*(0) */
16747 { pool , _P_MT_VPE , 2 , 32,
16748 0xfc003bff, 0x20000ab0, 0 , 0,
16749 0x0 }, /* _P.MT_VPE */
16750 { reserved_block , 0 , 0 , 32,
16751 0xfc003bff, 0x200012b0, 0 , 0,
16752 0x0 }, /* P.MT_VPE~*(2) */
16753 { reserved_block , 0 , 0 , 32,
16754 0xfc003bff, 0x20001ab0, 0 , 0,
16755 0x0 }, /* P.MT_VPE~*(3) */
16756 { reserved_block , 0 , 0 , 32,
16757 0xfc003bff, 0x200022b0, 0 , 0,
16758 0x0 }, /* P.MT_VPE~*(4) */
16759 { reserved_block , 0 , 0 , 32,
16760 0xfc003bff, 0x20002ab0, 0 , 0,
16761 0x0 }, /* P.MT_VPE~*(5) */
16762 { reserved_block , 0 , 0 , 32,
16763 0xfc003bff, 0x200032b0, 0 , 0,
16764 0x0 }, /* P.MT_VPE~*(6) */
16765 { reserved_block , 0 , 0 , 32,
16766 0xfc003bff, 0x20003ab0, 0 , 0,
16767 0x0 }, /* P.MT_VPE~*(7) */
16768 };
16769
16770
16771 static const Pool P_DVP[2] = {
16772 { instruction , 0 , 0 , 32,
16773 0xfc00ffff, 0x20000390, &DVP , 0,
16774 0x0 }, /* DVP */
16775 { instruction , 0 , 0 , 32,
16776 0xfc00ffff, 0x20000790, &EVP , 0,
16777 0x0 }, /* EVP */
16778 };
16779
16780
16781 static const Pool P_SLTU[2] = {
16782 { pool , P_DVP , 2 , 32,
16783 0xfc00fbff, 0x20000390, 0 , 0,
16784 0x0 }, /* P.DVP */
16785 { instruction , 0 , 0 , 32,
16786 0xfc0003ff, 0x20000390, &SLTU , &SLTU_cond ,
16787 0x0 }, /* SLTU */
16788 };
16789
16790
16791 static const Pool _POOL32A0[128] = {
16792 { pool , P_TRAP , 2 , 32,
16793 0xfc0003ff, 0x20000000, 0 , 0,
16794 0x0 }, /* P.TRAP */
16795 { instruction , 0 , 0 , 32,
16796 0xfc0003ff, 0x20000008, &SEB , 0,
16797 XMMS_ }, /* SEB */
16798 { instruction , 0 , 0 , 32,
16799 0xfc0003ff, 0x20000010, &SLLV , 0,
16800 0x0 }, /* SLLV */
16801 { instruction , 0 , 0 , 32,
16802 0xfc0003ff, 0x20000018, &MUL_32_ , 0,
16803 0x0 }, /* MUL[32] */
16804 { reserved_block , 0 , 0 , 32,
16805 0xfc0003ff, 0x20000020, 0 , 0,
16806 0x0 }, /* _POOL32A0~*(4) */
16807 { reserved_block , 0 , 0 , 32,
16808 0xfc0003ff, 0x20000028, 0 , 0,
16809 0x0 }, /* _POOL32A0~*(5) */
16810 { instruction , 0 , 0 , 32,
16811 0xfc0003ff, 0x20000030, &MFC0 , 0,
16812 0x0 }, /* MFC0 */
16813 { instruction , 0 , 0 , 32,
16814 0xfc0003ff, 0x20000038, &MFHC0 , 0,
16815 CP0_ | MVH_ }, /* MFHC0 */
16816 { reserved_block , 0 , 0 , 32,
16817 0xfc0003ff, 0x20000040, 0 , 0,
16818 0x0 }, /* _POOL32A0~*(8) */
16819 { instruction , 0 , 0 , 32,
16820 0xfc0003ff, 0x20000048, &SEH , 0,
16821 0x0 }, /* SEH */
16822 { instruction , 0 , 0 , 32,
16823 0xfc0003ff, 0x20000050, &SRLV , 0,
16824 0x0 }, /* SRLV */
16825 { instruction , 0 , 0 , 32,
16826 0xfc0003ff, 0x20000058, &MUH , 0,
16827 0x0 }, /* MUH */
16828 { reserved_block , 0 , 0 , 32,
16829 0xfc0003ff, 0x20000060, 0 , 0,
16830 0x0 }, /* _POOL32A0~*(12) */
16831 { reserved_block , 0 , 0 , 32,
16832 0xfc0003ff, 0x20000068, 0 , 0,
16833 0x0 }, /* _POOL32A0~*(13) */
16834 { instruction , 0 , 0 , 32,
16835 0xfc0003ff, 0x20000070, &MTC0 , 0,
16836 CP0_ }, /* MTC0 */
16837 { instruction , 0 , 0 , 32,
16838 0xfc0003ff, 0x20000078, &MTHC0 , 0,
16839 CP0_ | MVH_ }, /* MTHC0 */
16840 { reserved_block , 0 , 0 , 32,
16841 0xfc0003ff, 0x20000080, 0 , 0,
16842 0x0 }, /* _POOL32A0~*(16) */
16843 { reserved_block , 0 , 0 , 32,
16844 0xfc0003ff, 0x20000088, 0 , 0,
16845 0x0 }, /* _POOL32A0~*(17) */
16846 { instruction , 0 , 0 , 32,
16847 0xfc0003ff, 0x20000090, &SRAV , 0,
16848 0x0 }, /* SRAV */
16849 { instruction , 0 , 0 , 32,
16850 0xfc0003ff, 0x20000098, &MULU , 0,
16851 0x0 }, /* MULU */
16852 { reserved_block , 0 , 0 , 32,
16853 0xfc0003ff, 0x200000a0, 0 , 0,
16854 0x0 }, /* _POOL32A0~*(20) */
16855 { reserved_block , 0 , 0 , 32,
16856 0xfc0003ff, 0x200000a8, 0 , 0,
16857 0x0 }, /* _POOL32A0~*(21) */
16858 { instruction , 0 , 0 , 32,
16859 0xfc0003ff, 0x200000b0, &MFGC0 , 0,
16860 CP0_ | VZ_ }, /* MFGC0 */
16861 { instruction , 0 , 0 , 32,
16862 0xfc0003ff, 0x200000b8, &MFHGC0 , 0,
16863 CP0_ | VZ_ | MVH_ }, /* MFHGC0 */
16864 { reserved_block , 0 , 0 , 32,
16865 0xfc0003ff, 0x200000c0, 0 , 0,
16866 0x0 }, /* _POOL32A0~*(24) */
16867 { reserved_block , 0 , 0 , 32,
16868 0xfc0003ff, 0x200000c8, 0 , 0,
16869 0x0 }, /* _POOL32A0~*(25) */
16870 { instruction , 0 , 0 , 32,
16871 0xfc0003ff, 0x200000d0, &ROTRV , 0,
16872 0x0 }, /* ROTRV */
16873 { instruction , 0 , 0 , 32,
16874 0xfc0003ff, 0x200000d8, &MUHU , 0,
16875 0x0 }, /* MUHU */
16876 { reserved_block , 0 , 0 , 32,
16877 0xfc0003ff, 0x200000e0, 0 , 0,
16878 0x0 }, /* _POOL32A0~*(28) */
16879 { reserved_block , 0 , 0 , 32,
16880 0xfc0003ff, 0x200000e8, 0 , 0,
16881 0x0 }, /* _POOL32A0~*(29) */
16882 { instruction , 0 , 0 , 32,
16883 0xfc0003ff, 0x200000f0, &MTGC0 , 0,
16884 CP0_ | VZ_ }, /* MTGC0 */
16885 { instruction , 0 , 0 , 32,
16886 0xfc0003ff, 0x200000f8, &MTHGC0 , 0,
16887 CP0_ | VZ_ | MVH_ }, /* MTHGC0 */
16888 { reserved_block , 0 , 0 , 32,
16889 0xfc0003ff, 0x20000100, 0 , 0,
16890 0x0 }, /* _POOL32A0~*(32) */
16891 { reserved_block , 0 , 0 , 32,
16892 0xfc0003ff, 0x20000108, 0 , 0,
16893 0x0 }, /* _POOL32A0~*(33) */
16894 { instruction , 0 , 0 , 32,
16895 0xfc0003ff, 0x20000110, &ADD , 0,
16896 XMMS_ }, /* ADD */
16897 { instruction , 0 , 0 , 32,
16898 0xfc0003ff, 0x20000118, &DIV , 0,
16899 0x0 }, /* DIV */
16900 { reserved_block , 0 , 0 , 32,
16901 0xfc0003ff, 0x20000120, 0 , 0,
16902 0x0 }, /* _POOL32A0~*(36) */
16903 { reserved_block , 0 , 0 , 32,
16904 0xfc0003ff, 0x20000128, 0 , 0,
16905 0x0 }, /* _POOL32A0~*(37) */
16906 { instruction , 0 , 0 , 32,
16907 0xfc0003ff, 0x20000130, &DMFC0 , 0,
16908 CP0_ | MIPS64_ }, /* DMFC0 */
16909 { reserved_block , 0 , 0 , 32,
16910 0xfc0003ff, 0x20000138, 0 , 0,
16911 0x0 }, /* _POOL32A0~*(39) */
16912 { reserved_block , 0 , 0 , 32,
16913 0xfc0003ff, 0x20000140, 0 , 0,
16914 0x0 }, /* _POOL32A0~*(40) */
16915 { reserved_block , 0 , 0 , 32,
16916 0xfc0003ff, 0x20000148, 0 , 0,
16917 0x0 }, /* _POOL32A0~*(41) */
16918 { instruction , 0 , 0 , 32,
16919 0xfc0003ff, 0x20000150, &ADDU_32_ , 0,
16920 0x0 }, /* ADDU[32] */
16921 { instruction , 0 , 0 , 32,
16922 0xfc0003ff, 0x20000158, &MOD , 0,
16923 0x0 }, /* MOD */
16924 { reserved_block , 0 , 0 , 32,
16925 0xfc0003ff, 0x20000160, 0 , 0,
16926 0x0 }, /* _POOL32A0~*(44) */
16927 { reserved_block , 0 , 0 , 32,
16928 0xfc0003ff, 0x20000168, 0 , 0,
16929 0x0 }, /* _POOL32A0~*(45) */
16930 { instruction , 0 , 0 , 32,
16931 0xfc0003ff, 0x20000170, &DMTC0 , 0,
16932 CP0_ | MIPS64_ }, /* DMTC0 */
16933 { reserved_block , 0 , 0 , 32,
16934 0xfc0003ff, 0x20000178, 0 , 0,
16935 0x0 }, /* _POOL32A0~*(47) */
16936 { reserved_block , 0 , 0 , 32,
16937 0xfc0003ff, 0x20000180, 0 , 0,
16938 0x0 }, /* _POOL32A0~*(48) */
16939 { reserved_block , 0 , 0 , 32,
16940 0xfc0003ff, 0x20000188, 0 , 0,
16941 0x0 }, /* _POOL32A0~*(49) */
16942 { instruction , 0 , 0 , 32,
16943 0xfc0003ff, 0x20000190, &SUB , 0,
16944 XMMS_ }, /* SUB */
16945 { instruction , 0 , 0 , 32,
16946 0xfc0003ff, 0x20000198, &DIVU , 0,
16947 0x0 }, /* DIVU */
16948 { reserved_block , 0 , 0 , 32,
16949 0xfc0003ff, 0x200001a0, 0 , 0,
16950 0x0 }, /* _POOL32A0~*(52) */
16951 { reserved_block , 0 , 0 , 32,
16952 0xfc0003ff, 0x200001a8, 0 , 0,
16953 0x0 }, /* _POOL32A0~*(53) */
16954 { instruction , 0 , 0 , 32,
16955 0xfc0003ff, 0x200001b0, &DMFGC0 , 0,
16956 CP0_ | MIPS64_ | VZ_}, /* DMFGC0 */
16957 { reserved_block , 0 , 0 , 32,
16958 0xfc0003ff, 0x200001b8, 0 , 0,
16959 0x0 }, /* _POOL32A0~*(55) */
16960 { instruction , 0 , 0 , 32,
16961 0xfc0003ff, 0x200001c0, &RDHWR , 0,
16962 XMMS_ }, /* RDHWR */
16963 { reserved_block , 0 , 0 , 32,
16964 0xfc0003ff, 0x200001c8, 0 , 0,
16965 0x0 }, /* _POOL32A0~*(57) */
16966 { instruction , 0 , 0 , 32,
16967 0xfc0003ff, 0x200001d0, &SUBU_32_ , 0,
16968 0x0 }, /* SUBU[32] */
16969 { instruction , 0 , 0 , 32,
16970 0xfc0003ff, 0x200001d8, &MODU , 0,
16971 0x0 }, /* MODU */
16972 { reserved_block , 0 , 0 , 32,
16973 0xfc0003ff, 0x200001e0, 0 , 0,
16974 0x0 }, /* _POOL32A0~*(60) */
16975 { reserved_block , 0 , 0 , 32,
16976 0xfc0003ff, 0x200001e8, 0 , 0,
16977 0x0 }, /* _POOL32A0~*(61) */
16978 { instruction , 0 , 0 , 32,
16979 0xfc0003ff, 0x200001f0, &DMTGC0 , 0,
16980 CP0_ | MIPS64_ | VZ_}, /* DMTGC0 */
16981 { reserved_block , 0 , 0 , 32,
16982 0xfc0003ff, 0x200001f8, 0 , 0,
16983 0x0 }, /* _POOL32A0~*(63) */
16984 { reserved_block , 0 , 0 , 32,
16985 0xfc0003ff, 0x20000200, 0 , 0,
16986 0x0 }, /* _POOL32A0~*(64) */
16987 { reserved_block , 0 , 0 , 32,
16988 0xfc0003ff, 0x20000208, 0 , 0,
16989 0x0 }, /* _POOL32A0~*(65) */
16990 { pool , P_CMOVE , 2 , 32,
16991 0xfc0003ff, 0x20000210, 0 , 0,
16992 0x0 }, /* P.CMOVE */
16993 { reserved_block , 0 , 0 , 32,
16994 0xfc0003ff, 0x20000218, 0 , 0,
16995 0x0 }, /* _POOL32A0~*(67) */
16996 { reserved_block , 0 , 0 , 32,
16997 0xfc0003ff, 0x20000220, 0 , 0,
16998 0x0 }, /* _POOL32A0~*(68) */
16999 { instruction , 0 , 0 , 32,
17000 0xfc0003ff, 0x20000228, &FORK , 0,
17001 MT_ }, /* FORK */
17002 { instruction , 0 , 0 , 32,
17003 0xfc0003ff, 0x20000230, &MFTR , 0,
17004 MT_ }, /* MFTR */
17005 { instruction , 0 , 0 , 32,
17006 0xfc0003ff, 0x20000238, &MFHTR , 0,
17007 MT_ }, /* MFHTR */
17008 { reserved_block , 0 , 0 , 32,
17009 0xfc0003ff, 0x20000240, 0 , 0,
17010 0x0 }, /* _POOL32A0~*(72) */
17011 { reserved_block , 0 , 0 , 32,
17012 0xfc0003ff, 0x20000248, 0 , 0,
17013 0x0 }, /* _POOL32A0~*(73) */
17014 { instruction , 0 , 0 , 32,
17015 0xfc0003ff, 0x20000250, &AND_32_ , 0,
17016 0x0 }, /* AND[32] */
17017 { reserved_block , 0 , 0 , 32,
17018 0xfc0003ff, 0x20000258, 0 , 0,
17019 0x0 }, /* _POOL32A0~*(75) */
17020 { reserved_block , 0 , 0 , 32,
17021 0xfc0003ff, 0x20000260, 0 , 0,
17022 0x0 }, /* _POOL32A0~*(76) */
17023 { instruction , 0 , 0 , 32,
17024 0xfc0003ff, 0x20000268, &YIELD , 0,
17025 MT_ }, /* YIELD */
17026 { instruction , 0 , 0 , 32,
17027 0xfc0003ff, 0x20000270, &MTTR , 0,
17028 MT_ }, /* MTTR */
17029 { instruction , 0 , 0 , 32,
17030 0xfc0003ff, 0x20000278, &MTHTR , 0,
17031 MT_ }, /* MTHTR */
17032 { reserved_block , 0 , 0 , 32,
17033 0xfc0003ff, 0x20000280, 0 , 0,
17034 0x0 }, /* _POOL32A0~*(80) */
17035 { reserved_block , 0 , 0 , 32,
17036 0xfc0003ff, 0x20000288, 0 , 0,
17037 0x0 }, /* _POOL32A0~*(81) */
17038 { instruction , 0 , 0 , 32,
17039 0xfc0003ff, 0x20000290, &OR_32_ , 0,
17040 0x0 }, /* OR[32] */
17041 { reserved_block , 0 , 0 , 32,
17042 0xfc0003ff, 0x20000298, 0 , 0,
17043 0x0 }, /* _POOL32A0~*(83) */
17044 { reserved_block , 0 , 0 , 32,
17045 0xfc0003ff, 0x200002a0, 0 , 0,
17046 0x0 }, /* _POOL32A0~*(84) */
17047 { reserved_block , 0 , 0 , 32,
17048 0xfc0003ff, 0x200002a8, 0 , 0,
17049 0x0 }, /* _POOL32A0~*(85) */
17050 { pool , P_MT_VPE , 8 , 32,
17051 0xfc0003ff, 0x200002b0, 0 , 0,
17052 0x0 }, /* P.MT_VPE */
17053 { reserved_block , 0 , 0 , 32,
17054 0xfc0003ff, 0x200002b8, 0 , 0,
17055 0x0 }, /* _POOL32A0~*(87) */
17056 { reserved_block , 0 , 0 , 32,
17057 0xfc0003ff, 0x200002c0, 0 , 0,
17058 0x0 }, /* _POOL32A0~*(88) */
17059 { reserved_block , 0 , 0 , 32,
17060 0xfc0003ff, 0x200002c8, 0 , 0,
17061 0x0 }, /* _POOL32A0~*(89) */
17062 { instruction , 0 , 0 , 32,
17063 0xfc0003ff, 0x200002d0, &NOR , 0,
17064 0x0 }, /* NOR */
17065 { reserved_block , 0 , 0 , 32,
17066 0xfc0003ff, 0x200002d8, 0 , 0,
17067 0x0 }, /* _POOL32A0~*(91) */
17068 { reserved_block , 0 , 0 , 32,
17069 0xfc0003ff, 0x200002e0, 0 , 0,
17070 0x0 }, /* _POOL32A0~*(92) */
17071 { reserved_block , 0 , 0 , 32,
17072 0xfc0003ff, 0x200002e8, 0 , 0,
17073 0x0 }, /* _POOL32A0~*(93) */
17074 { reserved_block , 0 , 0 , 32,
17075 0xfc0003ff, 0x200002f0, 0 , 0,
17076 0x0 }, /* _POOL32A0~*(94) */
17077 { reserved_block , 0 , 0 , 32,
17078 0xfc0003ff, 0x200002f8, 0 , 0,
17079 0x0 }, /* _POOL32A0~*(95) */
17080 { reserved_block , 0 , 0 , 32,
17081 0xfc0003ff, 0x20000300, 0 , 0,
17082 0x0 }, /* _POOL32A0~*(96) */
17083 { reserved_block , 0 , 0 , 32,
17084 0xfc0003ff, 0x20000308, 0 , 0,
17085 0x0 }, /* _POOL32A0~*(97) */
17086 { instruction , 0 , 0 , 32,
17087 0xfc0003ff, 0x20000310, &XOR_32_ , 0,
17088 0x0 }, /* XOR[32] */
17089 { reserved_block , 0 , 0 , 32,
17090 0xfc0003ff, 0x20000318, 0 , 0,
17091 0x0 }, /* _POOL32A0~*(99) */
17092 { reserved_block , 0 , 0 , 32,
17093 0xfc0003ff, 0x20000320, 0 , 0,
17094 0x0 }, /* _POOL32A0~*(100) */
17095 { reserved_block , 0 , 0 , 32,
17096 0xfc0003ff, 0x20000328, 0 , 0,
17097 0x0 }, /* _POOL32A0~*(101) */
17098 { reserved_block , 0 , 0 , 32,
17099 0xfc0003ff, 0x20000330, 0 , 0,
17100 0x0 }, /* _POOL32A0~*(102) */
17101 { reserved_block , 0 , 0 , 32,
17102 0xfc0003ff, 0x20000338, 0 , 0,
17103 0x0 }, /* _POOL32A0~*(103) */
17104 { reserved_block , 0 , 0 , 32,
17105 0xfc0003ff, 0x20000340, 0 , 0,
17106 0x0 }, /* _POOL32A0~*(104) */
17107 { reserved_block , 0 , 0 , 32,
17108 0xfc0003ff, 0x20000348, 0 , 0,
17109 0x0 }, /* _POOL32A0~*(105) */
17110 { instruction , 0 , 0 , 32,
17111 0xfc0003ff, 0x20000350, &SLT , 0,
17112 0x0 }, /* SLT */
17113 { reserved_block , 0 , 0 , 32,
17114 0xfc0003ff, 0x20000358, 0 , 0,
17115 0x0 }, /* _POOL32A0~*(107) */
17116 { reserved_block , 0 , 0 , 32,
17117 0xfc0003ff, 0x20000360, 0 , 0,
17118 0x0 }, /* _POOL32A0~*(108) */
17119 { reserved_block , 0 , 0 , 32,
17120 0xfc0003ff, 0x20000368, 0 , 0,
17121 0x0 }, /* _POOL32A0~*(109) */
17122 { reserved_block , 0 , 0 , 32,
17123 0xfc0003ff, 0x20000370, 0 , 0,
17124 0x0 }, /* _POOL32A0~*(110) */
17125 { reserved_block , 0 , 0 , 32,
17126 0xfc0003ff, 0x20000378, 0 , 0,
17127 0x0 }, /* _POOL32A0~*(111) */
17128 { reserved_block , 0 , 0 , 32,
17129 0xfc0003ff, 0x20000380, 0 , 0,
17130 0x0 }, /* _POOL32A0~*(112) */
17131 { reserved_block , 0 , 0 , 32,
17132 0xfc0003ff, 0x20000388, 0 , 0,
17133 0x0 }, /* _POOL32A0~*(113) */
17134 { pool , P_SLTU , 2 , 32,
17135 0xfc0003ff, 0x20000390, 0 , 0,
17136 0x0 }, /* P.SLTU */
17137 { reserved_block , 0 , 0 , 32,
17138 0xfc0003ff, 0x20000398, 0 , 0,
17139 0x0 }, /* _POOL32A0~*(115) */
17140 { reserved_block , 0 , 0 , 32,
17141 0xfc0003ff, 0x200003a0, 0 , 0,
17142 0x0 }, /* _POOL32A0~*(116) */
17143 { reserved_block , 0 , 0 , 32,
17144 0xfc0003ff, 0x200003a8, 0 , 0,
17145 0x0 }, /* _POOL32A0~*(117) */
17146 { reserved_block , 0 , 0 , 32,
17147 0xfc0003ff, 0x200003b0, 0 , 0,
17148 0x0 }, /* _POOL32A0~*(118) */
17149 { reserved_block , 0 , 0 , 32,
17150 0xfc0003ff, 0x200003b8, 0 , 0,
17151 0x0 }, /* _POOL32A0~*(119) */
17152 { reserved_block , 0 , 0 , 32,
17153 0xfc0003ff, 0x200003c0, 0 , 0,
17154 0x0 }, /* _POOL32A0~*(120) */
17155 { reserved_block , 0 , 0 , 32,
17156 0xfc0003ff, 0x200003c8, 0 , 0,
17157 0x0 }, /* _POOL32A0~*(121) */
17158 { instruction , 0 , 0 , 32,
17159 0xfc0003ff, 0x200003d0, &SOV , 0,
17160 0x0 }, /* SOV */
17161 { reserved_block , 0 , 0 , 32,
17162 0xfc0003ff, 0x200003d8, 0 , 0,
17163 0x0 }, /* _POOL32A0~*(123) */
17164 { reserved_block , 0 , 0 , 32,
17165 0xfc0003ff, 0x200003e0, 0 , 0,
17166 0x0 }, /* _POOL32A0~*(124) */
17167 { reserved_block , 0 , 0 , 32,
17168 0xfc0003ff, 0x200003e8, 0 , 0,
17169 0x0 }, /* _POOL32A0~*(125) */
17170 { reserved_block , 0 , 0 , 32,
17171 0xfc0003ff, 0x200003f0, 0 , 0,
17172 0x0 }, /* _POOL32A0~*(126) */
17173 { reserved_block , 0 , 0 , 32,
17174 0xfc0003ff, 0x200003f8, 0 , 0,
17175 0x0 }, /* _POOL32A0~*(127) */
17176 };
17177
17178
17179 static const Pool ADDQ__S__PH[2] = {
17180 { instruction , 0 , 0 , 32,
17181 0xfc0007ff, 0x2000000d, &ADDQ_PH , 0,
17182 DSP_ }, /* ADDQ.PH */
17183 { instruction , 0 , 0 , 32,
17184 0xfc0007ff, 0x2000040d, &ADDQ_S_PH , 0,
17185 DSP_ }, /* ADDQ_S.PH */
17186 };
17187
17188
17189 static const Pool MUL__S__PH[2] = {
17190 { instruction , 0 , 0 , 32,
17191 0xfc0007ff, 0x2000002d, &MUL_PH , 0,
17192 DSP_ }, /* MUL.PH */
17193 { instruction , 0 , 0 , 32,
17194 0xfc0007ff, 0x2000042d, &MUL_S_PH , 0,
17195 DSP_ }, /* MUL_S.PH */
17196 };
17197
17198
17199 static const Pool ADDQH__R__PH[2] = {
17200 { instruction , 0 , 0 , 32,
17201 0xfc0007ff, 0x2000004d, &ADDQH_PH , 0,
17202 DSP_ }, /* ADDQH.PH */
17203 { instruction , 0 , 0 , 32,
17204 0xfc0007ff, 0x2000044d, &ADDQH_R_PH , 0,
17205 DSP_ }, /* ADDQH_R.PH */
17206 };
17207
17208
17209 static const Pool ADDQH__R__W[2] = {
17210 { instruction , 0 , 0 , 32,
17211 0xfc0007ff, 0x2000008d, &ADDQH_W , 0,
17212 DSP_ }, /* ADDQH.W */
17213 { instruction , 0 , 0 , 32,
17214 0xfc0007ff, 0x2000048d, &ADDQH_R_W , 0,
17215 DSP_ }, /* ADDQH_R.W */
17216 };
17217
17218
17219 static const Pool ADDU__S__QB[2] = {
17220 { instruction , 0 , 0 , 32,
17221 0xfc0007ff, 0x200000cd, &ADDU_QB , 0,
17222 DSP_ }, /* ADDU.QB */
17223 { instruction , 0 , 0 , 32,
17224 0xfc0007ff, 0x200004cd, &ADDU_S_QB , 0,
17225 DSP_ }, /* ADDU_S.QB */
17226 };
17227
17228
17229 static const Pool ADDU__S__PH[2] = {
17230 { instruction , 0 , 0 , 32,
17231 0xfc0007ff, 0x2000010d, &ADDU_PH , 0,
17232 DSP_ }, /* ADDU.PH */
17233 { instruction , 0 , 0 , 32,
17234 0xfc0007ff, 0x2000050d, &ADDU_S_PH , 0,
17235 DSP_ }, /* ADDU_S.PH */
17236 };
17237
17238
17239 static const Pool ADDUH__R__QB[2] = {
17240 { instruction , 0 , 0 , 32,
17241 0xfc0007ff, 0x2000014d, &ADDUH_QB , 0,
17242 DSP_ }, /* ADDUH.QB */
17243 { instruction , 0 , 0 , 32,
17244 0xfc0007ff, 0x2000054d, &ADDUH_R_QB , 0,
17245 DSP_ }, /* ADDUH_R.QB */
17246 };
17247
17248
17249 static const Pool SHRAV__R__PH[2] = {
17250 { instruction , 0 , 0 , 32,
17251 0xfc0007ff, 0x2000018d, &SHRAV_PH , 0,
17252 DSP_ }, /* SHRAV.PH */
17253 { instruction , 0 , 0 , 32,
17254 0xfc0007ff, 0x2000058d, &SHRAV_R_PH , 0,
17255 DSP_ }, /* SHRAV_R.PH */
17256 };
17257
17258
17259 static const Pool SHRAV__R__QB[2] = {
17260 { instruction , 0 , 0 , 32,
17261 0xfc0007ff, 0x200001cd, &SHRAV_QB , 0,
17262 DSP_ }, /* SHRAV.QB */
17263 { instruction , 0 , 0 , 32,
17264 0xfc0007ff, 0x200005cd, &SHRAV_R_QB , 0,
17265 DSP_ }, /* SHRAV_R.QB */
17266 };
17267
17268
17269 static const Pool SUBQ__S__PH[2] = {
17270 { instruction , 0 , 0 , 32,
17271 0xfc0007ff, 0x2000020d, &SUBQ_PH , 0,
17272 DSP_ }, /* SUBQ.PH */
17273 { instruction , 0 , 0 , 32,
17274 0xfc0007ff, 0x2000060d, &SUBQ_S_PH , 0,
17275 DSP_ }, /* SUBQ_S.PH */
17276 };
17277
17278
17279 static const Pool SUBQH__R__PH[2] = {
17280 { instruction , 0 , 0 , 32,
17281 0xfc0007ff, 0x2000024d, &SUBQH_PH , 0,
17282 DSP_ }, /* SUBQH.PH */
17283 { instruction , 0 , 0 , 32,
17284 0xfc0007ff, 0x2000064d, &SUBQH_R_PH , 0,
17285 DSP_ }, /* SUBQH_R.PH */
17286 };
17287
17288
17289 static const Pool SUBQH__R__W[2] = {
17290 { instruction , 0 , 0 , 32,
17291 0xfc0007ff, 0x2000028d, &SUBQH_W , 0,
17292 DSP_ }, /* SUBQH.W */
17293 { instruction , 0 , 0 , 32,
17294 0xfc0007ff, 0x2000068d, &SUBQH_R_W , 0,
17295 DSP_ }, /* SUBQH_R.W */
17296 };
17297
17298
17299 static const Pool SUBU__S__QB[2] = {
17300 { instruction , 0 , 0 , 32,
17301 0xfc0007ff, 0x200002cd, &SUBU_QB , 0,
17302 DSP_ }, /* SUBU.QB */
17303 { instruction , 0 , 0 , 32,
17304 0xfc0007ff, 0x200006cd, &SUBU_S_QB , 0,
17305 DSP_ }, /* SUBU_S.QB */
17306 };
17307
17308
17309 static const Pool SUBU__S__PH[2] = {
17310 { instruction , 0 , 0 , 32,
17311 0xfc0007ff, 0x2000030d, &SUBU_PH , 0,
17312 DSP_ }, /* SUBU.PH */
17313 { instruction , 0 , 0 , 32,
17314 0xfc0007ff, 0x2000070d, &SUBU_S_PH , 0,
17315 DSP_ }, /* SUBU_S.PH */
17316 };
17317
17318
17319 static const Pool SHRA__R__PH[2] = {
17320 { instruction , 0 , 0 , 32,
17321 0xfc0007ff, 0x20000335, &SHRA_PH , 0,
17322 DSP_ }, /* SHRA.PH */
17323 { instruction , 0 , 0 , 32,
17324 0xfc0007ff, 0x20000735, &SHRA_R_PH , 0,
17325 DSP_ }, /* SHRA_R.PH */
17326 };
17327
17328
17329 static const Pool SUBUH__R__QB[2] = {
17330 { instruction , 0 , 0 , 32,
17331 0xfc0007ff, 0x2000034d, &SUBUH_QB , 0,
17332 DSP_ }, /* SUBUH.QB */
17333 { instruction , 0 , 0 , 32,
17334 0xfc0007ff, 0x2000074d, &SUBUH_R_QB , 0,
17335 DSP_ }, /* SUBUH_R.QB */
17336 };
17337
17338
17339 static const Pool SHLLV__S__PH[2] = {
17340 { instruction , 0 , 0 , 32,
17341 0xfc0007ff, 0x2000038d, &SHLLV_PH , 0,
17342 DSP_ }, /* SHLLV.PH */
17343 { instruction , 0 , 0 , 32,
17344 0xfc0007ff, 0x2000078d, &SHLLV_S_PH , 0,
17345 DSP_ }, /* SHLLV_S.PH */
17346 };
17347
17348
17349 static const Pool SHLL__S__PH[4] = {
17350 { instruction , 0 , 0 , 32,
17351 0xfc000fff, 0x200003b5, &SHLL_PH , 0,
17352 DSP_ }, /* SHLL.PH */
17353 { reserved_block , 0 , 0 , 32,
17354 0xfc000fff, 0x200007b5, 0 , 0,
17355 0x0 }, /* SHLL[_S].PH~*(1) */
17356 { instruction , 0 , 0 , 32,
17357 0xfc000fff, 0x20000bb5, &SHLL_S_PH , 0,
17358 DSP_ }, /* SHLL_S.PH */
17359 { reserved_block , 0 , 0 , 32,
17360 0xfc000fff, 0x20000fb5, 0 , 0,
17361 0x0 }, /* SHLL[_S].PH~*(3) */
17362 };
17363
17364
17365 static const Pool PRECR_SRA__R__PH_W[2] = {
17366 { instruction , 0 , 0 , 32,
17367 0xfc0007ff, 0x200003cd, &PRECR_SRA_PH_W , 0,
17368 DSP_ }, /* PRECR_SRA.PH.W */
17369 { instruction , 0 , 0 , 32,
17370 0xfc0007ff, 0x200007cd, &PRECR_SRA_R_PH_W , 0,
17371 DSP_ }, /* PRECR_SRA_R.PH.W */
17372 };
17373
17374
17375 static const Pool _POOL32A5[128] = {
17376 { instruction , 0 , 0 , 32,
17377 0xfc0003ff, 0x20000005, &CMP_EQ_PH , 0,
17378 DSP_ }, /* CMP.EQ.PH */
17379 { pool , ADDQ__S__PH , 2 , 32,
17380 0xfc0003ff, 0x2000000d, 0 , 0,
17381 0x0 }, /* ADDQ[_S].PH */
17382 { reserved_block , 0 , 0 , 32,
17383 0xfc0003ff, 0x20000015, 0 , 0,
17384 0x0 }, /* _POOL32A5~*(2) */
17385 { instruction , 0 , 0 , 32,
17386 0xfc0003ff, 0x2000001d, &SHILO , 0,
17387 DSP_ }, /* SHILO */
17388 { instruction , 0 , 0 , 32,
17389 0xfc0003ff, 0x20000025, &MULEQ_S_W_PHL , 0,
17390 DSP_ }, /* MULEQ_S.W.PHL */
17391 { pool , MUL__S__PH , 2 , 32,
17392 0xfc0003ff, 0x2000002d, 0 , 0,
17393 0x0 }, /* MUL[_S].PH */
17394 { reserved_block , 0 , 0 , 32,
17395 0xfc0003ff, 0x20000035, 0 , 0,
17396 0x0 }, /* _POOL32A5~*(6) */
17397 { instruction , 0 , 0 , 32,
17398 0xfc0003ff, 0x2000003d, &REPL_PH , 0,
17399 DSP_ }, /* REPL.PH */
17400 { instruction , 0 , 0 , 32,
17401 0xfc0003ff, 0x20000045, &CMP_LT_PH , 0,
17402 DSP_ }, /* CMP.LT.PH */
17403 { pool , ADDQH__R__PH , 2 , 32,
17404 0xfc0003ff, 0x2000004d, 0 , 0,
17405 0x0 }, /* ADDQH[_R].PH */
17406 { reserved_block , 0 , 0 , 32,
17407 0xfc0003ff, 0x20000055, 0 , 0,
17408 0x0 }, /* _POOL32A5~*(10) */
17409 { reserved_block , 0 , 0 , 32,
17410 0xfc0003ff, 0x2000005d, 0 , 0,
17411 0x0 }, /* _POOL32A5~*(11) */
17412 { instruction , 0 , 0 , 32,
17413 0xfc0003ff, 0x20000065, &MULEQ_S_W_PHR , 0,
17414 DSP_ }, /* MULEQ_S.W.PHR */
17415 { instruction , 0 , 0 , 32,
17416 0xfc0003ff, 0x2000006d, &PRECR_QB_PH , 0,
17417 DSP_ }, /* PRECR.QB.PH */
17418 { reserved_block , 0 , 0 , 32,
17419 0xfc0003ff, 0x20000075, 0 , 0,
17420 0x0 }, /* _POOL32A5~*(14) */
17421 { reserved_block , 0 , 0 , 32,
17422 0xfc0003ff, 0x2000007d, 0 , 0,
17423 0x0 }, /* _POOL32A5~*(15) */
17424 { instruction , 0 , 0 , 32,
17425 0xfc0003ff, 0x20000085, &CMP_LE_PH , 0,
17426 DSP_ }, /* CMP.LE.PH */
17427 { pool , ADDQH__R__W , 2 , 32,
17428 0xfc0003ff, 0x2000008d, 0 , 0,
17429 0x0 }, /* ADDQH[_R].W */
17430 { instruction , 0 , 0 , 32,
17431 0xfc0003ff, 0x20000095, &MULEU_S_PH_QBL , 0,
17432 DSP_ }, /* MULEU_S.PH.QBL */
17433 { reserved_block , 0 , 0 , 32,
17434 0xfc0003ff, 0x2000009d, 0 , 0,
17435 0x0 }, /* _POOL32A5~*(19) */
17436 { reserved_block , 0 , 0 , 32,
17437 0xfc0003ff, 0x200000a5, 0 , 0,
17438 0x0 }, /* _POOL32A5~*(20) */
17439 { instruction , 0 , 0 , 32,
17440 0xfc0003ff, 0x200000ad, &PRECRQ_QB_PH , 0,
17441 DSP_ }, /* PRECRQ.QB.PH */
17442 { reserved_block , 0 , 0 , 32,
17443 0xfc0003ff, 0x200000b5, 0 , 0,
17444 0x0 }, /* _POOL32A5~*(22) */
17445 { reserved_block , 0 , 0 , 32,
17446 0xfc0003ff, 0x200000bd, 0 , 0,
17447 0x0 }, /* _POOL32A5~*(23) */
17448 { instruction , 0 , 0 , 32,
17449 0xfc0003ff, 0x200000c5, &CMPGU_EQ_QB , 0,
17450 DSP_ }, /* CMPGU.EQ.QB */
17451 { pool , ADDU__S__QB , 2 , 32,
17452 0xfc0003ff, 0x200000cd, 0 , 0,
17453 0x0 }, /* ADDU[_S].QB */
17454 { instruction , 0 , 0 , 32,
17455 0xfc0003ff, 0x200000d5, &MULEU_S_PH_QBR , 0,
17456 DSP_ }, /* MULEU_S.PH.QBR */
17457 { reserved_block , 0 , 0 , 32,
17458 0xfc0003ff, 0x200000dd, 0 , 0,
17459 0x0 }, /* _POOL32A5~*(27) */
17460 { reserved_block , 0 , 0 , 32,
17461 0xfc0003ff, 0x200000e5, 0 , 0,
17462 0x0 }, /* _POOL32A5~*(28) */
17463 { instruction , 0 , 0 , 32,
17464 0xfc0003ff, 0x200000ed, &PRECRQ_PH_W , 0,
17465 DSP_ }, /* PRECRQ.PH.W */
17466 { reserved_block , 0 , 0 , 32,
17467 0xfc0003ff, 0x200000f5, 0 , 0,
17468 0x0 }, /* _POOL32A5~*(30) */
17469 { reserved_block , 0 , 0 , 32,
17470 0xfc0003ff, 0x200000fd, 0 , 0,
17471 0x0 }, /* _POOL32A5~*(31) */
17472 { instruction , 0 , 0 , 32,
17473 0xfc0003ff, 0x20000105, &CMPGU_LT_QB , 0,
17474 DSP_ }, /* CMPGU.LT.QB */
17475 { pool , ADDU__S__PH , 2 , 32,
17476 0xfc0003ff, 0x2000010d, 0 , 0,
17477 0x0 }, /* ADDU[_S].PH */
17478 { instruction , 0 , 0 , 32,
17479 0xfc0003ff, 0x20000115, &MULQ_RS_PH , 0,
17480 DSP_ }, /* MULQ_RS.PH */
17481 { reserved_block , 0 , 0 , 32,
17482 0xfc0003ff, 0x2000011d, 0 , 0,
17483 0x0 }, /* _POOL32A5~*(35) */
17484 { reserved_block , 0 , 0 , 32,
17485 0xfc0003ff, 0x20000125, 0 , 0,
17486 0x0 }, /* _POOL32A5~*(36) */
17487 { instruction , 0 , 0 , 32,
17488 0xfc0003ff, 0x2000012d, &PRECRQ_RS_PH_W , 0,
17489 DSP_ }, /* PRECRQ_RS.PH.W */
17490 { reserved_block , 0 , 0 , 32,
17491 0xfc0003ff, 0x20000135, 0 , 0,
17492 0x0 }, /* _POOL32A5~*(38) */
17493 { reserved_block , 0 , 0 , 32,
17494 0xfc0003ff, 0x2000013d, 0 , 0,
17495 0x0 }, /* _POOL32A5~*(39) */
17496 { instruction , 0 , 0 , 32,
17497 0xfc0003ff, 0x20000145, &CMPGU_LE_QB , 0,
17498 DSP_ }, /* CMPGU.LE.QB */
17499 { pool , ADDUH__R__QB , 2 , 32,
17500 0xfc0003ff, 0x2000014d, 0 , 0,
17501 0x0 }, /* ADDUH[_R].QB */
17502 { instruction , 0 , 0 , 32,
17503 0xfc0003ff, 0x20000155, &MULQ_S_PH , 0,
17504 DSP_ }, /* MULQ_S.PH */
17505 { reserved_block , 0 , 0 , 32,
17506 0xfc0003ff, 0x2000015d, 0 , 0,
17507 0x0 }, /* _POOL32A5~*(43) */
17508 { reserved_block , 0 , 0 , 32,
17509 0xfc0003ff, 0x20000165, 0 , 0,
17510 0x0 }, /* _POOL32A5~*(44) */
17511 { instruction , 0 , 0 , 32,
17512 0xfc0003ff, 0x2000016d, &PRECRQU_S_QB_PH , 0,
17513 DSP_ }, /* PRECRQU_S.QB.PH */
17514 { reserved_block , 0 , 0 , 32,
17515 0xfc0003ff, 0x20000175, 0 , 0,
17516 0x0 }, /* _POOL32A5~*(46) */
17517 { reserved_block , 0 , 0 , 32,
17518 0xfc0003ff, 0x2000017d, 0 , 0,
17519 0x0 }, /* _POOL32A5~*(47) */
17520 { instruction , 0 , 0 , 32,
17521 0xfc0003ff, 0x20000185, &CMPGDU_EQ_QB , 0,
17522 DSP_ }, /* CMPGDU.EQ.QB */
17523 { pool , SHRAV__R__PH , 2 , 32,
17524 0xfc0003ff, 0x2000018d, 0 , 0,
17525 0x0 }, /* SHRAV[_R].PH */
17526 { instruction , 0 , 0 , 32,
17527 0xfc0003ff, 0x20000195, &MULQ_RS_W , 0,
17528 DSP_ }, /* MULQ_RS.W */
17529 { reserved_block , 0 , 0 , 32,
17530 0xfc0003ff, 0x2000019d, 0 , 0,
17531 0x0 }, /* _POOL32A5~*(51) */
17532 { reserved_block , 0 , 0 , 32,
17533 0xfc0003ff, 0x200001a5, 0 , 0,
17534 0x0 }, /* _POOL32A5~*(52) */
17535 { instruction , 0 , 0 , 32,
17536 0xfc0003ff, 0x200001ad, &PACKRL_PH , 0,
17537 DSP_ }, /* PACKRL.PH */
17538 { reserved_block , 0 , 0 , 32,
17539 0xfc0003ff, 0x200001b5, 0 , 0,
17540 0x0 }, /* _POOL32A5~*(54) */
17541 { reserved_block , 0 , 0 , 32,
17542 0xfc0003ff, 0x200001bd, 0 , 0,
17543 0x0 }, /* _POOL32A5~*(55) */
17544 { instruction , 0 , 0 , 32,
17545 0xfc0003ff, 0x200001c5, &CMPGDU_LT_QB , 0,
17546 DSP_ }, /* CMPGDU.LT.QB */
17547 { pool , SHRAV__R__QB , 2 , 32,
17548 0xfc0003ff, 0x200001cd, 0 , 0,
17549 0x0 }, /* SHRAV[_R].QB */
17550 { instruction , 0 , 0 , 32,
17551 0xfc0003ff, 0x200001d5, &MULQ_S_W , 0,
17552 DSP_ }, /* MULQ_S.W */
17553 { reserved_block , 0 , 0 , 32,
17554 0xfc0003ff, 0x200001dd, 0 , 0,
17555 0x0 }, /* _POOL32A5~*(59) */
17556 { reserved_block , 0 , 0 , 32,
17557 0xfc0003ff, 0x200001e5, 0 , 0,
17558 0x0 }, /* _POOL32A5~*(60) */
17559 { instruction , 0 , 0 , 32,
17560 0xfc0003ff, 0x200001ed, &PICK_QB , 0,
17561 DSP_ }, /* PICK.QB */
17562 { reserved_block , 0 , 0 , 32,
17563 0xfc0003ff, 0x200001f5, 0 , 0,
17564 0x0 }, /* _POOL32A5~*(62) */
17565 { reserved_block , 0 , 0 , 32,
17566 0xfc0003ff, 0x200001fd, 0 , 0,
17567 0x0 }, /* _POOL32A5~*(63) */
17568 { instruction , 0 , 0 , 32,
17569 0xfc0003ff, 0x20000205, &CMPGDU_LE_QB , 0,
17570 DSP_ }, /* CMPGDU.LE.QB */
17571 { pool , SUBQ__S__PH , 2 , 32,
17572 0xfc0003ff, 0x2000020d, 0 , 0,
17573 0x0 }, /* SUBQ[_S].PH */
17574 { instruction , 0 , 0 , 32,
17575 0xfc0003ff, 0x20000215, &APPEND , 0,
17576 DSP_ }, /* APPEND */
17577 { reserved_block , 0 , 0 , 32,
17578 0xfc0003ff, 0x2000021d, 0 , 0,
17579 0x0 }, /* _POOL32A5~*(67) */
17580 { reserved_block , 0 , 0 , 32,
17581 0xfc0003ff, 0x20000225, 0 , 0,
17582 0x0 }, /* _POOL32A5~*(68) */
17583 { instruction , 0 , 0 , 32,
17584 0xfc0003ff, 0x2000022d, &PICK_PH , 0,
17585 DSP_ }, /* PICK.PH */
17586 { reserved_block , 0 , 0 , 32,
17587 0xfc0003ff, 0x20000235, 0 , 0,
17588 0x0 }, /* _POOL32A5~*(70) */
17589 { reserved_block , 0 , 0 , 32,
17590 0xfc0003ff, 0x2000023d, 0 , 0,
17591 0x0 }, /* _POOL32A5~*(71) */
17592 { instruction , 0 , 0 , 32,
17593 0xfc0003ff, 0x20000245, &CMPU_EQ_QB , 0,
17594 DSP_ }, /* CMPU.EQ.QB */
17595 { pool , SUBQH__R__PH , 2 , 32,
17596 0xfc0003ff, 0x2000024d, 0 , 0,
17597 0x0 }, /* SUBQH[_R].PH */
17598 { instruction , 0 , 0 , 32,
17599 0xfc0003ff, 0x20000255, &PREPEND , 0,
17600 DSP_ }, /* PREPEND */
17601 { reserved_block , 0 , 0 , 32,
17602 0xfc0003ff, 0x2000025d, 0 , 0,
17603 0x0 }, /* _POOL32A5~*(75) */
17604 { reserved_block , 0 , 0 , 32,
17605 0xfc0003ff, 0x20000265, 0 , 0,
17606 0x0 }, /* _POOL32A5~*(76) */
17607 { reserved_block , 0 , 0 , 32,
17608 0xfc0003ff, 0x2000026d, 0 , 0,
17609 0x0 }, /* _POOL32A5~*(77) */
17610 { reserved_block , 0 , 0 , 32,
17611 0xfc0003ff, 0x20000275, 0 , 0,
17612 0x0 }, /* _POOL32A5~*(78) */
17613 { reserved_block , 0 , 0 , 32,
17614 0xfc0003ff, 0x2000027d, 0 , 0,
17615 0x0 }, /* _POOL32A5~*(79) */
17616 { instruction , 0 , 0 , 32,
17617 0xfc0003ff, 0x20000285, &CMPU_LT_QB , 0,
17618 DSP_ }, /* CMPU.LT.QB */
17619 { pool , SUBQH__R__W , 2 , 32,
17620 0xfc0003ff, 0x2000028d, 0 , 0,
17621 0x0 }, /* SUBQH[_R].W */
17622 { instruction , 0 , 0 , 32,
17623 0xfc0003ff, 0x20000295, &MODSUB , 0,
17624 DSP_ }, /* MODSUB */
17625 { reserved_block , 0 , 0 , 32,
17626 0xfc0003ff, 0x2000029d, 0 , 0,
17627 0x0 }, /* _POOL32A5~*(83) */
17628 { reserved_block , 0 , 0 , 32,
17629 0xfc0003ff, 0x200002a5, 0 , 0,
17630 0x0 }, /* _POOL32A5~*(84) */
17631 { reserved_block , 0 , 0 , 32,
17632 0xfc0003ff, 0x200002ad, 0 , 0,
17633 0x0 }, /* _POOL32A5~*(85) */
17634 { reserved_block , 0 , 0 , 32,
17635 0xfc0003ff, 0x200002b5, 0 , 0,
17636 0x0 }, /* _POOL32A5~*(86) */
17637 { reserved_block , 0 , 0 , 32,
17638 0xfc0003ff, 0x200002bd, 0 , 0,
17639 0x0 }, /* _POOL32A5~*(87) */
17640 { instruction , 0 , 0 , 32,
17641 0xfc0003ff, 0x200002c5, &CMPU_LE_QB , 0,
17642 DSP_ }, /* CMPU.LE.QB */
17643 { pool , SUBU__S__QB , 2 , 32,
17644 0xfc0003ff, 0x200002cd, 0 , 0,
17645 0x0 }, /* SUBU[_S].QB */
17646 { instruction , 0 , 0 , 32,
17647 0xfc0003ff, 0x200002d5, &SHRAV_R_W , 0,
17648 DSP_ }, /* SHRAV_R.W */
17649 { reserved_block , 0 , 0 , 32,
17650 0xfc0003ff, 0x200002dd, 0 , 0,
17651 0x0 }, /* _POOL32A5~*(91) */
17652 { reserved_block , 0 , 0 , 32,
17653 0xfc0003ff, 0x200002e5, 0 , 0,
17654 0x0 }, /* _POOL32A5~*(92) */
17655 { reserved_block , 0 , 0 , 32,
17656 0xfc0003ff, 0x200002ed, 0 , 0,
17657 0x0 }, /* _POOL32A5~*(93) */
17658 { instruction , 0 , 0 , 32,
17659 0xfc0003ff, 0x200002f5, &SHRA_R_W , 0,
17660 DSP_ }, /* SHRA_R.W */
17661 { reserved_block , 0 , 0 , 32,
17662 0xfc0003ff, 0x200002fd, 0 , 0,
17663 0x0 }, /* _POOL32A5~*(95) */
17664 { instruction , 0 , 0 , 32,
17665 0xfc0003ff, 0x20000305, &ADDQ_S_W , 0,
17666 DSP_ }, /* ADDQ_S.W */
17667 { pool , SUBU__S__PH , 2 , 32,
17668 0xfc0003ff, 0x2000030d, 0 , 0,
17669 0x0 }, /* SUBU[_S].PH */
17670 { instruction , 0 , 0 , 32,
17671 0xfc0003ff, 0x20000315, &SHRLV_PH , 0,
17672 DSP_ }, /* SHRLV.PH */
17673 { reserved_block , 0 , 0 , 32,
17674 0xfc0003ff, 0x2000031d, 0 , 0,
17675 0x0 }, /* _POOL32A5~*(99) */
17676 { reserved_block , 0 , 0 , 32,
17677 0xfc0003ff, 0x20000325, 0 , 0,
17678 0x0 }, /* _POOL32A5~*(100) */
17679 { reserved_block , 0 , 0 , 32,
17680 0xfc0003ff, 0x2000032d, 0 , 0,
17681 0x0 }, /* _POOL32A5~*(101) */
17682 { pool , SHRA__R__PH , 2 , 32,
17683 0xfc0003ff, 0x20000335, 0 , 0,
17684 0x0 }, /* SHRA[_R].PH */
17685 { reserved_block , 0 , 0 , 32,
17686 0xfc0003ff, 0x2000033d, 0 , 0,
17687 0x0 }, /* _POOL32A5~*(103) */
17688 { instruction , 0 , 0 , 32,
17689 0xfc0003ff, 0x20000345, &SUBQ_S_W , 0,
17690 DSP_ }, /* SUBQ_S.W */
17691 { pool , SUBUH__R__QB , 2 , 32,
17692 0xfc0003ff, 0x2000034d, 0 , 0,
17693 0x0 }, /* SUBUH[_R].QB */
17694 { instruction , 0 , 0 , 32,
17695 0xfc0003ff, 0x20000355, &SHRLV_QB , 0,
17696 DSP_ }, /* SHRLV.QB */
17697 { reserved_block , 0 , 0 , 32,
17698 0xfc0003ff, 0x2000035d, 0 , 0,
17699 0x0 }, /* _POOL32A5~*(107) */
17700 { reserved_block , 0 , 0 , 32,
17701 0xfc0003ff, 0x20000365, 0 , 0,
17702 0x0 }, /* _POOL32A5~*(108) */
17703 { reserved_block , 0 , 0 , 32,
17704 0xfc0003ff, 0x2000036d, 0 , 0,
17705 0x0 }, /* _POOL32A5~*(109) */
17706 { reserved_block , 0 , 0 , 32,
17707 0xfc0003ff, 0x20000375, 0 , 0,
17708 0x0 }, /* _POOL32A5~*(110) */
17709 { reserved_block , 0 , 0 , 32,
17710 0xfc0003ff, 0x2000037d, 0 , 0,
17711 0x0 }, /* _POOL32A5~*(111) */
17712 { instruction , 0 , 0 , 32,
17713 0xfc0003ff, 0x20000385, &ADDSC , 0,
17714 DSP_ }, /* ADDSC */
17715 { pool , SHLLV__S__PH , 2 , 32,
17716 0xfc0003ff, 0x2000038d, 0 , 0,
17717 0x0 }, /* SHLLV[_S].PH */
17718 { instruction , 0 , 0 , 32,
17719 0xfc0003ff, 0x20000395, &SHLLV_QB , 0,
17720 DSP_ }, /* SHLLV.QB */
17721 { reserved_block , 0 , 0 , 32,
17722 0xfc0003ff, 0x2000039d, 0 , 0,
17723 0x0 }, /* _POOL32A5~*(115) */
17724 { reserved_block , 0 , 0 , 32,
17725 0xfc0003ff, 0x200003a5, 0 , 0,
17726 0x0 }, /* _POOL32A5~*(116) */
17727 { reserved_block , 0 , 0 , 32,
17728 0xfc0003ff, 0x200003ad, 0 , 0,
17729 0x0 }, /* _POOL32A5~*(117) */
17730 { pool , SHLL__S__PH , 4 , 32,
17731 0xfc0003ff, 0x200003b5, 0 , 0,
17732 0x0 }, /* SHLL[_S].PH */
17733 { reserved_block , 0 , 0 , 32,
17734 0xfc0003ff, 0x200003bd, 0 , 0,
17735 0x0 }, /* _POOL32A5~*(119) */
17736 { instruction , 0 , 0 , 32,
17737 0xfc0003ff, 0x200003c5, &ADDWC , 0,
17738 DSP_ }, /* ADDWC */
17739 { pool , PRECR_SRA__R__PH_W , 2 , 32,
17740 0xfc0003ff, 0x200003cd, 0 , 0,
17741 0x0 }, /* PRECR_SRA[_R].PH.W */
17742 { instruction , 0 , 0 , 32,
17743 0xfc0003ff, 0x200003d5, &SHLLV_S_W , 0,
17744 DSP_ }, /* SHLLV_S.W */
17745 { reserved_block , 0 , 0 , 32,
17746 0xfc0003ff, 0x200003dd, 0 , 0,
17747 0x0 }, /* _POOL32A5~*(123) */
17748 { reserved_block , 0 , 0 , 32,
17749 0xfc0003ff, 0x200003e5, 0 , 0,
17750 0x0 }, /* _POOL32A5~*(124) */
17751 { reserved_block , 0 , 0 , 32,
17752 0xfc0003ff, 0x200003ed, 0 , 0,
17753 0x0 }, /* _POOL32A5~*(125) */
17754 { instruction , 0 , 0 , 32,
17755 0xfc0003ff, 0x200003f5, &SHLL_S_W , 0,
17756 DSP_ }, /* SHLL_S.W */
17757 { reserved_block , 0 , 0 , 32,
17758 0xfc0003ff, 0x200003fd, 0 , 0,
17759 0x0 }, /* _POOL32A5~*(127) */
17760 };
17761
17762
17763 static const Pool PP_LSX[16] = {
17764 { instruction , 0 , 0 , 32,
17765 0xfc0007ff, 0x20000007, &LBX , 0,
17766 0x0 }, /* LBX */
17767 { instruction , 0 , 0 , 32,
17768 0xfc0007ff, 0x20000087, &SBX , 0,
17769 XMMS_ }, /* SBX */
17770 { instruction , 0 , 0 , 32,
17771 0xfc0007ff, 0x20000107, &LBUX , 0,
17772 0x0 }, /* LBUX */
17773 { reserved_block , 0 , 0 , 32,
17774 0xfc0007ff, 0x20000187, 0 , 0,
17775 0x0 }, /* PP.LSX~*(3) */
17776 { instruction , 0 , 0 , 32,
17777 0xfc0007ff, 0x20000207, &LHX , 0,
17778 0x0 }, /* LHX */
17779 { instruction , 0 , 0 , 32,
17780 0xfc0007ff, 0x20000287, &SHX , 0,
17781 XMMS_ }, /* SHX */
17782 { instruction , 0 , 0 , 32,
17783 0xfc0007ff, 0x20000307, &LHUX , 0,
17784 0x0 }, /* LHUX */
17785 { instruction , 0 , 0 , 32,
17786 0xfc0007ff, 0x20000387, &LWUX , 0,
17787 MIPS64_ }, /* LWUX */
17788 { instruction , 0 , 0 , 32,
17789 0xfc0007ff, 0x20000407, &LWX , 0,
17790 0x0 }, /* LWX */
17791 { instruction , 0 , 0 , 32,
17792 0xfc0007ff, 0x20000487, &SWX , 0,
17793 XMMS_ }, /* SWX */
17794 { instruction , 0 , 0 , 32,
17795 0xfc0007ff, 0x20000507, &LWC1X , 0,
17796 CP1_ }, /* LWC1X */
17797 { instruction , 0 , 0 , 32,
17798 0xfc0007ff, 0x20000587, &SWC1X , 0,
17799 CP1_ }, /* SWC1X */
17800 { instruction , 0 , 0 , 32,
17801 0xfc0007ff, 0x20000607, &LDX , 0,
17802 MIPS64_ }, /* LDX */
17803 { instruction , 0 , 0 , 32,
17804 0xfc0007ff, 0x20000687, &SDX , 0,
17805 MIPS64_ }, /* SDX */
17806 { instruction , 0 , 0 , 32,
17807 0xfc0007ff, 0x20000707, &LDC1X , 0,
17808 CP1_ }, /* LDC1X */
17809 { instruction , 0 , 0 , 32,
17810 0xfc0007ff, 0x20000787, &SDC1X , 0,
17811 CP1_ }, /* SDC1X */
17812 };
17813
17814
17815 static const Pool PP_LSXS[16] = {
17816 { reserved_block , 0 , 0 , 32,
17817 0xfc0007ff, 0x20000047, 0 , 0,
17818 0x0 }, /* PP.LSXS~*(0) */
17819 { reserved_block , 0 , 0 , 32,
17820 0xfc0007ff, 0x200000c7, 0 , 0,
17821 0x0 }, /* PP.LSXS~*(1) */
17822 { reserved_block , 0 , 0 , 32,
17823 0xfc0007ff, 0x20000147, 0 , 0,
17824 0x0 }, /* PP.LSXS~*(2) */
17825 { reserved_block , 0 , 0 , 32,
17826 0xfc0007ff, 0x200001c7, 0 , 0,
17827 0x0 }, /* PP.LSXS~*(3) */
17828 { instruction , 0 , 0 , 32,
17829 0xfc0007ff, 0x20000247, &LHXS , 0,
17830 0x0 }, /* LHXS */
17831 { instruction , 0 , 0 , 32,
17832 0xfc0007ff, 0x200002c7, &SHXS , 0,
17833 XMMS_ }, /* SHXS */
17834 { instruction , 0 , 0 , 32,
17835 0xfc0007ff, 0x20000347, &LHUXS , 0,
17836 0x0 }, /* LHUXS */
17837 { instruction , 0 , 0 , 32,
17838 0xfc0007ff, 0x200003c7, &LWUXS , 0,
17839 MIPS64_ }, /* LWUXS */
17840 { instruction , 0 , 0 , 32,
17841 0xfc0007ff, 0x20000447, &LWXS_32_ , 0,
17842 0x0 }, /* LWXS[32] */
17843 { instruction , 0 , 0 , 32,
17844 0xfc0007ff, 0x200004c7, &SWXS , 0,
17845 XMMS_ }, /* SWXS */
17846 { instruction , 0 , 0 , 32,
17847 0xfc0007ff, 0x20000547, &LWC1XS , 0,
17848 CP1_ }, /* LWC1XS */
17849 { instruction , 0 , 0 , 32,
17850 0xfc0007ff, 0x200005c7, &SWC1XS , 0,
17851 CP1_ }, /* SWC1XS */
17852 { instruction , 0 , 0 , 32,
17853 0xfc0007ff, 0x20000647, &LDXS , 0,
17854 MIPS64_ }, /* LDXS */
17855 { instruction , 0 , 0 , 32,
17856 0xfc0007ff, 0x200006c7, &SDXS , 0,
17857 MIPS64_ }, /* SDXS */
17858 { instruction , 0 , 0 , 32,
17859 0xfc0007ff, 0x20000747, &LDC1XS , 0,
17860 CP1_ }, /* LDC1XS */
17861 { instruction , 0 , 0 , 32,
17862 0xfc0007ff, 0x200007c7, &SDC1XS , 0,
17863 CP1_ }, /* SDC1XS */
17864 };
17865
17866
17867 static const Pool P_LSX[2] = {
17868 { pool , PP_LSX , 16 , 32,
17869 0xfc00007f, 0x20000007, 0 , 0,
17870 0x0 }, /* PP.LSX */
17871 { pool , PP_LSXS , 16 , 32,
17872 0xfc00007f, 0x20000047, 0 , 0,
17873 0x0 }, /* PP.LSXS */
17874 };
17875
17876
17877 static const Pool POOL32Axf_1_0[4] = {
17878 { instruction , 0 , 0 , 32,
17879 0xfc003fff, 0x2000007f, &MFHI_DSP_ , 0,
17880 DSP_ }, /* MFHI[DSP] */
17881 { instruction , 0 , 0 , 32,
17882 0xfc003fff, 0x2000107f, &MFLO_DSP_ , 0,
17883 DSP_ }, /* MFLO[DSP] */
17884 { instruction , 0 , 0 , 32,
17885 0xfc003fff, 0x2000207f, &MTHI_DSP_ , 0,
17886 DSP_ }, /* MTHI[DSP] */
17887 { instruction , 0 , 0 , 32,
17888 0xfc003fff, 0x2000307f, &MTLO_DSP_ , 0,
17889 DSP_ }, /* MTLO[DSP] */
17890 };
17891
17892
17893 static const Pool POOL32Axf_1_1[4] = {
17894 { instruction , 0 , 0 , 32,
17895 0xfc003fff, 0x2000027f, &MTHLIP , 0,
17896 DSP_ }, /* MTHLIP */
17897 { instruction , 0 , 0 , 32,
17898 0xfc003fff, 0x2000127f, &SHILOV , 0,
17899 DSP_ }, /* SHILOV */
17900 { reserved_block , 0 , 0 , 32,
17901 0xfc003fff, 0x2000227f, 0 , 0,
17902 0x0 }, /* POOL32Axf_1_1~*(2) */
17903 { reserved_block , 0 , 0 , 32,
17904 0xfc003fff, 0x2000327f, 0 , 0,
17905 0x0 }, /* POOL32Axf_1_1~*(3) */
17906 };
17907
17908
17909 static const Pool POOL32Axf_1_3[4] = {
17910 { instruction , 0 , 0 , 32,
17911 0xfc003fff, 0x2000067f, &RDDSP , 0,
17912 DSP_ }, /* RDDSP */
17913 { instruction , 0 , 0 , 32,
17914 0xfc003fff, 0x2000167f, &WRDSP , 0,
17915 DSP_ }, /* WRDSP */
17916 { instruction , 0 , 0 , 32,
17917 0xfc003fff, 0x2000267f, &EXTP , 0,
17918 DSP_ }, /* EXTP */
17919 { instruction , 0 , 0 , 32,
17920 0xfc003fff, 0x2000367f, &EXTPDP , 0,
17921 DSP_ }, /* EXTPDP */
17922 };
17923
17924
17925 static const Pool POOL32Axf_1_4[2] = {
17926 { instruction , 0 , 0 , 32,
17927 0xfc001fff, 0x2000087f, &SHLL_QB , 0,
17928 DSP_ }, /* SHLL.QB */
17929 { instruction , 0 , 0 , 32,
17930 0xfc001fff, 0x2000187f, &SHRL_QB , 0,
17931 DSP_ }, /* SHRL.QB */
17932 };
17933
17934
17935 static const Pool MAQ_S_A__W_PHR[2] = {
17936 { instruction , 0 , 0 , 32,
17937 0xfc003fff, 0x20000a7f, &MAQ_S_W_PHR , 0,
17938 DSP_ }, /* MAQ_S.W.PHR */
17939 { instruction , 0 , 0 , 32,
17940 0xfc003fff, 0x20002a7f, &MAQ_SA_W_PHR , 0,
17941 DSP_ }, /* MAQ_SA.W.PHR */
17942 };
17943
17944
17945 static const Pool MAQ_S_A__W_PHL[2] = {
17946 { instruction , 0 , 0 , 32,
17947 0xfc003fff, 0x20001a7f, &MAQ_S_W_PHL , 0,
17948 DSP_ }, /* MAQ_S.W.PHL */
17949 { instruction , 0 , 0 , 32,
17950 0xfc003fff, 0x20003a7f, &MAQ_SA_W_PHL , 0,
17951 DSP_ }, /* MAQ_SA.W.PHL */
17952 };
17953
17954
17955 static const Pool POOL32Axf_1_5[2] = {
17956 { pool , MAQ_S_A__W_PHR , 2 , 32,
17957 0xfc001fff, 0x20000a7f, 0 , 0,
17958 0x0 }, /* MAQ_S[A].W.PHR */
17959 { pool , MAQ_S_A__W_PHL , 2 , 32,
17960 0xfc001fff, 0x20001a7f, 0 , 0,
17961 0x0 }, /* MAQ_S[A].W.PHL */
17962 };
17963
17964
17965 static const Pool POOL32Axf_1_7[4] = {
17966 { instruction , 0 , 0 , 32,
17967 0xfc003fff, 0x20000e7f, &EXTR_W , 0,
17968 DSP_ }, /* EXTR.W */
17969 { instruction , 0 , 0 , 32,
17970 0xfc003fff, 0x20001e7f, &EXTR_R_W , 0,
17971 DSP_ }, /* EXTR_R.W */
17972 { instruction , 0 , 0 , 32,
17973 0xfc003fff, 0x20002e7f, &EXTR_RS_W , 0,
17974 DSP_ }, /* EXTR_RS.W */
17975 { instruction , 0 , 0 , 32,
17976 0xfc003fff, 0x20003e7f, &EXTR_S_H , 0,
17977 DSP_ }, /* EXTR_S.H */
17978 };
17979
17980
17981 static const Pool POOL32Axf_1[8] = {
17982 { pool , POOL32Axf_1_0 , 4 , 32,
17983 0xfc000fff, 0x2000007f, 0 , 0,
17984 0x0 }, /* POOL32Axf_1_0 */
17985 { pool , POOL32Axf_1_1 , 4 , 32,
17986 0xfc000fff, 0x2000027f, 0 , 0,
17987 0x0 }, /* POOL32Axf_1_1 */
17988 { reserved_block , 0 , 0 , 32,
17989 0xfc000fff, 0x2000047f, 0 , 0,
17990 0x0 }, /* POOL32Axf_1~*(2) */
17991 { pool , POOL32Axf_1_3 , 4 , 32,
17992 0xfc000fff, 0x2000067f, 0 , 0,
17993 0x0 }, /* POOL32Axf_1_3 */
17994 { pool , POOL32Axf_1_4 , 2 , 32,
17995 0xfc000fff, 0x2000087f, 0 , 0,
17996 0x0 }, /* POOL32Axf_1_4 */
17997 { pool , POOL32Axf_1_5 , 2 , 32,
17998 0xfc000fff, 0x20000a7f, 0 , 0,
17999 0x0 }, /* POOL32Axf_1_5 */
18000 { reserved_block , 0 , 0 , 32,
18001 0xfc000fff, 0x20000c7f, 0 , 0,
18002 0x0 }, /* POOL32Axf_1~*(6) */
18003 { pool , POOL32Axf_1_7 , 4 , 32,
18004 0xfc000fff, 0x20000e7f, 0 , 0,
18005 0x0 }, /* POOL32Axf_1_7 */
18006 };
18007
18008
18009 static const Pool POOL32Axf_2_DSP__0_7[8] = {
18010 { instruction , 0 , 0 , 32,
18011 0xfc003fff, 0x200000bf, &DPA_W_PH , 0,
18012 DSP_ }, /* DPA.W.PH */
18013 { instruction , 0 , 0 , 32,
18014 0xfc003fff, 0x200002bf, &DPAQ_S_W_PH , 0,
18015 DSP_ }, /* DPAQ_S.W.PH */
18016 { instruction , 0 , 0 , 32,
18017 0xfc003fff, 0x200004bf, &DPS_W_PH , 0,
18018 DSP_ }, /* DPS.W.PH */
18019 { instruction , 0 , 0 , 32,
18020 0xfc003fff, 0x200006bf, &DPSQ_S_W_PH , 0,
18021 DSP_ }, /* DPSQ_S.W.PH */
18022 { reserved_block , 0 , 0 , 32,
18023 0xfc003fff, 0x200008bf, 0 , 0,
18024 0x0 }, /* POOL32Axf_2(DSP)_0_7~*(4) */
18025 { instruction , 0 , 0 , 32,
18026 0xfc003fff, 0x20000abf, &MADD_DSP_ , 0,
18027 DSP_ }, /* MADD[DSP] */
18028 { instruction , 0 , 0 , 32,
18029 0xfc003fff, 0x20000cbf, &MULT_DSP_ , 0,
18030 DSP_ }, /* MULT[DSP] */
18031 { instruction , 0 , 0 , 32,
18032 0xfc003fff, 0x20000ebf, &EXTRV_W , 0,
18033 DSP_ }, /* EXTRV.W */
18034 };
18035
18036
18037 static const Pool POOL32Axf_2_DSP__8_15[8] = {
18038 { instruction , 0 , 0 , 32,
18039 0xfc003fff, 0x200010bf, &DPAX_W_PH , 0,
18040 DSP_ }, /* DPAX.W.PH */
18041 { instruction , 0 , 0 , 32,
18042 0xfc003fff, 0x200012bf, &DPAQ_SA_L_W , 0,
18043 DSP_ }, /* DPAQ_SA.L.W */
18044 { instruction , 0 , 0 , 32,
18045 0xfc003fff, 0x200014bf, &DPSX_W_PH , 0,
18046 DSP_ }, /* DPSX.W.PH */
18047 { instruction , 0 , 0 , 32,
18048 0xfc003fff, 0x200016bf, &DPSQ_SA_L_W , 0,
18049 DSP_ }, /* DPSQ_SA.L.W */
18050 { reserved_block , 0 , 0 , 32,
18051 0xfc003fff, 0x200018bf, 0 , 0,
18052 0x0 }, /* POOL32Axf_2(DSP)_8_15~*(4) */
18053 { instruction , 0 , 0 , 32,
18054 0xfc003fff, 0x20001abf, &MADDU_DSP_ , 0,
18055 DSP_ }, /* MADDU[DSP] */
18056 { instruction , 0 , 0 , 32,
18057 0xfc003fff, 0x20001cbf, &MULTU_DSP_ , 0,
18058 DSP_ }, /* MULTU[DSP] */
18059 { instruction , 0 , 0 , 32,
18060 0xfc003fff, 0x20001ebf, &EXTRV_R_W , 0,
18061 DSP_ }, /* EXTRV_R.W */
18062 };
18063
18064
18065 static const Pool POOL32Axf_2_DSP__16_23[8] = {
18066 { instruction , 0 , 0 , 32,
18067 0xfc003fff, 0x200020bf, &DPAU_H_QBL , 0,
18068 DSP_ }, /* DPAU.H.QBL */
18069 { instruction , 0 , 0 , 32,
18070 0xfc003fff, 0x200022bf, &DPAQX_S_W_PH , 0,
18071 DSP_ }, /* DPAQX_S.W.PH */
18072 { instruction , 0 , 0 , 32,
18073 0xfc003fff, 0x200024bf, &DPSU_H_QBL , 0,
18074 DSP_ }, /* DPSU.H.QBL */
18075 { instruction , 0 , 0 , 32,
18076 0xfc003fff, 0x200026bf, &DPSQX_S_W_PH , 0,
18077 DSP_ }, /* DPSQX_S.W.PH */
18078 { instruction , 0 , 0 , 32,
18079 0xfc003fff, 0x200028bf, &EXTPV , 0,
18080 DSP_ }, /* EXTPV */
18081 { instruction , 0 , 0 , 32,
18082 0xfc003fff, 0x20002abf, &MSUB_DSP_ , 0,
18083 DSP_ }, /* MSUB[DSP] */
18084 { instruction , 0 , 0 , 32,
18085 0xfc003fff, 0x20002cbf, &MULSA_W_PH , 0,
18086 DSP_ }, /* MULSA.W.PH */
18087 { instruction , 0 , 0 , 32,
18088 0xfc003fff, 0x20002ebf, &EXTRV_RS_W , 0,
18089 DSP_ }, /* EXTRV_RS.W */
18090 };
18091
18092
18093 static const Pool POOL32Axf_2_DSP__24_31[8] = {
18094 { instruction , 0 , 0 , 32,
18095 0xfc003fff, 0x200030bf, &DPAU_H_QBR , 0,
18096 DSP_ }, /* DPAU.H.QBR */
18097 { instruction , 0 , 0 , 32,
18098 0xfc003fff, 0x200032bf, &DPAQX_SA_W_PH , 0,
18099 DSP_ }, /* DPAQX_SA.W.PH */
18100 { instruction , 0 , 0 , 32,
18101 0xfc003fff, 0x200034bf, &DPSU_H_QBR , 0,
18102 DSP_ }, /* DPSU.H.QBR */
18103 { instruction , 0 , 0 , 32,
18104 0xfc003fff, 0x200036bf, &DPSQX_SA_W_PH , 0,
18105 DSP_ }, /* DPSQX_SA.W.PH */
18106 { instruction , 0 , 0 , 32,
18107 0xfc003fff, 0x200038bf, &EXTPDPV , 0,
18108 DSP_ }, /* EXTPDPV */
18109 { instruction , 0 , 0 , 32,
18110 0xfc003fff, 0x20003abf, &MSUBU_DSP_ , 0,
18111 DSP_ }, /* MSUBU[DSP] */
18112 { instruction , 0 , 0 , 32,
18113 0xfc003fff, 0x20003cbf, &MULSAQ_S_W_PH , 0,
18114 DSP_ }, /* MULSAQ_S.W.PH */
18115 { instruction , 0 , 0 , 32,
18116 0xfc003fff, 0x20003ebf, &EXTRV_S_H , 0,
18117 DSP_ }, /* EXTRV_S.H */
18118 };
18119
18120
18121 static const Pool POOL32Axf_2[4] = {
18122 { pool , POOL32Axf_2_DSP__0_7, 8 , 32,
18123 0xfc0031ff, 0x200000bf, 0 , 0,
18124 0x0 }, /* POOL32Axf_2(DSP)_0_7 */
18125 { pool , POOL32Axf_2_DSP__8_15, 8 , 32,
18126 0xfc0031ff, 0x200010bf, 0 , 0,
18127 0x0 }, /* POOL32Axf_2(DSP)_8_15 */
18128 { pool , POOL32Axf_2_DSP__16_23, 8 , 32,
18129 0xfc0031ff, 0x200020bf, 0 , 0,
18130 0x0 }, /* POOL32Axf_2(DSP)_16_23 */
18131 { pool , POOL32Axf_2_DSP__24_31, 8 , 32,
18132 0xfc0031ff, 0x200030bf, 0 , 0,
18133 0x0 }, /* POOL32Axf_2(DSP)_24_31 */
18134 };
18135
18136
18137 static const Pool POOL32Axf_4[128] = {
18138 { instruction , 0 , 0 , 32,
18139 0xfc00ffff, 0x2000013f, &ABSQ_S_QB , 0,
18140 DSP_ }, /* ABSQ_S.QB */
18141 { instruction , 0 , 0 , 32,
18142 0xfc00ffff, 0x2000033f, &REPLV_PH , 0,
18143 DSP_ }, /* REPLV.PH */
18144 { reserved_block , 0 , 0 , 32,
18145 0xfc00ffff, 0x2000053f, 0 , 0,
18146 0x0 }, /* POOL32Axf_4~*(2) */
18147 { reserved_block , 0 , 0 , 32,
18148 0xfc00ffff, 0x2000073f, 0 , 0,
18149 0x0 }, /* POOL32Axf_4~*(3) */
18150 { reserved_block , 0 , 0 , 32,
18151 0xfc00ffff, 0x2000093f, 0 , 0,
18152 0x0 }, /* POOL32Axf_4~*(4) */
18153 { reserved_block , 0 , 0 , 32,
18154 0xfc00ffff, 0x20000b3f, 0 , 0,
18155 0x0 }, /* POOL32Axf_4~*(5) */
18156 { reserved_block , 0 , 0 , 32,
18157 0xfc00ffff, 0x20000d3f, 0 , 0,
18158 0x0 }, /* POOL32Axf_4~*(6) */
18159 { reserved_block , 0 , 0 , 32,
18160 0xfc00ffff, 0x20000f3f, 0 , 0,
18161 0x0 }, /* POOL32Axf_4~*(7) */
18162 { instruction , 0 , 0 , 32,
18163 0xfc00ffff, 0x2000113f, &ABSQ_S_PH , 0,
18164 DSP_ }, /* ABSQ_S.PH */
18165 { instruction , 0 , 0 , 32,
18166 0xfc00ffff, 0x2000133f, &REPLV_QB , 0,
18167 DSP_ }, /* REPLV.QB */
18168 { reserved_block , 0 , 0 , 32,
18169 0xfc00ffff, 0x2000153f, 0 , 0,
18170 0x0 }, /* POOL32Axf_4~*(10) */
18171 { reserved_block , 0 , 0 , 32,
18172 0xfc00ffff, 0x2000173f, 0 , 0,
18173 0x0 }, /* POOL32Axf_4~*(11) */
18174 { reserved_block , 0 , 0 , 32,
18175 0xfc00ffff, 0x2000193f, 0 , 0,
18176 0x0 }, /* POOL32Axf_4~*(12) */
18177 { reserved_block , 0 , 0 , 32,
18178 0xfc00ffff, 0x20001b3f, 0 , 0,
18179 0x0 }, /* POOL32Axf_4~*(13) */
18180 { reserved_block , 0 , 0 , 32,
18181 0xfc00ffff, 0x20001d3f, 0 , 0,
18182 0x0 }, /* POOL32Axf_4~*(14) */
18183 { reserved_block , 0 , 0 , 32,
18184 0xfc00ffff, 0x20001f3f, 0 , 0,
18185 0x0 }, /* POOL32Axf_4~*(15) */
18186 { instruction , 0 , 0 , 32,
18187 0xfc00ffff, 0x2000213f, &ABSQ_S_W , 0,
18188 DSP_ }, /* ABSQ_S.W */
18189 { reserved_block , 0 , 0 , 32,
18190 0xfc00ffff, 0x2000233f, 0 , 0,
18191 0x0 }, /* POOL32Axf_4~*(17) */
18192 { reserved_block , 0 , 0 , 32,
18193 0xfc00ffff, 0x2000253f, 0 , 0,
18194 0x0 }, /* POOL32Axf_4~*(18) */
18195 { reserved_block , 0 , 0 , 32,
18196 0xfc00ffff, 0x2000273f, 0 , 0,
18197 0x0 }, /* POOL32Axf_4~*(19) */
18198 { reserved_block , 0 , 0 , 32,
18199 0xfc00ffff, 0x2000293f, 0 , 0,
18200 0x0 }, /* POOL32Axf_4~*(20) */
18201 { reserved_block , 0 , 0 , 32,
18202 0xfc00ffff, 0x20002b3f, 0 , 0,
18203 0x0 }, /* POOL32Axf_4~*(21) */
18204 { reserved_block , 0 , 0 , 32,
18205 0xfc00ffff, 0x20002d3f, 0 , 0,
18206 0x0 }, /* POOL32Axf_4~*(22) */
18207 { reserved_block , 0 , 0 , 32,
18208 0xfc00ffff, 0x20002f3f, 0 , 0,
18209 0x0 }, /* POOL32Axf_4~*(23) */
18210 { reserved_block , 0 , 0 , 32,
18211 0xfc00ffff, 0x2000313f, 0 , 0,
18212 0x0 }, /* POOL32Axf_4~*(24) */
18213 { reserved_block , 0 , 0 , 32,
18214 0xfc00ffff, 0x2000333f, 0 , 0,
18215 0x0 }, /* POOL32Axf_4~*(25) */
18216 { reserved_block , 0 , 0 , 32,
18217 0xfc00ffff, 0x2000353f, 0 , 0,
18218 0x0 }, /* POOL32Axf_4~*(26) */
18219 { reserved_block , 0 , 0 , 32,
18220 0xfc00ffff, 0x2000373f, 0 , 0,
18221 0x0 }, /* POOL32Axf_4~*(27) */
18222 { reserved_block , 0 , 0 , 32,
18223 0xfc00ffff, 0x2000393f, 0 , 0,
18224 0x0 }, /* POOL32Axf_4~*(28) */
18225 { reserved_block , 0 , 0 , 32,
18226 0xfc00ffff, 0x20003b3f, 0 , 0,
18227 0x0 }, /* POOL32Axf_4~*(29) */
18228 { reserved_block , 0 , 0 , 32,
18229 0xfc00ffff, 0x20003d3f, 0 , 0,
18230 0x0 }, /* POOL32Axf_4~*(30) */
18231 { reserved_block , 0 , 0 , 32,
18232 0xfc00ffff, 0x20003f3f, 0 , 0,
18233 0x0 }, /* POOL32Axf_4~*(31) */
18234 { instruction , 0 , 0 , 32,
18235 0xfc00ffff, 0x2000413f, &INSV , 0,
18236 DSP_ }, /* INSV */
18237 { reserved_block , 0 , 0 , 32,
18238 0xfc00ffff, 0x2000433f, 0 , 0,
18239 0x0 }, /* POOL32Axf_4~*(33) */
18240 { reserved_block , 0 , 0 , 32,
18241 0xfc00ffff, 0x2000453f, 0 , 0,
18242 0x0 }, /* POOL32Axf_4~*(34) */
18243 { reserved_block , 0 , 0 , 32,
18244 0xfc00ffff, 0x2000473f, 0 , 0,
18245 0x0 }, /* POOL32Axf_4~*(35) */
18246 { reserved_block , 0 , 0 , 32,
18247 0xfc00ffff, 0x2000493f, 0 , 0,
18248 0x0 }, /* POOL32Axf_4~*(36) */
18249 { instruction , 0 , 0 , 32,
18250 0xfc00ffff, 0x20004b3f, &CLO , 0,
18251 XMMS_ }, /* CLO */
18252 { instruction , 0 , 0 , 32,
18253 0xfc00ffff, 0x20004d3f, &MFC2 , 0,
18254 CP2_ }, /* MFC2 */
18255 { reserved_block , 0 , 0 , 32,
18256 0xfc00ffff, 0x20004f3f, 0 , 0,
18257 0x0 }, /* POOL32Axf_4~*(39) */
18258 { instruction , 0 , 0 , 32,
18259 0xfc00ffff, 0x2000513f, &PRECEQ_W_PHL , 0,
18260 DSP_ }, /* PRECEQ.W.PHL */
18261 { reserved_block , 0 , 0 , 32,
18262 0xfc00ffff, 0x2000533f, 0 , 0,
18263 0x0 }, /* POOL32Axf_4~*(41) */
18264 { reserved_block , 0 , 0 , 32,
18265 0xfc00ffff, 0x2000553f, 0 , 0,
18266 0x0 }, /* POOL32Axf_4~*(42) */
18267 { reserved_block , 0 , 0 , 32,
18268 0xfc00ffff, 0x2000573f, 0 , 0,
18269 0x0 }, /* POOL32Axf_4~*(43) */
18270 { reserved_block , 0 , 0 , 32,
18271 0xfc00ffff, 0x2000593f, 0 , 0,
18272 0x0 }, /* POOL32Axf_4~*(44) */
18273 { instruction , 0 , 0 , 32,
18274 0xfc00ffff, 0x20005b3f, &CLZ , 0,
18275 XMMS_ }, /* CLZ */
18276 { instruction , 0 , 0 , 32,
18277 0xfc00ffff, 0x20005d3f, &MTC2 , 0,
18278 CP2_ }, /* MTC2 */
18279 { reserved_block , 0 , 0 , 32,
18280 0xfc00ffff, 0x20005f3f, 0 , 0,
18281 0x0 }, /* POOL32Axf_4~*(47) */
18282 { instruction , 0 , 0 , 32,
18283 0xfc00ffff, 0x2000613f, &PRECEQ_W_PHR , 0,
18284 DSP_ }, /* PRECEQ.W.PHR */
18285 { reserved_block , 0 , 0 , 32,
18286 0xfc00ffff, 0x2000633f, 0 , 0,
18287 0x0 }, /* POOL32Axf_4~*(49) */
18288 { reserved_block , 0 , 0 , 32,
18289 0xfc00ffff, 0x2000653f, 0 , 0,
18290 0x0 }, /* POOL32Axf_4~*(50) */
18291 { reserved_block , 0 , 0 , 32,
18292 0xfc00ffff, 0x2000673f, 0 , 0,
18293 0x0 }, /* POOL32Axf_4~*(51) */
18294 { reserved_block , 0 , 0 , 32,
18295 0xfc00ffff, 0x2000693f, 0 , 0,
18296 0x0 }, /* POOL32Axf_4~*(52) */
18297 { reserved_block , 0 , 0 , 32,
18298 0xfc00ffff, 0x20006b3f, 0 , 0,
18299 0x0 }, /* POOL32Axf_4~*(53) */
18300 { instruction , 0 , 0 , 32,
18301 0xfc00ffff, 0x20006d3f, &DMFC2 , 0,
18302 CP2_ }, /* DMFC2 */
18303 { reserved_block , 0 , 0 , 32,
18304 0xfc00ffff, 0x20006f3f, 0 , 0,
18305 0x0 }, /* POOL32Axf_4~*(55) */
18306 { instruction , 0 , 0 , 32,
18307 0xfc00ffff, 0x2000713f, &PRECEQU_PH_QBL , 0,
18308 DSP_ }, /* PRECEQU.PH.QBL */
18309 { instruction , 0 , 0 , 32,
18310 0xfc00ffff, 0x2000733f, &PRECEQU_PH_QBLA , 0,
18311 DSP_ }, /* PRECEQU.PH.QBLA */
18312 { reserved_block , 0 , 0 , 32,
18313 0xfc00ffff, 0x2000753f, 0 , 0,
18314 0x0 }, /* POOL32Axf_4~*(58) */
18315 { reserved_block , 0 , 0 , 32,
18316 0xfc00ffff, 0x2000773f, 0 , 0,
18317 0x0 }, /* POOL32Axf_4~*(59) */
18318 { reserved_block , 0 , 0 , 32,
18319 0xfc00ffff, 0x2000793f, 0 , 0,
18320 0x0 }, /* POOL32Axf_4~*(60) */
18321 { reserved_block , 0 , 0 , 32,
18322 0xfc00ffff, 0x20007b3f, 0 , 0,
18323 0x0 }, /* POOL32Axf_4~*(61) */
18324 { instruction , 0 , 0 , 32,
18325 0xfc00ffff, 0x20007d3f, &DMTC2 , 0,
18326 CP2_ }, /* DMTC2 */
18327 { reserved_block , 0 , 0 , 32,
18328 0xfc00ffff, 0x20007f3f, 0 , 0,
18329 0x0 }, /* POOL32Axf_4~*(63) */
18330 { reserved_block , 0 , 0 , 32,
18331 0xfc00ffff, 0x2000813f, 0 , 0,
18332 0x0 }, /* POOL32Axf_4~*(64) */
18333 { reserved_block , 0 , 0 , 32,
18334 0xfc00ffff, 0x2000833f, 0 , 0,
18335 0x0 }, /* POOL32Axf_4~*(65) */
18336 { reserved_block , 0 , 0 , 32,
18337 0xfc00ffff, 0x2000853f, 0 , 0,
18338 0x0 }, /* POOL32Axf_4~*(66) */
18339 { reserved_block , 0 , 0 , 32,
18340 0xfc00ffff, 0x2000873f, 0 , 0,
18341 0x0 }, /* POOL32Axf_4~*(67) */
18342 { reserved_block , 0 , 0 , 32,
18343 0xfc00ffff, 0x2000893f, 0 , 0,
18344 0x0 }, /* POOL32Axf_4~*(68) */
18345 { reserved_block , 0 , 0 , 32,
18346 0xfc00ffff, 0x20008b3f, 0 , 0,
18347 0x0 }, /* POOL32Axf_4~*(69) */
18348 { instruction , 0 , 0 , 32,
18349 0xfc00ffff, 0x20008d3f, &MFHC2 , 0,
18350 CP2_ }, /* MFHC2 */
18351 { reserved_block , 0 , 0 , 32,
18352 0xfc00ffff, 0x20008f3f, 0 , 0,
18353 0x0 }, /* POOL32Axf_4~*(71) */
18354 { instruction , 0 , 0 , 32,
18355 0xfc00ffff, 0x2000913f, &PRECEQU_PH_QBR , 0,
18356 DSP_ }, /* PRECEQU.PH.QBR */
18357 { instruction , 0 , 0 , 32,
18358 0xfc00ffff, 0x2000933f, &PRECEQU_PH_QBRA , 0,
18359 DSP_ }, /* PRECEQU.PH.QBRA */
18360 { reserved_block , 0 , 0 , 32,
18361 0xfc00ffff, 0x2000953f, 0 , 0,
18362 0x0 }, /* POOL32Axf_4~*(74) */
18363 { reserved_block , 0 , 0 , 32,
18364 0xfc00ffff, 0x2000973f, 0 , 0,
18365 0x0 }, /* POOL32Axf_4~*(75) */
18366 { reserved_block , 0 , 0 , 32,
18367 0xfc00ffff, 0x2000993f, 0 , 0,
18368 0x0 }, /* POOL32Axf_4~*(76) */
18369 { reserved_block , 0 , 0 , 32,
18370 0xfc00ffff, 0x20009b3f, 0 , 0,
18371 0x0 }, /* POOL32Axf_4~*(77) */
18372 { instruction , 0 , 0 , 32,
18373 0xfc00ffff, 0x20009d3f, &MTHC2 , 0,
18374 CP2_ }, /* MTHC2 */
18375 { reserved_block , 0 , 0 , 32,
18376 0xfc00ffff, 0x20009f3f, 0 , 0,
18377 0x0 }, /* POOL32Axf_4~*(79) */
18378 { reserved_block , 0 , 0 , 32,
18379 0xfc00ffff, 0x2000a13f, 0 , 0,
18380 0x0 }, /* POOL32Axf_4~*(80) */
18381 { reserved_block , 0 , 0 , 32,
18382 0xfc00ffff, 0x2000a33f, 0 , 0,
18383 0x0 }, /* POOL32Axf_4~*(81) */
18384 { reserved_block , 0 , 0 , 32,
18385 0xfc00ffff, 0x2000a53f, 0 , 0,
18386 0x0 }, /* POOL32Axf_4~*(82) */
18387 { reserved_block , 0 , 0 , 32,
18388 0xfc00ffff, 0x2000a73f, 0 , 0,
18389 0x0 }, /* POOL32Axf_4~*(83) */
18390 { reserved_block , 0 , 0 , 32,
18391 0xfc00ffff, 0x2000a93f, 0 , 0,
18392 0x0 }, /* POOL32Axf_4~*(84) */
18393 { reserved_block , 0 , 0 , 32,
18394 0xfc00ffff, 0x2000ab3f, 0 , 0,
18395 0x0 }, /* POOL32Axf_4~*(85) */
18396 { reserved_block , 0 , 0 , 32,
18397 0xfc00ffff, 0x2000ad3f, 0 , 0,
18398 0x0 }, /* POOL32Axf_4~*(86) */
18399 { reserved_block , 0 , 0 , 32,
18400 0xfc00ffff, 0x2000af3f, 0 , 0,
18401 0x0 }, /* POOL32Axf_4~*(87) */
18402 { instruction , 0 , 0 , 32,
18403 0xfc00ffff, 0x2000b13f, &PRECEU_PH_QBL , 0,
18404 DSP_ }, /* PRECEU.PH.QBL */
18405 { instruction , 0 , 0 , 32,
18406 0xfc00ffff, 0x2000b33f, &PRECEU_PH_QBLA , 0,
18407 DSP_ }, /* PRECEU.PH.QBLA */
18408 { reserved_block , 0 , 0 , 32,
18409 0xfc00ffff, 0x2000b53f, 0 , 0,
18410 0x0 }, /* POOL32Axf_4~*(90) */
18411 { reserved_block , 0 , 0 , 32,
18412 0xfc00ffff, 0x2000b73f, 0 , 0,
18413 0x0 }, /* POOL32Axf_4~*(91) */
18414 { reserved_block , 0 , 0 , 32,
18415 0xfc00ffff, 0x2000b93f, 0 , 0,
18416 0x0 }, /* POOL32Axf_4~*(92) */
18417 { reserved_block , 0 , 0 , 32,
18418 0xfc00ffff, 0x2000bb3f, 0 , 0,
18419 0x0 }, /* POOL32Axf_4~*(93) */
18420 { reserved_block , 0 , 0 , 32,
18421 0xfc00ffff, 0x2000bd3f, 0 , 0,
18422 0x0 }, /* POOL32Axf_4~*(94) */
18423 { reserved_block , 0 , 0 , 32,
18424 0xfc00ffff, 0x2000bf3f, 0 , 0,
18425 0x0 }, /* POOL32Axf_4~*(95) */
18426 { reserved_block , 0 , 0 , 32,
18427 0xfc00ffff, 0x2000c13f, 0 , 0,
18428 0x0 }, /* POOL32Axf_4~*(96) */
18429 { reserved_block , 0 , 0 , 32,
18430 0xfc00ffff, 0x2000c33f, 0 , 0,
18431 0x0 }, /* POOL32Axf_4~*(97) */
18432 { reserved_block , 0 , 0 , 32,
18433 0xfc00ffff, 0x2000c53f, 0 , 0,
18434 0x0 }, /* POOL32Axf_4~*(98) */
18435 { reserved_block , 0 , 0 , 32,
18436 0xfc00ffff, 0x2000c73f, 0 , 0,
18437 0x0 }, /* POOL32Axf_4~*(99) */
18438 { reserved_block , 0 , 0 , 32,
18439 0xfc00ffff, 0x2000c93f, 0 , 0,
18440 0x0 }, /* POOL32Axf_4~*(100) */
18441 { reserved_block , 0 , 0 , 32,
18442 0xfc00ffff, 0x2000cb3f, 0 , 0,
18443 0x0 }, /* POOL32Axf_4~*(101) */
18444 { instruction , 0 , 0 , 32,
18445 0xfc00ffff, 0x2000cd3f, &CFC2 , 0,
18446 CP2_ }, /* CFC2 */
18447 { reserved_block , 0 , 0 , 32,
18448 0xfc00ffff, 0x2000cf3f, 0 , 0,
18449 0x0 }, /* POOL32Axf_4~*(103) */
18450 { instruction , 0 , 0 , 32,
18451 0xfc00ffff, 0x2000d13f, &PRECEU_PH_QBR , 0,
18452 DSP_ }, /* PRECEU.PH.QBR */
18453 { instruction , 0 , 0 , 32,
18454 0xfc00ffff, 0x2000d33f, &PRECEU_PH_QBRA , 0,
18455 DSP_ }, /* PRECEU.PH.QBRA */
18456 { reserved_block , 0 , 0 , 32,
18457 0xfc00ffff, 0x2000d53f, 0 , 0,
18458 0x0 }, /* POOL32Axf_4~*(106) */
18459 { reserved_block , 0 , 0 , 32,
18460 0xfc00ffff, 0x2000d73f, 0 , 0,
18461 0x0 }, /* POOL32Axf_4~*(107) */
18462 { reserved_block , 0 , 0 , 32,
18463 0xfc00ffff, 0x2000d93f, 0 , 0,
18464 0x0 }, /* POOL32Axf_4~*(108) */
18465 { reserved_block , 0 , 0 , 32,
18466 0xfc00ffff, 0x2000db3f, 0 , 0,
18467 0x0 }, /* POOL32Axf_4~*(109) */
18468 { instruction , 0 , 0 , 32,
18469 0xfc00ffff, 0x2000dd3f, &CTC2 , 0,
18470 CP2_ }, /* CTC2 */
18471 { reserved_block , 0 , 0 , 32,
18472 0xfc00ffff, 0x2000df3f, 0 , 0,
18473 0x0 }, /* POOL32Axf_4~*(111) */
18474 { reserved_block , 0 , 0 , 32,
18475 0xfc00ffff, 0x2000e13f, 0 , 0,
18476 0x0 }, /* POOL32Axf_4~*(112) */
18477 { reserved_block , 0 , 0 , 32,
18478 0xfc00ffff, 0x2000e33f, 0 , 0,
18479 0x0 }, /* POOL32Axf_4~*(113) */
18480 { reserved_block , 0 , 0 , 32,
18481 0xfc00ffff, 0x2000e53f, 0 , 0,
18482 0x0 }, /* POOL32Axf_4~*(114) */
18483 { reserved_block , 0 , 0 , 32,
18484 0xfc00ffff, 0x2000e73f, 0 , 0,
18485 0x0 }, /* POOL32Axf_4~*(115) */
18486 { reserved_block , 0 , 0 , 32,
18487 0xfc00ffff, 0x2000e93f, 0 , 0,
18488 0x0 }, /* POOL32Axf_4~*(116) */
18489 { reserved_block , 0 , 0 , 32,
18490 0xfc00ffff, 0x2000eb3f, 0 , 0,
18491 0x0 }, /* POOL32Axf_4~*(117) */
18492 { reserved_block , 0 , 0 , 32,
18493 0xfc00ffff, 0x2000ed3f, 0 , 0,
18494 0x0 }, /* POOL32Axf_4~*(118) */
18495 { reserved_block , 0 , 0 , 32,
18496 0xfc00ffff, 0x2000ef3f, 0 , 0,
18497 0x0 }, /* POOL32Axf_4~*(119) */
18498 { instruction , 0 , 0 , 32,
18499 0xfc00ffff, 0x2000f13f, &RADDU_W_QB , 0,
18500 DSP_ }, /* RADDU.W.QB */
18501 { reserved_block , 0 , 0 , 32,
18502 0xfc00ffff, 0x2000f33f, 0 , 0,
18503 0x0 }, /* POOL32Axf_4~*(121) */
18504 { reserved_block , 0 , 0 , 32,
18505 0xfc00ffff, 0x2000f53f, 0 , 0,
18506 0x0 }, /* POOL32Axf_4~*(122) */
18507 { reserved_block , 0 , 0 , 32,
18508 0xfc00ffff, 0x2000f73f, 0 , 0,
18509 0x0 }, /* POOL32Axf_4~*(123) */
18510 { reserved_block , 0 , 0 , 32,
18511 0xfc00ffff, 0x2000f93f, 0 , 0,
18512 0x0 }, /* POOL32Axf_4~*(124) */
18513 { reserved_block , 0 , 0 , 32,
18514 0xfc00ffff, 0x2000fb3f, 0 , 0,
18515 0x0 }, /* POOL32Axf_4~*(125) */
18516 { reserved_block , 0 , 0 , 32,
18517 0xfc00ffff, 0x2000fd3f, 0 , 0,
18518 0x0 }, /* POOL32Axf_4~*(126) */
18519 { reserved_block , 0 , 0 , 32,
18520 0xfc00ffff, 0x2000ff3f, 0 , 0,
18521 0x0 }, /* POOL32Axf_4~*(127) */
18522 };
18523
18524
18525 static const Pool POOL32Axf_5_group0[32] = {
18526 { instruction , 0 , 0 , 32,
18527 0xfc00ffff, 0x2000017f, &TLBGP , 0,
18528 CP0_ | VZ_ | TLB_ }, /* TLBGP */
18529 { instruction , 0 , 0 , 32,
18530 0xfc00ffff, 0x2000037f, &TLBP , 0,
18531 CP0_ | TLB_ }, /* TLBP */
18532 { instruction , 0 , 0 , 32,
18533 0xfc00ffff, 0x2000057f, &TLBGINV , 0,
18534 CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINV */
18535 { instruction , 0 , 0 , 32,
18536 0xfc00ffff, 0x2000077f, &TLBINV , 0,
18537 CP0_ | TLB_ | TLBINV_}, /* TLBINV */
18538 { reserved_block , 0 , 0 , 32,
18539 0xfc00ffff, 0x2000097f, 0 , 0,
18540 0x0 }, /* POOL32Axf_5_group0~*(4) */
18541 { reserved_block , 0 , 0 , 32,
18542 0xfc00ffff, 0x20000b7f, 0 , 0,
18543 0x0 }, /* POOL32Axf_5_group0~*(5) */
18544 { reserved_block , 0 , 0 , 32,
18545 0xfc00ffff, 0x20000d7f, 0 , 0,
18546 0x0 }, /* POOL32Axf_5_group0~*(6) */
18547 { reserved_block , 0 , 0 , 32,
18548 0xfc00ffff, 0x20000f7f, 0 , 0,
18549 0x0 }, /* POOL32Axf_5_group0~*(7) */
18550 { instruction , 0 , 0 , 32,
18551 0xfc00ffff, 0x2000117f, &TLBGR , 0,
18552 CP0_ | VZ_ | TLB_ }, /* TLBGR */
18553 { instruction , 0 , 0 , 32,
18554 0xfc00ffff, 0x2000137f, &TLBR , 0,
18555 CP0_ | TLB_ }, /* TLBR */
18556 { instruction , 0 , 0 , 32,
18557 0xfc00ffff, 0x2000157f, &TLBGINVF , 0,
18558 CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINVF */
18559 { instruction , 0 , 0 , 32,
18560 0xfc00ffff, 0x2000177f, &TLBINVF , 0,
18561 CP0_ | TLB_ | TLBINV_}, /* TLBINVF */
18562 { reserved_block , 0 , 0 , 32,
18563 0xfc00ffff, 0x2000197f, 0 , 0,
18564 0x0 }, /* POOL32Axf_5_group0~*(12) */
18565 { reserved_block , 0 , 0 , 32,
18566 0xfc00ffff, 0x20001b7f, 0 , 0,
18567 0x0 }, /* POOL32Axf_5_group0~*(13) */
18568 { reserved_block , 0 , 0 , 32,
18569 0xfc00ffff, 0x20001d7f, 0 , 0,
18570 0x0 }, /* POOL32Axf_5_group0~*(14) */
18571 { reserved_block , 0 , 0 , 32,
18572 0xfc00ffff, 0x20001f7f, 0 , 0,
18573 0x0 }, /* POOL32Axf_5_group0~*(15) */
18574 { instruction , 0 , 0 , 32,
18575 0xfc00ffff, 0x2000217f, &TLBGWI , 0,
18576 CP0_ | VZ_ | TLB_ }, /* TLBGWI */
18577 { instruction , 0 , 0 , 32,
18578 0xfc00ffff, 0x2000237f, &TLBWI , 0,
18579 CP0_ | TLB_ }, /* TLBWI */
18580 { reserved_block , 0 , 0 , 32,
18581 0xfc00ffff, 0x2000257f, 0 , 0,
18582 0x0 }, /* POOL32Axf_5_group0~*(18) */
18583 { reserved_block , 0 , 0 , 32,
18584 0xfc00ffff, 0x2000277f, 0 , 0,
18585 0x0 }, /* POOL32Axf_5_group0~*(19) */
18586 { reserved_block , 0 , 0 , 32,
18587 0xfc00ffff, 0x2000297f, 0 , 0,
18588 0x0 }, /* POOL32Axf_5_group0~*(20) */
18589 { reserved_block , 0 , 0 , 32,
18590 0xfc00ffff, 0x20002b7f, 0 , 0,
18591 0x0 }, /* POOL32Axf_5_group0~*(21) */
18592 { reserved_block , 0 , 0 , 32,
18593 0xfc00ffff, 0x20002d7f, 0 , 0,
18594 0x0 }, /* POOL32Axf_5_group0~*(22) */
18595 { reserved_block , 0 , 0 , 32,
18596 0xfc00ffff, 0x20002f7f, 0 , 0,
18597 0x0 }, /* POOL32Axf_5_group0~*(23) */
18598 { instruction , 0 , 0 , 32,
18599 0xfc00ffff, 0x2000317f, &TLBGWR , 0,
18600 CP0_ | VZ_ | TLB_ }, /* TLBGWR */
18601 { instruction , 0 , 0 , 32,
18602 0xfc00ffff, 0x2000337f, &TLBWR , 0,
18603 CP0_ | TLB_ }, /* TLBWR */
18604 { reserved_block , 0 , 0 , 32,
18605 0xfc00ffff, 0x2000357f, 0 , 0,
18606 0x0 }, /* POOL32Axf_5_group0~*(26) */
18607 { reserved_block , 0 , 0 , 32,
18608 0xfc00ffff, 0x2000377f, 0 , 0,
18609 0x0 }, /* POOL32Axf_5_group0~*(27) */
18610 { reserved_block , 0 , 0 , 32,
18611 0xfc00ffff, 0x2000397f, 0 , 0,
18612 0x0 }, /* POOL32Axf_5_group0~*(28) */
18613 { reserved_block , 0 , 0 , 32,
18614 0xfc00ffff, 0x20003b7f, 0 , 0,
18615 0x0 }, /* POOL32Axf_5_group0~*(29) */
18616 { reserved_block , 0 , 0 , 32,
18617 0xfc00ffff, 0x20003d7f, 0 , 0,
18618 0x0 }, /* POOL32Axf_5_group0~*(30) */
18619 { reserved_block , 0 , 0 , 32,
18620 0xfc00ffff, 0x20003f7f, 0 , 0,
18621 0x0 }, /* POOL32Axf_5_group0~*(31) */
18622 };
18623
18624
18625 static const Pool POOL32Axf_5_group1[32] = {
18626 { reserved_block , 0 , 0 , 32,
18627 0xfc00ffff, 0x2000417f, 0 , 0,
18628 0x0 }, /* POOL32Axf_5_group1~*(0) */
18629 { reserved_block , 0 , 0 , 32,
18630 0xfc00ffff, 0x2000437f, 0 , 0,
18631 0x0 }, /* POOL32Axf_5_group1~*(1) */
18632 { reserved_block , 0 , 0 , 32,
18633 0xfc00ffff, 0x2000457f, 0 , 0,
18634 0x0 }, /* POOL32Axf_5_group1~*(2) */
18635 { instruction , 0 , 0 , 32,
18636 0xfc00ffff, 0x2000477f, &DI , 0,
18637 0x0 }, /* DI */
18638 { reserved_block , 0 , 0 , 32,
18639 0xfc00ffff, 0x2000497f, 0 , 0,
18640 0x0 }, /* POOL32Axf_5_group1~*(4) */
18641 { reserved_block , 0 , 0 , 32,
18642 0xfc00ffff, 0x20004b7f, 0 , 0,
18643 0x0 }, /* POOL32Axf_5_group1~*(5) */
18644 { reserved_block , 0 , 0 , 32,
18645 0xfc00ffff, 0x20004d7f, 0 , 0,
18646 0x0 }, /* POOL32Axf_5_group1~*(6) */
18647 { reserved_block , 0 , 0 , 32,
18648 0xfc00ffff, 0x20004f7f, 0 , 0,
18649 0x0 }, /* POOL32Axf_5_group1~*(7) */
18650 { reserved_block , 0 , 0 , 32,
18651 0xfc00ffff, 0x2000517f, 0 , 0,
18652 0x0 }, /* POOL32Axf_5_group1~*(8) */
18653 { reserved_block , 0 , 0 , 32,
18654 0xfc00ffff, 0x2000537f, 0 , 0,
18655 0x0 }, /* POOL32Axf_5_group1~*(9) */
18656 { reserved_block , 0 , 0 , 32,
18657 0xfc00ffff, 0x2000557f, 0 , 0,
18658 0x0 }, /* POOL32Axf_5_group1~*(10) */
18659 { instruction , 0 , 0 , 32,
18660 0xfc00ffff, 0x2000577f, &EI , 0,
18661 0x0 }, /* EI */
18662 { reserved_block , 0 , 0 , 32,
18663 0xfc00ffff, 0x2000597f, 0 , 0,
18664 0x0 }, /* POOL32Axf_5_group1~*(12) */
18665 { reserved_block , 0 , 0 , 32,
18666 0xfc00ffff, 0x20005b7f, 0 , 0,
18667 0x0 }, /* POOL32Axf_5_group1~*(13) */
18668 { reserved_block , 0 , 0 , 32,
18669 0xfc00ffff, 0x20005d7f, 0 , 0,
18670 0x0 }, /* POOL32Axf_5_group1~*(14) */
18671 { reserved_block , 0 , 0 , 32,
18672 0xfc00ffff, 0x20005f7f, 0 , 0,
18673 0x0 }, /* POOL32Axf_5_group1~*(15) */
18674 { reserved_block , 0 , 0 , 32,
18675 0xfc00ffff, 0x2000617f, 0 , 0,
18676 0x0 }, /* POOL32Axf_5_group1~*(16) */
18677 { reserved_block , 0 , 0 , 32,
18678 0xfc00ffff, 0x2000637f, 0 , 0,
18679 0x0 }, /* POOL32Axf_5_group1~*(17) */
18680 { reserved_block , 0 , 0 , 32,
18681 0xfc00ffff, 0x2000657f, 0 , 0,
18682 0x0 }, /* POOL32Axf_5_group1~*(18) */
18683 { reserved_block , 0 , 0 , 32,
18684 0xfc00ffff, 0x2000677f, 0 , 0,
18685 0x0 }, /* POOL32Axf_5_group1~*(19) */
18686 { reserved_block , 0 , 0 , 32,
18687 0xfc00ffff, 0x2000697f, 0 , 0,
18688 0x0 }, /* POOL32Axf_5_group1~*(20) */
18689 { reserved_block , 0 , 0 , 32,
18690 0xfc00ffff, 0x20006b7f, 0 , 0,
18691 0x0 }, /* POOL32Axf_5_group1~*(21) */
18692 { reserved_block , 0 , 0 , 32,
18693 0xfc00ffff, 0x20006d7f, 0 , 0,
18694 0x0 }, /* POOL32Axf_5_group1~*(22) */
18695 { reserved_block , 0 , 0 , 32,
18696 0xfc00ffff, 0x20006f7f, 0 , 0,
18697 0x0 }, /* POOL32Axf_5_group1~*(23) */
18698 { reserved_block , 0 , 0 , 32,
18699 0xfc00ffff, 0x2000717f, 0 , 0,
18700 0x0 }, /* POOL32Axf_5_group1~*(24) */
18701 { reserved_block , 0 , 0 , 32,
18702 0xfc00ffff, 0x2000737f, 0 , 0,
18703 0x0 }, /* POOL32Axf_5_group1~*(25) */
18704 { reserved_block , 0 , 0 , 32,
18705 0xfc00ffff, 0x2000757f, 0 , 0,
18706 0x0 }, /* POOL32Axf_5_group1~*(26) */
18707 { reserved_block , 0 , 0 , 32,
18708 0xfc00ffff, 0x2000777f, 0 , 0,
18709 0x0 }, /* POOL32Axf_5_group1~*(27) */
18710 { reserved_block , 0 , 0 , 32,
18711 0xfc00ffff, 0x2000797f, 0 , 0,
18712 0x0 }, /* POOL32Axf_5_group1~*(28) */
18713 { reserved_block , 0 , 0 , 32,
18714 0xfc00ffff, 0x20007b7f, 0 , 0,
18715 0x0 }, /* POOL32Axf_5_group1~*(29) */
18716 { reserved_block , 0 , 0 , 32,
18717 0xfc00ffff, 0x20007d7f, 0 , 0,
18718 0x0 }, /* POOL32Axf_5_group1~*(30) */
18719 { reserved_block , 0 , 0 , 32,
18720 0xfc00ffff, 0x20007f7f, 0 , 0,
18721 0x0 }, /* POOL32Axf_5_group1~*(31) */
18722 };
18723
18724
18725 static const Pool ERETx[2] = {
18726 { instruction , 0 , 0 , 32,
18727 0xfc01ffff, 0x2000f37f, &ERET , 0,
18728 0x0 }, /* ERET */
18729 { instruction , 0 , 0 , 32,
18730 0xfc01ffff, 0x2001f37f, &ERETNC , 0,
18731 0x0 }, /* ERETNC */
18732 };
18733
18734
18735 static const Pool POOL32Axf_5_group3[32] = {
18736 { reserved_block , 0 , 0 , 32,
18737 0xfc00ffff, 0x2000c17f, 0 , 0,
18738 0x0 }, /* POOL32Axf_5_group3~*(0) */
18739 { instruction , 0 , 0 , 32,
18740 0xfc00ffff, 0x2000c37f, &WAIT , 0,
18741 0x0 }, /* WAIT */
18742 { reserved_block , 0 , 0 , 32,
18743 0xfc00ffff, 0x2000c57f, 0 , 0,
18744 0x0 }, /* POOL32Axf_5_group3~*(2) */
18745 { reserved_block , 0 , 0 , 32,
18746 0xfc00ffff, 0x2000c77f, 0 , 0,
18747 0x0 }, /* POOL32Axf_5_group3~*(3) */
18748 { reserved_block , 0 , 0 , 32,
18749 0xfc00ffff, 0x2000c97f, 0 , 0,
18750 0x0 }, /* POOL32Axf_5_group3~*(4) */
18751 { reserved_block , 0 , 0 , 32,
18752 0xfc00ffff, 0x2000cb7f, 0 , 0,
18753 0x0 }, /* POOL32Axf_5_group3~*(5) */
18754 { reserved_block , 0 , 0 , 32,
18755 0xfc00ffff, 0x2000cd7f, 0 , 0,
18756 0x0 }, /* POOL32Axf_5_group3~*(6) */
18757 { reserved_block , 0 , 0 , 32,
18758 0xfc00ffff, 0x2000cf7f, 0 , 0,
18759 0x0 }, /* POOL32Axf_5_group3~*(7) */
18760 { reserved_block , 0 , 0 , 32,
18761 0xfc00ffff, 0x2000d17f, 0 , 0,
18762 0x0 }, /* POOL32Axf_5_group3~*(8) */
18763 { instruction , 0 , 0 , 32,
18764 0xfc00ffff, 0x2000d37f, &IRET , 0,
18765 MCU_ }, /* IRET */
18766 { reserved_block , 0 , 0 , 32,
18767 0xfc00ffff, 0x2000d57f, 0 , 0,
18768 0x0 }, /* POOL32Axf_5_group3~*(10) */
18769 { reserved_block , 0 , 0 , 32,
18770 0xfc00ffff, 0x2000d77f, 0 , 0,
18771 0x0 }, /* POOL32Axf_5_group3~*(11) */
18772 { reserved_block , 0 , 0 , 32,
18773 0xfc00ffff, 0x2000d97f, 0 , 0,
18774 0x0 }, /* POOL32Axf_5_group3~*(12) */
18775 { reserved_block , 0 , 0 , 32,
18776 0xfc00ffff, 0x2000db7f, 0 , 0,
18777 0x0 }, /* POOL32Axf_5_group3~*(13) */
18778 { reserved_block , 0 , 0 , 32,
18779 0xfc00ffff, 0x2000dd7f, 0 , 0,
18780 0x0 }, /* POOL32Axf_5_group3~*(14) */
18781 { reserved_block , 0 , 0 , 32,
18782 0xfc00ffff, 0x2000df7f, 0 , 0,
18783 0x0 }, /* POOL32Axf_5_group3~*(15) */
18784 { instruction , 0 , 0 , 32,
18785 0xfc00ffff, 0x2000e17f, &RDPGPR , 0,
18786 CP0_ }, /* RDPGPR */
18787 { instruction , 0 , 0 , 32,
18788 0xfc00ffff, 0x2000e37f, &DERET , 0,
18789 EJTAG_ }, /* DERET */
18790 { reserved_block , 0 , 0 , 32,
18791 0xfc00ffff, 0x2000e57f, 0 , 0,
18792 0x0 }, /* POOL32Axf_5_group3~*(18) */
18793 { reserved_block , 0 , 0 , 32,
18794 0xfc00ffff, 0x2000e77f, 0 , 0,
18795 0x0 }, /* POOL32Axf_5_group3~*(19) */
18796 { reserved_block , 0 , 0 , 32,
18797 0xfc00ffff, 0x2000e97f, 0 , 0,
18798 0x0 }, /* POOL32Axf_5_group3~*(20) */
18799 { reserved_block , 0 , 0 , 32,
18800 0xfc00ffff, 0x2000eb7f, 0 , 0,
18801 0x0 }, /* POOL32Axf_5_group3~*(21) */
18802 { reserved_block , 0 , 0 , 32,
18803 0xfc00ffff, 0x2000ed7f, 0 , 0,
18804 0x0 }, /* POOL32Axf_5_group3~*(22) */
18805 { reserved_block , 0 , 0 , 32,
18806 0xfc00ffff, 0x2000ef7f, 0 , 0,
18807 0x0 }, /* POOL32Axf_5_group3~*(23) */
18808 { instruction , 0 , 0 , 32,
18809 0xfc00ffff, 0x2000f17f, &WRPGPR , 0,
18810 CP0_ }, /* WRPGPR */
18811 { pool , ERETx , 2 , 32,
18812 0xfc00ffff, 0x2000f37f, 0 , 0,
18813 0x0 }, /* ERETx */
18814 { reserved_block , 0 , 0 , 32,
18815 0xfc00ffff, 0x2000f57f, 0 , 0,
18816 0x0 }, /* POOL32Axf_5_group3~*(26) */
18817 { reserved_block , 0 , 0 , 32,
18818 0xfc00ffff, 0x2000f77f, 0 , 0,
18819 0x0 }, /* POOL32Axf_5_group3~*(27) */
18820 { reserved_block , 0 , 0 , 32,
18821 0xfc00ffff, 0x2000f97f, 0 , 0,
18822 0x0 }, /* POOL32Axf_5_group3~*(28) */
18823 { reserved_block , 0 , 0 , 32,
18824 0xfc00ffff, 0x2000fb7f, 0 , 0,
18825 0x0 }, /* POOL32Axf_5_group3~*(29) */
18826 { reserved_block , 0 , 0 , 32,
18827 0xfc00ffff, 0x2000fd7f, 0 , 0,
18828 0x0 }, /* POOL32Axf_5_group3~*(30) */
18829 { reserved_block , 0 , 0 , 32,
18830 0xfc00ffff, 0x2000ff7f, 0 , 0,
18831 0x0 }, /* POOL32Axf_5_group3~*(31) */
18832 };
18833
18834
18835 static const Pool POOL32Axf_5[4] = {
18836 { pool , POOL32Axf_5_group0 , 32 , 32,
18837 0xfc00c1ff, 0x2000017f, 0 , 0,
18838 0x0 }, /* POOL32Axf_5_group0 */
18839 { pool , POOL32Axf_5_group1 , 32 , 32,
18840 0xfc00c1ff, 0x2000417f, 0 , 0,
18841 0x0 }, /* POOL32Axf_5_group1 */
18842 { reserved_block , 0 , 0 , 32,
18843 0xfc00c1ff, 0x2000817f, 0 , 0,
18844 0x0 }, /* POOL32Axf_5~*(2) */
18845 { pool , POOL32Axf_5_group3 , 32 , 32,
18846 0xfc00c1ff, 0x2000c17f, 0 , 0,
18847 0x0 }, /* POOL32Axf_5_group3 */
18848 };
18849
18850
18851 static const Pool SHRA__R__QB[2] = {
18852 { instruction , 0 , 0 , 32,
18853 0xfc001fff, 0x200001ff, &SHRA_QB , 0,
18854 DSP_ }, /* SHRA.QB */
18855 { instruction , 0 , 0 , 32,
18856 0xfc001fff, 0x200011ff, &SHRA_R_QB , 0,
18857 DSP_ }, /* SHRA_R.QB */
18858 };
18859
18860
18861 static const Pool POOL32Axf_7[8] = {
18862 { pool , SHRA__R__QB , 2 , 32,
18863 0xfc000fff, 0x200001ff, 0 , 0,
18864 0x0 }, /* SHRA[_R].QB */
18865 { instruction , 0 , 0 , 32,
18866 0xfc000fff, 0x200003ff, &SHRL_PH , 0,
18867 DSP_ }, /* SHRL.PH */
18868 { instruction , 0 , 0 , 32,
18869 0xfc000fff, 0x200005ff, &REPL_QB , 0,
18870 DSP_ }, /* REPL.QB */
18871 { reserved_block , 0 , 0 , 32,
18872 0xfc000fff, 0x200007ff, 0 , 0,
18873 0x0 }, /* POOL32Axf_7~*(3) */
18874 { reserved_block , 0 , 0 , 32,
18875 0xfc000fff, 0x200009ff, 0 , 0,
18876 0x0 }, /* POOL32Axf_7~*(4) */
18877 { reserved_block , 0 , 0 , 32,
18878 0xfc000fff, 0x20000bff, 0 , 0,
18879 0x0 }, /* POOL32Axf_7~*(5) */
18880 { reserved_block , 0 , 0 , 32,
18881 0xfc000fff, 0x20000dff, 0 , 0,
18882 0x0 }, /* POOL32Axf_7~*(6) */
18883 { reserved_block , 0 , 0 , 32,
18884 0xfc000fff, 0x20000fff, 0 , 0,
18885 0x0 }, /* POOL32Axf_7~*(7) */
18886 };
18887
18888
18889 static const Pool POOL32Axf[8] = {
18890 { reserved_block , 0 , 0 , 32,
18891 0xfc0001ff, 0x2000003f, 0 , 0,
18892 0x0 }, /* POOL32Axf~*(0) */
18893 { pool , POOL32Axf_1 , 8 , 32,
18894 0xfc0001ff, 0x2000007f, 0 , 0,
18895 0x0 }, /* POOL32Axf_1 */
18896 { pool , POOL32Axf_2 , 4 , 32,
18897 0xfc0001ff, 0x200000bf, 0 , 0,
18898 0x0 }, /* POOL32Axf_2 */
18899 { reserved_block , 0 , 0 , 32,
18900 0xfc0001ff, 0x200000ff, 0 , 0,
18901 0x0 }, /* POOL32Axf~*(3) */
18902 { pool , POOL32Axf_4 , 128 , 32,
18903 0xfc0001ff, 0x2000013f, 0 , 0,
18904 0x0 }, /* POOL32Axf_4 */
18905 { pool , POOL32Axf_5 , 4 , 32,
18906 0xfc0001ff, 0x2000017f, 0 , 0,
18907 0x0 }, /* POOL32Axf_5 */
18908 { reserved_block , 0 , 0 , 32,
18909 0xfc0001ff, 0x200001bf, 0 , 0,
18910 0x0 }, /* POOL32Axf~*(6) */
18911 { pool , POOL32Axf_7 , 8 , 32,
18912 0xfc0001ff, 0x200001ff, 0 , 0,
18913 0x0 }, /* POOL32Axf_7 */
18914 };
18915
18916
18917 static const Pool _POOL32A7[8] = {
18918 { pool , P_LSX , 2 , 32,
18919 0xfc00003f, 0x20000007, 0 , 0,
18920 0x0 }, /* P.LSX */
18921 { instruction , 0 , 0 , 32,
18922 0xfc00003f, 0x2000000f, &LSA , 0,
18923 0x0 }, /* LSA */
18924 { reserved_block , 0 , 0 , 32,
18925 0xfc00003f, 0x20000017, 0 , 0,
18926 0x0 }, /* _POOL32A7~*(2) */
18927 { instruction , 0 , 0 , 32,
18928 0xfc00003f, 0x2000001f, &EXTW , 0,
18929 0x0 }, /* EXTW */
18930 { reserved_block , 0 , 0 , 32,
18931 0xfc00003f, 0x20000027, 0 , 0,
18932 0x0 }, /* _POOL32A7~*(4) */
18933 { reserved_block , 0 , 0 , 32,
18934 0xfc00003f, 0x2000002f, 0 , 0,
18935 0x0 }, /* _POOL32A7~*(5) */
18936 { reserved_block , 0 , 0 , 32,
18937 0xfc00003f, 0x20000037, 0 , 0,
18938 0x0 }, /* _POOL32A7~*(6) */
18939 { pool , POOL32Axf , 8 , 32,
18940 0xfc00003f, 0x2000003f, 0 , 0,
18941 0x0 }, /* POOL32Axf */
18942 };
18943
18944
18945 static const Pool P32A[8] = {
18946 { pool , _POOL32A0 , 128 , 32,
18947 0xfc000007, 0x20000000, 0 , 0,
18948 0x0 }, /* _POOL32A0 */
18949 { instruction , 0 , 0 , 32,
18950 0xfc000007, 0x20000001, &SPECIAL2 , 0,
18951 UDI_ }, /* SPECIAL2 */
18952 { instruction , 0 , 0 , 32,
18953 0xfc000007, 0x20000002, &COP2_1 , 0,
18954 CP2_ }, /* COP2_1 */
18955 { instruction , 0 , 0 , 32,
18956 0xfc000007, 0x20000003, &UDI , 0,
18957 UDI_ }, /* UDI */
18958 { reserved_block , 0 , 0 , 32,
18959 0xfc000007, 0x20000004, 0 , 0,
18960 0x0 }, /* P32A~*(4) */
18961 { pool , _POOL32A5 , 128 , 32,
18962 0xfc000007, 0x20000005, 0 , 0,
18963 0x0 }, /* _POOL32A5 */
18964 { reserved_block , 0 , 0 , 32,
18965 0xfc000007, 0x20000006, 0 , 0,
18966 0x0 }, /* P32A~*(6) */
18967 { pool , _POOL32A7 , 8 , 32,
18968 0xfc000007, 0x20000007, 0 , 0,
18969 0x0 }, /* _POOL32A7 */
18970 };
18971
18972
18973 static const Pool P_GP_D[2] = {
18974 { instruction , 0 , 0 , 32,
18975 0xfc000007, 0x40000001, &LD_GP_ , 0,
18976 MIPS64_ }, /* LD[GP] */
18977 { instruction , 0 , 0 , 32,
18978 0xfc000007, 0x40000005, &SD_GP_ , 0,
18979 MIPS64_ }, /* SD[GP] */
18980 };
18981
18982
18983 static const Pool P_GP_W[4] = {
18984 { instruction , 0 , 0 , 32,
18985 0xfc000003, 0x40000000, &ADDIU_GP_W_ , 0,
18986 0x0 }, /* ADDIU[GP.W] */
18987 { pool , P_GP_D , 2 , 32,
18988 0xfc000003, 0x40000001, 0 , 0,
18989 0x0 }, /* P.GP.D */
18990 { instruction , 0 , 0 , 32,
18991 0xfc000003, 0x40000002, &LW_GP_ , 0,
18992 0x0 }, /* LW[GP] */
18993 { instruction , 0 , 0 , 32,
18994 0xfc000003, 0x40000003, &SW_GP_ , 0,
18995 0x0 }, /* SW[GP] */
18996 };
18997
18998
18999 static const Pool POOL48I[32] = {
19000 { instruction , 0 , 0 , 48,
19001 0xfc1f00000000ull, 0x600000000000ull, &LI_48_ , 0,
19002 XMMS_ }, /* LI[48] */
19003 { instruction , 0 , 0 , 48,
19004 0xfc1f00000000ull, 0x600100000000ull, &ADDIU_48_ , 0,
19005 XMMS_ }, /* ADDIU[48] */
19006 { instruction , 0 , 0 , 48,
19007 0xfc1f00000000ull, 0x600200000000ull, &ADDIU_GP48_ , 0,
19008 XMMS_ }, /* ADDIU[GP48] */
19009 { instruction , 0 , 0 , 48,
19010 0xfc1f00000000ull, 0x600300000000ull, &ADDIUPC_48_ , 0,
19011 XMMS_ }, /* ADDIUPC[48] */
19012 { reserved_block , 0 , 0 , 48,
19013 0xfc1f00000000ull, 0x600400000000ull, 0 , 0,
19014 0x0 }, /* POOL48I~*(4) */
19015 { reserved_block , 0 , 0 , 48,
19016 0xfc1f00000000ull, 0x600500000000ull, 0 , 0,
19017 0x0 }, /* POOL48I~*(5) */
19018 { reserved_block , 0 , 0 , 48,
19019 0xfc1f00000000ull, 0x600600000000ull, 0 , 0,
19020 0x0 }, /* POOL48I~*(6) */
19021 { reserved_block , 0 , 0 , 48,
19022 0xfc1f00000000ull, 0x600700000000ull, 0 , 0,
19023 0x0 }, /* POOL48I~*(7) */
19024 { reserved_block , 0 , 0 , 48,
19025 0xfc1f00000000ull, 0x600800000000ull, 0 , 0,
19026 0x0 }, /* POOL48I~*(8) */
19027 { reserved_block , 0 , 0 , 48,
19028 0xfc1f00000000ull, 0x600900000000ull, 0 , 0,
19029 0x0 }, /* POOL48I~*(9) */
19030 { reserved_block , 0 , 0 , 48,
19031 0xfc1f00000000ull, 0x600a00000000ull, 0 , 0,
19032 0x0 }, /* POOL48I~*(10) */
19033 { instruction , 0 , 0 , 48,
19034 0xfc1f00000000ull, 0x600b00000000ull, &LWPC_48_ , 0,
19035 XMMS_ }, /* LWPC[48] */
19036 { reserved_block , 0 , 0 , 48,
19037 0xfc1f00000000ull, 0x600c00000000ull, 0 , 0,
19038 0x0 }, /* POOL48I~*(12) */
19039 { reserved_block , 0 , 0 , 48,
19040 0xfc1f00000000ull, 0x600d00000000ull, 0 , 0,
19041 0x0 }, /* POOL48I~*(13) */
19042 { reserved_block , 0 , 0 , 48,
19043 0xfc1f00000000ull, 0x600e00000000ull, 0 , 0,
19044 0x0 }, /* POOL48I~*(14) */
19045 { instruction , 0 , 0 , 48,
19046 0xfc1f00000000ull, 0x600f00000000ull, &SWPC_48_ , 0,
19047 XMMS_ }, /* SWPC[48] */
19048 { reserved_block , 0 , 0 , 48,
19049 0xfc1f00000000ull, 0x601000000000ull, 0 , 0,
19050 0x0 }, /* POOL48I~*(16) */
19051 { instruction , 0 , 0 , 48,
19052 0xfc1f00000000ull, 0x601100000000ull, &DADDIU_48_ , 0,
19053 MIPS64_ }, /* DADDIU[48] */
19054 { reserved_block , 0 , 0 , 48,
19055 0xfc1f00000000ull, 0x601200000000ull, 0 , 0,
19056 0x0 }, /* POOL48I~*(18) */
19057 { reserved_block , 0 , 0 , 48,
19058 0xfc1f00000000ull, 0x601300000000ull, 0 , 0,
19059 0x0 }, /* POOL48I~*(19) */
19060 { instruction , 0 , 0 , 48,
19061 0xfc1f00000000ull, 0x601400000000ull, &DLUI_48_ , 0,
19062 MIPS64_ }, /* DLUI[48] */
19063 { reserved_block , 0 , 0 , 48,
19064 0xfc1f00000000ull, 0x601500000000ull, 0 , 0,
19065 0x0 }, /* POOL48I~*(21) */
19066 { reserved_block , 0 , 0 , 48,
19067 0xfc1f00000000ull, 0x601600000000ull, 0 , 0,
19068 0x0 }, /* POOL48I~*(22) */
19069 { reserved_block , 0 , 0 , 48,
19070 0xfc1f00000000ull, 0x601700000000ull, 0 , 0,
19071 0x0 }, /* POOL48I~*(23) */
19072 { reserved_block , 0 , 0 , 48,
19073 0xfc1f00000000ull, 0x601800000000ull, 0 , 0,
19074 0x0 }, /* POOL48I~*(24) */
19075 { reserved_block , 0 , 0 , 48,
19076 0xfc1f00000000ull, 0x601900000000ull, 0 , 0,
19077 0x0 }, /* POOL48I~*(25) */
19078 { reserved_block , 0 , 0 , 48,
19079 0xfc1f00000000ull, 0x601a00000000ull, 0 , 0,
19080 0x0 }, /* POOL48I~*(26) */
19081 { instruction , 0 , 0 , 48,
19082 0xfc1f00000000ull, 0x601b00000000ull, &LDPC_48_ , 0,
19083 MIPS64_ }, /* LDPC[48] */
19084 { reserved_block , 0 , 0 , 48,
19085 0xfc1f00000000ull, 0x601c00000000ull, 0 , 0,
19086 0x0 }, /* POOL48I~*(28) */
19087 { reserved_block , 0 , 0 , 48,
19088 0xfc1f00000000ull, 0x601d00000000ull, 0 , 0,
19089 0x0 }, /* POOL48I~*(29) */
19090 { reserved_block , 0 , 0 , 48,
19091 0xfc1f00000000ull, 0x601e00000000ull, 0 , 0,
19092 0x0 }, /* POOL48I~*(30) */
19093 { instruction , 0 , 0 , 48,
19094 0xfc1f00000000ull, 0x601f00000000ull, &SDPC_48_ , 0,
19095 MIPS64_ }, /* SDPC[48] */
19096 };
19097
19098
19099 static const Pool PP_SR[4] = {
19100 { instruction , 0 , 0 , 32,
19101 0xfc10f003, 0x80003000, &SAVE_32_ , 0,
19102 0x0 }, /* SAVE[32] */
19103 { reserved_block , 0 , 0 , 32,
19104 0xfc10f003, 0x80003001, 0 , 0,
19105 0x0 }, /* PP.SR~*(1) */
19106 { instruction , 0 , 0 , 32,
19107 0xfc10f003, 0x80003002, &RESTORE_32_ , 0,
19108 0x0 }, /* RESTORE[32] */
19109 { return_instruction , 0 , 0 , 32,
19110 0xfc10f003, 0x80003003, &RESTORE_JRC_32_ , 0,
19111 0x0 }, /* RESTORE.JRC[32] */
19112 };
19113
19114
19115 static const Pool P_SR_F[8] = {
19116 { instruction , 0 , 0 , 32,
19117 0xfc10f007, 0x80103000, &SAVEF , 0,
19118 CP1_ }, /* SAVEF */
19119 { instruction , 0 , 0 , 32,
19120 0xfc10f007, 0x80103001, &RESTOREF , 0,
19121 CP1_ }, /* RESTOREF */
19122 { reserved_block , 0 , 0 , 32,
19123 0xfc10f007, 0x80103002, 0 , 0,
19124 0x0 }, /* P.SR.F~*(2) */
19125 { reserved_block , 0 , 0 , 32,
19126 0xfc10f007, 0x80103003, 0 , 0,
19127 0x0 }, /* P.SR.F~*(3) */
19128 { reserved_block , 0 , 0 , 32,
19129 0xfc10f007, 0x80103004, 0 , 0,
19130 0x0 }, /* P.SR.F~*(4) */
19131 { reserved_block , 0 , 0 , 32,
19132 0xfc10f007, 0x80103005, 0 , 0,
19133 0x0 }, /* P.SR.F~*(5) */
19134 { reserved_block , 0 , 0 , 32,
19135 0xfc10f007, 0x80103006, 0 , 0,
19136 0x0 }, /* P.SR.F~*(6) */
19137 { reserved_block , 0 , 0 , 32,
19138 0xfc10f007, 0x80103007, 0 , 0,
19139 0x0 }, /* P.SR.F~*(7) */
19140 };
19141
19142
19143 static const Pool P_SR[2] = {
19144 { pool , PP_SR , 4 , 32,
19145 0xfc10f000, 0x80003000, 0 , 0,
19146 0x0 }, /* PP.SR */
19147 { pool , P_SR_F , 8 , 32,
19148 0xfc10f000, 0x80103000, 0 , 0,
19149 0x0 }, /* P.SR.F */
19150 };
19151
19152
19153 static const Pool P_SLL[5] = {
19154 { instruction , 0 , 0 , 32,
19155 0xffe0f1ff, 0x8000c000, &NOP_32_ , 0,
19156 0x0 }, /* NOP[32] */
19157 { instruction , 0 , 0 , 32,
19158 0xffe0f1ff, 0x8000c003, &EHB , 0,
19159 0x0 }, /* EHB */
19160 { instruction , 0 , 0 , 32,
19161 0xffe0f1ff, 0x8000c005, &PAUSE , 0,
19162 0x0 }, /* PAUSE */
19163 { instruction , 0 , 0 , 32,
19164 0xffe0f1ff, 0x8000c006, &SYNC , 0,
19165 0x0 }, /* SYNC */
19166 { instruction , 0 , 0 , 32,
19167 0xfc00f1e0, 0x8000c000, &SLL_32_ , 0,
19168 0x0 }, /* SLL[32] */
19169 };
19170
19171
19172 static const Pool P_SHIFT[16] = {
19173 { pool , P_SLL , 5 , 32,
19174 0xfc00f1e0, 0x8000c000, 0 , 0,
19175 0x0 }, /* P.SLL */
19176 { reserved_block , 0 , 0 , 32,
19177 0xfc00f1e0, 0x8000c020, 0 , 0,
19178 0x0 }, /* P.SHIFT~*(1) */
19179 { instruction , 0 , 0 , 32,
19180 0xfc00f1e0, 0x8000c040, &SRL_32_ , 0,
19181 0x0 }, /* SRL[32] */
19182 { reserved_block , 0 , 0 , 32,
19183 0xfc00f1e0, 0x8000c060, 0 , 0,
19184 0x0 }, /* P.SHIFT~*(3) */
19185 { instruction , 0 , 0 , 32,
19186 0xfc00f1e0, 0x8000c080, &SRA , 0,
19187 0x0 }, /* SRA */
19188 { reserved_block , 0 , 0 , 32,
19189 0xfc00f1e0, 0x8000c0a0, 0 , 0,
19190 0x0 }, /* P.SHIFT~*(5) */
19191 { instruction , 0 , 0 , 32,
19192 0xfc00f1e0, 0x8000c0c0, &ROTR , 0,
19193 0x0 }, /* ROTR */
19194 { reserved_block , 0 , 0 , 32,
19195 0xfc00f1e0, 0x8000c0e0, 0 , 0,
19196 0x0 }, /* P.SHIFT~*(7) */
19197 { instruction , 0 , 0 , 32,
19198 0xfc00f1e0, 0x8000c100, &DSLL , 0,
19199 MIPS64_ }, /* DSLL */
19200 { instruction , 0 , 0 , 32,
19201 0xfc00f1e0, 0x8000c120, &DSLL32 , 0,
19202 MIPS64_ }, /* DSLL32 */
19203 { instruction , 0 , 0 , 32,
19204 0xfc00f1e0, 0x8000c140, &DSRL , 0,
19205 MIPS64_ }, /* DSRL */
19206 { instruction , 0 , 0 , 32,
19207 0xfc00f1e0, 0x8000c160, &DSRL32 , 0,
19208 MIPS64_ }, /* DSRL32 */
19209 { instruction , 0 , 0 , 32,
19210 0xfc00f1e0, 0x8000c180, &DSRA , 0,
19211 MIPS64_ }, /* DSRA */
19212 { instruction , 0 , 0 , 32,
19213 0xfc00f1e0, 0x8000c1a0, &DSRA32 , 0,
19214 MIPS64_ }, /* DSRA32 */
19215 { instruction , 0 , 0 , 32,
19216 0xfc00f1e0, 0x8000c1c0, &DROTR , 0,
19217 MIPS64_ }, /* DROTR */
19218 { instruction , 0 , 0 , 32,
19219 0xfc00f1e0, 0x8000c1e0, &DROTR32 , 0,
19220 MIPS64_ }, /* DROTR32 */
19221 };
19222
19223
19224 static const Pool P_ROTX[4] = {
19225 { instruction , 0 , 0 , 32,
19226 0xfc00f820, 0x8000d000, &ROTX , 0,
19227 XMMS_ }, /* ROTX */
19228 { reserved_block , 0 , 0 , 32,
19229 0xfc00f820, 0x8000d020, 0 , 0,
19230 0x0 }, /* P.ROTX~*(1) */
19231 { reserved_block , 0 , 0 , 32,
19232 0xfc00f820, 0x8000d800, 0 , 0,
19233 0x0 }, /* P.ROTX~*(2) */
19234 { reserved_block , 0 , 0 , 32,
19235 0xfc00f820, 0x8000d820, 0 , 0,
19236 0x0 }, /* P.ROTX~*(3) */
19237 };
19238
19239
19240 static const Pool P_INS[4] = {
19241 { instruction , 0 , 0 , 32,
19242 0xfc00f820, 0x8000e000, &INS , 0,
19243 XMMS_ }, /* INS */
19244 { instruction , 0 , 0 , 32,
19245 0xfc00f820, 0x8000e020, &DINSU , 0,
19246 MIPS64_ }, /* DINSU */
19247 { instruction , 0 , 0 , 32,
19248 0xfc00f820, 0x8000e800, &DINSM , 0,
19249 MIPS64_ }, /* DINSM */
19250 { instruction , 0 , 0 , 32,
19251 0xfc00f820, 0x8000e820, &DINS , 0,
19252 MIPS64_ }, /* DINS */
19253 };
19254
19255
19256 static const Pool P_EXT[4] = {
19257 { instruction , 0 , 0 , 32,
19258 0xfc00f820, 0x8000f000, &EXT , 0,
19259 XMMS_ }, /* EXT */
19260 { instruction , 0 , 0 , 32,
19261 0xfc00f820, 0x8000f020, &DEXTU , 0,
19262 MIPS64_ }, /* DEXTU */
19263 { instruction , 0 , 0 , 32,
19264 0xfc00f820, 0x8000f800, &DEXTM , 0,
19265 MIPS64_ }, /* DEXTM */
19266 { instruction , 0 , 0 , 32,
19267 0xfc00f820, 0x8000f820, &DEXT , 0,
19268 MIPS64_ }, /* DEXT */
19269 };
19270
19271
19272 static const Pool P_U12[16] = {
19273 { instruction , 0 , 0 , 32,
19274 0xfc00f000, 0x80000000, &ORI , 0,
19275 0x0 }, /* ORI */
19276 { instruction , 0 , 0 , 32,
19277 0xfc00f000, 0x80001000, &XORI , 0,
19278 0x0 }, /* XORI */
19279 { instruction , 0 , 0 , 32,
19280 0xfc00f000, 0x80002000, &ANDI_32_ , 0,
19281 0x0 }, /* ANDI[32] */
19282 { pool , P_SR , 2 , 32,
19283 0xfc00f000, 0x80003000, 0 , 0,
19284 0x0 }, /* P.SR */
19285 { instruction , 0 , 0 , 32,
19286 0xfc00f000, 0x80004000, &SLTI , 0,
19287 0x0 }, /* SLTI */
19288 { instruction , 0 , 0 , 32,
19289 0xfc00f000, 0x80005000, &SLTIU , 0,
19290 0x0 }, /* SLTIU */
19291 { instruction , 0 , 0 , 32,
19292 0xfc00f000, 0x80006000, &SEQI , 0,
19293 0x0 }, /* SEQI */
19294 { reserved_block , 0 , 0 , 32,
19295 0xfc00f000, 0x80007000, 0 , 0,
19296 0x0 }, /* P.U12~*(7) */
19297 { instruction , 0 , 0 , 32,
19298 0xfc00f000, 0x80008000, &ADDIU_NEG_ , 0,
19299 0x0 }, /* ADDIU[NEG] */
19300 { instruction , 0 , 0 , 32,
19301 0xfc00f000, 0x80009000, &DADDIU_U12_ , 0,
19302 MIPS64_ }, /* DADDIU[U12] */
19303 { instruction , 0 , 0 , 32,
19304 0xfc00f000, 0x8000a000, &DADDIU_NEG_ , 0,
19305 MIPS64_ }, /* DADDIU[NEG] */
19306 { instruction , 0 , 0 , 32,
19307 0xfc00f000, 0x8000b000, &DROTX , 0,
19308 MIPS64_ }, /* DROTX */
19309 { pool , P_SHIFT , 16 , 32,
19310 0xfc00f000, 0x8000c000, 0 , 0,
19311 0x0 }, /* P.SHIFT */
19312 { pool , P_ROTX , 4 , 32,
19313 0xfc00f000, 0x8000d000, 0 , 0,
19314 0x0 }, /* P.ROTX */
19315 { pool , P_INS , 4 , 32,
19316 0xfc00f000, 0x8000e000, 0 , 0,
19317 0x0 }, /* P.INS */
19318 { pool , P_EXT , 4 , 32,
19319 0xfc00f000, 0x8000f000, 0 , 0,
19320 0x0 }, /* P.EXT */
19321 };
19322
19323
19324 static const Pool RINT_fmt[2] = {
19325 { instruction , 0 , 0 , 32,
19326 0xfc0003ff, 0xa0000020, &RINT_S , 0,
19327 CP1_ }, /* RINT.S */
19328 { instruction , 0 , 0 , 32,
19329 0xfc0003ff, 0xa0000220, &RINT_D , 0,
19330 CP1_ }, /* RINT.D */
19331 };
19332
19333
19334 static const Pool ADD_fmt0[2] = {
19335 { instruction , 0 , 0 , 32,
19336 0xfc0003ff, 0xa0000030, &ADD_S , 0,
19337 CP1_ }, /* ADD.S */
19338 { reserved_block , 0 , 0 , 32,
19339 0xfc0003ff, 0xa0000230, 0 , 0,
19340 CP1_ }, /* ADD.fmt0~*(1) */
19341 };
19342
19343
19344 static const Pool SELEQZ_fmt[2] = {
19345 { instruction , 0 , 0 , 32,
19346 0xfc0003ff, 0xa0000038, &SELEQZ_S , 0,
19347 CP1_ }, /* SELEQZ.S */
19348 { instruction , 0 , 0 , 32,
19349 0xfc0003ff, 0xa0000238, &SELEQZ_D , 0,
19350 CP1_ }, /* SELEQZ.D */
19351 };
19352
19353
19354 static const Pool CLASS_fmt[2] = {
19355 { instruction , 0 , 0 , 32,
19356 0xfc0003ff, 0xa0000060, &CLASS_S , 0,
19357 CP1_ }, /* CLASS.S */
19358 { instruction , 0 , 0 , 32,
19359 0xfc0003ff, 0xa0000260, &CLASS_D , 0,
19360 CP1_ }, /* CLASS.D */
19361 };
19362
19363
19364 static const Pool SUB_fmt0[2] = {
19365 { instruction , 0 , 0 , 32,
19366 0xfc0003ff, 0xa0000070, &SUB_S , 0,
19367 CP1_ }, /* SUB.S */
19368 { reserved_block , 0 , 0 , 32,
19369 0xfc0003ff, 0xa0000270, 0 , 0,
19370 CP1_ }, /* SUB.fmt0~*(1) */
19371 };
19372
19373
19374 static const Pool SELNEZ_fmt[2] = {
19375 { instruction , 0 , 0 , 32,
19376 0xfc0003ff, 0xa0000078, &SELNEZ_S , 0,
19377 CP1_ }, /* SELNEZ.S */
19378 { instruction , 0 , 0 , 32,
19379 0xfc0003ff, 0xa0000278, &SELNEZ_D , 0,
19380 CP1_ }, /* SELNEZ.D */
19381 };
19382
19383
19384 static const Pool MUL_fmt0[2] = {
19385 { instruction , 0 , 0 , 32,
19386 0xfc0003ff, 0xa00000b0, &MUL_S , 0,
19387 CP1_ }, /* MUL.S */
19388 { reserved_block , 0 , 0 , 32,
19389 0xfc0003ff, 0xa00002b0, 0 , 0,
19390 CP1_ }, /* MUL.fmt0~*(1) */
19391 };
19392
19393
19394 static const Pool SEL_fmt[2] = {
19395 { instruction , 0 , 0 , 32,
19396 0xfc0003ff, 0xa00000b8, &SEL_S , 0,
19397 CP1_ }, /* SEL.S */
19398 { instruction , 0 , 0 , 32,
19399 0xfc0003ff, 0xa00002b8, &SEL_D , 0,
19400 CP1_ }, /* SEL.D */
19401 };
19402
19403
19404 static const Pool DIV_fmt0[2] = {
19405 { instruction , 0 , 0 , 32,
19406 0xfc0003ff, 0xa00000f0, &DIV_S , 0,
19407 CP1_ }, /* DIV.S */
19408 { reserved_block , 0 , 0 , 32,
19409 0xfc0003ff, 0xa00002f0, 0 , 0,
19410 CP1_ }, /* DIV.fmt0~*(1) */
19411 };
19412
19413
19414 static const Pool ADD_fmt1[2] = {
19415 { instruction , 0 , 0 , 32,
19416 0xfc0003ff, 0xa0000130, &ADD_D , 0,
19417 CP1_ }, /* ADD.D */
19418 { reserved_block , 0 , 0 , 32,
19419 0xfc0003ff, 0xa0000330, 0 , 0,
19420 CP1_ }, /* ADD.fmt1~*(1) */
19421 };
19422
19423
19424 static const Pool SUB_fmt1[2] = {
19425 { instruction , 0 , 0 , 32,
19426 0xfc0003ff, 0xa0000170, &SUB_D , 0,
19427 CP1_ }, /* SUB.D */
19428 { reserved_block , 0 , 0 , 32,
19429 0xfc0003ff, 0xa0000370, 0 , 0,
19430 CP1_ }, /* SUB.fmt1~*(1) */
19431 };
19432
19433
19434 static const Pool MUL_fmt1[2] = {
19435 { instruction , 0 , 0 , 32,
19436 0xfc0003ff, 0xa00001b0, &MUL_D , 0,
19437 CP1_ }, /* MUL.D */
19438 { reserved_block , 0 , 0 , 32,
19439 0xfc0003ff, 0xa00003b0, 0 , 0,
19440 CP1_ }, /* MUL.fmt1~*(1) */
19441 };
19442
19443
19444 static const Pool MADDF_fmt[2] = {
19445 { instruction , 0 , 0 , 32,
19446 0xfc0003ff, 0xa00001b8, &MADDF_S , 0,
19447 CP1_ }, /* MADDF.S */
19448 { instruction , 0 , 0 , 32,
19449 0xfc0003ff, 0xa00003b8, &MADDF_D , 0,
19450 CP1_ }, /* MADDF.D */
19451 };
19452
19453
19454 static const Pool DIV_fmt1[2] = {
19455 { instruction , 0 , 0 , 32,
19456 0xfc0003ff, 0xa00001f0, &DIV_D , 0,
19457 CP1_ }, /* DIV.D */
19458 { reserved_block , 0 , 0 , 32,
19459 0xfc0003ff, 0xa00003f0, 0 , 0,
19460 CP1_ }, /* DIV.fmt1~*(1) */
19461 };
19462
19463
19464 static const Pool MSUBF_fmt[2] = {
19465 { instruction , 0 , 0 , 32,
19466 0xfc0003ff, 0xa00001f8, &MSUBF_S , 0,
19467 CP1_ }, /* MSUBF.S */
19468 { instruction , 0 , 0 , 32,
19469 0xfc0003ff, 0xa00003f8, &MSUBF_D , 0,
19470 CP1_ }, /* MSUBF.D */
19471 };
19472
19473
19474 static const Pool POOL32F_0[64] = {
19475 { reserved_block , 0 , 0 , 32,
19476 0xfc0001ff, 0xa0000000, 0 , 0,
19477 CP1_ }, /* POOL32F_0~*(0) */
19478 { reserved_block , 0 , 0 , 32,
19479 0xfc0001ff, 0xa0000008, 0 , 0,
19480 CP1_ }, /* POOL32F_0~*(1) */
19481 { reserved_block , 0 , 0 , 32,
19482 0xfc0001ff, 0xa0000010, 0 , 0,
19483 CP1_ }, /* POOL32F_0~*(2) */
19484 { reserved_block , 0 , 0 , 32,
19485 0xfc0001ff, 0xa0000018, 0 , 0,
19486 CP1_ }, /* POOL32F_0~*(3) */
19487 { pool , RINT_fmt , 2 , 32,
19488 0xfc0001ff, 0xa0000020, 0 , 0,
19489 CP1_ }, /* RINT.fmt */
19490 { reserved_block , 0 , 0 , 32,
19491 0xfc0001ff, 0xa0000028, 0 , 0,
19492 CP1_ }, /* POOL32F_0~*(5) */
19493 { pool , ADD_fmt0 , 2 , 32,
19494 0xfc0001ff, 0xa0000030, 0 , 0,
19495 CP1_ }, /* ADD.fmt0 */
19496 { pool , SELEQZ_fmt , 2 , 32,
19497 0xfc0001ff, 0xa0000038, 0 , 0,
19498 CP1_ }, /* SELEQZ.fmt */
19499 { reserved_block , 0 , 0 , 32,
19500 0xfc0001ff, 0xa0000040, 0 , 0,
19501 CP1_ }, /* POOL32F_0~*(8) */
19502 { reserved_block , 0 , 0 , 32,
19503 0xfc0001ff, 0xa0000048, 0 , 0,
19504 CP1_ }, /* POOL32F_0~*(9) */
19505 { reserved_block , 0 , 0 , 32,
19506 0xfc0001ff, 0xa0000050, 0 , 0,
19507 CP1_ }, /* POOL32F_0~*(10) */
19508 { reserved_block , 0 , 0 , 32,
19509 0xfc0001ff, 0xa0000058, 0 , 0,
19510 CP1_ }, /* POOL32F_0~*(11) */
19511 { pool , CLASS_fmt , 2 , 32,
19512 0xfc0001ff, 0xa0000060, 0 , 0,
19513 CP1_ }, /* CLASS.fmt */
19514 { reserved_block , 0 , 0 , 32,
19515 0xfc0001ff, 0xa0000068, 0 , 0,
19516 CP1_ }, /* POOL32F_0~*(13) */
19517 { pool , SUB_fmt0 , 2 , 32,
19518 0xfc0001ff, 0xa0000070, 0 , 0,
19519 CP1_ }, /* SUB.fmt0 */
19520 { pool , SELNEZ_fmt , 2 , 32,
19521 0xfc0001ff, 0xa0000078, 0 , 0,
19522 CP1_ }, /* SELNEZ.fmt */
19523 { reserved_block , 0 , 0 , 32,
19524 0xfc0001ff, 0xa0000080, 0 , 0,
19525 CP1_ }, /* POOL32F_0~*(16) */
19526 { reserved_block , 0 , 0 , 32,
19527 0xfc0001ff, 0xa0000088, 0 , 0,
19528 CP1_ }, /* POOL32F_0~*(17) */
19529 { reserved_block , 0 , 0 , 32,
19530 0xfc0001ff, 0xa0000090, 0 , 0,
19531 CP1_ }, /* POOL32F_0~*(18) */
19532 { reserved_block , 0 , 0 , 32,
19533 0xfc0001ff, 0xa0000098, 0 , 0,
19534 CP1_ }, /* POOL32F_0~*(19) */
19535 { reserved_block , 0 , 0 , 32,
19536 0xfc0001ff, 0xa00000a0, 0 , 0,
19537 CP1_ }, /* POOL32F_0~*(20) */
19538 { reserved_block , 0 , 0 , 32,
19539 0xfc0001ff, 0xa00000a8, 0 , 0,
19540 CP1_ }, /* POOL32F_0~*(21) */
19541 { pool , MUL_fmt0 , 2 , 32,
19542 0xfc0001ff, 0xa00000b0, 0 , 0,
19543 CP1_ }, /* MUL.fmt0 */
19544 { pool , SEL_fmt , 2 , 32,
19545 0xfc0001ff, 0xa00000b8, 0 , 0,
19546 CP1_ }, /* SEL.fmt */
19547 { reserved_block , 0 , 0 , 32,
19548 0xfc0001ff, 0xa00000c0, 0 , 0,
19549 CP1_ }, /* POOL32F_0~*(24) */
19550 { reserved_block , 0 , 0 , 32,
19551 0xfc0001ff, 0xa00000c8, 0 , 0,
19552 CP1_ }, /* POOL32F_0~*(25) */
19553 { reserved_block , 0 , 0 , 32,
19554 0xfc0001ff, 0xa00000d0, 0 , 0,
19555 CP1_ }, /* POOL32F_0~*(26) */
19556 { reserved_block , 0 , 0 , 32,
19557 0xfc0001ff, 0xa00000d8, 0 , 0,
19558 CP1_ }, /* POOL32F_0~*(27) */
19559 { reserved_block , 0 , 0 , 32,
19560 0xfc0001ff, 0xa00000e0, 0 , 0,
19561 CP1_ }, /* POOL32F_0~*(28) */
19562 { reserved_block , 0 , 0 , 32,
19563 0xfc0001ff, 0xa00000e8, 0 , 0,
19564 CP1_ }, /* POOL32F_0~*(29) */
19565 { pool , DIV_fmt0 , 2 , 32,
19566 0xfc0001ff, 0xa00000f0, 0 , 0,
19567 CP1_ }, /* DIV.fmt0 */
19568 { reserved_block , 0 , 0 , 32,
19569 0xfc0001ff, 0xa00000f8, 0 , 0,
19570 CP1_ }, /* POOL32F_0~*(31) */
19571 { reserved_block , 0 , 0 , 32,
19572 0xfc0001ff, 0xa0000100, 0 , 0,
19573 CP1_ }, /* POOL32F_0~*(32) */
19574 { reserved_block , 0 , 0 , 32,
19575 0xfc0001ff, 0xa0000108, 0 , 0,
19576 CP1_ }, /* POOL32F_0~*(33) */
19577 { reserved_block , 0 , 0 , 32,
19578 0xfc0001ff, 0xa0000110, 0 , 0,
19579 CP1_ }, /* POOL32F_0~*(34) */
19580 { reserved_block , 0 , 0 , 32,
19581 0xfc0001ff, 0xa0000118, 0 , 0,
19582 CP1_ }, /* POOL32F_0~*(35) */
19583 { reserved_block , 0 , 0 , 32,
19584 0xfc0001ff, 0xa0000120, 0 , 0,
19585 CP1_ }, /* POOL32F_0~*(36) */
19586 { reserved_block , 0 , 0 , 32,
19587 0xfc0001ff, 0xa0000128, 0 , 0,
19588 CP1_ }, /* POOL32F_0~*(37) */
19589 { pool , ADD_fmt1 , 2 , 32,
19590 0xfc0001ff, 0xa0000130, 0 , 0,
19591 CP1_ }, /* ADD.fmt1 */
19592 { reserved_block , 0 , 0 , 32,
19593 0xfc0001ff, 0xa0000138, 0 , 0,
19594 CP1_ }, /* POOL32F_0~*(39) */
19595 { reserved_block , 0 , 0 , 32,
19596 0xfc0001ff, 0xa0000140, 0 , 0,
19597 CP1_ }, /* POOL32F_0~*(40) */
19598 { reserved_block , 0 , 0 , 32,
19599 0xfc0001ff, 0xa0000148, 0 , 0,
19600 CP1_ }, /* POOL32F_0~*(41) */
19601 { reserved_block , 0 , 0 , 32,
19602 0xfc0001ff, 0xa0000150, 0 , 0,
19603 CP1_ }, /* POOL32F_0~*(42) */
19604 { reserved_block , 0 , 0 , 32,
19605 0xfc0001ff, 0xa0000158, 0 , 0,
19606 CP1_ }, /* POOL32F_0~*(43) */
19607 { reserved_block , 0 , 0 , 32,
19608 0xfc0001ff, 0xa0000160, 0 , 0,
19609 CP1_ }, /* POOL32F_0~*(44) */
19610 { reserved_block , 0 , 0 , 32,
19611 0xfc0001ff, 0xa0000168, 0 , 0,
19612 CP1_ }, /* POOL32F_0~*(45) */
19613 { pool , SUB_fmt1 , 2 , 32,
19614 0xfc0001ff, 0xa0000170, 0 , 0,
19615 CP1_ }, /* SUB.fmt1 */
19616 { reserved_block , 0 , 0 , 32,
19617 0xfc0001ff, 0xa0000178, 0 , 0,
19618 CP1_ }, /* POOL32F_0~*(47) */
19619 { reserved_block , 0 , 0 , 32,
19620 0xfc0001ff, 0xa0000180, 0 , 0,
19621 CP1_ }, /* POOL32F_0~*(48) */
19622 { reserved_block , 0 , 0 , 32,
19623 0xfc0001ff, 0xa0000188, 0 , 0,
19624 CP1_ }, /* POOL32F_0~*(49) */
19625 { reserved_block , 0 , 0 , 32,
19626 0xfc0001ff, 0xa0000190, 0 , 0,
19627 CP1_ }, /* POOL32F_0~*(50) */
19628 { reserved_block , 0 , 0 , 32,
19629 0xfc0001ff, 0xa0000198, 0 , 0,
19630 CP1_ }, /* POOL32F_0~*(51) */
19631 { reserved_block , 0 , 0 , 32,
19632 0xfc0001ff, 0xa00001a0, 0 , 0,
19633 CP1_ }, /* POOL32F_0~*(52) */
19634 { reserved_block , 0 , 0 , 32,
19635 0xfc0001ff, 0xa00001a8, 0 , 0,
19636 CP1_ }, /* POOL32F_0~*(53) */
19637 { pool , MUL_fmt1 , 2 , 32,
19638 0xfc0001ff, 0xa00001b0, 0 , 0,
19639 CP1_ }, /* MUL.fmt1 */
19640 { pool , MADDF_fmt , 2 , 32,
19641 0xfc0001ff, 0xa00001b8, 0 , 0,
19642 CP1_ }, /* MADDF.fmt */
19643 { reserved_block , 0 , 0 , 32,
19644 0xfc0001ff, 0xa00001c0, 0 , 0,
19645 CP1_ }, /* POOL32F_0~*(56) */
19646 { reserved_block , 0 , 0 , 32,
19647 0xfc0001ff, 0xa00001c8, 0 , 0,
19648 CP1_ }, /* POOL32F_0~*(57) */
19649 { reserved_block , 0 , 0 , 32,
19650 0xfc0001ff, 0xa00001d0, 0 , 0,
19651 CP1_ }, /* POOL32F_0~*(58) */
19652 { reserved_block , 0 , 0 , 32,
19653 0xfc0001ff, 0xa00001d8, 0 , 0,
19654 CP1_ }, /* POOL32F_0~*(59) */
19655 { reserved_block , 0 , 0 , 32,
19656 0xfc0001ff, 0xa00001e0, 0 , 0,
19657 CP1_ }, /* POOL32F_0~*(60) */
19658 { reserved_block , 0 , 0 , 32,
19659 0xfc0001ff, 0xa00001e8, 0 , 0,
19660 CP1_ }, /* POOL32F_0~*(61) */
19661 { pool , DIV_fmt1 , 2 , 32,
19662 0xfc0001ff, 0xa00001f0, 0 , 0,
19663 CP1_ }, /* DIV.fmt1 */
19664 { pool , MSUBF_fmt , 2 , 32,
19665 0xfc0001ff, 0xa00001f8, 0 , 0,
19666 CP1_ }, /* MSUBF.fmt */
19667 };
19668
19669
19670 static const Pool MIN_fmt[2] = {
19671 { instruction , 0 , 0 , 32,
19672 0xfc00023f, 0xa0000003, &MIN_S , 0,
19673 CP1_ }, /* MIN.S */
19674 { instruction , 0 , 0 , 32,
19675 0xfc00023f, 0xa0000203, &MIN_D , 0,
19676 CP1_ }, /* MIN.D */
19677 };
19678
19679
19680 static const Pool MAX_fmt[2] = {
19681 { instruction , 0 , 0 , 32,
19682 0xfc00023f, 0xa000000b, &MAX_S , 0,
19683 CP1_ }, /* MAX.S */
19684 { instruction , 0 , 0 , 32,
19685 0xfc00023f, 0xa000020b, &MAX_D , 0,
19686 CP1_ }, /* MAX.D */
19687 };
19688
19689
19690 static const Pool MINA_fmt[2] = {
19691 { instruction , 0 , 0 , 32,
19692 0xfc00023f, 0xa0000023, &MINA_S , 0,
19693 CP1_ }, /* MINA.S */
19694 { instruction , 0 , 0 , 32,
19695 0xfc00023f, 0xa0000223, &MINA_D , 0,
19696 CP1_ }, /* MINA.D */
19697 };
19698
19699
19700 static const Pool MAXA_fmt[2] = {
19701 { instruction , 0 , 0 , 32,
19702 0xfc00023f, 0xa000002b, &MAXA_S , 0,
19703 CP1_ }, /* MAXA.S */
19704 { instruction , 0 , 0 , 32,
19705 0xfc00023f, 0xa000022b, &MAXA_D , 0,
19706 CP1_ }, /* MAXA.D */
19707 };
19708
19709
19710 static const Pool CVT_L_fmt[2] = {
19711 { instruction , 0 , 0 , 32,
19712 0xfc007fff, 0xa000013b, &CVT_L_S , 0,
19713 CP1_ }, /* CVT.L.S */
19714 { instruction , 0 , 0 , 32,
19715 0xfc007fff, 0xa000413b, &CVT_L_D , 0,
19716 CP1_ }, /* CVT.L.D */
19717 };
19718
19719
19720 static const Pool RSQRT_fmt[2] = {
19721 { instruction , 0 , 0 , 32,
19722 0xfc007fff, 0xa000023b, &RSQRT_S , 0,
19723 CP1_ }, /* RSQRT.S */
19724 { instruction , 0 , 0 , 32,
19725 0xfc007fff, 0xa000423b, &RSQRT_D , 0,
19726 CP1_ }, /* RSQRT.D */
19727 };
19728
19729
19730 static const Pool FLOOR_L_fmt[2] = {
19731 { instruction , 0 , 0 , 32,
19732 0xfc007fff, 0xa000033b, &FLOOR_L_S , 0,
19733 CP1_ }, /* FLOOR.L.S */
19734 { instruction , 0 , 0 , 32,
19735 0xfc007fff, 0xa000433b, &FLOOR_L_D , 0,
19736 CP1_ }, /* FLOOR.L.D */
19737 };
19738
19739
19740 static const Pool CVT_W_fmt[2] = {
19741 { instruction , 0 , 0 , 32,
19742 0xfc007fff, 0xa000093b, &CVT_W_S , 0,
19743 CP1_ }, /* CVT.W.S */
19744 { instruction , 0 , 0 , 32,
19745 0xfc007fff, 0xa000493b, &CVT_W_D , 0,
19746 CP1_ }, /* CVT.W.D */
19747 };
19748
19749
19750 static const Pool SQRT_fmt[2] = {
19751 { instruction , 0 , 0 , 32,
19752 0xfc007fff, 0xa0000a3b, &SQRT_S , 0,
19753 CP1_ }, /* SQRT.S */
19754 { instruction , 0 , 0 , 32,
19755 0xfc007fff, 0xa0004a3b, &SQRT_D , 0,
19756 CP1_ }, /* SQRT.D */
19757 };
19758
19759
19760 static const Pool FLOOR_W_fmt[2] = {
19761 { instruction , 0 , 0 , 32,
19762 0xfc007fff, 0xa0000b3b, &FLOOR_W_S , 0,
19763 CP1_ }, /* FLOOR.W.S */
19764 { instruction , 0 , 0 , 32,
19765 0xfc007fff, 0xa0004b3b, &FLOOR_W_D , 0,
19766 CP1_ }, /* FLOOR.W.D */
19767 };
19768
19769
19770 static const Pool RECIP_fmt[2] = {
19771 { instruction , 0 , 0 , 32,
19772 0xfc007fff, 0xa000123b, &RECIP_S , 0,
19773 CP1_ }, /* RECIP.S */
19774 { instruction , 0 , 0 , 32,
19775 0xfc007fff, 0xa000523b, &RECIP_D , 0,
19776 CP1_ }, /* RECIP.D */
19777 };
19778
19779
19780 static const Pool CEIL_L_fmt[2] = {
19781 { instruction , 0 , 0 , 32,
19782 0xfc007fff, 0xa000133b, &CEIL_L_S , 0,
19783 CP1_ }, /* CEIL.L.S */
19784 { instruction , 0 , 0 , 32,
19785 0xfc007fff, 0xa000533b, &CEIL_L_D , 0,
19786 CP1_ }, /* CEIL.L.D */
19787 };
19788
19789
19790 static const Pool CEIL_W_fmt[2] = {
19791 { instruction , 0 , 0 , 32,
19792 0xfc007fff, 0xa0001b3b, &CEIL_W_S , 0,
19793 CP1_ }, /* CEIL.W.S */
19794 { instruction , 0 , 0 , 32,
19795 0xfc007fff, 0xa0005b3b, &CEIL_W_D , 0,
19796 CP1_ }, /* CEIL.W.D */
19797 };
19798
19799
19800 static const Pool TRUNC_L_fmt[2] = {
19801 { instruction , 0 , 0 , 32,
19802 0xfc007fff, 0xa000233b, &TRUNC_L_S , 0,
19803 CP1_ }, /* TRUNC.L.S */
19804 { instruction , 0 , 0 , 32,
19805 0xfc007fff, 0xa000633b, &TRUNC_L_D , 0,
19806 CP1_ }, /* TRUNC.L.D */
19807 };
19808
19809
19810 static const Pool TRUNC_W_fmt[2] = {
19811 { instruction , 0 , 0 , 32,
19812 0xfc007fff, 0xa0002b3b, &TRUNC_W_S , 0,
19813 CP1_ }, /* TRUNC.W.S */
19814 { instruction , 0 , 0 , 32,
19815 0xfc007fff, 0xa0006b3b, &TRUNC_W_D , 0,
19816 CP1_ }, /* TRUNC.W.D */
19817 };
19818
19819
19820 static const Pool ROUND_L_fmt[2] = {
19821 { instruction , 0 , 0 , 32,
19822 0xfc007fff, 0xa000333b, &ROUND_L_S , 0,
19823 CP1_ }, /* ROUND.L.S */
19824 { instruction , 0 , 0 , 32,
19825 0xfc007fff, 0xa000733b, &ROUND_L_D , 0,
19826 CP1_ }, /* ROUND.L.D */
19827 };
19828
19829
19830 static const Pool ROUND_W_fmt[2] = {
19831 { instruction , 0 , 0 , 32,
19832 0xfc007fff, 0xa0003b3b, &ROUND_W_S , 0,
19833 CP1_ }, /* ROUND.W.S */
19834 { instruction , 0 , 0 , 32,
19835 0xfc007fff, 0xa0007b3b, &ROUND_W_D , 0,
19836 CP1_ }, /* ROUND.W.D */
19837 };
19838
19839
19840 static const Pool POOL32Fxf_0[64] = {
19841 { reserved_block , 0 , 0 , 32,
19842 0xfc003fff, 0xa000003b, 0 , 0,
19843 CP1_ }, /* POOL32Fxf_0~*(0) */
19844 { pool , CVT_L_fmt , 2 , 32,
19845 0xfc003fff, 0xa000013b, 0 , 0,
19846 CP1_ }, /* CVT.L.fmt */
19847 { pool , RSQRT_fmt , 2 , 32,
19848 0xfc003fff, 0xa000023b, 0 , 0,
19849 CP1_ }, /* RSQRT.fmt */
19850 { pool , FLOOR_L_fmt , 2 , 32,
19851 0xfc003fff, 0xa000033b, 0 , 0,
19852 CP1_ }, /* FLOOR.L.fmt */
19853 { reserved_block , 0 , 0 , 32,
19854 0xfc003fff, 0xa000043b, 0 , 0,
19855 CP1_ }, /* POOL32Fxf_0~*(4) */
19856 { reserved_block , 0 , 0 , 32,
19857 0xfc003fff, 0xa000053b, 0 , 0,
19858 CP1_ }, /* POOL32Fxf_0~*(5) */
19859 { reserved_block , 0 , 0 , 32,
19860 0xfc003fff, 0xa000063b, 0 , 0,
19861 CP1_ }, /* POOL32Fxf_0~*(6) */
19862 { reserved_block , 0 , 0 , 32,
19863 0xfc003fff, 0xa000073b, 0 , 0,
19864 CP1_ }, /* POOL32Fxf_0~*(7) */
19865 { reserved_block , 0 , 0 , 32,
19866 0xfc003fff, 0xa000083b, 0 , 0,
19867 CP1_ }, /* POOL32Fxf_0~*(8) */
19868 { pool , CVT_W_fmt , 2 , 32,
19869 0xfc003fff, 0xa000093b, 0 , 0,
19870 CP1_ }, /* CVT.W.fmt */
19871 { pool , SQRT_fmt , 2 , 32,
19872 0xfc003fff, 0xa0000a3b, 0 , 0,
19873 CP1_ }, /* SQRT.fmt */
19874 { pool , FLOOR_W_fmt , 2 , 32,
19875 0xfc003fff, 0xa0000b3b, 0 , 0,
19876 CP1_ }, /* FLOOR.W.fmt */
19877 { reserved_block , 0 , 0 , 32,
19878 0xfc003fff, 0xa0000c3b, 0 , 0,
19879 CP1_ }, /* POOL32Fxf_0~*(12) */
19880 { reserved_block , 0 , 0 , 32,
19881 0xfc003fff, 0xa0000d3b, 0 , 0,
19882 CP1_ }, /* POOL32Fxf_0~*(13) */
19883 { reserved_block , 0 , 0 , 32,
19884 0xfc003fff, 0xa0000e3b, 0 , 0,
19885 CP1_ }, /* POOL32Fxf_0~*(14) */
19886 { reserved_block , 0 , 0 , 32,
19887 0xfc003fff, 0xa0000f3b, 0 , 0,
19888 CP1_ }, /* POOL32Fxf_0~*(15) */
19889 { instruction , 0 , 0 , 32,
19890 0xfc003fff, 0xa000103b, &CFC1 , 0,
19891 CP1_ }, /* CFC1 */
19892 { reserved_block , 0 , 0 , 32,
19893 0xfc003fff, 0xa000113b, 0 , 0,
19894 CP1_ }, /* POOL32Fxf_0~*(17) */
19895 { pool , RECIP_fmt , 2 , 32,
19896 0xfc003fff, 0xa000123b, 0 , 0,
19897 CP1_ }, /* RECIP.fmt */
19898 { pool , CEIL_L_fmt , 2 , 32,
19899 0xfc003fff, 0xa000133b, 0 , 0,
19900 CP1_ }, /* CEIL.L.fmt */
19901 { reserved_block , 0 , 0 , 32,
19902 0xfc003fff, 0xa000143b, 0 , 0,
19903 CP1_ }, /* POOL32Fxf_0~*(20) */
19904 { reserved_block , 0 , 0 , 32,
19905 0xfc003fff, 0xa000153b, 0 , 0,
19906 CP1_ }, /* POOL32Fxf_0~*(21) */
19907 { reserved_block , 0 , 0 , 32,
19908 0xfc003fff, 0xa000163b, 0 , 0,
19909 CP1_ }, /* POOL32Fxf_0~*(22) */
19910 { reserved_block , 0 , 0 , 32,
19911 0xfc003fff, 0xa000173b, 0 , 0,
19912 CP1_ }, /* POOL32Fxf_0~*(23) */
19913 { instruction , 0 , 0 , 32,
19914 0xfc003fff, 0xa000183b, &CTC1 , 0,
19915 CP1_ }, /* CTC1 */
19916 { reserved_block , 0 , 0 , 32,
19917 0xfc003fff, 0xa000193b, 0 , 0,
19918 CP1_ }, /* POOL32Fxf_0~*(25) */
19919 { reserved_block , 0 , 0 , 32,
19920 0xfc003fff, 0xa0001a3b, 0 , 0,
19921 CP1_ }, /* POOL32Fxf_0~*(26) */
19922 { pool , CEIL_W_fmt , 2 , 32,
19923 0xfc003fff, 0xa0001b3b, 0 , 0,
19924 CP1_ }, /* CEIL.W.fmt */
19925 { reserved_block , 0 , 0 , 32,
19926 0xfc003fff, 0xa0001c3b, 0 , 0,
19927 CP1_ }, /* POOL32Fxf_0~*(28) */
19928 { reserved_block , 0 , 0 , 32,
19929 0xfc003fff, 0xa0001d3b, 0 , 0,
19930 CP1_ }, /* POOL32Fxf_0~*(29) */
19931 { reserved_block , 0 , 0 , 32,
19932 0xfc003fff, 0xa0001e3b, 0 , 0,
19933 CP1_ }, /* POOL32Fxf_0~*(30) */
19934 { reserved_block , 0 , 0 , 32,
19935 0xfc003fff, 0xa0001f3b, 0 , 0,
19936 CP1_ }, /* POOL32Fxf_0~*(31) */
19937 { instruction , 0 , 0 , 32,
19938 0xfc003fff, 0xa000203b, &MFC1 , 0,
19939 CP1_ }, /* MFC1 */
19940 { instruction , 0 , 0 , 32,
19941 0xfc003fff, 0xa000213b, &CVT_S_PL , 0,
19942 CP1_ }, /* CVT.S.PL */
19943 { reserved_block , 0 , 0 , 32,
19944 0xfc003fff, 0xa000223b, 0 , 0,
19945 CP1_ }, /* POOL32Fxf_0~*(34) */
19946 { pool , TRUNC_L_fmt , 2 , 32,
19947 0xfc003fff, 0xa000233b, 0 , 0,
19948 CP1_ }, /* TRUNC.L.fmt */
19949 { instruction , 0 , 0 , 32,
19950 0xfc003fff, 0xa000243b, &DMFC1 , 0,
19951 CP1_ | MIPS64_ }, /* DMFC1 */
19952 { reserved_block , 0 , 0 , 32,
19953 0xfc003fff, 0xa000253b, 0 , 0,
19954 CP1_ }, /* POOL32Fxf_0~*(37) */
19955 { reserved_block , 0 , 0 , 32,
19956 0xfc003fff, 0xa000263b, 0 , 0,
19957 CP1_ }, /* POOL32Fxf_0~*(38) */
19958 { reserved_block , 0 , 0 , 32,
19959 0xfc003fff, 0xa000273b, 0 , 0,
19960 CP1_ }, /* POOL32Fxf_0~*(39) */
19961 { instruction , 0 , 0 , 32,
19962 0xfc003fff, 0xa000283b, &MTC1 , 0,
19963 CP1_ }, /* MTC1 */
19964 { instruction , 0 , 0 , 32,
19965 0xfc003fff, 0xa000293b, &CVT_S_PU , 0,
19966 CP1_ }, /* CVT.S.PU */
19967 { reserved_block , 0 , 0 , 32,
19968 0xfc003fff, 0xa0002a3b, 0 , 0,
19969 CP1_ }, /* POOL32Fxf_0~*(42) */
19970 { pool , TRUNC_W_fmt , 2 , 32,
19971 0xfc003fff, 0xa0002b3b, 0 , 0,
19972 CP1_ }, /* TRUNC.W.fmt */
19973 { instruction , 0 , 0 , 32,
19974 0xfc003fff, 0xa0002c3b, &DMTC1 , 0,
19975 CP1_ | MIPS64_ }, /* DMTC1 */
19976 { reserved_block , 0 , 0 , 32,
19977 0xfc003fff, 0xa0002d3b, 0 , 0,
19978 CP1_ }, /* POOL32Fxf_0~*(45) */
19979 { reserved_block , 0 , 0 , 32,
19980 0xfc003fff, 0xa0002e3b, 0 , 0,
19981 CP1_ }, /* POOL32Fxf_0~*(46) */
19982 { reserved_block , 0 , 0 , 32,
19983 0xfc003fff, 0xa0002f3b, 0 , 0,
19984 CP1_ }, /* POOL32Fxf_0~*(47) */
19985 { instruction , 0 , 0 , 32,
19986 0xfc003fff, 0xa000303b, &MFHC1 , 0,
19987 CP1_ }, /* MFHC1 */
19988 { reserved_block , 0 , 0 , 32,
19989 0xfc003fff, 0xa000313b, 0 , 0,
19990 CP1_ }, /* POOL32Fxf_0~*(49) */
19991 { reserved_block , 0 , 0 , 32,
19992 0xfc003fff, 0xa000323b, 0 , 0,
19993 CP1_ }, /* POOL32Fxf_0~*(50) */
19994 { pool , ROUND_L_fmt , 2 , 32,
19995 0xfc003fff, 0xa000333b, 0 , 0,
19996 CP1_ }, /* ROUND.L.fmt */
19997 { reserved_block , 0 , 0 , 32,
19998 0xfc003fff, 0xa000343b, 0 , 0,
19999 CP1_ }, /* POOL32Fxf_0~*(52) */
20000 { reserved_block , 0 , 0 , 32,
20001 0xfc003fff, 0xa000353b, 0 , 0,
20002 CP1_ }, /* POOL32Fxf_0~*(53) */
20003 { reserved_block , 0 , 0 , 32,
20004 0xfc003fff, 0xa000363b, 0 , 0,
20005 CP1_ }, /* POOL32Fxf_0~*(54) */
20006 { reserved_block , 0 , 0 , 32,
20007 0xfc003fff, 0xa000373b, 0 , 0,
20008 CP1_ }, /* POOL32Fxf_0~*(55) */
20009 { instruction , 0 , 0 , 32,
20010 0xfc003fff, 0xa000383b, &MTHC1 , 0,
20011 CP1_ }, /* MTHC1 */
20012 { reserved_block , 0 , 0 , 32,
20013 0xfc003fff, 0xa000393b, 0 , 0,
20014 CP1_ }, /* POOL32Fxf_0~*(57) */
20015 { reserved_block , 0 , 0 , 32,
20016 0xfc003fff, 0xa0003a3b, 0 , 0,
20017 CP1_ }, /* POOL32Fxf_0~*(58) */
20018 { pool , ROUND_W_fmt , 2 , 32,
20019 0xfc003fff, 0xa0003b3b, 0 , 0,
20020 CP1_ }, /* ROUND.W.fmt */
20021 { reserved_block , 0 , 0 , 32,
20022 0xfc003fff, 0xa0003c3b, 0 , 0,
20023 CP1_ }, /* POOL32Fxf_0~*(60) */
20024 { reserved_block , 0 , 0 , 32,
20025 0xfc003fff, 0xa0003d3b, 0 , 0,
20026 CP1_ }, /* POOL32Fxf_0~*(61) */
20027 { reserved_block , 0 , 0 , 32,
20028 0xfc003fff, 0xa0003e3b, 0 , 0,
20029 CP1_ }, /* POOL32Fxf_0~*(62) */
20030 { reserved_block , 0 , 0 , 32,
20031 0xfc003fff, 0xa0003f3b, 0 , 0,
20032 CP1_ }, /* POOL32Fxf_0~*(63) */
20033 };
20034
20035
20036 static const Pool MOV_fmt[4] = {
20037 { instruction , 0 , 0 , 32,
20038 0xfc007fff, 0xa000007b, &MOV_S , 0,
20039 CP1_ }, /* MOV.S */
20040 { instruction , 0 , 0 , 32,
20041 0xfc007fff, 0xa000207b, &MOV_D , 0,
20042 CP1_ }, /* MOV.D */
20043 { reserved_block , 0 , 0 , 32,
20044 0xfc007fff, 0xa000407b, 0 , 0,
20045 CP1_ }, /* MOV.fmt~*(2) */
20046 { reserved_block , 0 , 0 , 32,
20047 0xfc007fff, 0xa000607b, 0 , 0,
20048 CP1_ }, /* MOV.fmt~*(3) */
20049 };
20050
20051
20052 static const Pool ABS_fmt[4] = {
20053 { instruction , 0 , 0 , 32,
20054 0xfc007fff, 0xa000037b, &ABS_S , 0,
20055 CP1_ }, /* ABS.S */
20056 { instruction , 0 , 0 , 32,
20057 0xfc007fff, 0xa000237b, &ABS_D , 0,
20058 CP1_ }, /* ABS.D */
20059 { reserved_block , 0 , 0 , 32,
20060 0xfc007fff, 0xa000437b, 0 , 0,
20061 CP1_ }, /* ABS.fmt~*(2) */
20062 { reserved_block , 0 , 0 , 32,
20063 0xfc007fff, 0xa000637b, 0 , 0,
20064 CP1_ }, /* ABS.fmt~*(3) */
20065 };
20066
20067
20068 static const Pool NEG_fmt[4] = {
20069 { instruction , 0 , 0 , 32,
20070 0xfc007fff, 0xa0000b7b, &NEG_S , 0,
20071 CP1_ }, /* NEG.S */
20072 { instruction , 0 , 0 , 32,
20073 0xfc007fff, 0xa0002b7b, &NEG_D , 0,
20074 CP1_ }, /* NEG.D */
20075 { reserved_block , 0 , 0 , 32,
20076 0xfc007fff, 0xa0004b7b, 0 , 0,
20077 CP1_ }, /* NEG.fmt~*(2) */
20078 { reserved_block , 0 , 0 , 32,
20079 0xfc007fff, 0xa0006b7b, 0 , 0,
20080 CP1_ }, /* NEG.fmt~*(3) */
20081 };
20082
20083
20084 static const Pool CVT_D_fmt[4] = {
20085 { instruction , 0 , 0 , 32,
20086 0xfc007fff, 0xa000137b, &CVT_D_S , 0,
20087 CP1_ }, /* CVT.D.S */
20088 { instruction , 0 , 0 , 32,
20089 0xfc007fff, 0xa000337b, &CVT_D_W , 0,
20090 CP1_ }, /* CVT.D.W */
20091 { instruction , 0 , 0 , 32,
20092 0xfc007fff, 0xa000537b, &CVT_D_L , 0,
20093 CP1_ }, /* CVT.D.L */
20094 { reserved_block , 0 , 0 , 32,
20095 0xfc007fff, 0xa000737b, 0 , 0,
20096 CP1_ }, /* CVT.D.fmt~*(3) */
20097 };
20098
20099
20100 static const Pool CVT_S_fmt[4] = {
20101 { instruction , 0 , 0 , 32,
20102 0xfc007fff, 0xa0001b7b, &CVT_S_D , 0,
20103 CP1_ }, /* CVT.S.D */
20104 { instruction , 0 , 0 , 32,
20105 0xfc007fff, 0xa0003b7b, &CVT_S_W , 0,
20106 CP1_ }, /* CVT.S.W */
20107 { instruction , 0 , 0 , 32,
20108 0xfc007fff, 0xa0005b7b, &CVT_S_L , 0,
20109 CP1_ }, /* CVT.S.L */
20110 { reserved_block , 0 , 0 , 32,
20111 0xfc007fff, 0xa0007b7b, 0 , 0,
20112 CP1_ }, /* CVT.S.fmt~*(3) */
20113 };
20114
20115
20116 static const Pool POOL32Fxf_1[32] = {
20117 { pool , MOV_fmt , 4 , 32,
20118 0xfc001fff, 0xa000007b, 0 , 0,
20119 CP1_ }, /* MOV.fmt */
20120 { reserved_block , 0 , 0 , 32,
20121 0xfc001fff, 0xa000017b, 0 , 0,
20122 CP1_ }, /* POOL32Fxf_1~*(1) */
20123 { reserved_block , 0 , 0 , 32,
20124 0xfc001fff, 0xa000027b, 0 , 0,
20125 CP1_ }, /* POOL32Fxf_1~*(2) */
20126 { pool , ABS_fmt , 4 , 32,
20127 0xfc001fff, 0xa000037b, 0 , 0,
20128 CP1_ }, /* ABS.fmt */
20129 { reserved_block , 0 , 0 , 32,
20130 0xfc001fff, 0xa000047b, 0 , 0,
20131 CP1_ }, /* POOL32Fxf_1~*(4) */
20132 { reserved_block , 0 , 0 , 32,
20133 0xfc001fff, 0xa000057b, 0 , 0,
20134 CP1_ }, /* POOL32Fxf_1~*(5) */
20135 { reserved_block , 0 , 0 , 32,
20136 0xfc001fff, 0xa000067b, 0 , 0,
20137 CP1_ }, /* POOL32Fxf_1~*(6) */
20138 { reserved_block , 0 , 0 , 32,
20139 0xfc001fff, 0xa000077b, 0 , 0,
20140 CP1_ }, /* POOL32Fxf_1~*(7) */
20141 { reserved_block , 0 , 0 , 32,
20142 0xfc001fff, 0xa000087b, 0 , 0,
20143 CP1_ }, /* POOL32Fxf_1~*(8) */
20144 { reserved_block , 0 , 0 , 32,
20145 0xfc001fff, 0xa000097b, 0 , 0,
20146 CP1_ }, /* POOL32Fxf_1~*(9) */
20147 { reserved_block , 0 , 0 , 32,
20148 0xfc001fff, 0xa0000a7b, 0 , 0,
20149 CP1_ }, /* POOL32Fxf_1~*(10) */
20150 { pool , NEG_fmt , 4 , 32,
20151 0xfc001fff, 0xa0000b7b, 0 , 0,
20152 CP1_ }, /* NEG.fmt */
20153 { reserved_block , 0 , 0 , 32,
20154 0xfc001fff, 0xa0000c7b, 0 , 0,
20155 CP1_ }, /* POOL32Fxf_1~*(12) */
20156 { reserved_block , 0 , 0 , 32,
20157 0xfc001fff, 0xa0000d7b, 0 , 0,
20158 CP1_ }, /* POOL32Fxf_1~*(13) */
20159 { reserved_block , 0 , 0 , 32,
20160 0xfc001fff, 0xa0000e7b, 0 , 0,
20161 CP1_ }, /* POOL32Fxf_1~*(14) */
20162 { reserved_block , 0 , 0 , 32,
20163 0xfc001fff, 0xa0000f7b, 0 , 0,
20164 CP1_ }, /* POOL32Fxf_1~*(15) */
20165 { reserved_block , 0 , 0 , 32,
20166 0xfc001fff, 0xa000107b, 0 , 0,
20167 CP1_ }, /* POOL32Fxf_1~*(16) */
20168 { reserved_block , 0 , 0 , 32,
20169 0xfc001fff, 0xa000117b, 0 , 0,
20170 CP1_ }, /* POOL32Fxf_1~*(17) */
20171 { reserved_block , 0 , 0 , 32,
20172 0xfc001fff, 0xa000127b, 0 , 0,
20173 CP1_ }, /* POOL32Fxf_1~*(18) */
20174 { pool , CVT_D_fmt , 4 , 32,
20175 0xfc001fff, 0xa000137b, 0 , 0,
20176 CP1_ }, /* CVT.D.fmt */
20177 { reserved_block , 0 , 0 , 32,
20178 0xfc001fff, 0xa000147b, 0 , 0,
20179 CP1_ }, /* POOL32Fxf_1~*(20) */
20180 { reserved_block , 0 , 0 , 32,
20181 0xfc001fff, 0xa000157b, 0 , 0,
20182 CP1_ }, /* POOL32Fxf_1~*(21) */
20183 { reserved_block , 0 , 0 , 32,
20184 0xfc001fff, 0xa000167b, 0 , 0,
20185 CP1_ }, /* POOL32Fxf_1~*(22) */
20186 { reserved_block , 0 , 0 , 32,
20187 0xfc001fff, 0xa000177b, 0 , 0,
20188 CP1_ }, /* POOL32Fxf_1~*(23) */
20189 { reserved_block , 0 , 0 , 32,
20190 0xfc001fff, 0xa000187b, 0 , 0,
20191 CP1_ }, /* POOL32Fxf_1~*(24) */
20192 { reserved_block , 0 , 0 , 32,
20193 0xfc001fff, 0xa000197b, 0 , 0,
20194 CP1_ }, /* POOL32Fxf_1~*(25) */
20195 { reserved_block , 0 , 0 , 32,
20196 0xfc001fff, 0xa0001a7b, 0 , 0,
20197 CP1_ }, /* POOL32Fxf_1~*(26) */
20198 { pool , CVT_S_fmt , 4 , 32,
20199 0xfc001fff, 0xa0001b7b, 0 , 0,
20200 CP1_ }, /* CVT.S.fmt */
20201 { reserved_block , 0 , 0 , 32,
20202 0xfc001fff, 0xa0001c7b, 0 , 0,
20203 CP1_ }, /* POOL32Fxf_1~*(28) */
20204 { reserved_block , 0 , 0 , 32,
20205 0xfc001fff, 0xa0001d7b, 0 , 0,
20206 CP1_ }, /* POOL32Fxf_1~*(29) */
20207 { reserved_block , 0 , 0 , 32,
20208 0xfc001fff, 0xa0001e7b, 0 , 0,
20209 CP1_ }, /* POOL32Fxf_1~*(30) */
20210 { reserved_block , 0 , 0 , 32,
20211 0xfc001fff, 0xa0001f7b, 0 , 0,
20212 CP1_ }, /* POOL32Fxf_1~*(31) */
20213 };
20214
20215
20216 static const Pool POOL32Fxf[4] = {
20217 { pool , POOL32Fxf_0 , 64 , 32,
20218 0xfc0000ff, 0xa000003b, 0 , 0,
20219 CP1_ }, /* POOL32Fxf_0 */
20220 { pool , POOL32Fxf_1 , 32 , 32,
20221 0xfc0000ff, 0xa000007b, 0 , 0,
20222 CP1_ }, /* POOL32Fxf_1 */
20223 { reserved_block , 0 , 0 , 32,
20224 0xfc0000ff, 0xa00000bb, 0 , 0,
20225 CP1_ }, /* POOL32Fxf~*(2) */
20226 { reserved_block , 0 , 0 , 32,
20227 0xfc0000ff, 0xa00000fb, 0 , 0,
20228 CP1_ }, /* POOL32Fxf~*(3) */
20229 };
20230
20231
20232 static const Pool POOL32F_3[8] = {
20233 { pool , MIN_fmt , 2 , 32,
20234 0xfc00003f, 0xa0000003, 0 , 0,
20235 CP1_ }, /* MIN.fmt */
20236 { pool , MAX_fmt , 2 , 32,
20237 0xfc00003f, 0xa000000b, 0 , 0,
20238 CP1_ }, /* MAX.fmt */
20239 { reserved_block , 0 , 0 , 32,
20240 0xfc00003f, 0xa0000013, 0 , 0,
20241 CP1_ }, /* POOL32F_3~*(2) */
20242 { reserved_block , 0 , 0 , 32,
20243 0xfc00003f, 0xa000001b, 0 , 0,
20244 CP1_ }, /* POOL32F_3~*(3) */
20245 { pool , MINA_fmt , 2 , 32,
20246 0xfc00003f, 0xa0000023, 0 , 0,
20247 CP1_ }, /* MINA.fmt */
20248 { pool , MAXA_fmt , 2 , 32,
20249 0xfc00003f, 0xa000002b, 0 , 0,
20250 CP1_ }, /* MAXA.fmt */
20251 { reserved_block , 0 , 0 , 32,
20252 0xfc00003f, 0xa0000033, 0 , 0,
20253 CP1_ }, /* POOL32F_3~*(6) */
20254 { pool , POOL32Fxf , 4 , 32,
20255 0xfc00003f, 0xa000003b, 0 , 0,
20256 CP1_ }, /* POOL32Fxf */
20257 };
20258
20259
20260 static const Pool CMP_condn_S[32] = {
20261 { instruction , 0 , 0 , 32,
20262 0xfc0007ff, 0xa0000005, &CMP_AF_S , 0,
20263 CP1_ }, /* CMP.AF.S */
20264 { instruction , 0 , 0 , 32,
20265 0xfc0007ff, 0xa0000045, &CMP_UN_S , 0,
20266 CP1_ }, /* CMP.UN.S */
20267 { instruction , 0 , 0 , 32,
20268 0xfc0007ff, 0xa0000085, &CMP_EQ_S , 0,
20269 CP1_ }, /* CMP.EQ.S */
20270 { instruction , 0 , 0 , 32,
20271 0xfc0007ff, 0xa00000c5, &CMP_UEQ_S , 0,
20272 CP1_ }, /* CMP.UEQ.S */
20273 { instruction , 0 , 0 , 32,
20274 0xfc0007ff, 0xa0000105, &CMP_LT_S , 0,
20275 CP1_ }, /* CMP.LT.S */
20276 { instruction , 0 , 0 , 32,
20277 0xfc0007ff, 0xa0000145, &CMP_ULT_S , 0,
20278 CP1_ }, /* CMP.ULT.S */
20279 { instruction , 0 , 0 , 32,
20280 0xfc0007ff, 0xa0000185, &CMP_LE_S , 0,
20281 CP1_ }, /* CMP.LE.S */
20282 { instruction , 0 , 0 , 32,
20283 0xfc0007ff, 0xa00001c5, &CMP_ULE_S , 0,
20284 CP1_ }, /* CMP.ULE.S */
20285 { instruction , 0 , 0 , 32,
20286 0xfc0007ff, 0xa0000205, &CMP_SAF_S , 0,
20287 CP1_ }, /* CMP.SAF.S */
20288 { instruction , 0 , 0 , 32,
20289 0xfc0007ff, 0xa0000245, &CMP_SUN_S , 0,
20290 CP1_ }, /* CMP.SUN.S */
20291 { instruction , 0 , 0 , 32,
20292 0xfc0007ff, 0xa0000285, &CMP_SEQ_S , 0,
20293 CP1_ }, /* CMP.SEQ.S */
20294 { instruction , 0 , 0 , 32,
20295 0xfc0007ff, 0xa00002c5, &CMP_SUEQ_S , 0,
20296 CP1_ }, /* CMP.SUEQ.S */
20297 { instruction , 0 , 0 , 32,
20298 0xfc0007ff, 0xa0000305, &CMP_SLT_S , 0,
20299 CP1_ }, /* CMP.SLT.S */
20300 { instruction , 0 , 0 , 32,
20301 0xfc0007ff, 0xa0000345, &CMP_SULT_S , 0,
20302 CP1_ }, /* CMP.SULT.S */
20303 { instruction , 0 , 0 , 32,
20304 0xfc0007ff, 0xa0000385, &CMP_SLE_S , 0,
20305 CP1_ }, /* CMP.SLE.S */
20306 { instruction , 0 , 0 , 32,
20307 0xfc0007ff, 0xa00003c5, &CMP_SULE_S , 0,
20308 CP1_ }, /* CMP.SULE.S */
20309 { reserved_block , 0 , 0 , 32,
20310 0xfc0007ff, 0xa0000405, 0 , 0,
20311 CP1_ }, /* CMP.condn.S~*(16) */
20312 { instruction , 0 , 0 , 32,
20313 0xfc0007ff, 0xa0000445, &CMP_OR_S , 0,
20314 CP1_ }, /* CMP.OR.S */
20315 { instruction , 0 , 0 , 32,
20316 0xfc0007ff, 0xa0000485, &CMP_UNE_S , 0,
20317 CP1_ }, /* CMP.UNE.S */
20318 { instruction , 0 , 0 , 32,
20319 0xfc0007ff, 0xa00004c5, &CMP_NE_S , 0,
20320 CP1_ }, /* CMP.NE.S */
20321 { reserved_block , 0 , 0 , 32,
20322 0xfc0007ff, 0xa0000505, 0 , 0,
20323 CP1_ }, /* CMP.condn.S~*(20) */
20324 { reserved_block , 0 , 0 , 32,
20325 0xfc0007ff, 0xa0000545, 0 , 0,
20326 CP1_ }, /* CMP.condn.S~*(21) */
20327 { reserved_block , 0 , 0 , 32,
20328 0xfc0007ff, 0xa0000585, 0 , 0,
20329 CP1_ }, /* CMP.condn.S~*(22) */
20330 { reserved_block , 0 , 0 , 32,
20331 0xfc0007ff, 0xa00005c5, 0 , 0,
20332 CP1_ }, /* CMP.condn.S~*(23) */
20333 { reserved_block , 0 , 0 , 32,
20334 0xfc0007ff, 0xa0000605, 0 , 0,
20335 CP1_ }, /* CMP.condn.S~*(24) */
20336 { instruction , 0 , 0 , 32,
20337 0xfc0007ff, 0xa0000645, &CMP_SOR_S , 0,
20338 CP1_ }, /* CMP.SOR.S */
20339 { instruction , 0 , 0 , 32,
20340 0xfc0007ff, 0xa0000685, &CMP_SUNE_S , 0,
20341 CP1_ }, /* CMP.SUNE.S */
20342 { instruction , 0 , 0 , 32,
20343 0xfc0007ff, 0xa00006c5, &CMP_SNE_S , 0,
20344 CP1_ }, /* CMP.SNE.S */
20345 { reserved_block , 0 , 0 , 32,
20346 0xfc0007ff, 0xa0000705, 0 , 0,
20347 CP1_ }, /* CMP.condn.S~*(28) */
20348 { reserved_block , 0 , 0 , 32,
20349 0xfc0007ff, 0xa0000745, 0 , 0,
20350 CP1_ }, /* CMP.condn.S~*(29) */
20351 { reserved_block , 0 , 0 , 32,
20352 0xfc0007ff, 0xa0000785, 0 , 0,
20353 CP1_ }, /* CMP.condn.S~*(30) */
20354 { reserved_block , 0 , 0 , 32,
20355 0xfc0007ff, 0xa00007c5, 0 , 0,
20356 CP1_ }, /* CMP.condn.S~*(31) */
20357 };
20358
20359
20360 static const Pool CMP_condn_D[32] = {
20361 { instruction , 0 , 0 , 32,
20362 0xfc0007ff, 0xa0000015, &CMP_AF_D , 0,
20363 CP1_ }, /* CMP.AF.D */
20364 { instruction , 0 , 0 , 32,
20365 0xfc0007ff, 0xa0000055, &CMP_UN_D , 0,
20366 CP1_ }, /* CMP.UN.D */
20367 { instruction , 0 , 0 , 32,
20368 0xfc0007ff, 0xa0000095, &CMP_EQ_D , 0,
20369 CP1_ }, /* CMP.EQ.D */
20370 { instruction , 0 , 0 , 32,
20371 0xfc0007ff, 0xa00000d5, &CMP_UEQ_D , 0,
20372 CP1_ }, /* CMP.UEQ.D */
20373 { instruction , 0 , 0 , 32,
20374 0xfc0007ff, 0xa0000115, &CMP_LT_D , 0,
20375 CP1_ }, /* CMP.LT.D */
20376 { instruction , 0 , 0 , 32,
20377 0xfc0007ff, 0xa0000155, &CMP_ULT_D , 0,
20378 CP1_ }, /* CMP.ULT.D */
20379 { instruction , 0 , 0 , 32,
20380 0xfc0007ff, 0xa0000195, &CMP_LE_D , 0,
20381 CP1_ }, /* CMP.LE.D */
20382 { instruction , 0 , 0 , 32,
20383 0xfc0007ff, 0xa00001d5, &CMP_ULE_D , 0,
20384 CP1_ }, /* CMP.ULE.D */
20385 { instruction , 0 , 0 , 32,
20386 0xfc0007ff, 0xa0000215, &CMP_SAF_D , 0,
20387 CP1_ }, /* CMP.SAF.D */
20388 { instruction , 0 , 0 , 32,
20389 0xfc0007ff, 0xa0000255, &CMP_SUN_D , 0,
20390 CP1_ }, /* CMP.SUN.D */
20391 { instruction , 0 , 0 , 32,
20392 0xfc0007ff, 0xa0000295, &CMP_SEQ_D , 0,
20393 CP1_ }, /* CMP.SEQ.D */
20394 { instruction , 0 , 0 , 32,
20395 0xfc0007ff, 0xa00002d5, &CMP_SUEQ_D , 0,
20396 CP1_ }, /* CMP.SUEQ.D */
20397 { instruction , 0 , 0 , 32,
20398 0xfc0007ff, 0xa0000315, &CMP_SLT_D , 0,
20399 CP1_ }, /* CMP.SLT.D */
20400 { instruction , 0 , 0 , 32,
20401 0xfc0007ff, 0xa0000355, &CMP_SULT_D , 0,
20402 CP1_ }, /* CMP.SULT.D */
20403 { instruction , 0 , 0 , 32,
20404 0xfc0007ff, 0xa0000395, &CMP_SLE_D , 0,
20405 CP1_ }, /* CMP.SLE.D */
20406 { instruction , 0 , 0 , 32,
20407 0xfc0007ff, 0xa00003d5, &CMP_SULE_D , 0,
20408 CP1_ }, /* CMP.SULE.D */
20409 { reserved_block , 0 , 0 , 32,
20410 0xfc0007ff, 0xa0000415, 0 , 0,
20411 CP1_ }, /* CMP.condn.D~*(16) */
20412 { instruction , 0 , 0 , 32,
20413 0xfc0007ff, 0xa0000455, &CMP_OR_D , 0,
20414 CP1_ }, /* CMP.OR.D */
20415 { instruction , 0 , 0 , 32,
20416 0xfc0007ff, 0xa0000495, &CMP_UNE_D , 0,
20417 CP1_ }, /* CMP.UNE.D */
20418 { instruction , 0 , 0 , 32,
20419 0xfc0007ff, 0xa00004d5, &CMP_NE_D , 0,
20420 CP1_ }, /* CMP.NE.D */
20421 { reserved_block , 0 , 0 , 32,
20422 0xfc0007ff, 0xa0000515, 0 , 0,
20423 CP1_ }, /* CMP.condn.D~*(20) */
20424 { reserved_block , 0 , 0 , 32,
20425 0xfc0007ff, 0xa0000555, 0 , 0,
20426 CP1_ }, /* CMP.condn.D~*(21) */
20427 { reserved_block , 0 , 0 , 32,
20428 0xfc0007ff, 0xa0000595, 0 , 0,
20429 CP1_ }, /* CMP.condn.D~*(22) */
20430 { reserved_block , 0 , 0 , 32,
20431 0xfc0007ff, 0xa00005d5, 0 , 0,
20432 CP1_ }, /* CMP.condn.D~*(23) */
20433 { reserved_block , 0 , 0 , 32,
20434 0xfc0007ff, 0xa0000615, 0 , 0,
20435 CP1_ }, /* CMP.condn.D~*(24) */
20436 { instruction , 0 , 0 , 32,
20437 0xfc0007ff, 0xa0000655, &CMP_SOR_D , 0,
20438 CP1_ }, /* CMP.SOR.D */
20439 { instruction , 0 , 0 , 32,
20440 0xfc0007ff, 0xa0000695, &CMP_SUNE_D , 0,
20441 CP1_ }, /* CMP.SUNE.D */
20442 { instruction , 0 , 0 , 32,
20443 0xfc0007ff, 0xa00006d5, &CMP_SNE_D , 0,
20444 CP1_ }, /* CMP.SNE.D */
20445 { reserved_block , 0 , 0 , 32,
20446 0xfc0007ff, 0xa0000715, 0 , 0,
20447 CP1_ }, /* CMP.condn.D~*(28) */
20448 { reserved_block , 0 , 0 , 32,
20449 0xfc0007ff, 0xa0000755, 0 , 0,
20450 CP1_ }, /* CMP.condn.D~*(29) */
20451 { reserved_block , 0 , 0 , 32,
20452 0xfc0007ff, 0xa0000795, 0 , 0,
20453 CP1_ }, /* CMP.condn.D~*(30) */
20454 { reserved_block , 0 , 0 , 32,
20455 0xfc0007ff, 0xa00007d5, 0 , 0,
20456 CP1_ }, /* CMP.condn.D~*(31) */
20457 };
20458
20459
20460 static const Pool POOL32F_5[8] = {
20461 { pool , CMP_condn_S , 32 , 32,
20462 0xfc00003f, 0xa0000005, 0 , 0,
20463 CP1_ }, /* CMP.condn.S */
20464 { reserved_block , 0 , 0 , 32,
20465 0xfc00003f, 0xa000000d, 0 , 0,
20466 CP1_ }, /* POOL32F_5~*(1) */
20467 { pool , CMP_condn_D , 32 , 32,
20468 0xfc00003f, 0xa0000015, 0 , 0,
20469 CP1_ }, /* CMP.condn.D */
20470 { reserved_block , 0 , 0 , 32,
20471 0xfc00003f, 0xa000001d, 0 , 0,
20472 CP1_ }, /* POOL32F_5~*(3) */
20473 { reserved_block , 0 , 0 , 32,
20474 0xfc00003f, 0xa0000025, 0 , 0,
20475 CP1_ }, /* POOL32F_5~*(4) */
20476 { reserved_block , 0 , 0 , 32,
20477 0xfc00003f, 0xa000002d, 0 , 0,
20478 CP1_ }, /* POOL32F_5~*(5) */
20479 { reserved_block , 0 , 0 , 32,
20480 0xfc00003f, 0xa0000035, 0 , 0,
20481 CP1_ }, /* POOL32F_5~*(6) */
20482 { reserved_block , 0 , 0 , 32,
20483 0xfc00003f, 0xa000003d, 0 , 0,
20484 CP1_ }, /* POOL32F_5~*(7) */
20485 };
20486
20487
20488 static const Pool POOL32F[8] = {
20489 { pool , POOL32F_0 , 64 , 32,
20490 0xfc000007, 0xa0000000, 0 , 0,
20491 CP1_ }, /* POOL32F_0 */
20492 { reserved_block , 0 , 0 , 32,
20493 0xfc000007, 0xa0000001, 0 , 0,
20494 CP1_ }, /* POOL32F~*(1) */
20495 { reserved_block , 0 , 0 , 32,
20496 0xfc000007, 0xa0000002, 0 , 0,
20497 CP1_ }, /* POOL32F~*(2) */
20498 { pool , POOL32F_3 , 8 , 32,
20499 0xfc000007, 0xa0000003, 0 , 0,
20500 CP1_ }, /* POOL32F_3 */
20501 { reserved_block , 0 , 0 , 32,
20502 0xfc000007, 0xa0000004, 0 , 0,
20503 CP1_ }, /* POOL32F~*(4) */
20504 { pool , POOL32F_5 , 8 , 32,
20505 0xfc000007, 0xa0000005, 0 , 0,
20506 CP1_ }, /* POOL32F_5 */
20507 { reserved_block , 0 , 0 , 32,
20508 0xfc000007, 0xa0000006, 0 , 0,
20509 CP1_ }, /* POOL32F~*(6) */
20510 { reserved_block , 0 , 0 , 32,
20511 0xfc000007, 0xa0000007, 0 , 0,
20512 CP1_ }, /* POOL32F~*(7) */
20513 };
20514
20515
20516 static const Pool POOL32S_0[64] = {
20517 { reserved_block , 0 , 0 , 32,
20518 0xfc0001ff, 0xc0000000, 0 , 0,
20519 0x0 }, /* POOL32S_0~*(0) */
20520 { instruction , 0 , 0 , 32,
20521 0xfc0001ff, 0xc0000008, &DLSA , 0,
20522 MIPS64_ }, /* DLSA */
20523 { instruction , 0 , 0 , 32,
20524 0xfc0001ff, 0xc0000010, &DSLLV , 0,
20525 MIPS64_ }, /* DSLLV */
20526 { instruction , 0 , 0 , 32,
20527 0xfc0001ff, 0xc0000018, &DMUL , 0,
20528 MIPS64_ }, /* DMUL */
20529 { reserved_block , 0 , 0 , 32,
20530 0xfc0001ff, 0xc0000020, 0 , 0,
20531 0x0 }, /* POOL32S_0~*(4) */
20532 { reserved_block , 0 , 0 , 32,
20533 0xfc0001ff, 0xc0000028, 0 , 0,
20534 0x0 }, /* POOL32S_0~*(5) */
20535 { reserved_block , 0 , 0 , 32,
20536 0xfc0001ff, 0xc0000030, 0 , 0,
20537 0x0 }, /* POOL32S_0~*(6) */
20538 { reserved_block , 0 , 0 , 32,
20539 0xfc0001ff, 0xc0000038, 0 , 0,
20540 0x0 }, /* POOL32S_0~*(7) */
20541 { reserved_block , 0 , 0 , 32,
20542 0xfc0001ff, 0xc0000040, 0 , 0,
20543 0x0 }, /* POOL32S_0~*(8) */
20544 { reserved_block , 0 , 0 , 32,
20545 0xfc0001ff, 0xc0000048, 0 , 0,
20546 0x0 }, /* POOL32S_0~*(9) */
20547 { instruction , 0 , 0 , 32,
20548 0xfc0001ff, 0xc0000050, &DSRLV , 0,
20549 MIPS64_ }, /* DSRLV */
20550 { instruction , 0 , 0 , 32,
20551 0xfc0001ff, 0xc0000058, &DMUH , 0,
20552 MIPS64_ }, /* DMUH */
20553 { reserved_block , 0 , 0 , 32,
20554 0xfc0001ff, 0xc0000060, 0 , 0,
20555 0x0 }, /* POOL32S_0~*(12) */
20556 { reserved_block , 0 , 0 , 32,
20557 0xfc0001ff, 0xc0000068, 0 , 0,
20558 0x0 }, /* POOL32S_0~*(13) */
20559 { reserved_block , 0 , 0 , 32,
20560 0xfc0001ff, 0xc0000070, 0 , 0,
20561 0x0 }, /* POOL32S_0~*(14) */
20562 { reserved_block , 0 , 0 , 32,
20563 0xfc0001ff, 0xc0000078, 0 , 0,
20564 0x0 }, /* POOL32S_0~*(15) */
20565 { reserved_block , 0 , 0 , 32,
20566 0xfc0001ff, 0xc0000080, 0 , 0,
20567 0x0 }, /* POOL32S_0~*(16) */
20568 { reserved_block , 0 , 0 , 32,
20569 0xfc0001ff, 0xc0000088, 0 , 0,
20570 0x0 }, /* POOL32S_0~*(17) */
20571 { instruction , 0 , 0 , 32,
20572 0xfc0001ff, 0xc0000090, &DSRAV , 0,
20573 MIPS64_ }, /* DSRAV */
20574 { instruction , 0 , 0 , 32,
20575 0xfc0001ff, 0xc0000098, &DMULU , 0,
20576 MIPS64_ }, /* DMULU */
20577 { reserved_block , 0 , 0 , 32,
20578 0xfc0001ff, 0xc00000a0, 0 , 0,
20579 0x0 }, /* POOL32S_0~*(20) */
20580 { reserved_block , 0 , 0 , 32,
20581 0xfc0001ff, 0xc00000a8, 0 , 0,
20582 0x0 }, /* POOL32S_0~*(21) */
20583 { reserved_block , 0 , 0 , 32,
20584 0xfc0001ff, 0xc00000b0, 0 , 0,
20585 0x0 }, /* POOL32S_0~*(22) */
20586 { reserved_block , 0 , 0 , 32,
20587 0xfc0001ff, 0xc00000b8, 0 , 0,
20588 0x0 }, /* POOL32S_0~*(23) */
20589 { reserved_block , 0 , 0 , 32,
20590 0xfc0001ff, 0xc00000c0, 0 , 0,
20591 0x0 }, /* POOL32S_0~*(24) */
20592 { reserved_block , 0 , 0 , 32,
20593 0xfc0001ff, 0xc00000c8, 0 , 0,
20594 0x0 }, /* POOL32S_0~*(25) */
20595 { instruction , 0 , 0 , 32,
20596 0xfc0001ff, 0xc00000d0, &DROTRV , 0,
20597 MIPS64_ }, /* DROTRV */
20598 { instruction , 0 , 0 , 32,
20599 0xfc0001ff, 0xc00000d8, &DMUHU , 0,
20600 MIPS64_ }, /* DMUHU */
20601 { reserved_block , 0 , 0 , 32,
20602 0xfc0001ff, 0xc00000e0, 0 , 0,
20603 0x0 }, /* POOL32S_0~*(28) */
20604 { reserved_block , 0 , 0 , 32,
20605 0xfc0001ff, 0xc00000e8, 0 , 0,
20606 0x0 }, /* POOL32S_0~*(29) */
20607 { reserved_block , 0 , 0 , 32,
20608 0xfc0001ff, 0xc00000f0, 0 , 0,
20609 0x0 }, /* POOL32S_0~*(30) */
20610 { reserved_block , 0 , 0 , 32,
20611 0xfc0001ff, 0xc00000f8, 0 , 0,
20612 0x0 }, /* POOL32S_0~*(31) */
20613 { reserved_block , 0 , 0 , 32,
20614 0xfc0001ff, 0xc0000100, 0 , 0,
20615 0x0 }, /* POOL32S_0~*(32) */
20616 { reserved_block , 0 , 0 , 32,
20617 0xfc0001ff, 0xc0000108, 0 , 0,
20618 0x0 }, /* POOL32S_0~*(33) */
20619 { instruction , 0 , 0 , 32,
20620 0xfc0001ff, 0xc0000110, &DADD , 0,
20621 MIPS64_ }, /* DADD */
20622 { instruction , 0 , 0 , 32,
20623 0xfc0001ff, 0xc0000118, &DDIV , 0,
20624 MIPS64_ }, /* DDIV */
20625 { reserved_block , 0 , 0 , 32,
20626 0xfc0001ff, 0xc0000120, 0 , 0,
20627 0x0 }, /* POOL32S_0~*(36) */
20628 { reserved_block , 0 , 0 , 32,
20629 0xfc0001ff, 0xc0000128, 0 , 0,
20630 0x0 }, /* POOL32S_0~*(37) */
20631 { reserved_block , 0 , 0 , 32,
20632 0xfc0001ff, 0xc0000130, 0 , 0,
20633 0x0 }, /* POOL32S_0~*(38) */
20634 { reserved_block , 0 , 0 , 32,
20635 0xfc0001ff, 0xc0000138, 0 , 0,
20636 0x0 }, /* POOL32S_0~*(39) */
20637 { reserved_block , 0 , 0 , 32,
20638 0xfc0001ff, 0xc0000140, 0 , 0,
20639 0x0 }, /* POOL32S_0~*(40) */
20640 { reserved_block , 0 , 0 , 32,
20641 0xfc0001ff, 0xc0000148, 0 , 0,
20642 0x0 }, /* POOL32S_0~*(41) */
20643 { instruction , 0 , 0 , 32,
20644 0xfc0001ff, 0xc0000150, &DADDU , 0,
20645 MIPS64_ }, /* DADDU */
20646 { instruction , 0 , 0 , 32,
20647 0xfc0001ff, 0xc0000158, &DMOD , 0,
20648 MIPS64_ }, /* DMOD */
20649 { reserved_block , 0 , 0 , 32,
20650 0xfc0001ff, 0xc0000160, 0 , 0,
20651 0x0 }, /* POOL32S_0~*(44) */
20652 { reserved_block , 0 , 0 , 32,
20653 0xfc0001ff, 0xc0000168, 0 , 0,
20654 0x0 }, /* POOL32S_0~*(45) */
20655 { reserved_block , 0 , 0 , 32,
20656 0xfc0001ff, 0xc0000170, 0 , 0,
20657 0x0 }, /* POOL32S_0~*(46) */
20658 { reserved_block , 0 , 0 , 32,
20659 0xfc0001ff, 0xc0000178, 0 , 0,
20660 0x0 }, /* POOL32S_0~*(47) */
20661 { reserved_block , 0 , 0 , 32,
20662 0xfc0001ff, 0xc0000180, 0 , 0,
20663 0x0 }, /* POOL32S_0~*(48) */
20664 { reserved_block , 0 , 0 , 32,
20665 0xfc0001ff, 0xc0000188, 0 , 0,
20666 0x0 }, /* POOL32S_0~*(49) */
20667 { instruction , 0 , 0 , 32,
20668 0xfc0001ff, 0xc0000190, &DSUB , 0,
20669 MIPS64_ }, /* DSUB */
20670 { instruction , 0 , 0 , 32,
20671 0xfc0001ff, 0xc0000198, &DDIVU , 0,
20672 MIPS64_ }, /* DDIVU */
20673 { reserved_block , 0 , 0 , 32,
20674 0xfc0001ff, 0xc00001a0, 0 , 0,
20675 0x0 }, /* POOL32S_0~*(52) */
20676 { reserved_block , 0 , 0 , 32,
20677 0xfc0001ff, 0xc00001a8, 0 , 0,
20678 0x0 }, /* POOL32S_0~*(53) */
20679 { reserved_block , 0 , 0 , 32,
20680 0xfc0001ff, 0xc00001b0, 0 , 0,
20681 0x0 }, /* POOL32S_0~*(54) */
20682 { reserved_block , 0 , 0 , 32,
20683 0xfc0001ff, 0xc00001b8, 0 , 0,
20684 0x0 }, /* POOL32S_0~*(55) */
20685 { reserved_block , 0 , 0 , 32,
20686 0xfc0001ff, 0xc00001c0, 0 , 0,
20687 0x0 }, /* POOL32S_0~*(56) */
20688 { reserved_block , 0 , 0 , 32,
20689 0xfc0001ff, 0xc00001c8, 0 , 0,
20690 0x0 }, /* POOL32S_0~*(57) */
20691 { instruction , 0 , 0 , 32,
20692 0xfc0001ff, 0xc00001d0, &DSUBU , 0,
20693 MIPS64_ }, /* DSUBU */
20694 { instruction , 0 , 0 , 32,
20695 0xfc0001ff, 0xc00001d8, &DMODU , 0,
20696 MIPS64_ }, /* DMODU */
20697 { reserved_block , 0 , 0 , 32,
20698 0xfc0001ff, 0xc00001e0, 0 , 0,
20699 0x0 }, /* POOL32S_0~*(60) */
20700 { reserved_block , 0 , 0 , 32,
20701 0xfc0001ff, 0xc00001e8, 0 , 0,
20702 0x0 }, /* POOL32S_0~*(61) */
20703 { reserved_block , 0 , 0 , 32,
20704 0xfc0001ff, 0xc00001f0, 0 , 0,
20705 0x0 }, /* POOL32S_0~*(62) */
20706 { reserved_block , 0 , 0 , 32,
20707 0xfc0001ff, 0xc00001f8, 0 , 0,
20708 0x0 }, /* POOL32S_0~*(63) */
20709 };
20710
20711
20712 static const Pool POOL32Sxf_4[128] = {
20713 { reserved_block , 0 , 0 , 32,
20714 0xfc00ffff, 0xc000013c, 0 , 0,
20715 0x0 }, /* POOL32Sxf_4~*(0) */
20716 { reserved_block , 0 , 0 , 32,
20717 0xfc00ffff, 0xc000033c, 0 , 0,
20718 0x0 }, /* POOL32Sxf_4~*(1) */
20719 { reserved_block , 0 , 0 , 32,
20720 0xfc00ffff, 0xc000053c, 0 , 0,
20721 0x0 }, /* POOL32Sxf_4~*(2) */
20722 { reserved_block , 0 , 0 , 32,
20723 0xfc00ffff, 0xc000073c, 0 , 0,
20724 0x0 }, /* POOL32Sxf_4~*(3) */
20725 { reserved_block , 0 , 0 , 32,
20726 0xfc00ffff, 0xc000093c, 0 , 0,
20727 0x0 }, /* POOL32Sxf_4~*(4) */
20728 { reserved_block , 0 , 0 , 32,
20729 0xfc00ffff, 0xc0000b3c, 0 , 0,
20730 0x0 }, /* POOL32Sxf_4~*(5) */
20731 { reserved_block , 0 , 0 , 32,
20732 0xfc00ffff, 0xc0000d3c, 0 , 0,
20733 0x0 }, /* POOL32Sxf_4~*(6) */
20734 { reserved_block , 0 , 0 , 32,
20735 0xfc00ffff, 0xc0000f3c, 0 , 0,
20736 0x0 }, /* POOL32Sxf_4~*(7) */
20737 { reserved_block , 0 , 0 , 32,
20738 0xfc00ffff, 0xc000113c, 0 , 0,
20739 0x0 }, /* POOL32Sxf_4~*(8) */
20740 { reserved_block , 0 , 0 , 32,
20741 0xfc00ffff, 0xc000133c, 0 , 0,
20742 0x0 }, /* POOL32Sxf_4~*(9) */
20743 { reserved_block , 0 , 0 , 32,
20744 0xfc00ffff, 0xc000153c, 0 , 0,
20745 0x0 }, /* POOL32Sxf_4~*(10) */
20746 { reserved_block , 0 , 0 , 32,
20747 0xfc00ffff, 0xc000173c, 0 , 0,
20748 0x0 }, /* POOL32Sxf_4~*(11) */
20749 { reserved_block , 0 , 0 , 32,
20750 0xfc00ffff, 0xc000193c, 0 , 0,
20751 0x0 }, /* POOL32Sxf_4~*(12) */
20752 { reserved_block , 0 , 0 , 32,
20753 0xfc00ffff, 0xc0001b3c, 0 , 0,
20754 0x0 }, /* POOL32Sxf_4~*(13) */
20755 { reserved_block , 0 , 0 , 32,
20756 0xfc00ffff, 0xc0001d3c, 0 , 0,
20757 0x0 }, /* POOL32Sxf_4~*(14) */
20758 { reserved_block , 0 , 0 , 32,
20759 0xfc00ffff, 0xc0001f3c, 0 , 0,
20760 0x0 }, /* POOL32Sxf_4~*(15) */
20761 { reserved_block , 0 , 0 , 32,
20762 0xfc00ffff, 0xc000213c, 0 , 0,
20763 0x0 }, /* POOL32Sxf_4~*(16) */
20764 { reserved_block , 0 , 0 , 32,
20765 0xfc00ffff, 0xc000233c, 0 , 0,
20766 0x0 }, /* POOL32Sxf_4~*(17) */
20767 { reserved_block , 0 , 0 , 32,
20768 0xfc00ffff, 0xc000253c, 0 , 0,
20769 0x0 }, /* POOL32Sxf_4~*(18) */
20770 { reserved_block , 0 , 0 , 32,
20771 0xfc00ffff, 0xc000273c, 0 , 0,
20772 0x0 }, /* POOL32Sxf_4~*(19) */
20773 { reserved_block , 0 , 0 , 32,
20774 0xfc00ffff, 0xc000293c, 0 , 0,
20775 0x0 }, /* POOL32Sxf_4~*(20) */
20776 { reserved_block , 0 , 0 , 32,
20777 0xfc00ffff, 0xc0002b3c, 0 , 0,
20778 0x0 }, /* POOL32Sxf_4~*(21) */
20779 { reserved_block , 0 , 0 , 32,
20780 0xfc00ffff, 0xc0002d3c, 0 , 0,
20781 0x0 }, /* POOL32Sxf_4~*(22) */
20782 { reserved_block , 0 , 0 , 32,
20783 0xfc00ffff, 0xc0002f3c, 0 , 0,
20784 0x0 }, /* POOL32Sxf_4~*(23) */
20785 { reserved_block , 0 , 0 , 32,
20786 0xfc00ffff, 0xc000313c, 0 , 0,
20787 0x0 }, /* POOL32Sxf_4~*(24) */
20788 { reserved_block , 0 , 0 , 32,
20789 0xfc00ffff, 0xc000333c, 0 , 0,
20790 0x0 }, /* POOL32Sxf_4~*(25) */
20791 { reserved_block , 0 , 0 , 32,
20792 0xfc00ffff, 0xc000353c, 0 , 0,
20793 0x0 }, /* POOL32Sxf_4~*(26) */
20794 { reserved_block , 0 , 0 , 32,
20795 0xfc00ffff, 0xc000373c, 0 , 0,
20796 0x0 }, /* POOL32Sxf_4~*(27) */
20797 { reserved_block , 0 , 0 , 32,
20798 0xfc00ffff, 0xc000393c, 0 , 0,
20799 0x0 }, /* POOL32Sxf_4~*(28) */
20800 { reserved_block , 0 , 0 , 32,
20801 0xfc00ffff, 0xc0003b3c, 0 , 0,
20802 0x0 }, /* POOL32Sxf_4~*(29) */
20803 { reserved_block , 0 , 0 , 32,
20804 0xfc00ffff, 0xc0003d3c, 0 , 0,
20805 0x0 }, /* POOL32Sxf_4~*(30) */
20806 { reserved_block , 0 , 0 , 32,
20807 0xfc00ffff, 0xc0003f3c, 0 , 0,
20808 0x0 }, /* POOL32Sxf_4~*(31) */
20809 { reserved_block , 0 , 0 , 32,
20810 0xfc00ffff, 0xc000413c, 0 , 0,
20811 0x0 }, /* POOL32Sxf_4~*(32) */
20812 { reserved_block , 0 , 0 , 32,
20813 0xfc00ffff, 0xc000433c, 0 , 0,
20814 0x0 }, /* POOL32Sxf_4~*(33) */
20815 { reserved_block , 0 , 0 , 32,
20816 0xfc00ffff, 0xc000453c, 0 , 0,
20817 0x0 }, /* POOL32Sxf_4~*(34) */
20818 { reserved_block , 0 , 0 , 32,
20819 0xfc00ffff, 0xc000473c, 0 , 0,
20820 0x0 }, /* POOL32Sxf_4~*(35) */
20821 { reserved_block , 0 , 0 , 32,
20822 0xfc00ffff, 0xc000493c, 0 , 0,
20823 0x0 }, /* POOL32Sxf_4~*(36) */
20824 { instruction , 0 , 0 , 32,
20825 0xfc00ffff, 0xc0004b3c, &DCLO , 0,
20826 MIPS64_ }, /* DCLO */
20827 { reserved_block , 0 , 0 , 32,
20828 0xfc00ffff, 0xc0004d3c, 0 , 0,
20829 0x0 }, /* POOL32Sxf_4~*(38) */
20830 { reserved_block , 0 , 0 , 32,
20831 0xfc00ffff, 0xc0004f3c, 0 , 0,
20832 0x0 }, /* POOL32Sxf_4~*(39) */
20833 { reserved_block , 0 , 0 , 32,
20834 0xfc00ffff, 0xc000513c, 0 , 0,
20835 0x0 }, /* POOL32Sxf_4~*(40) */
20836 { reserved_block , 0 , 0 , 32,
20837 0xfc00ffff, 0xc000533c, 0 , 0,
20838 0x0 }, /* POOL32Sxf_4~*(41) */
20839 { reserved_block , 0 , 0 , 32,
20840 0xfc00ffff, 0xc000553c, 0 , 0,
20841 0x0 }, /* POOL32Sxf_4~*(42) */
20842 { reserved_block , 0 , 0 , 32,
20843 0xfc00ffff, 0xc000573c, 0 , 0,
20844 0x0 }, /* POOL32Sxf_4~*(43) */
20845 { reserved_block , 0 , 0 , 32,
20846 0xfc00ffff, 0xc000593c, 0 , 0,
20847 0x0 }, /* POOL32Sxf_4~*(44) */
20848 { instruction , 0 , 0 , 32,
20849 0xfc00ffff, 0xc0005b3c, &DCLZ , 0,
20850 MIPS64_ }, /* DCLZ */
20851 { reserved_block , 0 , 0 , 32,
20852 0xfc00ffff, 0xc0005d3c, 0 , 0,
20853 0x0 }, /* POOL32Sxf_4~*(46) */
20854 { reserved_block , 0 , 0 , 32,
20855 0xfc00ffff, 0xc0005f3c, 0 , 0,
20856 0x0 }, /* POOL32Sxf_4~*(47) */
20857 { reserved_block , 0 , 0 , 32,
20858 0xfc00ffff, 0xc000613c, 0 , 0,
20859 0x0 }, /* POOL32Sxf_4~*(48) */
20860 { reserved_block , 0 , 0 , 32,
20861 0xfc00ffff, 0xc000633c, 0 , 0,
20862 0x0 }, /* POOL32Sxf_4~*(49) */
20863 { reserved_block , 0 , 0 , 32,
20864 0xfc00ffff, 0xc000653c, 0 , 0,
20865 0x0 }, /* POOL32Sxf_4~*(50) */
20866 { reserved_block , 0 , 0 , 32,
20867 0xfc00ffff, 0xc000673c, 0 , 0,
20868 0x0 }, /* POOL32Sxf_4~*(51) */
20869 { reserved_block , 0 , 0 , 32,
20870 0xfc00ffff, 0xc000693c, 0 , 0,
20871 0x0 }, /* POOL32Sxf_4~*(52) */
20872 { reserved_block , 0 , 0 , 32,
20873 0xfc00ffff, 0xc0006b3c, 0 , 0,
20874 0x0 }, /* POOL32Sxf_4~*(53) */
20875 { reserved_block , 0 , 0 , 32,
20876 0xfc00ffff, 0xc0006d3c, 0 , 0,
20877 0x0 }, /* POOL32Sxf_4~*(54) */
20878 { reserved_block , 0 , 0 , 32,
20879 0xfc00ffff, 0xc0006f3c, 0 , 0,
20880 0x0 }, /* POOL32Sxf_4~*(55) */
20881 { reserved_block , 0 , 0 , 32,
20882 0xfc00ffff, 0xc000713c, 0 , 0,
20883 0x0 }, /* POOL32Sxf_4~*(56) */
20884 { reserved_block , 0 , 0 , 32,
20885 0xfc00ffff, 0xc000733c, 0 , 0,
20886 0x0 }, /* POOL32Sxf_4~*(57) */
20887 { reserved_block , 0 , 0 , 32,
20888 0xfc00ffff, 0xc000753c, 0 , 0,
20889 0x0 }, /* POOL32Sxf_4~*(58) */
20890 { reserved_block , 0 , 0 , 32,
20891 0xfc00ffff, 0xc000773c, 0 , 0,
20892 0x0 }, /* POOL32Sxf_4~*(59) */
20893 { reserved_block , 0 , 0 , 32,
20894 0xfc00ffff, 0xc000793c, 0 , 0,
20895 0x0 }, /* POOL32Sxf_4~*(60) */
20896 { reserved_block , 0 , 0 , 32,
20897 0xfc00ffff, 0xc0007b3c, 0 , 0,
20898 0x0 }, /* POOL32Sxf_4~*(61) */
20899 { reserved_block , 0 , 0 , 32,
20900 0xfc00ffff, 0xc0007d3c, 0 , 0,
20901 0x0 }, /* POOL32Sxf_4~*(62) */
20902 { reserved_block , 0 , 0 , 32,
20903 0xfc00ffff, 0xc0007f3c, 0 , 0,
20904 0x0 }, /* POOL32Sxf_4~*(63) */
20905 { reserved_block , 0 , 0 , 32,
20906 0xfc00ffff, 0xc000813c, 0 , 0,
20907 0x0 }, /* POOL32Sxf_4~*(64) */
20908 { reserved_block , 0 , 0 , 32,
20909 0xfc00ffff, 0xc000833c, 0 , 0,
20910 0x0 }, /* POOL32Sxf_4~*(65) */
20911 { reserved_block , 0 , 0 , 32,
20912 0xfc00ffff, 0xc000853c, 0 , 0,
20913 0x0 }, /* POOL32Sxf_4~*(66) */
20914 { reserved_block , 0 , 0 , 32,
20915 0xfc00ffff, 0xc000873c, 0 , 0,
20916 0x0 }, /* POOL32Sxf_4~*(67) */
20917 { reserved_block , 0 , 0 , 32,
20918 0xfc00ffff, 0xc000893c, 0 , 0,
20919 0x0 }, /* POOL32Sxf_4~*(68) */
20920 { reserved_block , 0 , 0 , 32,
20921 0xfc00ffff, 0xc0008b3c, 0 , 0,
20922 0x0 }, /* POOL32Sxf_4~*(69) */
20923 { reserved_block , 0 , 0 , 32,
20924 0xfc00ffff, 0xc0008d3c, 0 , 0,
20925 0x0 }, /* POOL32Sxf_4~*(70) */
20926 { reserved_block , 0 , 0 , 32,
20927 0xfc00ffff, 0xc0008f3c, 0 , 0,
20928 0x0 }, /* POOL32Sxf_4~*(71) */
20929 { reserved_block , 0 , 0 , 32,
20930 0xfc00ffff, 0xc000913c, 0 , 0,
20931 0x0 }, /* POOL32Sxf_4~*(72) */
20932 { reserved_block , 0 , 0 , 32,
20933 0xfc00ffff, 0xc000933c, 0 , 0,
20934 0x0 }, /* POOL32Sxf_4~*(73) */
20935 { reserved_block , 0 , 0 , 32,
20936 0xfc00ffff, 0xc000953c, 0 , 0,
20937 0x0 }, /* POOL32Sxf_4~*(74) */
20938 { reserved_block , 0 , 0 , 32,
20939 0xfc00ffff, 0xc000973c, 0 , 0,
20940 0x0 }, /* POOL32Sxf_4~*(75) */
20941 { reserved_block , 0 , 0 , 32,
20942 0xfc00ffff, 0xc000993c, 0 , 0,
20943 0x0 }, /* POOL32Sxf_4~*(76) */
20944 { reserved_block , 0 , 0 , 32,
20945 0xfc00ffff, 0xc0009b3c, 0 , 0,
20946 0x0 }, /* POOL32Sxf_4~*(77) */
20947 { reserved_block , 0 , 0 , 32,
20948 0xfc00ffff, 0xc0009d3c, 0 , 0,
20949 0x0 }, /* POOL32Sxf_4~*(78) */
20950 { reserved_block , 0 , 0 , 32,
20951 0xfc00ffff, 0xc0009f3c, 0 , 0,
20952 0x0 }, /* POOL32Sxf_4~*(79) */
20953 { reserved_block , 0 , 0 , 32,
20954 0xfc00ffff, 0xc000a13c, 0 , 0,
20955 0x0 }, /* POOL32Sxf_4~*(80) */
20956 { reserved_block , 0 , 0 , 32,
20957 0xfc00ffff, 0xc000a33c, 0 , 0,
20958 0x0 }, /* POOL32Sxf_4~*(81) */
20959 { reserved_block , 0 , 0 , 32,
20960 0xfc00ffff, 0xc000a53c, 0 , 0,
20961 0x0 }, /* POOL32Sxf_4~*(82) */
20962 { reserved_block , 0 , 0 , 32,
20963 0xfc00ffff, 0xc000a73c, 0 , 0,
20964 0x0 }, /* POOL32Sxf_4~*(83) */
20965 { reserved_block , 0 , 0 , 32,
20966 0xfc00ffff, 0xc000a93c, 0 , 0,
20967 0x0 }, /* POOL32Sxf_4~*(84) */
20968 { reserved_block , 0 , 0 , 32,
20969 0xfc00ffff, 0xc000ab3c, 0 , 0,
20970 0x0 }, /* POOL32Sxf_4~*(85) */
20971 { reserved_block , 0 , 0 , 32,
20972 0xfc00ffff, 0xc000ad3c, 0 , 0,
20973 0x0 }, /* POOL32Sxf_4~*(86) */
20974 { reserved_block , 0 , 0 , 32,
20975 0xfc00ffff, 0xc000af3c, 0 , 0,
20976 0x0 }, /* POOL32Sxf_4~*(87) */
20977 { reserved_block , 0 , 0 , 32,
20978 0xfc00ffff, 0xc000b13c, 0 , 0,
20979 0x0 }, /* POOL32Sxf_4~*(88) */
20980 { reserved_block , 0 , 0 , 32,
20981 0xfc00ffff, 0xc000b33c, 0 , 0,
20982 0x0 }, /* POOL32Sxf_4~*(89) */
20983 { reserved_block , 0 , 0 , 32,
20984 0xfc00ffff, 0xc000b53c, 0 , 0,
20985 0x0 }, /* POOL32Sxf_4~*(90) */
20986 { reserved_block , 0 , 0 , 32,
20987 0xfc00ffff, 0xc000b73c, 0 , 0,
20988 0x0 }, /* POOL32Sxf_4~*(91) */
20989 { reserved_block , 0 , 0 , 32,
20990 0xfc00ffff, 0xc000b93c, 0 , 0,
20991 0x0 }, /* POOL32Sxf_4~*(92) */
20992 { reserved_block , 0 , 0 , 32,
20993 0xfc00ffff, 0xc000bb3c, 0 , 0,
20994 0x0 }, /* POOL32Sxf_4~*(93) */
20995 { reserved_block , 0 , 0 , 32,
20996 0xfc00ffff, 0xc000bd3c, 0 , 0,
20997 0x0 }, /* POOL32Sxf_4~*(94) */
20998 { reserved_block , 0 , 0 , 32,
20999 0xfc00ffff, 0xc000bf3c, 0 , 0,
21000 0x0 }, /* POOL32Sxf_4~*(95) */
21001 { reserved_block , 0 , 0 , 32,
21002 0xfc00ffff, 0xc000c13c, 0 , 0,
21003 0x0 }, /* POOL32Sxf_4~*(96) */
21004 { reserved_block , 0 , 0 , 32,
21005 0xfc00ffff, 0xc000c33c, 0 , 0,
21006 0x0 }, /* POOL32Sxf_4~*(97) */
21007 { reserved_block , 0 , 0 , 32,
21008 0xfc00ffff, 0xc000c53c, 0 , 0,
21009 0x0 }, /* POOL32Sxf_4~*(98) */
21010 { reserved_block , 0 , 0 , 32,
21011 0xfc00ffff, 0xc000c73c, 0 , 0,
21012 0x0 }, /* POOL32Sxf_4~*(99) */
21013 { reserved_block , 0 , 0 , 32,
21014 0xfc00ffff, 0xc000c93c, 0 , 0,
21015 0x0 }, /* POOL32Sxf_4~*(100) */
21016 { reserved_block , 0 , 0 , 32,
21017 0xfc00ffff, 0xc000cb3c, 0 , 0,
21018 0x0 }, /* POOL32Sxf_4~*(101) */
21019 { reserved_block , 0 , 0 , 32,
21020 0xfc00ffff, 0xc000cd3c, 0 , 0,
21021 0x0 }, /* POOL32Sxf_4~*(102) */
21022 { reserved_block , 0 , 0 , 32,
21023 0xfc00ffff, 0xc000cf3c, 0 , 0,
21024 0x0 }, /* POOL32Sxf_4~*(103) */
21025 { reserved_block , 0 , 0 , 32,
21026 0xfc00ffff, 0xc000d13c, 0 , 0,
21027 0x0 }, /* POOL32Sxf_4~*(104) */
21028 { reserved_block , 0 , 0 , 32,
21029 0xfc00ffff, 0xc000d33c, 0 , 0,
21030 0x0 }, /* POOL32Sxf_4~*(105) */
21031 { reserved_block , 0 , 0 , 32,
21032 0xfc00ffff, 0xc000d53c, 0 , 0,
21033 0x0 }, /* POOL32Sxf_4~*(106) */
21034 { reserved_block , 0 , 0 , 32,
21035 0xfc00ffff, 0xc000d73c, 0 , 0,
21036 0x0 }, /* POOL32Sxf_4~*(107) */
21037 { reserved_block , 0 , 0 , 32,
21038 0xfc00ffff, 0xc000d93c, 0 , 0,
21039 0x0 }, /* POOL32Sxf_4~*(108) */
21040 { reserved_block , 0 , 0 , 32,
21041 0xfc00ffff, 0xc000db3c, 0 , 0,
21042 0x0 }, /* POOL32Sxf_4~*(109) */
21043 { reserved_block , 0 , 0 , 32,
21044 0xfc00ffff, 0xc000dd3c, 0 , 0,
21045 0x0 }, /* POOL32Sxf_4~*(110) */
21046 { reserved_block , 0 , 0 , 32,
21047 0xfc00ffff, 0xc000df3c, 0 , 0,
21048 0x0 }, /* POOL32Sxf_4~*(111) */
21049 { reserved_block , 0 , 0 , 32,
21050 0xfc00ffff, 0xc000e13c, 0 , 0,
21051 0x0 }, /* POOL32Sxf_4~*(112) */
21052 { reserved_block , 0 , 0 , 32,
21053 0xfc00ffff, 0xc000e33c, 0 , 0,
21054 0x0 }, /* POOL32Sxf_4~*(113) */
21055 { reserved_block , 0 , 0 , 32,
21056 0xfc00ffff, 0xc000e53c, 0 , 0,
21057 0x0 }, /* POOL32Sxf_4~*(114) */
21058 { reserved_block , 0 , 0 , 32,
21059 0xfc00ffff, 0xc000e73c, 0 , 0,
21060 0x0 }, /* POOL32Sxf_4~*(115) */
21061 { reserved_block , 0 , 0 , 32,
21062 0xfc00ffff, 0xc000e93c, 0 , 0,
21063 0x0 }, /* POOL32Sxf_4~*(116) */
21064 { reserved_block , 0 , 0 , 32,
21065 0xfc00ffff, 0xc000eb3c, 0 , 0,
21066 0x0 }, /* POOL32Sxf_4~*(117) */
21067 { reserved_block , 0 , 0 , 32,
21068 0xfc00ffff, 0xc000ed3c, 0 , 0,
21069 0x0 }, /* POOL32Sxf_4~*(118) */
21070 { reserved_block , 0 , 0 , 32,
21071 0xfc00ffff, 0xc000ef3c, 0 , 0,
21072 0x0 }, /* POOL32Sxf_4~*(119) */
21073 { reserved_block , 0 , 0 , 32,
21074 0xfc00ffff, 0xc000f13c, 0 , 0,
21075 0x0 }, /* POOL32Sxf_4~*(120) */
21076 { reserved_block , 0 , 0 , 32,
21077 0xfc00ffff, 0xc000f33c, 0 , 0,
21078 0x0 }, /* POOL32Sxf_4~*(121) */
21079 { reserved_block , 0 , 0 , 32,
21080 0xfc00ffff, 0xc000f53c, 0 , 0,
21081 0x0 }, /* POOL32Sxf_4~*(122) */
21082 { reserved_block , 0 , 0 , 32,
21083 0xfc00ffff, 0xc000f73c, 0 , 0,
21084 0x0 }, /* POOL32Sxf_4~*(123) */
21085 { reserved_block , 0 , 0 , 32,
21086 0xfc00ffff, 0xc000f93c, 0 , 0,
21087 0x0 }, /* POOL32Sxf_4~*(124) */
21088 { reserved_block , 0 , 0 , 32,
21089 0xfc00ffff, 0xc000fb3c, 0 , 0,
21090 0x0 }, /* POOL32Sxf_4~*(125) */
21091 { reserved_block , 0 , 0 , 32,
21092 0xfc00ffff, 0xc000fd3c, 0 , 0,
21093 0x0 }, /* POOL32Sxf_4~*(126) */
21094 { reserved_block , 0 , 0 , 32,
21095 0xfc00ffff, 0xc000ff3c, 0 , 0,
21096 0x0 }, /* POOL32Sxf_4~*(127) */
21097 };
21098
21099
21100 static const Pool POOL32Sxf[8] = {
21101 { reserved_block , 0 , 0 , 32,
21102 0xfc0001ff, 0xc000003c, 0 , 0,
21103 0x0 }, /* POOL32Sxf~*(0) */
21104 { reserved_block , 0 , 0 , 32,
21105 0xfc0001ff, 0xc000007c, 0 , 0,
21106 0x0 }, /* POOL32Sxf~*(1) */
21107 { reserved_block , 0 , 0 , 32,
21108 0xfc0001ff, 0xc00000bc, 0 , 0,
21109 0x0 }, /* POOL32Sxf~*(2) */
21110 { reserved_block , 0 , 0 , 32,
21111 0xfc0001ff, 0xc00000fc, 0 , 0,
21112 0x0 }, /* POOL32Sxf~*(3) */
21113 { pool , POOL32Sxf_4 , 128 , 32,
21114 0xfc0001ff, 0xc000013c, 0 , 0,
21115 0x0 }, /* POOL32Sxf_4 */
21116 { reserved_block , 0 , 0 , 32,
21117 0xfc0001ff, 0xc000017c, 0 , 0,
21118 0x0 }, /* POOL32Sxf~*(5) */
21119 { reserved_block , 0 , 0 , 32,
21120 0xfc0001ff, 0xc00001bc, 0 , 0,
21121 0x0 }, /* POOL32Sxf~*(6) */
21122 { reserved_block , 0 , 0 , 32,
21123 0xfc0001ff, 0xc00001fc, 0 , 0,
21124 0x0 }, /* POOL32Sxf~*(7) */
21125 };
21126
21127
21128 static const Pool POOL32S_4[8] = {
21129 { instruction , 0 , 0 , 32,
21130 0xfc00003f, 0xc0000004, &EXTD , 0,
21131 MIPS64_ }, /* EXTD */
21132 { instruction , 0 , 0 , 32,
21133 0xfc00003f, 0xc000000c, &EXTD32 , 0,
21134 MIPS64_ }, /* EXTD32 */
21135 { reserved_block , 0 , 0 , 32,
21136 0xfc00003f, 0xc0000014, 0 , 0,
21137 0x0 }, /* POOL32S_4~*(2) */
21138 { reserved_block , 0 , 0 , 32,
21139 0xfc00003f, 0xc000001c, 0 , 0,
21140 0x0 }, /* POOL32S_4~*(3) */
21141 { reserved_block , 0 , 0 , 32,
21142 0xfc00003f, 0xc0000024, 0 , 0,
21143 0x0 }, /* POOL32S_4~*(4) */
21144 { reserved_block , 0 , 0 , 32,
21145 0xfc00003f, 0xc000002c, 0 , 0,
21146 0x0 }, /* POOL32S_4~*(5) */
21147 { reserved_block , 0 , 0 , 32,
21148 0xfc00003f, 0xc0000034, 0 , 0,
21149 0x0 }, /* POOL32S_4~*(6) */
21150 { pool , POOL32Sxf , 8 , 32,
21151 0xfc00003f, 0xc000003c, 0 , 0,
21152 0x0 }, /* POOL32Sxf */
21153 };
21154
21155
21156 static const Pool POOL32S[8] = {
21157 { pool , POOL32S_0 , 64 , 32,
21158 0xfc000007, 0xc0000000, 0 , 0,
21159 0x0 }, /* POOL32S_0 */
21160 { reserved_block , 0 , 0 , 32,
21161 0xfc000007, 0xc0000001, 0 , 0,
21162 0x0 }, /* POOL32S~*(1) */
21163 { reserved_block , 0 , 0 , 32,
21164 0xfc000007, 0xc0000002, 0 , 0,
21165 0x0 }, /* POOL32S~*(2) */
21166 { reserved_block , 0 , 0 , 32,
21167 0xfc000007, 0xc0000003, 0 , 0,
21168 0x0 }, /* POOL32S~*(3) */
21169 { pool , POOL32S_4 , 8 , 32,
21170 0xfc000007, 0xc0000004, 0 , 0,
21171 0x0 }, /* POOL32S_4 */
21172 { reserved_block , 0 , 0 , 32,
21173 0xfc000007, 0xc0000005, 0 , 0,
21174 0x0 }, /* POOL32S~*(5) */
21175 { reserved_block , 0 , 0 , 32,
21176 0xfc000007, 0xc0000006, 0 , 0,
21177 0x0 }, /* POOL32S~*(6) */
21178 { reserved_block , 0 , 0 , 32,
21179 0xfc000007, 0xc0000007, 0 , 0,
21180 0x0 }, /* POOL32S~*(7) */
21181 };
21182
21183
21184 static const Pool P_LUI[2] = {
21185 { instruction , 0 , 0 , 32,
21186 0xfc000002, 0xe0000000, &LUI , 0,
21187 0x0 }, /* LUI */
21188 { instruction , 0 , 0 , 32,
21189 0xfc000002, 0xe0000002, &ALUIPC , 0,
21190 0x0 }, /* ALUIPC */
21191 };
21192
21193
21194 static const Pool P_GP_LH[2] = {
21195 { instruction , 0 , 0 , 32,
21196 0xfc1c0001, 0x44100000, &LH_GP_ , 0,
21197 0x0 }, /* LH[GP] */
21198 { instruction , 0 , 0 , 32,
21199 0xfc1c0001, 0x44100001, &LHU_GP_ , 0,
21200 0x0 }, /* LHU[GP] */
21201 };
21202
21203
21204 static const Pool P_GP_SH[2] = {
21205 { instruction , 0 , 0 , 32,
21206 0xfc1c0001, 0x44140000, &SH_GP_ , 0,
21207 0x0 }, /* SH[GP] */
21208 { reserved_block , 0 , 0 , 32,
21209 0xfc1c0001, 0x44140001, 0 , 0,
21210 0x0 }, /* P.GP.SH~*(1) */
21211 };
21212
21213
21214 static const Pool P_GP_CP1[4] = {
21215 { instruction , 0 , 0 , 32,
21216 0xfc1c0003, 0x44180000, &LWC1_GP_ , 0,
21217 CP1_ }, /* LWC1[GP] */
21218 { instruction , 0 , 0 , 32,
21219 0xfc1c0003, 0x44180001, &SWC1_GP_ , 0,
21220 CP1_ }, /* SWC1[GP] */
21221 { instruction , 0 , 0 , 32,
21222 0xfc1c0003, 0x44180002, &LDC1_GP_ , 0,
21223 CP1_ }, /* LDC1[GP] */
21224 { instruction , 0 , 0 , 32,
21225 0xfc1c0003, 0x44180003, &SDC1_GP_ , 0,
21226 CP1_ }, /* SDC1[GP] */
21227 };
21228
21229
21230 static const Pool P_GP_M64[4] = {
21231 { instruction , 0 , 0 , 32,
21232 0xfc1c0003, 0x441c0000, &LWU_GP_ , 0,
21233 MIPS64_ }, /* LWU[GP] */
21234 { reserved_block , 0 , 0 , 32,
21235 0xfc1c0003, 0x441c0001, 0 , 0,
21236 0x0 }, /* P.GP.M64~*(1) */
21237 { reserved_block , 0 , 0 , 32,
21238 0xfc1c0003, 0x441c0002, 0 , 0,
21239 0x0 }, /* P.GP.M64~*(2) */
21240 { reserved_block , 0 , 0 , 32,
21241 0xfc1c0003, 0x441c0003, 0 , 0,
21242 0x0 }, /* P.GP.M64~*(3) */
21243 };
21244
21245
21246 static const Pool P_GP_BH[8] = {
21247 { instruction , 0 , 0 , 32,
21248 0xfc1c0000, 0x44000000, &LB_GP_ , 0,
21249 0x0 }, /* LB[GP] */
21250 { instruction , 0 , 0 , 32,
21251 0xfc1c0000, 0x44040000, &SB_GP_ , 0,
21252 0x0 }, /* SB[GP] */
21253 { instruction , 0 , 0 , 32,
21254 0xfc1c0000, 0x44080000, &LBU_GP_ , 0,
21255 0x0 }, /* LBU[GP] */
21256 { instruction , 0 , 0 , 32,
21257 0xfc1c0000, 0x440c0000, &ADDIU_GP_B_ , 0,
21258 0x0 }, /* ADDIU[GP.B] */
21259 { pool , P_GP_LH , 2 , 32,
21260 0xfc1c0000, 0x44100000, 0 , 0,
21261 0x0 }, /* P.GP.LH */
21262 { pool , P_GP_SH , 2 , 32,
21263 0xfc1c0000, 0x44140000, 0 , 0,
21264 0x0 }, /* P.GP.SH */
21265 { pool , P_GP_CP1 , 4 , 32,
21266 0xfc1c0000, 0x44180000, 0 , 0,
21267 0x0 }, /* P.GP.CP1 */
21268 { pool , P_GP_M64 , 4 , 32,
21269 0xfc1c0000, 0x441c0000, 0 , 0,
21270 0x0 }, /* P.GP.M64 */
21271 };
21272
21273
21274 static const Pool P_LS_U12[16] = {
21275 { instruction , 0 , 0 , 32,
21276 0xfc00f000, 0x84000000, &LB_U12_ , 0,
21277 0x0 }, /* LB[U12] */
21278 { instruction , 0 , 0 , 32,
21279 0xfc00f000, 0x84001000, &SB_U12_ , 0,
21280 0x0 }, /* SB[U12] */
21281 { instruction , 0 , 0 , 32,
21282 0xfc00f000, 0x84002000, &LBU_U12_ , 0,
21283 0x0 }, /* LBU[U12] */
21284 { instruction , 0 , 0 , 32,
21285 0xfc00f000, 0x84003000, &PREF_U12_ , 0,
21286 0x0 }, /* PREF[U12] */
21287 { instruction , 0 , 0 , 32,
21288 0xfc00f000, 0x84004000, &LH_U12_ , 0,
21289 0x0 }, /* LH[U12] */
21290 { instruction , 0 , 0 , 32,
21291 0xfc00f000, 0x84005000, &SH_U12_ , 0,
21292 0x0 }, /* SH[U12] */
21293 { instruction , 0 , 0 , 32,
21294 0xfc00f000, 0x84006000, &LHU_U12_ , 0,
21295 0x0 }, /* LHU[U12] */
21296 { instruction , 0 , 0 , 32,
21297 0xfc00f000, 0x84007000, &LWU_U12_ , 0,
21298 MIPS64_ }, /* LWU[U12] */
21299 { instruction , 0 , 0 , 32,
21300 0xfc00f000, 0x84008000, &LW_U12_ , 0,
21301 0x0 }, /* LW[U12] */
21302 { instruction , 0 , 0 , 32,
21303 0xfc00f000, 0x84009000, &SW_U12_ , 0,
21304 0x0 }, /* SW[U12] */
21305 { instruction , 0 , 0 , 32,
21306 0xfc00f000, 0x8400a000, &LWC1_U12_ , 0,
21307 CP1_ }, /* LWC1[U12] */
21308 { instruction , 0 , 0 , 32,
21309 0xfc00f000, 0x8400b000, &SWC1_U12_ , 0,
21310 CP1_ }, /* SWC1[U12] */
21311 { instruction , 0 , 0 , 32,
21312 0xfc00f000, 0x8400c000, &LD_U12_ , 0,
21313 MIPS64_ }, /* LD[U12] */
21314 { instruction , 0 , 0 , 32,
21315 0xfc00f000, 0x8400d000, &SD_U12_ , 0,
21316 MIPS64_ }, /* SD[U12] */
21317 { instruction , 0 , 0 , 32,
21318 0xfc00f000, 0x8400e000, &LDC1_U12_ , 0,
21319 CP1_ }, /* LDC1[U12] */
21320 { instruction , 0 , 0 , 32,
21321 0xfc00f000, 0x8400f000, &SDC1_U12_ , 0,
21322 CP1_ }, /* SDC1[U12] */
21323 };
21324
21325
21326 static const Pool P_PREF_S9_[2] = {
21327 { instruction , 0 , 0 , 32,
21328 0xffe07f00, 0xa7e01800, &SYNCI , 0,
21329 0x0 }, /* SYNCI */
21330 { instruction , 0 , 0 , 32,
21331 0xfc007f00, 0xa4001800, &PREF_S9_ , &PREF_S9__cond ,
21332 0x0 }, /* PREF[S9] */
21333 };
21334
21335
21336 static const Pool P_LS_S0[16] = {
21337 { instruction , 0 , 0 , 32,
21338 0xfc007f00, 0xa4000000, &LB_S9_ , 0,
21339 0x0 }, /* LB[S9] */
21340 { instruction , 0 , 0 , 32,
21341 0xfc007f00, 0xa4000800, &SB_S9_ , 0,
21342 0x0 }, /* SB[S9] */
21343 { instruction , 0 , 0 , 32,
21344 0xfc007f00, 0xa4001000, &LBU_S9_ , 0,
21345 0x0 }, /* LBU[S9] */
21346 { pool , P_PREF_S9_ , 2 , 32,
21347 0xfc007f00, 0xa4001800, 0 , 0,
21348 0x0 }, /* P.PREF[S9] */
21349 { instruction , 0 , 0 , 32,
21350 0xfc007f00, 0xa4002000, &LH_S9_ , 0,
21351 0x0 }, /* LH[S9] */
21352 { instruction , 0 , 0 , 32,
21353 0xfc007f00, 0xa4002800, &SH_S9_ , 0,
21354 0x0 }, /* SH[S9] */
21355 { instruction , 0 , 0 , 32,
21356 0xfc007f00, 0xa4003000, &LHU_S9_ , 0,
21357 0x0 }, /* LHU[S9] */
21358 { instruction , 0 , 0 , 32,
21359 0xfc007f00, 0xa4003800, &LWU_S9_ , 0,
21360 MIPS64_ }, /* LWU[S9] */
21361 { instruction , 0 , 0 , 32,
21362 0xfc007f00, 0xa4004000, &LW_S9_ , 0,
21363 0x0 }, /* LW[S9] */
21364 { instruction , 0 , 0 , 32,
21365 0xfc007f00, 0xa4004800, &SW_S9_ , 0,
21366 0x0 }, /* SW[S9] */
21367 { instruction , 0 , 0 , 32,
21368 0xfc007f00, 0xa4005000, &LWC1_S9_ , 0,
21369 CP1_ }, /* LWC1[S9] */
21370 { instruction , 0 , 0 , 32,
21371 0xfc007f00, 0xa4005800, &SWC1_S9_ , 0,
21372 CP1_ }, /* SWC1[S9] */
21373 { instruction , 0 , 0 , 32,
21374 0xfc007f00, 0xa4006000, &LD_S9_ , 0,
21375 MIPS64_ }, /* LD[S9] */
21376 { instruction , 0 , 0 , 32,
21377 0xfc007f00, 0xa4006800, &SD_S9_ , 0,
21378 MIPS64_ }, /* SD[S9] */
21379 { instruction , 0 , 0 , 32,
21380 0xfc007f00, 0xa4007000, &LDC1_S9_ , 0,
21381 CP1_ }, /* LDC1[S9] */
21382 { instruction , 0 , 0 , 32,
21383 0xfc007f00, 0xa4007800, &SDC1_S9_ , 0,
21384 CP1_ }, /* SDC1[S9] */
21385 };
21386
21387
21388 static const Pool ASET_ACLR[2] = {
21389 { instruction , 0 , 0 , 32,
21390 0xfe007f00, 0xa4001100, &ASET , 0,
21391 MCU_ }, /* ASET */
21392 { instruction , 0 , 0 , 32,
21393 0xfe007f00, 0xa6001100, &ACLR , 0,
21394 MCU_ }, /* ACLR */
21395 };
21396
21397
21398 static const Pool P_LL[4] = {
21399 { instruction , 0 , 0 , 32,
21400 0xfc007f03, 0xa4005100, &LL , 0,
21401 0x0 }, /* LL */
21402 { instruction , 0 , 0 , 32,
21403 0xfc007f03, 0xa4005101, &LLWP , 0,
21404 XNP_ }, /* LLWP */
21405 { reserved_block , 0 , 0 , 32,
21406 0xfc007f03, 0xa4005102, 0 , 0,
21407 0x0 }, /* P.LL~*(2) */
21408 { reserved_block , 0 , 0 , 32,
21409 0xfc007f03, 0xa4005103, 0 , 0,
21410 0x0 }, /* P.LL~*(3) */
21411 };
21412
21413
21414 static const Pool P_SC[4] = {
21415 { instruction , 0 , 0 , 32,
21416 0xfc007f03, 0xa4005900, &SC , 0,
21417 0x0 }, /* SC */
21418 { instruction , 0 , 0 , 32,
21419 0xfc007f03, 0xa4005901, &SCWP , 0,
21420 XNP_ }, /* SCWP */
21421 { reserved_block , 0 , 0 , 32,
21422 0xfc007f03, 0xa4005902, 0 , 0,
21423 0x0 }, /* P.SC~*(2) */
21424 { reserved_block , 0 , 0 , 32,
21425 0xfc007f03, 0xa4005903, 0 , 0,
21426 0x0 }, /* P.SC~*(3) */
21427 };
21428
21429
21430 static const Pool P_LLD[8] = {
21431 { instruction , 0 , 0 , 32,
21432 0xfc007f07, 0xa4007100, &LLD , 0,
21433 MIPS64_ }, /* LLD */
21434 { instruction , 0 , 0 , 32,
21435 0xfc007f07, 0xa4007101, &LLDP , 0,
21436 MIPS64_ }, /* LLDP */
21437 { reserved_block , 0 , 0 , 32,
21438 0xfc007f07, 0xa4007102, 0 , 0,
21439 0x0 }, /* P.LLD~*(2) */
21440 { reserved_block , 0 , 0 , 32,
21441 0xfc007f07, 0xa4007103, 0 , 0,
21442 0x0 }, /* P.LLD~*(3) */
21443 { reserved_block , 0 , 0 , 32,
21444 0xfc007f07, 0xa4007104, 0 , 0,
21445 0x0 }, /* P.LLD~*(4) */
21446 { reserved_block , 0 , 0 , 32,
21447 0xfc007f07, 0xa4007105, 0 , 0,
21448 0x0 }, /* P.LLD~*(5) */
21449 { reserved_block , 0 , 0 , 32,
21450 0xfc007f07, 0xa4007106, 0 , 0,
21451 0x0 }, /* P.LLD~*(6) */
21452 { reserved_block , 0 , 0 , 32,
21453 0xfc007f07, 0xa4007107, 0 , 0,
21454 0x0 }, /* P.LLD~*(7) */
21455 };
21456
21457
21458 static const Pool P_SCD[8] = {
21459 { instruction , 0 , 0 , 32,
21460 0xfc007f07, 0xa4007900, &SCD , 0,
21461 MIPS64_ }, /* SCD */
21462 { instruction , 0 , 0 , 32,
21463 0xfc007f07, 0xa4007901, &SCDP , 0,
21464 MIPS64_ }, /* SCDP */
21465 { reserved_block , 0 , 0 , 32,
21466 0xfc007f07, 0xa4007902, 0 , 0,
21467 0x0 }, /* P.SCD~*(2) */
21468 { reserved_block , 0 , 0 , 32,
21469 0xfc007f07, 0xa4007903, 0 , 0,
21470 0x0 }, /* P.SCD~*(3) */
21471 { reserved_block , 0 , 0 , 32,
21472 0xfc007f07, 0xa4007904, 0 , 0,
21473 0x0 }, /* P.SCD~*(4) */
21474 { reserved_block , 0 , 0 , 32,
21475 0xfc007f07, 0xa4007905, 0 , 0,
21476 0x0 }, /* P.SCD~*(5) */
21477 { reserved_block , 0 , 0 , 32,
21478 0xfc007f07, 0xa4007906, 0 , 0,
21479 0x0 }, /* P.SCD~*(6) */
21480 { reserved_block , 0 , 0 , 32,
21481 0xfc007f07, 0xa4007907, 0 , 0,
21482 0x0 }, /* P.SCD~*(7) */
21483 };
21484
21485
21486 static const Pool P_LS_S1[16] = {
21487 { reserved_block , 0 , 0 , 32,
21488 0xfc007f00, 0xa4000100, 0 , 0,
21489 0x0 }, /* P.LS.S1~*(0) */
21490 { reserved_block , 0 , 0 , 32,
21491 0xfc007f00, 0xa4000900, 0 , 0,
21492 0x0 }, /* P.LS.S1~*(1) */
21493 { pool , ASET_ACLR , 2 , 32,
21494 0xfc007f00, 0xa4001100, 0 , 0,
21495 0x0 }, /* ASET_ACLR */
21496 { reserved_block , 0 , 0 , 32,
21497 0xfc007f00, 0xa4001900, 0 , 0,
21498 0x0 }, /* P.LS.S1~*(3) */
21499 { instruction , 0 , 0 , 32,
21500 0xfc007f00, 0xa4002100, &UALH , 0,
21501 XMMS_ }, /* UALH */
21502 { instruction , 0 , 0 , 32,
21503 0xfc007f00, 0xa4002900, &UASH , 0,
21504 XMMS_ }, /* UASH */
21505 { reserved_block , 0 , 0 , 32,
21506 0xfc007f00, 0xa4003100, 0 , 0,
21507 0x0 }, /* P.LS.S1~*(6) */
21508 { instruction , 0 , 0 , 32,
21509 0xfc007f00, 0xa4003900, &CACHE , 0,
21510 CP0_ }, /* CACHE */
21511 { instruction , 0 , 0 , 32,
21512 0xfc007f00, 0xa4004100, &LWC2 , 0,
21513 CP2_ }, /* LWC2 */
21514 { instruction , 0 , 0 , 32,
21515 0xfc007f00, 0xa4004900, &SWC2 , 0,
21516 CP2_ }, /* SWC2 */
21517 { pool , P_LL , 4 , 32,
21518 0xfc007f00, 0xa4005100, 0 , 0,
21519 0x0 }, /* P.LL */
21520 { pool , P_SC , 4 , 32,
21521 0xfc007f00, 0xa4005900, 0 , 0,
21522 0x0 }, /* P.SC */
21523 { instruction , 0 , 0 , 32,
21524 0xfc007f00, 0xa4006100, &LDC2 , 0,
21525 CP2_ }, /* LDC2 */
21526 { instruction , 0 , 0 , 32,
21527 0xfc007f00, 0xa4006900, &SDC2 , 0,
21528 CP2_ }, /* SDC2 */
21529 { pool , P_LLD , 8 , 32,
21530 0xfc007f00, 0xa4007100, 0 , 0,
21531 0x0 }, /* P.LLD */
21532 { pool , P_SCD , 8 , 32,
21533 0xfc007f00, 0xa4007900, 0 , 0,
21534 0x0 }, /* P.SCD */
21535 };
21536
21537
21538 static const Pool P_PREFE[2] = {
21539 { instruction , 0 , 0 , 32,
21540 0xffe07f00, 0xa7e01a00, &SYNCIE , 0,
21541 CP0_ | EVA_ }, /* SYNCIE */
21542 { instruction , 0 , 0 , 32,
21543 0xfc007f00, 0xa4001a00, &PREFE , &PREFE_cond ,
21544 CP0_ | EVA_ }, /* PREFE */
21545 };
21546
21547
21548 static const Pool P_LLE[4] = {
21549 { instruction , 0 , 0 , 32,
21550 0xfc007f03, 0xa4005200, &LLE , 0,
21551 CP0_ | EVA_ }, /* LLE */
21552 { instruction , 0 , 0 , 32,
21553 0xfc007f03, 0xa4005201, &LLWPE , 0,
21554 CP0_ | EVA_ }, /* LLWPE */
21555 { reserved_block , 0 , 0 , 32,
21556 0xfc007f03, 0xa4005202, 0 , 0,
21557 0x0 }, /* P.LLE~*(2) */
21558 { reserved_block , 0 , 0 , 32,
21559 0xfc007f03, 0xa4005203, 0 , 0,
21560 0x0 }, /* P.LLE~*(3) */
21561 };
21562
21563
21564 static const Pool P_SCE[4] = {
21565 { instruction , 0 , 0 , 32,
21566 0xfc007f03, 0xa4005a00, &SCE , 0,
21567 CP0_ | EVA_ }, /* SCE */
21568 { instruction , 0 , 0 , 32,
21569 0xfc007f03, 0xa4005a01, &SCWPE , 0,
21570 CP0_ | EVA_ }, /* SCWPE */
21571 { reserved_block , 0 , 0 , 32,
21572 0xfc007f03, 0xa4005a02, 0 , 0,
21573 0x0 }, /* P.SCE~*(2) */
21574 { reserved_block , 0 , 0 , 32,
21575 0xfc007f03, 0xa4005a03, 0 , 0,
21576 0x0 }, /* P.SCE~*(3) */
21577 };
21578
21579
21580 static const Pool P_LS_E0[16] = {
21581 { instruction , 0 , 0 , 32,
21582 0xfc007f00, 0xa4000200, &LBE , 0,
21583 CP0_ | EVA_ }, /* LBE */
21584 { instruction , 0 , 0 , 32,
21585 0xfc007f00, 0xa4000a00, &SBE , 0,
21586 CP0_ | EVA_ }, /* SBE */
21587 { instruction , 0 , 0 , 32,
21588 0xfc007f00, 0xa4001200, &LBUE , 0,
21589 CP0_ | EVA_ }, /* LBUE */
21590 { pool , P_PREFE , 2 , 32,
21591 0xfc007f00, 0xa4001a00, 0 , 0,
21592 0x0 }, /* P.PREFE */
21593 { instruction , 0 , 0 , 32,
21594 0xfc007f00, 0xa4002200, &LHE , 0,
21595 CP0_ | EVA_ }, /* LHE */
21596 { instruction , 0 , 0 , 32,
21597 0xfc007f00, 0xa4002a00, &SHE , 0,
21598 CP0_ | EVA_ }, /* SHE */
21599 { instruction , 0 , 0 , 32,
21600 0xfc007f00, 0xa4003200, &LHUE , 0,
21601 CP0_ | EVA_ }, /* LHUE */
21602 { instruction , 0 , 0 , 32,
21603 0xfc007f00, 0xa4003a00, &CACHEE , 0,
21604 CP0_ | EVA_ }, /* CACHEE */
21605 { instruction , 0 , 0 , 32,
21606 0xfc007f00, 0xa4004200, &LWE , 0,
21607 CP0_ | EVA_ }, /* LWE */
21608 { instruction , 0 , 0 , 32,
21609 0xfc007f00, 0xa4004a00, &SWE , 0,
21610 CP0_ | EVA_ }, /* SWE */
21611 { pool , P_LLE , 4 , 32,
21612 0xfc007f00, 0xa4005200, 0 , 0,
21613 0x0 }, /* P.LLE */
21614 { pool , P_SCE , 4 , 32,
21615 0xfc007f00, 0xa4005a00, 0 , 0,
21616 0x0 }, /* P.SCE */
21617 { reserved_block , 0 , 0 , 32,
21618 0xfc007f00, 0xa4006200, 0 , 0,
21619 0x0 }, /* P.LS.E0~*(12) */
21620 { reserved_block , 0 , 0 , 32,
21621 0xfc007f00, 0xa4006a00, 0 , 0,
21622 0x0 }, /* P.LS.E0~*(13) */
21623 { reserved_block , 0 , 0 , 32,
21624 0xfc007f00, 0xa4007200, 0 , 0,
21625 0x0 }, /* P.LS.E0~*(14) */
21626 { reserved_block , 0 , 0 , 32,
21627 0xfc007f00, 0xa4007a00, 0 , 0,
21628 0x0 }, /* P.LS.E0~*(15) */
21629 };
21630
21631
21632 static const Pool P_LS_WM[2] = {
21633 { instruction , 0 , 0 , 32,
21634 0xfc000f00, 0xa4000400, &LWM , 0,
21635 XMMS_ }, /* LWM */
21636 { instruction , 0 , 0 , 32,
21637 0xfc000f00, 0xa4000c00, &SWM , 0,
21638 XMMS_ }, /* SWM */
21639 };
21640
21641
21642 static const Pool P_LS_UAWM[2] = {
21643 { instruction , 0 , 0 , 32,
21644 0xfc000f00, 0xa4000500, &UALWM , 0,
21645 XMMS_ }, /* UALWM */
21646 { instruction , 0 , 0 , 32,
21647 0xfc000f00, 0xa4000d00, &UASWM , 0,
21648 XMMS_ }, /* UASWM */
21649 };
21650
21651
21652 static const Pool P_LS_DM[2] = {
21653 { instruction , 0 , 0 , 32,
21654 0xfc000f00, 0xa4000600, &LDM , 0,
21655 MIPS64_ }, /* LDM */
21656 { instruction , 0 , 0 , 32,
21657 0xfc000f00, 0xa4000e00, &SDM , 0,
21658 MIPS64_ }, /* SDM */
21659 };
21660
21661
21662 static const Pool P_LS_UADM[2] = {
21663 { instruction , 0 , 0 , 32,
21664 0xfc000f00, 0xa4000700, &UALDM , 0,
21665 MIPS64_ }, /* UALDM */
21666 { instruction , 0 , 0 , 32,
21667 0xfc000f00, 0xa4000f00, &UASDM , 0,
21668 MIPS64_ }, /* UASDM */
21669 };
21670
21671
21672 static const Pool P_LS_S9[8] = {
21673 { pool , P_LS_S0 , 16 , 32,
21674 0xfc000700, 0xa4000000, 0 , 0,
21675 0x0 }, /* P.LS.S0 */
21676 { pool , P_LS_S1 , 16 , 32,
21677 0xfc000700, 0xa4000100, 0 , 0,
21678 0x0 }, /* P.LS.S1 */
21679 { pool , P_LS_E0 , 16 , 32,
21680 0xfc000700, 0xa4000200, 0 , 0,
21681 0x0 }, /* P.LS.E0 */
21682 { reserved_block , 0 , 0 , 32,
21683 0xfc000700, 0xa4000300, 0 , 0,
21684 0x0 }, /* P.LS.S9~*(3) */
21685 { pool , P_LS_WM , 2 , 32,
21686 0xfc000700, 0xa4000400, 0 , 0,
21687 0x0 }, /* P.LS.WM */
21688 { pool , P_LS_UAWM , 2 , 32,
21689 0xfc000700, 0xa4000500, 0 , 0,
21690 0x0 }, /* P.LS.UAWM */
21691 { pool , P_LS_DM , 2 , 32,
21692 0xfc000700, 0xa4000600, 0 , 0,
21693 0x0 }, /* P.LS.DM */
21694 { pool , P_LS_UADM , 2 , 32,
21695 0xfc000700, 0xa4000700, 0 , 0,
21696 0x0 }, /* P.LS.UADM */
21697 };
21698
21699
21700 static const Pool P_BAL[2] = {
21701 { branch_instruction , 0 , 0 , 32,
21702 0xfe000000, 0x28000000, &BC_32_ , 0,
21703 0x0 }, /* BC[32] */
21704 { call_instruction , 0 , 0 , 32,
21705 0xfe000000, 0x2a000000, &BALC_32_ , 0,
21706 0x0 }, /* BALC[32] */
21707 };
21708
21709
21710 static const Pool P_BALRSC[2] = {
21711 { branch_instruction , 0 , 0 , 32,
21712 0xffe0f000, 0x48008000, &BRSC , 0,
21713 0x0 }, /* BRSC */
21714 { call_instruction , 0 , 0 , 32,
21715 0xfc00f000, 0x48008000, &BALRSC , &BALRSC_cond ,
21716 0x0 }, /* BALRSC */
21717 };
21718
21719
21720 static const Pool P_J[16] = {
21721 { call_instruction , 0 , 0 , 32,
21722 0xfc00f000, 0x48000000, &JALRC_32_ , 0,
21723 0x0 }, /* JALRC[32] */
21724 { call_instruction , 0 , 0 , 32,
21725 0xfc00f000, 0x48001000, &JALRC_HB , 0,
21726 0x0 }, /* JALRC.HB */
21727 { reserved_block , 0 , 0 , 32,
21728 0xfc00f000, 0x48002000, 0 , 0,
21729 0x0 }, /* P.J~*(2) */
21730 { reserved_block , 0 , 0 , 32,
21731 0xfc00f000, 0x48003000, 0 , 0,
21732 0x0 }, /* P.J~*(3) */
21733 { reserved_block , 0 , 0 , 32,
21734 0xfc00f000, 0x48004000, 0 , 0,
21735 0x0 }, /* P.J~*(4) */
21736 { reserved_block , 0 , 0 , 32,
21737 0xfc00f000, 0x48005000, 0 , 0,
21738 0x0 }, /* P.J~*(5) */
21739 { reserved_block , 0 , 0 , 32,
21740 0xfc00f000, 0x48006000, 0 , 0,
21741 0x0 }, /* P.J~*(6) */
21742 { reserved_block , 0 , 0 , 32,
21743 0xfc00f000, 0x48007000, 0 , 0,
21744 0x0 }, /* P.J~*(7) */
21745 { pool , P_BALRSC , 2 , 32,
21746 0xfc00f000, 0x48008000, 0 , 0,
21747 0x0 }, /* P.BALRSC */
21748 { reserved_block , 0 , 0 , 32,
21749 0xfc00f000, 0x48009000, 0 , 0,
21750 0x0 }, /* P.J~*(9) */
21751 { reserved_block , 0 , 0 , 32,
21752 0xfc00f000, 0x4800a000, 0 , 0,
21753 0x0 }, /* P.J~*(10) */
21754 { reserved_block , 0 , 0 , 32,
21755 0xfc00f000, 0x4800b000, 0 , 0,
21756 0x0 }, /* P.J~*(11) */
21757 { reserved_block , 0 , 0 , 32,
21758 0xfc00f000, 0x4800c000, 0 , 0,
21759 0x0 }, /* P.J~*(12) */
21760 { reserved_block , 0 , 0 , 32,
21761 0xfc00f000, 0x4800d000, 0 , 0,
21762 0x0 }, /* P.J~*(13) */
21763 { reserved_block , 0 , 0 , 32,
21764 0xfc00f000, 0x4800e000, 0 , 0,
21765 0x0 }, /* P.J~*(14) */
21766 { reserved_block , 0 , 0 , 32,
21767 0xfc00f000, 0x4800f000, 0 , 0,
21768 0x0 }, /* P.J~*(15) */
21769 };
21770
21771
21772 static const Pool P_BR3A[32] = {
21773 { branch_instruction , 0 , 0 , 32,
21774 0xfc1fc000, 0x88004000, &BC1EQZC , 0,
21775 CP1_ }, /* BC1EQZC */
21776 { branch_instruction , 0 , 0 , 32,
21777 0xfc1fc000, 0x88014000, &BC1NEZC , 0,
21778 CP1_ }, /* BC1NEZC */
21779 { branch_instruction , 0 , 0 , 32,
21780 0xfc1fc000, 0x88024000, &BC2EQZC , 0,
21781 CP2_ }, /* BC2EQZC */
21782 { branch_instruction , 0 , 0 , 32,
21783 0xfc1fc000, 0x88034000, &BC2NEZC , 0,
21784 CP2_ }, /* BC2NEZC */
21785 { branch_instruction , 0 , 0 , 32,
21786 0xfc1fc000, 0x88044000, &BPOSGE32C , 0,
21787 DSP_ }, /* BPOSGE32C */
21788 { reserved_block , 0 , 0 , 32,
21789 0xfc1fc000, 0x88054000, 0 , 0,
21790 0x0 }, /* P.BR3A~*(5) */
21791 { reserved_block , 0 , 0 , 32,
21792 0xfc1fc000, 0x88064000, 0 , 0,
21793 0x0 }, /* P.BR3A~*(6) */
21794 { reserved_block , 0 , 0 , 32,
21795 0xfc1fc000, 0x88074000, 0 , 0,
21796 0x0 }, /* P.BR3A~*(7) */
21797 { reserved_block , 0 , 0 , 32,
21798 0xfc1fc000, 0x88084000, 0 , 0,
21799 0x0 }, /* P.BR3A~*(8) */
21800 { reserved_block , 0 , 0 , 32,
21801 0xfc1fc000, 0x88094000, 0 , 0,
21802 0x0 }, /* P.BR3A~*(9) */
21803 { reserved_block , 0 , 0 , 32,
21804 0xfc1fc000, 0x880a4000, 0 , 0,
21805 0x0 }, /* P.BR3A~*(10) */
21806 { reserved_block , 0 , 0 , 32,
21807 0xfc1fc000, 0x880b4000, 0 , 0,
21808 0x0 }, /* P.BR3A~*(11) */
21809 { reserved_block , 0 , 0 , 32,
21810 0xfc1fc000, 0x880c4000, 0 , 0,
21811 0x0 }, /* P.BR3A~*(12) */
21812 { reserved_block , 0 , 0 , 32,
21813 0xfc1fc000, 0x880d4000, 0 , 0,
21814 0x0 }, /* P.BR3A~*(13) */
21815 { reserved_block , 0 , 0 , 32,
21816 0xfc1fc000, 0x880e4000, 0 , 0,
21817 0x0 }, /* P.BR3A~*(14) */
21818 { reserved_block , 0 , 0 , 32,
21819 0xfc1fc000, 0x880f4000, 0 , 0,
21820 0x0 }, /* P.BR3A~*(15) */
21821 { reserved_block , 0 , 0 , 32,
21822 0xfc1fc000, 0x88104000, 0 , 0,
21823 0x0 }, /* P.BR3A~*(16) */
21824 { reserved_block , 0 , 0 , 32,
21825 0xfc1fc000, 0x88114000, 0 , 0,
21826 0x0 }, /* P.BR3A~*(17) */
21827 { reserved_block , 0 , 0 , 32,
21828 0xfc1fc000, 0x88124000, 0 , 0,
21829 0x0 }, /* P.BR3A~*(18) */
21830 { reserved_block , 0 , 0 , 32,
21831 0xfc1fc000, 0x88134000, 0 , 0,
21832 0x0 }, /* P.BR3A~*(19) */
21833 { reserved_block , 0 , 0 , 32,
21834 0xfc1fc000, 0x88144000, 0 , 0,
21835 0x0 }, /* P.BR3A~*(20) */
21836 { reserved_block , 0 , 0 , 32,
21837 0xfc1fc000, 0x88154000, 0 , 0,
21838 0x0 }, /* P.BR3A~*(21) */
21839 { reserved_block , 0 , 0 , 32,
21840 0xfc1fc000, 0x88164000, 0 , 0,
21841 0x0 }, /* P.BR3A~*(22) */
21842 { reserved_block , 0 , 0 , 32,
21843 0xfc1fc000, 0x88174000, 0 , 0,
21844 0x0 }, /* P.BR3A~*(23) */
21845 { reserved_block , 0 , 0 , 32,
21846 0xfc1fc000, 0x88184000, 0 , 0,
21847 0x0 }, /* P.BR3A~*(24) */
21848 { reserved_block , 0 , 0 , 32,
21849 0xfc1fc000, 0x88194000, 0 , 0,
21850 0x0 }, /* P.BR3A~*(25) */
21851 { reserved_block , 0 , 0 , 32,
21852 0xfc1fc000, 0x881a4000, 0 , 0,
21853 0x0 }, /* P.BR3A~*(26) */
21854 { reserved_block , 0 , 0 , 32,
21855 0xfc1fc000, 0x881b4000, 0 , 0,
21856 0x0 }, /* P.BR3A~*(27) */
21857 { reserved_block , 0 , 0 , 32,
21858 0xfc1fc000, 0x881c4000, 0 , 0,
21859 0x0 }, /* P.BR3A~*(28) */
21860 { reserved_block , 0 , 0 , 32,
21861 0xfc1fc000, 0x881d4000, 0 , 0,
21862 0x0 }, /* P.BR3A~*(29) */
21863 { reserved_block , 0 , 0 , 32,
21864 0xfc1fc000, 0x881e4000, 0 , 0,
21865 0x0 }, /* P.BR3A~*(30) */
21866 { reserved_block , 0 , 0 , 32,
21867 0xfc1fc000, 0x881f4000, 0 , 0,
21868 0x0 }, /* P.BR3A~*(31) */
21869 };
21870
21871
21872 static const Pool P_BR1[4] = {
21873 { branch_instruction , 0 , 0 , 32,
21874 0xfc00c000, 0x88000000, &BEQC_32_ , 0,
21875 0x0 }, /* BEQC[32] */
21876 { pool , P_BR3A , 32 , 32,
21877 0xfc00c000, 0x88004000, 0 , 0,
21878 0x0 }, /* P.BR3A */
21879 { branch_instruction , 0 , 0 , 32,
21880 0xfc00c000, 0x88008000, &BGEC , 0,
21881 0x0 }, /* BGEC */
21882 { branch_instruction , 0 , 0 , 32,
21883 0xfc00c000, 0x8800c000, &BGEUC , 0,
21884 0x0 }, /* BGEUC */
21885 };
21886
21887
21888 static const Pool P_BR2[4] = {
21889 { branch_instruction , 0 , 0 , 32,
21890 0xfc00c000, 0xa8000000, &BNEC_32_ , 0,
21891 0x0 }, /* BNEC[32] */
21892 { reserved_block , 0 , 0 , 32,
21893 0xfc00c000, 0xa8004000, 0 , 0,
21894 0x0 }, /* P.BR2~*(1) */
21895 { branch_instruction , 0 , 0 , 32,
21896 0xfc00c000, 0xa8008000, &BLTC , 0,
21897 0x0 }, /* BLTC */
21898 { branch_instruction , 0 , 0 , 32,
21899 0xfc00c000, 0xa800c000, &BLTUC , 0,
21900 0x0 }, /* BLTUC */
21901 };
21902
21903
21904 static const Pool P_BRI[8] = {
21905 { branch_instruction , 0 , 0 , 32,
21906 0xfc1c0000, 0xc8000000, &BEQIC , 0,
21907 0x0 }, /* BEQIC */
21908 { branch_instruction , 0 , 0 , 32,
21909 0xfc1c0000, 0xc8040000, &BBEQZC , 0,
21910 XMMS_ }, /* BBEQZC */
21911 { branch_instruction , 0 , 0 , 32,
21912 0xfc1c0000, 0xc8080000, &BGEIC , 0,
21913 0x0 }, /* BGEIC */
21914 { branch_instruction , 0 , 0 , 32,
21915 0xfc1c0000, 0xc80c0000, &BGEIUC , 0,
21916 0x0 }, /* BGEIUC */
21917 { branch_instruction , 0 , 0 , 32,
21918 0xfc1c0000, 0xc8100000, &BNEIC , 0,
21919 0x0 }, /* BNEIC */
21920 { branch_instruction , 0 , 0 , 32,
21921 0xfc1c0000, 0xc8140000, &BBNEZC , 0,
21922 XMMS_ }, /* BBNEZC */
21923 { branch_instruction , 0 , 0 , 32,
21924 0xfc1c0000, 0xc8180000, &BLTIC , 0,
21925 0x0 }, /* BLTIC */
21926 { branch_instruction , 0 , 0 , 32,
21927 0xfc1c0000, 0xc81c0000, &BLTIUC , 0,
21928 0x0 }, /* BLTIUC */
21929 };
21930
21931
21932 static const Pool P32[32] = {
21933 { pool , P_ADDIU , 2 , 32,
21934 0xfc000000, 0x00000000, 0 , 0,
21935 0x0 }, /* P.ADDIU */
21936 { pool , P32A , 8 , 32,
21937 0xfc000000, 0x20000000, 0 , 0,
21938 0x0 }, /* P32A */
21939 { pool , P_GP_W , 4 , 32,
21940 0xfc000000, 0x40000000, 0 , 0,
21941 0x0 }, /* P.GP.W */
21942 { pool , POOL48I , 32 , 48,
21943 0xfc0000000000ull, 0x600000000000ull, 0 , 0,
21944 0x0 }, /* POOL48I */
21945 { pool , P_U12 , 16 , 32,
21946 0xfc000000, 0x80000000, 0 , 0,
21947 0x0 }, /* P.U12 */
21948 { pool , POOL32F , 8 , 32,
21949 0xfc000000, 0xa0000000, 0 , 0,
21950 CP1_ }, /* POOL32F */
21951 { pool , POOL32S , 8 , 32,
21952 0xfc000000, 0xc0000000, 0 , 0,
21953 0x0 }, /* POOL32S */
21954 { pool , P_LUI , 2 , 32,
21955 0xfc000000, 0xe0000000, 0 , 0,
21956 0x0 }, /* P.LUI */
21957 { instruction , 0 , 0 , 32,
21958 0xfc000000, 0x04000000, &ADDIUPC_32_ , 0,
21959 0x0 }, /* ADDIUPC[32] */
21960 { reserved_block , 0 , 0 , 32,
21961 0xfc000000, 0x24000000, 0 , 0,
21962 0x0 }, /* P32~*(5) */
21963 { pool , P_GP_BH , 8 , 32,
21964 0xfc000000, 0x44000000, 0 , 0,
21965 0x0 }, /* P.GP.BH */
21966 { reserved_block , 0 , 0 , 32,
21967 0xfc000000, 0x64000000, 0 , 0,
21968 0x0 }, /* P32~*(13) */
21969 { pool , P_LS_U12 , 16 , 32,
21970 0xfc000000, 0x84000000, 0 , 0,
21971 0x0 }, /* P.LS.U12 */
21972 { pool , P_LS_S9 , 8 , 32,
21973 0xfc000000, 0xa4000000, 0 , 0,
21974 0x0 }, /* P.LS.S9 */
21975 { reserved_block , 0 , 0 , 32,
21976 0xfc000000, 0xc4000000, 0 , 0,
21977 0x0 }, /* P32~*(25) */
21978 { reserved_block , 0 , 0 , 32,
21979 0xfc000000, 0xe4000000, 0 , 0,
21980 0x0 }, /* P32~*(29) */
21981 { call_instruction , 0 , 0 , 32,
21982 0xfc000000, 0x08000000, &MOVE_BALC , 0,
21983 XMMS_ }, /* MOVE.BALC */
21984 { pool , P_BAL , 2 , 32,
21985 0xfc000000, 0x28000000, 0 , 0,
21986 0x0 }, /* P.BAL */
21987 { pool , P_J , 16 , 32,
21988 0xfc000000, 0x48000000, 0 , 0,
21989 0x0 }, /* P.J */
21990 { reserved_block , 0 , 0 , 32,
21991 0xfc000000, 0x68000000, 0 , 0,
21992 0x0 }, /* P32~*(14) */
21993 { pool , P_BR1 , 4 , 32,
21994 0xfc000000, 0x88000000, 0 , 0,
21995 0x0 }, /* P.BR1 */
21996 { pool , P_BR2 , 4 , 32,
21997 0xfc000000, 0xa8000000, 0 , 0,
21998 0x0 }, /* P.BR2 */
21999 { pool , P_BRI , 8 , 32,
22000 0xfc000000, 0xc8000000, 0 , 0,
22001 0x0 }, /* P.BRI */
22002 { reserved_block , 0 , 0 , 32,
22003 0xfc000000, 0xe8000000, 0 , 0,
22004 0x0 }, /* P32~*(30) */
22005 { reserved_block , 0 , 0 , 32,
22006 0xfc000000, 0x0c000000, 0 , 0,
22007 0x0 }, /* P32~*(3) */
22008 { reserved_block , 0 , 0 , 32,
22009 0xfc000000, 0x2c000000, 0 , 0,
22010 0x0 }, /* P32~*(7) */
22011 { reserved_block , 0 , 0 , 32,
22012 0xfc000000, 0x4c000000, 0 , 0,
22013 0x0 }, /* P32~*(11) */
22014 { reserved_block , 0 , 0 , 32,
22015 0xfc000000, 0x6c000000, 0 , 0,
22016 0x0 }, /* P32~*(15) */
22017 { reserved_block , 0 , 0 , 32,
22018 0xfc000000, 0x8c000000, 0 , 0,
22019 0x0 }, /* P32~*(19) */
22020 { reserved_block , 0 , 0 , 32,
22021 0xfc000000, 0xac000000, 0 , 0,
22022 0x0 }, /* P32~*(23) */
22023 { reserved_block , 0 , 0 , 32,
22024 0xfc000000, 0xcc000000, 0 , 0,
22025 0x0 }, /* P32~*(27) */
22026 { reserved_block , 0 , 0 , 32,
22027 0xfc000000, 0xec000000, 0 , 0,
22028 0x0 }, /* P32~*(31) */
22029 };
22030
22031
22032 static const Pool P16_SYSCALL[2] = {
22033 { instruction , 0 , 0 , 16,
22034 0xfffc , 0x1008 , &SYSCALL_16_ , 0,
22035 0x0 }, /* SYSCALL[16] */
22036 { instruction , 0 , 0 , 16,
22037 0xfffc , 0x100c , &HYPCALL_16_ , 0,
22038 CP0_ | VZ_ }, /* HYPCALL[16] */
22039 };
22040
22041
22042 static const Pool P16_RI[4] = {
22043 { reserved_block , 0 , 0 , 16,
22044 0xfff8 , 0x1000 , 0 , 0,
22045 0x0 }, /* P16.RI~*(0) */
22046 { pool , P16_SYSCALL , 2 , 16,
22047 0xfff8 , 0x1008 , 0 , 0,
22048 0x0 }, /* P16.SYSCALL */
22049 { instruction , 0 , 0 , 16,
22050 0xfff8 , 0x1010 , &BREAK_16_ , 0,
22051 0x0 }, /* BREAK[16] */
22052 { instruction , 0 , 0 , 16,
22053 0xfff8 , 0x1018 , &SDBBP_16_ , 0,
22054 EJTAG_ }, /* SDBBP[16] */
22055 };
22056
22057
22058 static const Pool P16_MV[2] = {
22059 { pool , P16_RI , 4 , 16,
22060 0xffe0 , 0x1000 , 0 , 0,
22061 0x0 }, /* P16.RI */
22062 { instruction , 0 , 0 , 16,
22063 0xfc00 , 0x1000 , &MOVE , &MOVE_cond ,
22064 0x0 }, /* MOVE */
22065 };
22066
22067
22068 static const Pool P16_SHIFT[2] = {
22069 { instruction , 0 , 0 , 16,
22070 0xfc08 , 0x3000 , &SLL_16_ , 0,
22071 0x0 }, /* SLL[16] */
22072 { instruction , 0 , 0 , 16,
22073 0xfc08 , 0x3008 , &SRL_16_ , 0,
22074 0x0 }, /* SRL[16] */
22075 };
22076
22077
22078 static const Pool POOL16C_00[4] = {
22079 { instruction , 0 , 0 , 16,
22080 0xfc0f , 0x5000 , &NOT_16_ , 0,
22081 0x0 }, /* NOT[16] */
22082 { instruction , 0 , 0 , 16,
22083 0xfc0f , 0x5004 , &XOR_16_ , 0,
22084 0x0 }, /* XOR[16] */
22085 { instruction , 0 , 0 , 16,
22086 0xfc0f , 0x5008 , &AND_16_ , 0,
22087 0x0 }, /* AND[16] */
22088 { instruction , 0 , 0 , 16,
22089 0xfc0f , 0x500c , &OR_16_ , 0,
22090 0x0 }, /* OR[16] */
22091 };
22092
22093
22094 static const Pool POOL16C_0[2] = {
22095 { pool , POOL16C_00 , 4 , 16,
22096 0xfc03 , 0x5000 , 0 , 0,
22097 0x0 }, /* POOL16C_00 */
22098 { reserved_block , 0 , 0 , 16,
22099 0xfc03 , 0x5002 , 0 , 0,
22100 0x0 }, /* POOL16C_0~*(1) */
22101 };
22102
22103
22104 static const Pool P16C[2] = {
22105 { pool , POOL16C_0 , 2 , 16,
22106 0xfc01 , 0x5000 , 0 , 0,
22107 0x0 }, /* POOL16C_0 */
22108 { instruction , 0 , 0 , 16,
22109 0xfc01 , 0x5001 , &LWXS_16_ , 0,
22110 0x0 }, /* LWXS[16] */
22111 };
22112
22113
22114 static const Pool P16_A1[2] = {
22115 { reserved_block , 0 , 0 , 16,
22116 0xfc40 , 0x7000 , 0 , 0,
22117 0x0 }, /* P16.A1~*(0) */
22118 { instruction , 0 , 0 , 16,
22119 0xfc40 , 0x7040 , &ADDIU_R1_SP_ , 0,
22120 0x0 }, /* ADDIU[R1.SP] */
22121 };
22122
22123
22124 static const Pool P_ADDIU_RS5_[2] = {
22125 { instruction , 0 , 0 , 16,
22126 0xffe8 , 0x9008 , &NOP_16_ , 0,
22127 0x0 }, /* NOP[16] */
22128 { instruction , 0 , 0 , 16,
22129 0xfc08 , 0x9008 , &ADDIU_RS5_ , &ADDIU_RS5__cond ,
22130 0x0 }, /* ADDIU[RS5] */
22131 };
22132
22133
22134 static const Pool P16_A2[2] = {
22135 { instruction , 0 , 0 , 16,
22136 0xfc08 , 0x9000 , &ADDIU_R2_ , 0,
22137 0x0 }, /* ADDIU[R2] */
22138 { pool , P_ADDIU_RS5_ , 2 , 16,
22139 0xfc08 , 0x9008 , 0 , 0,
22140 0x0 }, /* P.ADDIU[RS5] */
22141 };
22142
22143
22144 static const Pool P16_ADDU[2] = {
22145 { instruction , 0 , 0 , 16,
22146 0xfc01 , 0xb000 , &ADDU_16_ , 0,
22147 0x0 }, /* ADDU[16] */
22148 { instruction , 0 , 0 , 16,
22149 0xfc01 , 0xb001 , &SUBU_16_ , 0,
22150 0x0 }, /* SUBU[16] */
22151 };
22152
22153
22154 static const Pool P16_JRC[2] = {
22155 { branch_instruction , 0 , 0 , 16,
22156 0xfc1f , 0xd800 , &JRC , 0,
22157 0x0 }, /* JRC */
22158 { call_instruction , 0 , 0 , 16,
22159 0xfc1f , 0xd810 , &JALRC_16_ , 0,
22160 0x0 }, /* JALRC[16] */
22161 };
22162
22163
22164 static const Pool P16_BR1[2] = {
22165 { branch_instruction , 0 , 0 , 16,
22166 0xfc00 , 0xd800 , &BEQC_16_ , &BEQC_16__cond ,
22167 XMMS_ }, /* BEQC[16] */
22168 { branch_instruction , 0 , 0 , 16,
22169 0xfc00 , 0xd800 , &BNEC_16_ , &BNEC_16__cond ,
22170 XMMS_ }, /* BNEC[16] */
22171 };
22172
22173
22174 static const Pool P16_BR[2] = {
22175 { pool , P16_JRC , 2 , 16,
22176 0xfc0f , 0xd800 , 0 , 0,
22177 0x0 }, /* P16.JRC */
22178 { pool , P16_BR1 , 2 , 16,
22179 0xfc00 , 0xd800 , 0 , &P16_BR1_cond ,
22180 0x0 }, /* P16.BR1 */
22181 };
22182
22183
22184 static const Pool P16_SR[2] = {
22185 { instruction , 0 , 0 , 16,
22186 0xfd00 , 0x1c00 , &SAVE_16_ , 0,
22187 0x0 }, /* SAVE[16] */
22188 { return_instruction , 0 , 0 , 16,
22189 0xfd00 , 0x1d00 , &RESTORE_JRC_16_ , 0,
22190 0x0 }, /* RESTORE.JRC[16] */
22191 };
22192
22193
22194 static const Pool P16_4X4[4] = {
22195 { instruction , 0 , 0 , 16,
22196 0xfd08 , 0x3c00 , &ADDU_4X4_ , 0,
22197 XMMS_ }, /* ADDU[4X4] */
22198 { instruction , 0 , 0 , 16,
22199 0xfd08 , 0x3c08 , &MUL_4X4_ , 0,
22200 XMMS_ }, /* MUL[4X4] */
22201 { reserved_block , 0 , 0 , 16,
22202 0xfd08 , 0x3d00 , 0 , 0,
22203 0x0 }, /* P16.4X4~*(2) */
22204 { reserved_block , 0 , 0 , 16,
22205 0xfd08 , 0x3d08 , 0 , 0,
22206 0x0 }, /* P16.4X4~*(3) */
22207 };
22208
22209
22210 static const Pool P16_LB[4] = {
22211 { instruction , 0 , 0 , 16,
22212 0xfc0c , 0x5c00 , &LB_16_ , 0,
22213 0x0 }, /* LB[16] */
22214 { instruction , 0 , 0 , 16,
22215 0xfc0c , 0x5c04 , &SB_16_ , 0,
22216 0x0 }, /* SB[16] */
22217 { instruction , 0 , 0 , 16,
22218 0xfc0c , 0x5c08 , &LBU_16_ , 0,
22219 0x0 }, /* LBU[16] */
22220 { reserved_block , 0 , 0 , 16,
22221 0xfc0c , 0x5c0c , 0 , 0,
22222 0x0 }, /* P16.LB~*(3) */
22223 };
22224
22225
22226 static const Pool P16_LH[4] = {
22227 { instruction , 0 , 0 , 16,
22228 0xfc09 , 0x7c00 , &LH_16_ , 0,
22229 0x0 }, /* LH[16] */
22230 { instruction , 0 , 0 , 16,
22231 0xfc09 , 0x7c01 , &SH_16_ , 0,
22232 0x0 }, /* SH[16] */
22233 { instruction , 0 , 0 , 16,
22234 0xfc09 , 0x7c08 , &LHU_16_ , 0,
22235 0x0 }, /* LHU[16] */
22236 { reserved_block , 0 , 0 , 16,
22237 0xfc09 , 0x7c09 , 0 , 0,
22238 0x0 }, /* P16.LH~*(3) */
22239 };
22240
22241
22242 static const Pool P16[32] = {
22243 { pool , P16_MV , 2 , 16,
22244 0xfc00 , 0x1000 , 0 , 0,
22245 0x0 }, /* P16.MV */
22246 { pool , P16_SHIFT , 2 , 16,
22247 0xfc00 , 0x3000 , 0 , 0,
22248 0x0 }, /* P16.SHIFT */
22249 { pool , P16C , 2 , 16,
22250 0xfc00 , 0x5000 , 0 , 0,
22251 0x0 }, /* P16C */
22252 { pool , P16_A1 , 2 , 16,
22253 0xfc00 , 0x7000 , 0 , 0,
22254 0x0 }, /* P16.A1 */
22255 { pool , P16_A2 , 2 , 16,
22256 0xfc00 , 0x9000 , 0 , 0,
22257 0x0 }, /* P16.A2 */
22258 { pool , P16_ADDU , 2 , 16,
22259 0xfc00 , 0xb000 , 0 , 0,
22260 0x0 }, /* P16.ADDU */
22261 { instruction , 0 , 0 , 16,
22262 0xfc00 , 0xd000 , &LI_16_ , 0,
22263 0x0 }, /* LI[16] */
22264 { instruction , 0 , 0 , 16,
22265 0xfc00 , 0xf000 , &ANDI_16_ , 0,
22266 0x0 }, /* ANDI[16] */
22267 { instruction , 0 , 0 , 16,
22268 0xfc00 , 0x1400 , &LW_16_ , 0,
22269 0x0 }, /* LW[16] */
22270 { instruction , 0 , 0 , 16,
22271 0xfc00 , 0x3400 , &LW_SP_ , 0,
22272 0x0 }, /* LW[SP] */
22273 { instruction , 0 , 0 , 16,
22274 0xfc00 , 0x5400 , &LW_GP16_ , 0,
22275 0x0 }, /* LW[GP16] */
22276 { instruction , 0 , 0 , 16,
22277 0xfc00 , 0x7400 , &LW_4X4_ , 0,
22278 XMMS_ }, /* LW[4X4] */
22279 { instruction , 0 , 0 , 16,
22280 0xfc00 , 0x9400 , &SW_16_ , 0,
22281 0x0 }, /* SW[16] */
22282 { instruction , 0 , 0 , 16,
22283 0xfc00 , 0xb400 , &SW_SP_ , 0,
22284 0x0 }, /* SW[SP] */
22285 { instruction , 0 , 0 , 16,
22286 0xfc00 , 0xd400 , &SW_GP16_ , 0,
22287 0x0 }, /* SW[GP16] */
22288 { instruction , 0 , 0 , 16,
22289 0xfc00 , 0xf400 , &SW_4X4_ , 0,
22290 XMMS_ }, /* SW[4X4] */
22291 { branch_instruction , 0 , 0 , 16,
22292 0xfc00 , 0x1800 , &BC_16_ , 0,
22293 0x0 }, /* BC[16] */
22294 { call_instruction , 0 , 0 , 16,
22295 0xfc00 , 0x3800 , &BALC_16_ , 0,
22296 0x0 }, /* BALC[16] */
22297 { reserved_block , 0 , 0 , 16,
22298 0xfc00 , 0x5800 , 0 , 0,
22299 0x0 }, /* P16~*(10) */
22300 { reserved_block , 0 , 0 , 16,
22301 0xfc00 , 0x7800 , 0 , 0,
22302 0x0 }, /* P16~*(14) */
22303 { branch_instruction , 0 , 0 , 16,
22304 0xfc00 , 0x9800 , &BEQZC_16_ , 0,
22305 0x0 }, /* BEQZC[16] */
22306 { branch_instruction , 0 , 0 , 16,
22307 0xfc00 , 0xb800 , &BNEZC_16_ , 0,
22308 0x0 }, /* BNEZC[16] */
22309 { pool , P16_BR , 2 , 16,
22310 0xfc00 , 0xd800 , 0 , 0,
22311 0x0 }, /* P16.BR */
22312 { reserved_block , 0 , 0 , 16,
22313 0xfc00 , 0xf800 , 0 , 0,
22314 0x0 }, /* P16~*(30) */
22315 { pool , P16_SR , 2 , 16,
22316 0xfc00 , 0x1c00 , 0 , 0,
22317 0x0 }, /* P16.SR */
22318 { pool , P16_4X4 , 4 , 16,
22319 0xfc00 , 0x3c00 , 0 , 0,
22320 0x0 }, /* P16.4X4 */
22321 { pool , P16_LB , 4 , 16,
22322 0xfc00 , 0x5c00 , 0 , 0,
22323 0x0 }, /* P16.LB */
22324 { pool , P16_LH , 4 , 16,
22325 0xfc00 , 0x7c00 , 0 , 0,
22326 0x0 }, /* P16.LH */
22327 { reserved_block , 0 , 0 , 16,
22328 0xfc00 , 0x9c00 , 0 , 0,
22329 0x0 }, /* P16~*(19) */
22330 { instruction , 0 , 0 , 16,
22331 0xfc00 , 0xbc00 , &MOVEP , 0,
22332 XMMS_ }, /* MOVEP */
22333 { reserved_block , 0 , 0 , 16,
22334 0xfc00 , 0xdc00 , 0 , 0,
22335 0x0 }, /* P16~*(27) */
22336 { instruction , 0 , 0 , 16,
22337 0xfc00 , 0xfc00 , &MOVEP_REV_ , 0,
22338 XMMS_ }, /* MOVEP[REV] */
22339 };
22340
22341
22342 static const Pool MAJOR[2] = {
22343 { pool , P32 , 32 , 32,
22344 0x10000000, 0x00000000, 0 , 0,
22345 0x0 }, /* P32 */
22346 { pool , P16 , 32 , 16,
22347 0x1000 , 0x1000 , 0 , 0,
22348 0x0 }, /* P16 */
22349 };
22350
22351 int NMD::Disassemble(const uint16 *data, std::string & dis,
22352 TABLE_ENTRY_TYPE & type, Dis_info *info)
22353 {
22354 return Disassemble(data, dis, type, MAJOR, 2, info);
22355 }
armbru's QEMU hackery