Merge tag 'pull-ppc-for-9.1-2-20240726-1' of https://gitlab.com/npiggin/qemu into...
[qemu/armbru.git] / target / riscv / pmu.h
blob3853d0e2629e4939bdd5aaa5a195a5471e7edfc4
1 /*
2 * RISC-V PMU header file.
4 * Copyright (c) 2021 Western Digital Corporation or its affiliates.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef RISCV_PMU_H
20 #define RISCV_PMU_H
22 #include "cpu.h"
23 #include "qapi/error.h"
25 bool riscv_pmu_ctr_monitor_instructions(CPURISCVState *env,
26 uint32_t target_ctr);
27 bool riscv_pmu_ctr_monitor_cycles(CPURISCVState *env,
28 uint32_t target_ctr);
29 void riscv_pmu_timer_cb(void *priv);
30 void riscv_pmu_init(RISCVCPU *cpu, Error **errp);
31 int riscv_pmu_update_event_map(CPURISCVState *env, uint64_t value,
32 uint32_t ctr_idx);
33 int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx);
34 void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name);
35 int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value,
36 uint32_t ctr_idx);
37 void riscv_pmu_update_fixed_ctrs(CPURISCVState *env, target_ulong newpriv,
38 bool new_virt);
39 RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val,
40 bool upper_half, uint32_t ctr_idx);
42 #endif /* RISCV_PMU_H */