include/hw/arm/virt.h

   1 /*
   2  *
   3  * Copyright (c) 2015 Linaro Limited
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2 or later, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  *
  17  * Emulate a virtual board which works by passing Linux all the information
  18  * it needs about what devices are present via the device tree.
  19  * There are some restrictions about what we can do here:
  20  *  + we can only present devices whose Linux drivers will work based
  21  *    purely on the device tree with no platform data at all
  22  *  + we want to present a very stripped-down minimalist platform,
  23  *    both because this reduces the security attack surface from the guest
  24  *    and also because it reduces our exposure to being broken when
  25  *    the kernel updates its device tree bindings and requires further
  26  *    information in a device binding that we aren't providing.
  27  * This is essentially the same approach kvmtool uses.
  28  */
  29
  30 #ifndef QEMU_ARM_VIRT_H
  31 #define QEMU_ARM_VIRT_H
  32
  33 #include "exec/hwaddr.h"
  34 #include "qemu/notify.h"
  35 #include "hw/boards.h"
  36 #include "hw/arm/boot.h"
  37 #include "hw/arm/bsa.h"
  38 #include "hw/block/flash.h"
  39 #include "sysemu/kvm.h"
  40 #include "hw/intc/arm_gicv3_common.h"
  41 #include "qom/object.h"
  42
  43 #define NUM_GICV2M_SPIS       64
  44 #define NUM_VIRTIO_TRANSPORTS 32
  45 #define NUM_SMMU_IRQS          4
  46
  47 /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
  48 #define PVTIME_SIZE_PER_CPU 64
  49
  50 /* GPIO pins */
  51 #define GPIO_PIN_POWER_BUTTON  3
  52
  53 enum {
  54     VIRT_FLASH,
  55     VIRT_MEM,
  56     VIRT_CPUPERIPHS,
  57     VIRT_GIC_DIST,
  58     VIRT_GIC_CPU,
  59     VIRT_GIC_V2M,
  60     VIRT_GIC_HYP,
  61     VIRT_GIC_VCPU,
  62     VIRT_GIC_ITS,
  63     VIRT_GIC_REDIST,
  64     VIRT_SMMU,
  65     VIRT_UART0,
  66     VIRT_MMIO,
  67     VIRT_RTC,
  68     VIRT_FW_CFG,
  69     VIRT_PCIE,
  70     VIRT_PCIE_MMIO,
  71     VIRT_PCIE_PIO,
  72     VIRT_PCIE_ECAM,
  73     VIRT_PLATFORM_BUS,
  74     VIRT_GPIO,
  75     VIRT_UART1,
  76     VIRT_SECURE_MEM,
  77     VIRT_SECURE_GPIO,
  78     VIRT_PCDIMM_ACPI,
  79     VIRT_ACPI_GED,
  80     VIRT_NVDIMM_ACPI,
  81     VIRT_PVTIME,
  82     VIRT_LOWMEMMAP_LAST,
  83 };
  84
  85 /* indices of IO regions located after the RAM */
  86 enum {
  87     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
  88     VIRT_HIGH_PCIE_ECAM,
  89     VIRT_HIGH_PCIE_MMIO,
  90 };
  91
  92 typedef enum VirtIOMMUType {
  93     VIRT_IOMMU_NONE,
  94     VIRT_IOMMU_SMMUV3,
  95     VIRT_IOMMU_VIRTIO,
  96 } VirtIOMMUType;
  97
  98 typedef enum VirtMSIControllerType {
  99     VIRT_MSI_CTRL_NONE,
 100     VIRT_MSI_CTRL_GICV2M,
 101     VIRT_MSI_CTRL_ITS,
 102 } VirtMSIControllerType;
 103
 104 typedef enum VirtGICType {
 105     VIRT_GIC_VERSION_MAX = 0,
 106     VIRT_GIC_VERSION_HOST = 1,
 107     /* The concrete GIC values have to match the GIC version number */
 108     VIRT_GIC_VERSION_2 = 2,
 109     VIRT_GIC_VERSION_3 = 3,
 110     VIRT_GIC_VERSION_4 = 4,
 111     VIRT_GIC_VERSION_NOSEL,
 112 } VirtGICType;
 113
 114 #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
 115 #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
 116 #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
 117
 118 struct VirtMachineClass {
 119     MachineClass parent;
 120     bool disallow_affinity_adjustment;
 121     bool no_its;
 122     bool no_tcg_its;
 123     bool no_pmu;
 124     bool claim_edge_triggered_timers;
 125     bool smbios_old_sys_ver;
 126     bool no_highmem_compact;
 127     bool no_highmem_ecam;
 128     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
 129     bool kvm_no_adjvtime;
 130     bool no_kvm_steal_time;
 131     bool acpi_expose_flash;
 132     bool no_secure_gpio;
 133     /* Machines < 6.2 have no support for describing cpu topology to guest */
 134     bool no_cpu_topology;
 135     bool no_tcg_lpa2;
 136     bool no_ns_el2_virt_timer_irq;
 137     bool no_nested_smmu;
 138 };
 139
 140 struct VirtMachineState {
 141     MachineState parent;
 142     Notifier machine_done;
 143     DeviceState *platform_bus_dev;
 144     FWCfgState *fw_cfg;
 145     PFlashCFI01 *flash[2];
 146     bool secure;
 147     bool highmem;
 148     bool highmem_compact;
 149     bool highmem_ecam;
 150     bool highmem_mmio;
 151     bool highmem_redists;
 152     bool its;
 153     bool tcg_its;
 154     bool virt;
 155     bool ras;
 156     bool mte;
 157     bool dtb_randomness;
 158     bool second_ns_uart_present;
 159     OnOffAuto acpi;
 160     VirtGICType gic_version;
 161     VirtIOMMUType iommu;
 162     bool default_bus_bypass_iommu;
 163     VirtMSIControllerType msi_controller;
 164     uint16_t virtio_iommu_bdf;
 165     struct arm_boot_info bootinfo;
 166     MemMapEntry *memmap;
 167     char *pciehb_nodename;
 168     const int *irqmap;
 169     int fdt_size;
 170     uint32_t clock_phandle;
 171     uint32_t gic_phandle;
 172     uint32_t msi_phandle;
 173     uint32_t iommu_phandle;
 174     int psci_conduit;
 175     hwaddr highest_gpa;
 176     DeviceState *gic;
 177     DeviceState *acpi_dev;
 178     Notifier powerdown_notifier;
 179     PCIBus *bus;
 180     char *oem_id;
 181     char *oem_table_id;
 182     bool ns_el2_virt_timer_irq;
 183 };
 184
 185 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
 186
 187 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
 188 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
 189
 190 void virt_acpi_setup(VirtMachineState *vms);
 191 bool virt_is_acpi_enabled(VirtMachineState *vms);
 192
 193 /* Return number of redistributors that fit in the specified region */
 194 static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
 195 {
 196     uint32_t redist_size;
 197
 198     if (vms->gic_version == VIRT_GIC_VERSION_3) {
 199         redist_size = GICV3_REDIST_SIZE;
 200     } else {
 201         redist_size = GICV4_REDIST_SIZE;
 202     }
 203     return vms->memmap[region].size / redist_size;
 204 }
 205
 206 /* Return the number of used redistributor regions  */
 207 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
 208 {
 209     uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
 210
 211     assert(vms->gic_version != VIRT_GIC_VERSION_2);
 212
 213     return (MACHINE(vms)->smp.cpus > redist0_capacity &&
 214             vms->highmem_redists) ? 2 : 1;
 215 }
 216
 217 #endif /* QEMU_ARM_VIRT_H */