2 * QEMU PowerPC 440 Bamboo board emulation
4 * Copyright 2007 IBM Corporation.
6 * Jerone Young <jyoung5@us.ibm.com>
7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
8 * Hollis Blanchard <hollisb@us.ibm.com>
10 * This work is licensed under the GNU GPL license version 2 or later.
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qemu/datadir.h"
17 #include "qemu/error-report.h"
18 #include "exec/page-protection.h"
20 #include "hw/pci/pci.h"
21 #include "hw/boards.h"
22 #include "sysemu/kvm.h"
23 #include "sysemu/device_tree.h"
24 #include "hw/loader.h"
26 #include "hw/char/serial-mm.h"
27 #include "hw/ppc/ppc.h"
28 #include "hw/pci-host/ppc4xx.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/reset.h"
31 #include "hw/sysbus.h"
32 #include "hw/intc/ppc-uic.h"
33 #include "hw/qdev-properties.h"
34 #include "qapi/error.h"
38 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
41 #define KERNEL_ADDR 0x1000000
42 #define FDT_ADDR 0x1800000
43 #define RAMDISK_ADDR 0x1900000
45 #define PPC440EP_PCI_CONFIG 0xeec00000
46 #define PPC440EP_PCI_INTACK 0xeed00000
47 #define PPC440EP_PCI_SPECIAL 0xeed00000
48 #define PPC440EP_PCI_REGS 0xef400000
49 #define PPC440EP_PCI_IO 0xe8000000
50 #define PPC440EP_PCI_IOLEN 0x00010000
54 static int bamboo_load_device_tree(MachineState
*machine
,
60 uint32_t mem_reg_property
[] = { 0, 0, cpu_to_be32(machine
->ram_size
) };
64 uint32_t tb_freq
= 400000000;
65 uint32_t clock_freq
= 400000000;
67 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, BINARY_DEVICE_TREE_FILE
);
71 fdt
= load_device_tree(filename
, &fdt_size
);
77 /* Manipulate device tree in memory. */
79 ret
= qemu_fdt_setprop(fdt
, "/memory", "reg", mem_reg_property
,
80 sizeof(mem_reg_property
));
82 fprintf(stderr
, "couldn't set /memory/reg\n");
84 ret
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
87 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
89 ret
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
90 (initrd_base
+ initrd_size
));
92 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
94 ret
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
95 machine
->kernel_cmdline
);
97 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
100 qemu_fdt_setprop_cell(fdt
, "/cpus/cpu@0", "clock-frequency",
102 qemu_fdt_setprop_cell(fdt
, "/cpus/cpu@0", "timebase-frequency",
105 rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE
, fdt
, fdt_size
, addr
);
107 /* Set ms->fdt for 'dumpdtb' QMP/HMP command */
113 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
114 static void mmubooke_create_initial_mapping(CPUPPCState
*env
,
118 ppcemb_tlb_t
*tlb
= &env
->tlb
.tlbe
[0];
121 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
122 tlb
->size
= 1U << 31; /* up to 0x80000000 */
123 tlb
->EPN
= va
& TARGET_PAGE_MASK
;
124 tlb
->RPN
= pa
& TARGET_PAGE_MASK
;
127 tlb
= &env
->tlb
.tlbe
[1];
129 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
130 tlb
->size
= 1U << 31; /* up to 0xffffffff */
131 tlb
->EPN
= 0x80000000 & TARGET_PAGE_MASK
;
132 tlb
->RPN
= 0x80000000 & TARGET_PAGE_MASK
;
136 static void main_cpu_reset(void *opaque
)
138 PowerPCCPU
*cpu
= opaque
;
139 CPUPPCState
*env
= &cpu
->env
;
142 env
->gpr
[1] = (16 * MiB
) - 8;
143 env
->gpr
[3] = FDT_ADDR
;
146 /* Create a mapping for the kernel. */
147 mmubooke_create_initial_mapping(env
, 0, 0);
150 static void bamboo_init(MachineState
*machine
)
152 const char *kernel_filename
= machine
->kernel_filename
;
153 const char *initrd_filename
= machine
->initrd_filename
;
154 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
155 unsigned int pci_irq_nrs
[4] = { 28, 27, 26, 25 };
156 MemoryRegion
*address_space_mem
= get_system_memory();
157 MemoryRegion
*isa
= g_new(MemoryRegion
, 1);
161 target_long initrd_size
= 0;
164 SysBusDevice
*uicsbd
;
168 error_report("machine %s does not support the KVM accelerator",
169 MACHINE_GET_CLASS(machine
)->name
);
173 cpu
= POWERPC_CPU(cpu_create(machine
->cpu_type
));
176 if (env
->mmu_model
!= POWERPC_MMU_BOOKE
) {
177 error_report("MMU model %i not supported by this machine",
182 qemu_register_reset(main_cpu_reset
, cpu
);
183 ppc_booke_timers_init(cpu
, 400000000, 0);
184 ppc_dcr_init(env
, NULL
, NULL
);
186 /* interrupt controller */
187 uicdev
= qdev_new(TYPE_PPC_UIC
);
188 ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev
), cpu
, &error_fatal
);
189 object_unref(OBJECT(uicdev
));
190 uicsbd
= SYS_BUS_DEVICE(uicdev
);
191 sysbus_connect_irq(uicsbd
, PPCUIC_OUTPUT_INT
,
192 qdev_get_gpio_in(DEVICE(cpu
), PPC40x_INPUT_INT
));
193 sysbus_connect_irq(uicsbd
, PPCUIC_OUTPUT_CINT
,
194 qdev_get_gpio_in(DEVICE(cpu
), PPC40x_INPUT_CINT
));
196 /* SDRAM controller */
197 dev
= qdev_new(TYPE_PPC4xx_SDRAM_DDR
);
198 object_property_set_link(OBJECT(dev
), "dram", OBJECT(machine
->ram
),
200 ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev
), cpu
, &error_fatal
);
201 object_unref(OBJECT(dev
));
202 /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */
203 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, qdev_get_gpio_in(uicdev
, 14));
204 /* Enable SDRAM memory regions, this should be done by the firmware */
205 ppc4xx_sdram_ddr_enable(PPC4xx_SDRAM_DDR(dev
));
208 dev
= sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST
, PPC440EP_PCI_CONFIG
,
209 qdev_get_gpio_in(uicdev
, pci_irq_nrs
[0]),
210 qdev_get_gpio_in(uicdev
, pci_irq_nrs
[1]),
211 qdev_get_gpio_in(uicdev
, pci_irq_nrs
[2]),
212 qdev_get_gpio_in(uicdev
, pci_irq_nrs
[3]),
214 pcibus
= (PCIBus
*)qdev_get_child_bus(dev
, "pci.0");
216 error_report("couldn't create PCI controller");
220 memory_region_init_alias(isa
, NULL
, "isa_mmio",
221 get_system_io(), 0, PPC440EP_PCI_IOLEN
);
222 memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO
, isa
);
224 if (serial_hd(0) != NULL
) {
225 serial_mm_init(address_space_mem
, 0xef600300, 0,
226 qdev_get_gpio_in(uicdev
, 0),
227 PPC_SERIAL_MM_BAUDBASE
, serial_hd(0),
230 if (serial_hd(1) != NULL
) {
231 serial_mm_init(address_space_mem
, 0xef600400, 0,
232 qdev_get_gpio_in(uicdev
, 1),
233 PPC_SERIAL_MM_BAUDBASE
, serial_hd(1),
239 * There are no PCI NICs on the Bamboo board, but there are
240 * PCI slots, so we can pick whatever default model we want.
242 pci_init_nic_devices(pcibus
, mc
->default_nic
);
246 if (kernel_filename
) {
247 hwaddr loadaddr
= LOAD_UIMAGE_LOADADDR_INVALID
;
248 success
= load_uimage(kernel_filename
, &entry
, &loadaddr
, NULL
,
252 success
= load_elf(kernel_filename
, NULL
, NULL
, NULL
, &elf_entry
,
253 NULL
, NULL
, NULL
, 1, PPC_ELF_MACHINE
, 0, 0);
256 /* XXX try again as binary */
258 error_report("could not load kernel '%s'", kernel_filename
);
264 if (initrd_filename
) {
265 initrd_size
= load_image_targphys(initrd_filename
, RAMDISK_ADDR
,
266 machine
->ram_size
- RAMDISK_ADDR
);
268 if (initrd_size
< 0) {
269 error_report("could not load ram disk '%s' at %x",
270 initrd_filename
, RAMDISK_ADDR
);
275 /* If we're loading a kernel directly, we must load the device tree too. */
276 if (kernel_filename
) {
277 if (bamboo_load_device_tree(machine
, FDT_ADDR
,
278 RAMDISK_ADDR
, initrd_size
) < 0) {
279 error_report("couldn't load device tree");
285 static void bamboo_machine_init(MachineClass
*mc
)
288 mc
->init
= bamboo_init
;
289 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("440epb");
290 mc
->default_ram_id
= "ppc4xx.sdram";
291 mc
->default_nic
= "e1000";
294 DEFINE_MACHINE("bamboo", bamboo_machine_init
)