hw/display/virtio-vga.c

   1 #include "qemu/osdep.h"
   2 #include "hw/pci/pci.h"
   3 #include "hw/qdev-properties.h"
   4 #include "hw/virtio/virtio-gpu.h"
   5 #include "qapi/error.h"
   6 #include "qemu/module.h"
   7 #include "virtio-vga.h"
   8 #include "qom/object.h"
   9
  10 static void virtio_vga_base_invalidate_display(void *opaque)
  11 {
  12     VirtIOVGABase *vvga = opaque;
  13     VirtIOGPUBase *g = vvga->vgpu;
  14
  15     if (g->enable) {
  16         g->hw_ops->invalidate(g);
  17     } else {
  18         vvga->vga.hw_ops->invalidate(&vvga->vga);
  19     }
  20 }
  21
  22 static void virtio_vga_base_update_display(void *opaque)
  23 {
  24     VirtIOVGABase *vvga = opaque;
  25     VirtIOGPUBase *g = vvga->vgpu;
  26
  27     if (g->enable) {
  28         g->hw_ops->gfx_update(g);
  29     } else {
  30         vvga->vga.hw_ops->gfx_update(&vvga->vga);
  31     }
  32 }
  33
  34 static void virtio_vga_base_text_update(void *opaque, console_ch_t *chardata)
  35 {
  36     VirtIOVGABase *vvga = opaque;
  37     VirtIOGPUBase *g = vvga->vgpu;
  38
  39     if (g->enable) {
  40         if (g->hw_ops->text_update) {
  41             g->hw_ops->text_update(g, chardata);
  42         }
  43     } else {
  44         if (vvga->vga.hw_ops->text_update) {
  45             vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
  46         }
  47     }
  48 }
  49
  50 static void virtio_vga_base_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
  51 {
  52     VirtIOVGABase *vvga = opaque;
  53     VirtIOGPUBase *g = vvga->vgpu;
  54
  55     if (g->hw_ops->ui_info) {
  56         g->hw_ops->ui_info(g, idx, info);
  57     }
  58 }
  59
  60 static void virtio_vga_base_gl_block(void *opaque, bool block)
  61 {
  62     VirtIOVGABase *vvga = opaque;
  63     VirtIOGPUBase *g = vvga->vgpu;
  64
  65     if (g->hw_ops->gl_block) {
  66         g->hw_ops->gl_block(g, block);
  67     }
  68 }
  69
  70 static int virtio_vga_base_get_flags(void *opaque)
  71 {
  72     VirtIOVGABase *vvga = opaque;
  73     VirtIOGPUBase *g = vvga->vgpu;
  74
  75     return g->hw_ops->get_flags(g);
  76 }
  77
  78 static const GraphicHwOps virtio_vga_base_ops = {
  79     .get_flags = virtio_vga_base_get_flags,
  80     .invalidate = virtio_vga_base_invalidate_display,
  81     .gfx_update = virtio_vga_base_update_display,
  82     .text_update = virtio_vga_base_text_update,
  83     .ui_info = virtio_vga_base_ui_info,
  84     .gl_block = virtio_vga_base_gl_block,
  85 };
  86
  87 static const VMStateDescription vmstate_virtio_vga_base = {
  88     .name = "virtio-vga",
  89     .version_id = 2,
  90     .minimum_version_id = 2,
  91     .fields = (VMStateField[]) {
  92         /* no pci stuff here, saving the virtio device will handle that */
  93         VMSTATE_STRUCT(vga, VirtIOVGABase, 0,
  94                        vmstate_vga_common, VGACommonState),
  95         VMSTATE_END_OF_LIST()
  96     }
  97 };
  98
  99 /* VGA device wrapper around PCI device around virtio GPU */
 100 static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
 101 {
 102     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(vpci_dev);
 103     VirtIOGPUBase *g = vvga->vgpu;
 104     VGACommonState *vga = &vvga->vga;
 105     uint32_t offset;
 106     int i;
 107
 108     /* init vga compat bits */
 109     vga->vram_size_mb = 8;
 110     if (!vga_common_init(vga, OBJECT(vpci_dev), errp)) {
 111         return;
 112     }
 113     vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
 114              pci_address_space_io(&vpci_dev->pci_dev), true);
 115     pci_register_bar(&vpci_dev->pci_dev, 0,
 116                      PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
 117
 118     /*
 119      * Configure virtio bar and regions
 120      *
 121      * We use bar #2 for the mmio regions, to be compatible with stdvga.
 122      * virtio regions are moved to the end of bar #2, to make room for
 123      * the stdvga mmio registers at the start of bar #2.
 124      */
 125     vpci_dev->modern_mem_bar_idx = 2;
 126     vpci_dev->msix_bar_idx = 4;
 127     vpci_dev->modern_io_bar_idx = 5;
 128
 129     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
 130         /*
 131          * with page-per-vq=off there is no padding space we can use
 132          * for the stdvga registers.  Make the common and isr regions
 133          * smaller then.
 134          */
 135         vpci_dev->common.size /= 2;
 136         vpci_dev->isr.size /= 2;
 137     }
 138
 139     offset = memory_region_size(&vpci_dev->modern_bar);
 140     offset -= vpci_dev->notify.size;
 141     vpci_dev->notify.offset = offset;
 142     offset -= vpci_dev->device.size;
 143     vpci_dev->device.offset = offset;
 144     offset -= vpci_dev->isr.size;
 145     vpci_dev->isr.offset = offset;
 146     offset -= vpci_dev->common.size;
 147     vpci_dev->common.offset = offset;
 148
 149     /* init virtio bits */
 150     virtio_pci_force_virtio_1(vpci_dev);
 151     if (!qdev_realize(DEVICE(g), BUS(&vpci_dev->bus), errp)) {
 152         return;
 153     }
 154
 155     /* add stdvga mmio regions */
 156     pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
 157                                  vvga->vga_mrs, true, false);
 158
 159     vga->con = g->scanout[0].con;
 160     graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga);
 161
 162     for (i = 0; i < g->conf.max_outputs; i++) {
 163         object_property_set_link(OBJECT(g->scanout[i].con), "device",
 164                                  OBJECT(vpci_dev), &error_abort);
 165     }
 166 }
 167
 168 static void virtio_vga_base_reset_hold(Object *obj)
 169 {
 170     VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(obj);
 171     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(obj);
 172
 173     /* reset virtio-gpu */
 174     if (klass->parent_phases.hold) {
 175         klass->parent_phases.hold(obj);
 176     }
 177
 178     /* reset vga */
 179     vga_common_reset(&vvga->vga);
 180     vga_dirty_log_start(&vvga->vga);
 181 }
 182
 183 static bool virtio_vga_get_big_endian_fb(Object *obj, Error **errp)
 184 {
 185     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 186
 187     return d->vga.big_endian_fb;
 188 }
 189
 190 static void virtio_vga_set_big_endian_fb(Object *obj, bool value, Error **errp)
 191 {
 192     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 193
 194     d->vga.big_endian_fb = value;
 195 }
 196
 197 static Property virtio_vga_base_properties[] = {
 198     DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
 199     DEFINE_PROP_END_OF_LIST(),
 200 };
 201
 202 static void virtio_vga_base_class_init(ObjectClass *klass, void *data)
 203 {
 204     DeviceClass *dc = DEVICE_CLASS(klass);
 205     VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
 206     VirtIOVGABaseClass *v = VIRTIO_VGA_BASE_CLASS(klass);
 207     PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
 208     ResettableClass *rc = RESETTABLE_CLASS(klass);
 209
 210     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 211     device_class_set_props(dc, virtio_vga_base_properties);
 212     dc->vmsd = &vmstate_virtio_vga_base;
 213     dc->hotpluggable = false;
 214     resettable_class_set_parent_phases(rc, NULL, virtio_vga_base_reset_hold,
 215                                        NULL, &v->parent_phases);
 216
 217     k->realize = virtio_vga_base_realize;
 218     pcidev_k->romfile = "vgabios-virtio.bin";
 219     pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
 220
 221     /* Expose framebuffer byteorder via QOM */
 222     object_class_property_add_bool(klass, "big-endian-framebuffer",
 223                                    virtio_vga_get_big_endian_fb,
 224                                    virtio_vga_set_big_endian_fb);
 225 }
 226
 227 static const TypeInfo virtio_vga_base_info = {
 228     .name          = TYPE_VIRTIO_VGA_BASE,
 229     .parent        = TYPE_VIRTIO_PCI,
 230     .instance_size = sizeof(VirtIOVGABase),
 231     .class_size    = sizeof(VirtIOVGABaseClass),
 232     .class_init    = virtio_vga_base_class_init,
 233     .abstract      = true,
 234 };
 235 module_obj(TYPE_VIRTIO_VGA_BASE);
 236 module_kconfig(VIRTIO_VGA);
 237
 238 #define TYPE_VIRTIO_VGA "virtio-vga"
 239
 240 typedef struct VirtIOVGA VirtIOVGA;
 241 DECLARE_INSTANCE_CHECKER(VirtIOVGA, VIRTIO_VGA,
 242                          TYPE_VIRTIO_VGA)
 243
 244 struct VirtIOVGA {
 245     VirtIOVGABase parent_obj;
 246
 247     VirtIOGPU     vdev;
 248 };
 249
 250 static void virtio_vga_inst_initfn(Object *obj)
 251 {
 252     VirtIOVGA *dev = VIRTIO_VGA(obj);
 253
 254     virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
 255                                 TYPE_VIRTIO_GPU);
 256     VIRTIO_VGA_BASE(dev)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
 257 }
 258
 259
 260 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
 261     .generic_name  = TYPE_VIRTIO_VGA,
 262     .parent        = TYPE_VIRTIO_VGA_BASE,
 263     .instance_size = sizeof(VirtIOVGA),
 264     .instance_init = virtio_vga_inst_initfn,
 265 };
 266 module_obj(TYPE_VIRTIO_VGA);
 267
 268 static void virtio_vga_register_types(void)
 269 {
 270     type_register_static(&virtio_vga_base_info);
 271     virtio_pci_types_register(&virtio_vga_info);
 272 }
 273
 274 type_init(virtio_vga_register_types)