2 * RAM allocation and memory access
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "exec/page-vary.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
25 #include "qemu/cacheflush.h"
26 #include "qemu/hbitmap.h"
27 #include "qemu/madvise.h"
30 #include "hw/core/tcg-cpu-ops.h"
31 #endif /* CONFIG_TCG */
33 #include "exec/exec-all.h"
34 #include "exec/target_page.h"
35 #include "hw/qdev-core.h"
36 #include "hw/qdev-properties.h"
37 #include "hw/boards.h"
38 #include "hw/xen/xen.h"
39 #include "sysemu/kvm.h"
40 #include "sysemu/tcg.h"
41 #include "sysemu/qtest.h"
42 #include "qemu/timer.h"
43 #include "qemu/config-file.h"
44 #include "qemu/error-report.h"
45 #include "qemu/qemu-print.h"
47 #include "qemu/memalign.h"
48 #include "exec/memory.h"
49 #include "exec/ioport.h"
50 #include "sysemu/dma.h"
51 #include "sysemu/hostmem.h"
52 #include "sysemu/hw_accel.h"
53 #include "sysemu/xen-mapcache.h"
54 #include "trace/trace-root.h"
56 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
57 #include <linux/falloc.h>
60 #include "qemu/rcu_queue.h"
61 #include "qemu/main-loop.h"
62 #include "exec/translate-all.h"
63 #include "sysemu/replay.h"
65 #include "exec/memory-internal.h"
66 #include "exec/ram_addr.h"
68 #include "qemu/pmem.h"
70 #include "migration/vmstate.h"
72 #include "qemu/range.h"
74 #include "qemu/mmap-alloc.h"
77 #include "monitor/monitor.h"
79 #ifdef CONFIG_LIBDAXCTL
80 #include <daxctl/libdaxctl.h>
83 //#define DEBUG_SUBPAGE
85 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
86 * are protected by the ramlist lock.
88 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
90 static MemoryRegion
*system_memory
;
91 static MemoryRegion
*system_io
;
93 AddressSpace address_space_io
;
94 AddressSpace address_space_memory
;
96 static MemoryRegion io_mem_unassigned
;
98 typedef struct PhysPageEntry PhysPageEntry
;
100 struct PhysPageEntry
{
101 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
103 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
107 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
109 /* Size of the L2 (and L3, etc) page tables. */
110 #define ADDR_SPACE_BITS 64
113 #define P_L2_SIZE (1 << P_L2_BITS)
115 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
117 typedef PhysPageEntry Node
[P_L2_SIZE
];
119 typedef struct PhysPageMap
{
122 unsigned sections_nb
;
123 unsigned sections_nb_alloc
;
125 unsigned nodes_nb_alloc
;
127 MemoryRegionSection
*sections
;
130 struct AddressSpaceDispatch
{
131 MemoryRegionSection
*mru_section
;
132 /* This is a multi-level map on the physical address space.
133 * The bottom level has pointers to MemoryRegionSections.
135 PhysPageEntry phys_map
;
139 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
140 typedef struct subpage_t
{
144 uint16_t sub_section
[];
147 #define PHYS_SECTION_UNASSIGNED 0
149 static void io_mem_init(void);
150 static void memory_map_init(void);
151 static void tcg_log_global_after_sync(MemoryListener
*listener
);
152 static void tcg_commit(MemoryListener
*listener
);
155 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
156 * @cpu: the CPU whose AddressSpace this is
157 * @as: the AddressSpace itself
158 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
159 * @tcg_as_listener: listener for tracking changes to the AddressSpace
161 struct CPUAddressSpace
{
164 struct AddressSpaceDispatch
*memory_dispatch
;
165 MemoryListener tcg_as_listener
;
168 struct DirtyBitmapSnapshot
{
171 unsigned long dirty
[];
174 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
176 static unsigned alloc_hint
= 16;
177 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
178 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
179 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
180 alloc_hint
= map
->nodes_nb_alloc
;
184 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
191 ret
= map
->nodes_nb
++;
193 assert(ret
!= PHYS_MAP_NODE_NIL
);
194 assert(ret
!= map
->nodes_nb_alloc
);
196 e
.skip
= leaf
? 0 : 1;
197 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
198 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
199 memcpy(&p
[i
], &e
, sizeof(e
));
204 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
205 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
209 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
211 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
212 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
214 p
= map
->nodes
[lp
->ptr
];
215 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
217 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
218 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
224 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
230 static void phys_page_set(AddressSpaceDispatch
*d
,
231 hwaddr index
, uint64_t nb
,
234 /* Wildly overreserve - it doesn't matter much. */
235 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
237 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
240 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
241 * and update our entry so we can skip it and go directly to the destination.
243 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
245 unsigned valid_ptr
= P_L2_SIZE
;
250 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
255 for (i
= 0; i
< P_L2_SIZE
; i
++) {
256 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
263 phys_page_compact(&p
[i
], nodes
);
267 /* We can only compress if there's only one child. */
272 assert(valid_ptr
< P_L2_SIZE
);
274 /* Don't compress if it won't fit in the # of bits we have. */
275 if (P_L2_LEVELS
>= (1 << 6) &&
276 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
280 lp
->ptr
= p
[valid_ptr
].ptr
;
281 if (!p
[valid_ptr
].skip
) {
282 /* If our only child is a leaf, make this a leaf. */
283 /* By design, we should have made this node a leaf to begin with so we
284 * should never reach here.
285 * But since it's so simple to handle this, let's do it just in case we
290 lp
->skip
+= p
[valid_ptr
].skip
;
294 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
296 if (d
->phys_map
.skip
) {
297 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
301 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
304 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
305 * the section must cover the entire address space.
307 return int128_gethi(section
->size
) ||
308 range_covers_byte(section
->offset_within_address_space
,
309 int128_getlo(section
->size
), addr
);
312 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
314 PhysPageEntry lp
= d
->phys_map
, *p
;
315 Node
*nodes
= d
->map
.nodes
;
316 MemoryRegionSection
*sections
= d
->map
.sections
;
317 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
320 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
321 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
322 return §ions
[PHYS_SECTION_UNASSIGNED
];
325 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
328 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
329 return §ions
[lp
.ptr
];
331 return §ions
[PHYS_SECTION_UNASSIGNED
];
335 /* Called from RCU critical section */
336 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
338 bool resolve_subpage
)
340 MemoryRegionSection
*section
= qatomic_read(&d
->mru_section
);
343 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
344 !section_covers_addr(section
, addr
)) {
345 section
= phys_page_find(d
, addr
);
346 qatomic_set(&d
->mru_section
, section
);
348 if (resolve_subpage
&& section
->mr
->subpage
) {
349 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
350 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
355 /* Called from RCU critical section */
356 static MemoryRegionSection
*
357 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
358 hwaddr
*plen
, bool resolve_subpage
)
360 MemoryRegionSection
*section
;
364 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
365 /* Compute offset within MemoryRegionSection */
366 addr
-= section
->offset_within_address_space
;
368 /* Compute offset within MemoryRegion */
369 *xlat
= addr
+ section
->offset_within_region
;
373 /* MMIO registers can be expected to perform full-width accesses based only
374 * on their address, without considering adjacent registers that could
375 * decode to completely different MemoryRegions. When such registers
376 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
377 * regions overlap wildly. For this reason we cannot clamp the accesses
380 * If the length is small (as is the case for address_space_ldl/stl),
381 * everything works fine. If the incoming length is large, however,
382 * the caller really has to do the clamping through memory_access_size.
384 if (memory_region_is_ram(mr
)) {
385 diff
= int128_sub(section
->size
, int128_make64(addr
));
386 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
392 * address_space_translate_iommu - translate an address through an IOMMU
393 * memory region and then through the target address space.
395 * @iommu_mr: the IOMMU memory region that we start the translation from
396 * @addr: the address to be translated through the MMU
397 * @xlat: the translated address offset within the destination memory region.
398 * It cannot be %NULL.
399 * @plen_out: valid read/write length of the translated address. It
401 * @page_mask_out: page mask for the translated address. This
402 * should only be meaningful for IOMMU translated
403 * addresses, since there may be huge pages that this bit
404 * would tell. It can be %NULL if we don't care about it.
405 * @is_write: whether the translation operation is for write
406 * @is_mmio: whether this can be MMIO, set true if it can
407 * @target_as: the address space targeted by the IOMMU
408 * @attrs: transaction attributes
410 * This function is called from RCU critical section. It is the common
411 * part of flatview_do_translate and address_space_translate_cached.
413 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
416 hwaddr
*page_mask_out
,
419 AddressSpace
**target_as
,
422 MemoryRegionSection
*section
;
423 hwaddr page_mask
= (hwaddr
)-1;
427 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
431 if (imrc
->attrs_to_index
) {
432 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
435 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
436 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
438 if (!(iotlb
.perm
& (1 << is_write
))) {
442 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
443 | (addr
& iotlb
.addr_mask
));
444 page_mask
&= iotlb
.addr_mask
;
445 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
446 *target_as
= iotlb
.target_as
;
448 section
= address_space_translate_internal(
449 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
452 iommu_mr
= memory_region_get_iommu(section
->mr
);
453 } while (unlikely(iommu_mr
));
456 *page_mask_out
= page_mask
;
461 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
465 * flatview_do_translate - translate an address in FlatView
467 * @fv: the flat view that we want to translate on
468 * @addr: the address to be translated in above address space
469 * @xlat: the translated address offset within memory region. It
471 * @plen_out: valid read/write length of the translated address. It
472 * can be @NULL when we don't care about it.
473 * @page_mask_out: page mask for the translated address. This
474 * should only be meaningful for IOMMU translated
475 * addresses, since there may be huge pages that this bit
476 * would tell. It can be @NULL if we don't care about it.
477 * @is_write: whether the translation operation is for write
478 * @is_mmio: whether this can be MMIO, set true if it can
479 * @target_as: the address space targeted by the IOMMU
480 * @attrs: memory transaction attributes
482 * This function is called from RCU critical section
484 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
488 hwaddr
*page_mask_out
,
491 AddressSpace
**target_as
,
494 MemoryRegionSection
*section
;
495 IOMMUMemoryRegion
*iommu_mr
;
496 hwaddr plen
= (hwaddr
)(-1);
502 section
= address_space_translate_internal(
503 flatview_to_dispatch(fv
), addr
, xlat
,
506 iommu_mr
= memory_region_get_iommu(section
->mr
);
507 if (unlikely(iommu_mr
)) {
508 return address_space_translate_iommu(iommu_mr
, xlat
,
509 plen_out
, page_mask_out
,
514 /* Not behind an IOMMU, use default page size. */
515 *page_mask_out
= ~TARGET_PAGE_MASK
;
521 /* Called from RCU critical section */
522 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
523 bool is_write
, MemTxAttrs attrs
)
525 MemoryRegionSection section
;
526 hwaddr xlat
, page_mask
;
529 * This can never be MMIO, and we don't really care about plen,
532 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
533 NULL
, &page_mask
, is_write
, false, &as
,
536 /* Illegal translation */
537 if (section
.mr
== &io_mem_unassigned
) {
541 /* Convert memory region offset into address space offset */
542 xlat
+= section
.offset_within_address_space
-
543 section
.offset_within_region
;
545 return (IOMMUTLBEntry
) {
547 .iova
= addr
& ~page_mask
,
548 .translated_addr
= xlat
& ~page_mask
,
549 .addr_mask
= page_mask
,
550 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
555 return (IOMMUTLBEntry
) {0};
558 /* Called from RCU critical section */
559 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
560 hwaddr
*plen
, bool is_write
,
564 MemoryRegionSection section
;
565 AddressSpace
*as
= NULL
;
567 /* This can be MMIO, so setup MMIO bit. */
568 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
569 is_write
, true, &as
, attrs
);
572 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
573 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
574 *plen
= MIN(page
, *plen
);
580 typedef struct TCGIOMMUNotifier
{
588 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
590 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
592 if (!notifier
->active
) {
595 tlb_flush(notifier
->cpu
);
596 notifier
->active
= false;
597 /* We leave the notifier struct on the list to avoid reallocating it later.
598 * Generally the number of IOMMUs a CPU deals with will be small.
599 * In any case we can't unregister the iommu notifier from a notify
604 static void tcg_register_iommu_notifier(CPUState
*cpu
,
605 IOMMUMemoryRegion
*iommu_mr
,
608 /* Make sure this CPU has an IOMMU notifier registered for this
609 * IOMMU/IOMMU index combination, so that we can flush its TLB
610 * when the IOMMU tells us the mappings we've cached have changed.
612 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
613 TCGIOMMUNotifier
*notifier
= NULL
;
616 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
617 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
618 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
622 if (i
== cpu
->iommu_notifiers
->len
) {
623 /* Not found, add a new entry at the end of the array */
624 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
625 notifier
= g_new0(TCGIOMMUNotifier
, 1);
626 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
629 notifier
->iommu_idx
= iommu_idx
;
631 /* Rather than trying to register interest in the specific part
632 * of the iommu's address space that we've accessed and then
633 * expand it later as subsequent accesses touch more of it, we
634 * just register interest in the whole thing, on the assumption
635 * that iommu reconfiguration will be rare.
637 iommu_notifier_init(¬ifier
->n
,
638 tcg_iommu_unmap_notify
,
639 IOMMU_NOTIFIER_UNMAP
,
643 memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
647 if (!notifier
->active
) {
648 notifier
->active
= true;
652 void tcg_iommu_free_notifier_list(CPUState
*cpu
)
654 /* Destroy the CPU's notifier list */
656 TCGIOMMUNotifier
*notifier
;
658 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
659 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
660 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
663 g_array_free(cpu
->iommu_notifiers
, true);
666 void tcg_iommu_init_notifier_list(CPUState
*cpu
)
668 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
671 /* Called from RCU critical section */
672 MemoryRegionSection
*
673 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr orig_addr
,
674 hwaddr
*xlat
, hwaddr
*plen
,
675 MemTxAttrs attrs
, int *prot
)
677 MemoryRegionSection
*section
;
678 IOMMUMemoryRegion
*iommu_mr
;
679 IOMMUMemoryRegionClass
*imrc
;
682 hwaddr addr
= orig_addr
;
683 AddressSpaceDispatch
*d
= cpu
->cpu_ases
[asidx
].memory_dispatch
;
686 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
688 iommu_mr
= memory_region_get_iommu(section
->mr
);
693 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
695 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
696 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
697 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
698 * doesn't short-cut its translation table walk.
700 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
701 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
702 | (addr
& iotlb
.addr_mask
));
703 /* Update the caller's prot bits to remove permissions the IOMMU
704 * is giving us a failure response for. If we get down to no
705 * permissions left at all we can give up now.
707 if (!(iotlb
.perm
& IOMMU_RO
)) {
708 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
710 if (!(iotlb
.perm
& IOMMU_WO
)) {
711 *prot
&= ~PAGE_WRITE
;
718 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
721 assert(!memory_region_is_iommu(section
->mr
));
727 * We should be given a page-aligned address -- certainly
728 * tlb_set_page_with_attrs() does so. The page offset of xlat
729 * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0.
730 * The page portion of xlat will be logged by memory_region_access_valid()
731 * when this memory access is rejected, so use the original untranslated
734 assert((orig_addr
& ~TARGET_PAGE_MASK
) == 0);
736 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
739 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
740 const char *prefix
, MemoryRegion
*mr
)
742 CPUAddressSpace
*newas
;
743 AddressSpace
*as
= g_new0(AddressSpace
, 1);
747 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
748 address_space_init(as
, mr
, as_name
);
751 /* Target code should have set num_ases before calling us */
752 assert(asidx
< cpu
->num_ases
);
755 /* address space 0 gets the convenience alias */
759 /* KVM cannot currently support multiple address spaces. */
760 assert(asidx
== 0 || !kvm_enabled());
762 if (!cpu
->cpu_ases
) {
763 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
766 newas
= &cpu
->cpu_ases
[asidx
];
770 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
771 newas
->tcg_as_listener
.commit
= tcg_commit
;
772 newas
->tcg_as_listener
.name
= "tcg";
773 memory_listener_register(&newas
->tcg_as_listener
, as
);
777 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
779 /* Return the AddressSpace corresponding to the specified index */
780 return cpu
->cpu_ases
[asidx
].as
;
783 /* Called from RCU critical section */
784 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
788 block
= qatomic_rcu_read(&ram_list
.mru_block
);
789 if (block
&& addr
- block
->offset
< block
->max_length
) {
792 RAMBLOCK_FOREACH(block
) {
793 if (addr
- block
->offset
< block
->max_length
) {
798 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
802 /* It is safe to write mru_block outside the iothread lock. This
807 * xxx removed from list
811 * call_rcu(reclaim_ramblock, xxx);
814 * qatomic_rcu_set is not needed here. The block was already published
815 * when it was placed into the list. Here we're just making an extra
816 * copy of the pointer.
818 ram_list
.mru_block
= block
;
822 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
829 assert(tcg_enabled());
830 end
= TARGET_PAGE_ALIGN(start
+ length
);
831 start
&= TARGET_PAGE_MASK
;
833 RCU_READ_LOCK_GUARD();
834 block
= qemu_get_ram_block(start
);
835 assert(block
== qemu_get_ram_block(end
- 1));
836 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
838 tlb_reset_dirty(cpu
, start1
, length
);
842 /* Note: start and end must be within the same ram block. */
843 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
847 DirtyMemoryBlocks
*blocks
;
848 unsigned long end
, page
, start_page
;
851 uint64_t mr_offset
, mr_size
;
857 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
858 start_page
= start
>> TARGET_PAGE_BITS
;
861 WITH_RCU_READ_LOCK_GUARD() {
862 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
863 ramblock
= qemu_get_ram_block(start
);
864 /* Range sanity check on the ramblock */
865 assert(start
>= ramblock
->offset
&&
866 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
869 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
870 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
871 unsigned long num
= MIN(end
- page
,
872 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
874 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
879 mr_offset
= (ram_addr_t
)(start_page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
880 mr_size
= (end
- start_page
) << TARGET_PAGE_BITS
;
881 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
884 if (dirty
&& tcg_enabled()) {
885 tlb_reset_dirty_range_all(start
, length
);
891 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
892 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
894 DirtyMemoryBlocks
*blocks
;
895 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
896 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
897 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
898 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
899 DirtyBitmapSnapshot
*snap
;
900 unsigned long page
, end
, dest
;
902 snap
= g_malloc0(sizeof(*snap
) +
903 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
907 page
= first
>> TARGET_PAGE_BITS
;
908 end
= last
>> TARGET_PAGE_BITS
;
911 WITH_RCU_READ_LOCK_GUARD() {
912 blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[client
]);
915 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
916 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
917 unsigned long num
= MIN(end
- page
,
918 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
920 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
921 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
922 offset
>>= BITS_PER_LEVEL
;
924 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
925 blocks
->blocks
[idx
] + offset
,
928 dest
+= num
>> BITS_PER_LEVEL
;
933 tlb_reset_dirty_range_all(start
, length
);
936 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
941 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
945 unsigned long page
, end
;
947 assert(start
>= snap
->start
);
948 assert(start
+ length
<= snap
->end
);
950 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
951 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
954 if (test_bit(page
, snap
->dirty
)) {
962 /* Called from RCU critical section */
963 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
964 MemoryRegionSection
*section
)
966 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
967 return section
- d
->map
.sections
;
970 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
972 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
974 static uint16_t phys_section_add(PhysPageMap
*map
,
975 MemoryRegionSection
*section
)
977 /* The physical section number is ORed with a page-aligned
978 * pointer to produce the iotlb entries. Thus it should
979 * never overflow into the page-aligned value.
981 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
983 if (map
->sections_nb
== map
->sections_nb_alloc
) {
984 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
985 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
986 map
->sections_nb_alloc
);
988 map
->sections
[map
->sections_nb
] = *section
;
989 memory_region_ref(section
->mr
);
990 return map
->sections_nb
++;
993 static void phys_section_destroy(MemoryRegion
*mr
)
995 bool have_sub_page
= mr
->subpage
;
997 memory_region_unref(mr
);
1000 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1001 object_unref(OBJECT(&subpage
->iomem
));
1006 static void phys_sections_free(PhysPageMap
*map
)
1008 while (map
->sections_nb
> 0) {
1009 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1010 phys_section_destroy(section
->mr
);
1012 g_free(map
->sections
);
1016 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1018 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1020 hwaddr base
= section
->offset_within_address_space
1022 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1023 MemoryRegionSection subsection
= {
1024 .offset_within_address_space
= base
,
1025 .size
= int128_make64(TARGET_PAGE_SIZE
),
1029 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1031 if (!(existing
->mr
->subpage
)) {
1032 subpage
= subpage_init(fv
, base
);
1034 subsection
.mr
= &subpage
->iomem
;
1035 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1036 phys_section_add(&d
->map
, &subsection
));
1038 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1040 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1041 end
= start
+ int128_get64(section
->size
) - 1;
1042 subpage_register(subpage
, start
, end
,
1043 phys_section_add(&d
->map
, section
));
1047 static void register_multipage(FlatView
*fv
,
1048 MemoryRegionSection
*section
)
1050 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1051 hwaddr start_addr
= section
->offset_within_address_space
;
1052 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1053 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1057 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1061 * The range in *section* may look like this:
1065 * where s stands for subpage and P for page.
1067 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1069 MemoryRegionSection remain
= *section
;
1070 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1072 /* register first subpage */
1073 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1074 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1075 - remain
.offset_within_address_space
;
1077 MemoryRegionSection now
= remain
;
1078 now
.size
= int128_min(int128_make64(left
), now
.size
);
1079 register_subpage(fv
, &now
);
1080 if (int128_eq(remain
.size
, now
.size
)) {
1083 remain
.size
= int128_sub(remain
.size
, now
.size
);
1084 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1085 remain
.offset_within_region
+= int128_get64(now
.size
);
1088 /* register whole pages */
1089 if (int128_ge(remain
.size
, page_size
)) {
1090 MemoryRegionSection now
= remain
;
1091 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1092 register_multipage(fv
, &now
);
1093 if (int128_eq(remain
.size
, now
.size
)) {
1096 remain
.size
= int128_sub(remain
.size
, now
.size
);
1097 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1098 remain
.offset_within_region
+= int128_get64(now
.size
);
1101 /* register last subpage */
1102 register_subpage(fv
, &remain
);
1105 void qemu_flush_coalesced_mmio_buffer(void)
1108 kvm_flush_coalesced_mmio_buffer();
1111 void qemu_mutex_lock_ramlist(void)
1113 qemu_mutex_lock(&ram_list
.mutex
);
1116 void qemu_mutex_unlock_ramlist(void)
1118 qemu_mutex_unlock(&ram_list
.mutex
);
1121 GString
*ram_block_format(void)
1125 GString
*buf
= g_string_new("");
1127 RCU_READ_LOCK_GUARD();
1128 g_string_append_printf(buf
, "%24s %8s %18s %18s %18s %18s %3s\n",
1129 "Block Name", "PSize", "Offset", "Used", "Total",
1132 RAMBLOCK_FOREACH(block
) {
1133 psize
= size_to_str(block
->page_size
);
1134 g_string_append_printf(buf
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1135 " 0x%016" PRIx64
" 0x%016" PRIx64
" %3s\n",
1136 block
->idstr
, psize
,
1137 (uint64_t)block
->offset
,
1138 (uint64_t)block
->used_length
,
1139 (uint64_t)block
->max_length
,
1140 (uint64_t)(uintptr_t)block
->host
,
1141 block
->mr
->readonly
? "ro" : "rw");
1149 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1151 long *hpsize_min
= opaque
;
1153 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1154 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1155 long hpsize
= host_memory_backend_pagesize(backend
);
1157 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1158 *hpsize_min
= hpsize
;
1165 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1167 long *hpsize_max
= opaque
;
1169 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1170 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1171 long hpsize
= host_memory_backend_pagesize(backend
);
1173 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1174 *hpsize_max
= hpsize
;
1182 * TODO: We assume right now that all mapped host memory backends are
1183 * used as RAM, however some might be used for different purposes.
1185 long qemu_minrampagesize(void)
1187 long hpsize
= LONG_MAX
;
1188 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1190 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1194 long qemu_maxrampagesize(void)
1197 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1199 object_child_foreach(memdev_root
, find_max_backend_pagesize
, &pagesize
);
1204 static int64_t get_file_size(int fd
)
1207 #if defined(__linux__)
1210 if (fstat(fd
, &st
) < 0) {
1214 /* Special handling for devdax character devices */
1215 if (S_ISCHR(st
.st_mode
)) {
1216 g_autofree
char *subsystem_path
= NULL
;
1217 g_autofree
char *subsystem
= NULL
;
1219 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1220 major(st
.st_rdev
), minor(st
.st_rdev
));
1221 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1223 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1224 g_autofree
char *size_path
= NULL
;
1225 g_autofree
char *size_str
= NULL
;
1227 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1228 major(st
.st_rdev
), minor(st
.st_rdev
));
1230 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1231 return g_ascii_strtoll(size_str
, NULL
, 0);
1235 #endif /* defined(__linux__) */
1237 /* st.st_size may be zero for special files yet lseek(2) works */
1238 size
= lseek(fd
, 0, SEEK_END
);
1245 static int64_t get_file_align(int fd
)
1248 #if defined(__linux__) && defined(CONFIG_LIBDAXCTL)
1251 if (fstat(fd
, &st
) < 0) {
1255 /* Special handling for devdax character devices */
1256 if (S_ISCHR(st
.st_mode
)) {
1257 g_autofree
char *path
= NULL
;
1258 g_autofree
char *rpath
= NULL
;
1259 struct daxctl_ctx
*ctx
;
1260 struct daxctl_region
*region
;
1263 path
= g_strdup_printf("/sys/dev/char/%d:%d",
1264 major(st
.st_rdev
), minor(st
.st_rdev
));
1265 rpath
= realpath(path
, NULL
);
1270 rc
= daxctl_new(&ctx
);
1275 daxctl_region_foreach(ctx
, region
) {
1276 if (strstr(rpath
, daxctl_region_get_path(region
))) {
1277 align
= daxctl_region_get_align(region
);
1283 #endif /* defined(__linux__) && defined(CONFIG_LIBDAXCTL) */
1288 static int file_ram_open(const char *path
,
1289 const char *region_name
,
1295 char *sanitized_name
;
1301 fd
= open(path
, readonly
? O_RDONLY
: O_RDWR
);
1303 /* @path names an existing file, use it */
1306 if (errno
== ENOENT
) {
1307 /* @path names a file that doesn't exist, create it */
1308 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1313 } else if (errno
== EISDIR
) {
1314 /* @path names a directory, create a file there */
1315 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1316 sanitized_name
= g_strdup(region_name
);
1317 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1323 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1325 g_free(sanitized_name
);
1327 fd
= mkstemp(filename
);
1335 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1336 error_setg_errno(errp
, errno
,
1337 "can't open backing store %s for guest RAM",
1342 * Try again on EINTR and EEXIST. The latter happens when
1343 * something else creates the file between our two open().
1350 static void *file_ram_alloc(RAMBlock
*block
,
1358 uint32_t qemu_map_flags
;
1361 block
->page_size
= qemu_fd_getpagesize(fd
);
1362 if (block
->mr
->align
% block
->page_size
) {
1363 error_setg(errp
, "alignment 0x%" PRIx64
1364 " must be multiples of page size 0x%zx",
1365 block
->mr
->align
, block
->page_size
);
1367 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1368 error_setg(errp
, "alignment 0x%" PRIx64
1369 " must be a power of two", block
->mr
->align
);
1371 } else if (offset
% block
->page_size
) {
1372 error_setg(errp
, "offset 0x%" PRIx64
1373 " must be multiples of page size 0x%zx",
1374 offset
, block
->page_size
);
1377 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1378 #if defined(__s390x__)
1379 if (kvm_enabled()) {
1380 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1384 if (memory
< block
->page_size
) {
1385 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1386 "or larger than page size 0x%zx",
1387 memory
, block
->page_size
);
1391 memory
= ROUND_UP(memory
, block
->page_size
);
1394 * ftruncate is not supported by hugetlbfs in older
1395 * hosts, so don't bother bailing out on errors.
1396 * If anything goes wrong with it under other filesystems,
1399 * Do not truncate the non-empty backend file to avoid corrupting
1400 * the existing data in the file. Disabling shrinking is not
1401 * enough. For example, the current vNVDIMM implementation stores
1402 * the guest NVDIMM labels at the end of the backend file. If the
1403 * backend file is later extended, QEMU will not be able to find
1404 * those labels. Therefore, extending the non-empty backend file
1405 * is disabled as well.
1407 if (truncate
&& ftruncate(fd
, offset
+ memory
)) {
1408 perror("ftruncate");
1411 qemu_map_flags
= readonly
? QEMU_MAP_READONLY
: 0;
1412 qemu_map_flags
|= (block
->flags
& RAM_SHARED
) ? QEMU_MAP_SHARED
: 0;
1413 qemu_map_flags
|= (block
->flags
& RAM_PMEM
) ? QEMU_MAP_SYNC
: 0;
1414 qemu_map_flags
|= (block
->flags
& RAM_NORESERVE
) ? QEMU_MAP_NORESERVE
: 0;
1415 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
, qemu_map_flags
, offset
);
1416 if (area
== MAP_FAILED
) {
1417 error_setg_errno(errp
, errno
,
1418 "unable to map backing store for guest RAM");
1423 block
->fd_offset
= offset
;
1428 /* Allocate space within the ram_addr_t space that governs the
1430 * Called with the ramlist lock held.
1432 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1434 RAMBlock
*block
, *next_block
;
1435 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1437 assert(size
!= 0); /* it would hand out same offset multiple times */
1439 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1443 RAMBLOCK_FOREACH(block
) {
1444 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1446 /* Align blocks to start on a 'long' in the bitmap
1447 * which makes the bitmap sync'ing take the fast path.
1449 candidate
= block
->offset
+ block
->max_length
;
1450 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1452 /* Search for the closest following block
1455 RAMBLOCK_FOREACH(next_block
) {
1456 if (next_block
->offset
>= candidate
) {
1457 next
= MIN(next
, next_block
->offset
);
1461 /* If it fits remember our place and remember the size
1462 * of gap, but keep going so that we might find a smaller
1463 * gap to fill so avoiding fragmentation.
1465 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1467 mingap
= next
- candidate
;
1470 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1473 if (offset
== RAM_ADDR_MAX
) {
1474 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1479 trace_find_ram_offset(size
, offset
);
1484 static unsigned long last_ram_page(void)
1487 ram_addr_t last
= 0;
1489 RCU_READ_LOCK_GUARD();
1490 RAMBLOCK_FOREACH(block
) {
1491 last
= MAX(last
, block
->offset
+ block
->max_length
);
1493 return last
>> TARGET_PAGE_BITS
;
1496 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1500 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1501 if (!machine_dump_guest_core(current_machine
)) {
1502 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1504 perror("qemu_madvise");
1505 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1506 "but dump_guest_core=off specified\n");
1511 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1516 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
1521 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
1526 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
1528 return rb
->used_length
;
1531 ram_addr_t
qemu_ram_get_max_length(RAMBlock
*rb
)
1533 return rb
->max_length
;
1536 bool qemu_ram_is_shared(RAMBlock
*rb
)
1538 return rb
->flags
& RAM_SHARED
;
1541 bool qemu_ram_is_noreserve(RAMBlock
*rb
)
1543 return rb
->flags
& RAM_NORESERVE
;
1546 /* Note: Only set at the start of postcopy */
1547 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
1549 return rb
->flags
& RAM_UF_ZEROPAGE
;
1552 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
1554 rb
->flags
|= RAM_UF_ZEROPAGE
;
1557 bool qemu_ram_is_migratable(RAMBlock
*rb
)
1559 return rb
->flags
& RAM_MIGRATABLE
;
1562 void qemu_ram_set_migratable(RAMBlock
*rb
)
1564 rb
->flags
|= RAM_MIGRATABLE
;
1567 void qemu_ram_unset_migratable(RAMBlock
*rb
)
1569 rb
->flags
&= ~RAM_MIGRATABLE
;
1572 bool qemu_ram_is_named_file(RAMBlock
*rb
)
1574 return rb
->flags
& RAM_NAMED_FILE
;
1577 int qemu_ram_get_fd(RAMBlock
*rb
)
1582 /* Called with iothread lock held. */
1583 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1588 assert(!new_block
->idstr
[0]);
1591 char *id
= qdev_get_dev_path(dev
);
1593 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1597 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1599 RCU_READ_LOCK_GUARD();
1600 RAMBLOCK_FOREACH(block
) {
1601 if (block
!= new_block
&&
1602 !strcmp(block
->idstr
, new_block
->idstr
)) {
1603 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1610 /* Called with iothread lock held. */
1611 void qemu_ram_unset_idstr(RAMBlock
*block
)
1613 /* FIXME: arch_init.c assumes that this is not called throughout
1614 * migration. Ignore the problem since hot-unplug during migration
1615 * does not work anyway.
1618 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1622 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1624 return rb
->page_size
;
1627 /* Returns the largest size of page in use */
1628 size_t qemu_ram_pagesize_largest(void)
1633 RAMBLOCK_FOREACH(block
) {
1634 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1640 static int memory_try_enable_merging(void *addr
, size_t len
)
1642 if (!machine_mem_merge(current_machine
)) {
1643 /* disabled by the user */
1647 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1651 * Resizing RAM while migrating can result in the migration being canceled.
1652 * Care has to be taken if the guest might have already detected the memory.
1654 * As memory core doesn't know how is memory accessed, it is up to
1655 * resize callback to update device state and/or add assertions to detect
1656 * misuse, if necessary.
1658 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1660 const ram_addr_t oldsize
= block
->used_length
;
1661 const ram_addr_t unaligned_size
= newsize
;
1665 newsize
= HOST_PAGE_ALIGN(newsize
);
1667 if (block
->used_length
== newsize
) {
1669 * We don't have to resize the ram block (which only knows aligned
1670 * sizes), however, we have to notify if the unaligned size changed.
1672 if (unaligned_size
!= memory_region_size(block
->mr
)) {
1673 memory_region_set_size(block
->mr
, unaligned_size
);
1674 if (block
->resized
) {
1675 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1681 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1682 error_setg_errno(errp
, EINVAL
,
1683 "Size mismatch: %s: 0x" RAM_ADDR_FMT
1684 " != 0x" RAM_ADDR_FMT
, block
->idstr
,
1685 newsize
, block
->used_length
);
1689 if (block
->max_length
< newsize
) {
1690 error_setg_errno(errp
, EINVAL
,
1691 "Size too large: %s: 0x" RAM_ADDR_FMT
1692 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1693 newsize
, block
->max_length
);
1697 /* Notify before modifying the ram block and touching the bitmaps. */
1699 ram_block_notify_resize(block
->host
, oldsize
, newsize
);
1702 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1703 block
->used_length
= newsize
;
1704 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1706 memory_region_set_size(block
->mr
, unaligned_size
);
1707 if (block
->resized
) {
1708 block
->resized(block
->idstr
, unaligned_size
, block
->host
);
1714 * Trigger sync on the given ram block for range [start, start + length]
1715 * with the backing store if one is available.
1717 * @Note: this is supposed to be a synchronous op.
1719 void qemu_ram_msync(RAMBlock
*block
, ram_addr_t start
, ram_addr_t length
)
1721 /* The requested range should fit in within the block range */
1722 g_assert((start
+ length
) <= block
->used_length
);
1724 #ifdef CONFIG_LIBPMEM
1725 /* The lack of support for pmem should not block the sync */
1726 if (ramblock_is_pmem(block
)) {
1727 void *addr
= ramblock_ptr(block
, start
);
1728 pmem_persist(addr
, length
);
1732 if (block
->fd
>= 0) {
1734 * Case there is no support for PMEM or the memory has not been
1735 * specified as persistent (or is not one) - use the msync.
1736 * Less optimal but still achieves the same goal
1738 void *addr
= ramblock_ptr(block
, start
);
1739 if (qemu_msync(addr
, length
, block
->fd
)) {
1740 warn_report("%s: failed to sync memory range: start: "
1741 RAM_ADDR_FMT
" length: " RAM_ADDR_FMT
,
1742 __func__
, start
, length
);
1747 /* Called with ram_list.mutex held */
1748 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1749 ram_addr_t new_ram_size
)
1751 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1752 DIRTY_MEMORY_BLOCK_SIZE
);
1753 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1754 DIRTY_MEMORY_BLOCK_SIZE
);
1757 /* Only need to extend if block count increased */
1758 if (new_num_blocks
<= old_num_blocks
) {
1762 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1763 DirtyMemoryBlocks
*old_blocks
;
1764 DirtyMemoryBlocks
*new_blocks
;
1767 old_blocks
= qatomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1768 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1769 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1771 if (old_num_blocks
) {
1772 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1773 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1776 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1777 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1780 qatomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1783 g_free_rcu(old_blocks
, rcu
);
1788 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1790 const bool noreserve
= qemu_ram_is_noreserve(new_block
);
1791 const bool shared
= qemu_ram_is_shared(new_block
);
1793 RAMBlock
*last_block
= NULL
;
1794 ram_addr_t old_ram_size
, new_ram_size
;
1797 old_ram_size
= last_ram_page();
1799 qemu_mutex_lock_ramlist();
1800 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1802 if (!new_block
->host
) {
1803 if (xen_enabled()) {
1804 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1805 new_block
->mr
, &err
);
1807 error_propagate(errp
, err
);
1808 qemu_mutex_unlock_ramlist();
1812 new_block
->host
= qemu_anon_ram_alloc(new_block
->max_length
,
1813 &new_block
->mr
->align
,
1815 if (!new_block
->host
) {
1816 error_setg_errno(errp
, errno
,
1817 "cannot set up guest memory '%s'",
1818 memory_region_name(new_block
->mr
));
1819 qemu_mutex_unlock_ramlist();
1822 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1826 new_ram_size
= MAX(old_ram_size
,
1827 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1828 if (new_ram_size
> old_ram_size
) {
1829 dirty_memory_extend(old_ram_size
, new_ram_size
);
1831 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1832 * QLIST (which has an RCU-friendly variant) does not have insertion at
1833 * tail, so save the last element in last_block.
1835 RAMBLOCK_FOREACH(block
) {
1837 if (block
->max_length
< new_block
->max_length
) {
1842 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
1843 } else if (last_block
) {
1844 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
1845 } else { /* list is empty */
1846 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
1848 ram_list
.mru_block
= NULL
;
1850 /* Write list before version */
1853 qemu_mutex_unlock_ramlist();
1855 cpu_physical_memory_set_dirty_range(new_block
->offset
,
1856 new_block
->used_length
,
1859 if (new_block
->host
) {
1860 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
1861 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
1863 * MADV_DONTFORK is also needed by KVM in absence of synchronous MMU
1864 * Configure it unless the machine is a qtest server, in which case
1865 * KVM is not used and it may be forked (eg for fuzzing purposes).
1867 if (!qtest_enabled()) {
1868 qemu_madvise(new_block
->host
, new_block
->max_length
,
1869 QEMU_MADV_DONTFORK
);
1871 ram_block_notify_add(new_block
->host
, new_block
->used_length
,
1872 new_block
->max_length
);
1877 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
1878 uint32_t ram_flags
, int fd
, off_t offset
,
1879 bool readonly
, Error
**errp
)
1881 RAMBlock
*new_block
;
1882 Error
*local_err
= NULL
;
1883 int64_t file_size
, file_align
;
1885 /* Just support these ram flags by now. */
1886 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
| RAM_NORESERVE
|
1887 RAM_PROTECTED
| RAM_NAMED_FILE
)) == 0);
1889 if (xen_enabled()) {
1890 error_setg(errp
, "-mem-path not supported with Xen");
1894 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1896 "host lacks kvm mmu notifiers, -mem-path unsupported");
1900 size
= HOST_PAGE_ALIGN(size
);
1901 file_size
= get_file_size(fd
);
1902 if (file_size
> offset
&& file_size
< (offset
+ size
)) {
1903 error_setg(errp
, "backing store size 0x%" PRIx64
1904 " does not match 'size' option 0x" RAM_ADDR_FMT
,
1909 file_align
= get_file_align(fd
);
1910 if (file_align
> 0 && file_align
> mr
->align
) {
1911 error_setg(errp
, "backing store align 0x%" PRIx64
1912 " is larger than 'align' option 0x%" PRIx64
,
1913 file_align
, mr
->align
);
1917 new_block
= g_malloc0(sizeof(*new_block
));
1919 new_block
->used_length
= size
;
1920 new_block
->max_length
= size
;
1921 new_block
->flags
= ram_flags
;
1922 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, readonly
,
1923 !file_size
, offset
, errp
);
1924 if (!new_block
->host
) {
1929 ram_block_add(new_block
, &local_err
);
1932 error_propagate(errp
, local_err
);
1940 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
1941 uint32_t ram_flags
, const char *mem_path
,
1942 off_t offset
, bool readonly
, Error
**errp
)
1948 fd
= file_ram_open(mem_path
, memory_region_name(mr
), readonly
, &created
,
1954 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, offset
, readonly
,
1969 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
1970 void (*resized
)(const char*,
1973 void *host
, uint32_t ram_flags
,
1974 MemoryRegion
*mr
, Error
**errp
)
1976 RAMBlock
*new_block
;
1977 Error
*local_err
= NULL
;
1979 assert((ram_flags
& ~(RAM_SHARED
| RAM_RESIZEABLE
| RAM_PREALLOC
|
1980 RAM_NORESERVE
)) == 0);
1981 assert(!host
^ (ram_flags
& RAM_PREALLOC
));
1983 size
= HOST_PAGE_ALIGN(size
);
1984 max_size
= HOST_PAGE_ALIGN(max_size
);
1985 new_block
= g_malloc0(sizeof(*new_block
));
1987 new_block
->resized
= resized
;
1988 new_block
->used_length
= size
;
1989 new_block
->max_length
= max_size
;
1990 assert(max_size
>= size
);
1992 new_block
->page_size
= qemu_real_host_page_size();
1993 new_block
->host
= host
;
1994 new_block
->flags
= ram_flags
;
1995 ram_block_add(new_block
, &local_err
);
1998 error_propagate(errp
, local_err
);
2004 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2005 MemoryRegion
*mr
, Error
**errp
)
2007 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, RAM_PREALLOC
, mr
,
2011 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, uint32_t ram_flags
,
2012 MemoryRegion
*mr
, Error
**errp
)
2014 assert((ram_flags
& ~(RAM_SHARED
| RAM_NORESERVE
)) == 0);
2015 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, ram_flags
, mr
, errp
);
2018 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2019 void (*resized
)(const char*,
2022 MemoryRegion
*mr
, Error
**errp
)
2024 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
,
2025 RAM_RESIZEABLE
, mr
, errp
);
2028 static void reclaim_ramblock(RAMBlock
*block
)
2030 if (block
->flags
& RAM_PREALLOC
) {
2032 } else if (xen_enabled()) {
2033 xen_invalidate_map_cache_entry(block
->host
);
2035 } else if (block
->fd
>= 0) {
2036 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2040 qemu_anon_ram_free(block
->host
, block
->max_length
);
2045 void qemu_ram_free(RAMBlock
*block
)
2052 ram_block_notify_remove(block
->host
, block
->used_length
,
2056 qemu_mutex_lock_ramlist();
2057 QLIST_REMOVE_RCU(block
, next
);
2058 ram_list
.mru_block
= NULL
;
2059 /* Write list before version */
2062 call_rcu(block
, reclaim_ramblock
, rcu
);
2063 qemu_mutex_unlock_ramlist();
2067 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2074 RAMBLOCK_FOREACH(block
) {
2075 offset
= addr
- block
->offset
;
2076 if (offset
< block
->max_length
) {
2077 vaddr
= ramblock_ptr(block
, offset
);
2078 if (block
->flags
& RAM_PREALLOC
) {
2080 } else if (xen_enabled()) {
2084 flags
|= block
->flags
& RAM_SHARED
?
2085 MAP_SHARED
: MAP_PRIVATE
;
2086 flags
|= block
->flags
& RAM_NORESERVE
? MAP_NORESERVE
: 0;
2087 if (block
->fd
>= 0) {
2088 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2089 flags
, block
->fd
, offset
+ block
->fd_offset
);
2091 flags
|= MAP_ANONYMOUS
;
2092 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2095 if (area
!= vaddr
) {
2096 error_report("Could not remap addr: "
2097 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2101 memory_try_enable_merging(vaddr
, length
);
2102 qemu_ram_setup_dump(vaddr
, length
);
2107 #endif /* !_WIN32 */
2109 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2110 * This should not be used for general purpose DMA. Use address_space_map
2111 * or address_space_rw instead. For local memory (e.g. video ram) that the
2112 * device owns, use memory_region_get_ram_ptr.
2114 * Called within RCU critical section.
2116 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2118 RAMBlock
*block
= ram_block
;
2120 if (block
== NULL
) {
2121 block
= qemu_get_ram_block(addr
);
2122 addr
-= block
->offset
;
2125 if (xen_enabled() && block
->host
== NULL
) {
2126 /* We need to check if the requested address is in the RAM
2127 * because we don't want to map the entire memory in QEMU.
2128 * In that case just map until the end of the page.
2130 if (block
->offset
== 0) {
2131 return xen_map_cache(addr
, 0, 0, false);
2134 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2136 return ramblock_ptr(block
, addr
);
2139 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2140 * but takes a size argument.
2142 * Called within RCU critical section.
2144 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2145 hwaddr
*size
, bool lock
)
2147 RAMBlock
*block
= ram_block
;
2152 if (block
== NULL
) {
2153 block
= qemu_get_ram_block(addr
);
2154 addr
-= block
->offset
;
2156 *size
= MIN(*size
, block
->max_length
- addr
);
2158 if (xen_enabled() && block
->host
== NULL
) {
2159 /* We need to check if the requested address is in the RAM
2160 * because we don't want to map the entire memory in QEMU.
2161 * In that case just map the requested area.
2163 if (block
->offset
== 0) {
2164 return xen_map_cache(addr
, *size
, lock
, lock
);
2167 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2170 return ramblock_ptr(block
, addr
);
2173 /* Return the offset of a hostpointer within a ramblock */
2174 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2176 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2177 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2178 assert(res
< rb
->max_length
);
2184 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2187 * ptr: Host pointer to look up
2188 * round_offset: If true round the result offset down to a page boundary
2189 * *ram_addr: set to result ram_addr
2190 * *offset: set to result offset within the RAMBlock
2192 * Returns: RAMBlock (or NULL if not found)
2194 * By the time this function returns, the returned pointer is not protected
2195 * by RCU anymore. If the caller is not within an RCU critical section and
2196 * does not hold the iothread lock, it must have other means of protecting the
2197 * pointer, such as a reference to the region that includes the incoming
2200 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2204 uint8_t *host
= ptr
;
2206 if (xen_enabled()) {
2207 ram_addr_t ram_addr
;
2208 RCU_READ_LOCK_GUARD();
2209 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2210 block
= qemu_get_ram_block(ram_addr
);
2212 *offset
= ram_addr
- block
->offset
;
2217 RCU_READ_LOCK_GUARD();
2218 block
= qatomic_rcu_read(&ram_list
.mru_block
);
2219 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2223 RAMBLOCK_FOREACH(block
) {
2224 /* This case append when the block is not mapped. */
2225 if (block
->host
== NULL
) {
2228 if (host
- block
->host
< block
->max_length
) {
2236 *offset
= (host
- block
->host
);
2238 *offset
&= TARGET_PAGE_MASK
;
2244 * Finds the named RAMBlock
2246 * name: The name of RAMBlock to find
2248 * Returns: RAMBlock (or NULL if not found)
2250 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2254 RAMBLOCK_FOREACH(block
) {
2255 if (!strcmp(name
, block
->idstr
)) {
2263 /* Some of the softmmu routines need to translate from a host pointer
2264 (typically a TLB entry) back to a ram offset. */
2265 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2270 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2272 return RAM_ADDR_INVALID
;
2275 return block
->offset
+ offset
;
2278 ram_addr_t
qemu_ram_addr_from_host_nofail(void *ptr
)
2280 ram_addr_t ram_addr
;
2282 ram_addr
= qemu_ram_addr_from_host(ptr
);
2283 if (ram_addr
== RAM_ADDR_INVALID
) {
2284 error_report("Bad ram pointer %p", ptr
);
2290 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2291 MemTxAttrs attrs
, void *buf
, hwaddr len
);
2292 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2293 const void *buf
, hwaddr len
);
2294 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2295 bool is_write
, MemTxAttrs attrs
);
2297 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2298 unsigned len
, MemTxAttrs attrs
)
2300 subpage_t
*subpage
= opaque
;
2304 #if defined(DEBUG_SUBPAGE)
2305 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
"\n", __func__
,
2306 subpage
, len
, addr
);
2308 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2312 *data
= ldn_p(buf
, len
);
2316 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2317 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2319 subpage_t
*subpage
= opaque
;
2322 #if defined(DEBUG_SUBPAGE)
2323 printf("%s: subpage %p len %u addr " HWADDR_FMT_plx
2324 " value %"PRIx64
"\n",
2325 __func__
, subpage
, len
, addr
, value
);
2327 stn_p(buf
, len
, value
);
2328 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2331 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2332 unsigned len
, bool is_write
,
2335 subpage_t
*subpage
= opaque
;
2336 #if defined(DEBUG_SUBPAGE)
2337 printf("%s: subpage %p %c len %u addr " HWADDR_FMT_plx
"\n",
2338 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2341 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2342 len
, is_write
, attrs
);
2345 static const MemoryRegionOps subpage_ops
= {
2346 .read_with_attrs
= subpage_read
,
2347 .write_with_attrs
= subpage_write
,
2348 .impl
.min_access_size
= 1,
2349 .impl
.max_access_size
= 8,
2350 .valid
.min_access_size
= 1,
2351 .valid
.max_access_size
= 8,
2352 .valid
.accepts
= subpage_accepts
,
2353 .endianness
= DEVICE_NATIVE_ENDIAN
,
2356 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2361 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2363 idx
= SUBPAGE_IDX(start
);
2364 eidx
= SUBPAGE_IDX(end
);
2365 #if defined(DEBUG_SUBPAGE)
2366 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2367 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2369 for (; idx
<= eidx
; idx
++) {
2370 mmio
->sub_section
[idx
] = section
;
2376 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2380 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2381 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2384 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2385 NULL
, TARGET_PAGE_SIZE
);
2386 mmio
->iomem
.subpage
= true;
2387 #if defined(DEBUG_SUBPAGE)
2388 printf("%s: %p base " HWADDR_FMT_plx
" len %08x\n", __func__
,
2389 mmio
, base
, TARGET_PAGE_SIZE
);
2395 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2398 MemoryRegionSection section
= {
2401 .offset_within_address_space
= 0,
2402 .offset_within_region
= 0,
2403 .size
= int128_2_64(),
2406 return phys_section_add(map
, §ion
);
2409 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2410 hwaddr index
, MemTxAttrs attrs
)
2412 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2413 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2414 AddressSpaceDispatch
*d
= cpuas
->memory_dispatch
;
2415 int section_index
= index
& ~TARGET_PAGE_MASK
;
2416 MemoryRegionSection
*ret
;
2418 assert(section_index
< d
->map
.sections_nb
);
2419 ret
= d
->map
.sections
+ section_index
;
2421 assert(ret
->mr
->ops
);
2426 static void io_mem_init(void)
2428 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2432 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2434 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2437 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2438 assert(n
== PHYS_SECTION_UNASSIGNED
);
2440 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2445 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2447 phys_sections_free(&d
->map
);
2451 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2455 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2457 CPUAddressSpace
*cpuas
;
2459 /* Wait for the CPU to end the current TB. This avoids the following
2463 * ---------------------- -------------------------
2464 * TLB check -> slow path
2465 * notdirty_mem_write
2469 * TLB check -> fast path
2473 * by pushing the migration thread's memory read after the vCPU thread has
2474 * written the memory.
2476 if (replay_mode
== REPLAY_MODE_NONE
) {
2478 * VGA can make calls to this function while updating the screen.
2479 * In record/replay mode this causes a deadlock, because
2480 * run_on_cpu waits for rr mutex. Therefore no races are possible
2481 * in this case and no need for making run_on_cpu when
2482 * record/replay is enabled.
2484 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2485 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2489 static void tcg_commit_cpu(CPUState
*cpu
, run_on_cpu_data data
)
2491 CPUAddressSpace
*cpuas
= data
.host_ptr
;
2493 cpuas
->memory_dispatch
= address_space_to_dispatch(cpuas
->as
);
2497 static void tcg_commit(MemoryListener
*listener
)
2499 CPUAddressSpace
*cpuas
;
2502 assert(tcg_enabled());
2503 /* since each CPU stores ram addresses in its TLB cache, we must
2504 reset the modified entries */
2505 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2509 * Defer changes to as->memory_dispatch until the cpu is quiescent.
2510 * Otherwise we race between (1) other cpu threads and (2) ongoing
2511 * i/o for the current cpu thread, with data cached by mmu_lookup().
2513 * In addition, queueing the work function will kick the cpu back to
2514 * the main loop, which will end the RCU critical section and reclaim
2515 * the memory data structures.
2517 * That said, the listener is also called during realize, before
2518 * all of the tcg machinery for run-on is initialized: thus halt_cond.
2520 if (cpu
->halt_cond
) {
2521 async_run_on_cpu(cpu
, tcg_commit_cpu
, RUN_ON_CPU_HOST_PTR(cpuas
));
2523 tcg_commit_cpu(cpu
, RUN_ON_CPU_HOST_PTR(cpuas
));
2527 static void memory_map_init(void)
2529 system_memory
= g_malloc(sizeof(*system_memory
));
2531 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2532 address_space_init(&address_space_memory
, system_memory
, "memory");
2534 system_io
= g_malloc(sizeof(*system_io
));
2535 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2537 address_space_init(&address_space_io
, system_io
, "I/O");
2540 MemoryRegion
*get_system_memory(void)
2542 return system_memory
;
2545 MemoryRegion
*get_system_io(void)
2550 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2553 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2554 addr
+= memory_region_get_ram_addr(mr
);
2556 /* No early return if dirty_log_mask is or becomes 0, because
2557 * cpu_physical_memory_set_dirty_range will still call
2558 * xen_modified_memory.
2560 if (dirty_log_mask
) {
2562 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2564 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2565 assert(tcg_enabled());
2566 tb_invalidate_phys_range(addr
, addr
+ length
- 1);
2567 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2569 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2572 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
2575 * In principle this function would work on other memory region types too,
2576 * but the ROM device use case is the only one where this operation is
2577 * necessary. Other memory regions should use the
2578 * address_space_read/write() APIs.
2580 assert(memory_region_is_romd(mr
));
2582 invalidate_and_set_dirty(mr
, addr
, size
);
2585 int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2587 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2589 /* Regions are assumed to support 1-4 byte accesses unless
2590 otherwise specified. */
2591 if (access_size_max
== 0) {
2592 access_size_max
= 4;
2595 /* Bound the maximum access by the alignment of the address. */
2596 if (!mr
->ops
->impl
.unaligned
) {
2597 unsigned align_size_max
= addr
& -addr
;
2598 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2599 access_size_max
= align_size_max
;
2603 /* Don't attempt accesses larger than the maximum. */
2604 if (l
> access_size_max
) {
2605 l
= access_size_max
;
2612 bool prepare_mmio_access(MemoryRegion
*mr
)
2614 bool release_lock
= false;
2616 if (!qemu_mutex_iothread_locked()) {
2617 qemu_mutex_lock_iothread();
2618 release_lock
= true;
2620 if (mr
->flush_coalesced_mmio
) {
2621 qemu_flush_coalesced_mmio_buffer();
2624 return release_lock
;
2628 * flatview_access_allowed
2629 * @mr: #MemoryRegion to be accessed
2630 * @attrs: memory transaction attributes
2631 * @addr: address within that memory region
2632 * @len: the number of bytes to access
2634 * Check if a memory transaction is allowed.
2636 * Returns: true if transaction is allowed, false if denied.
2638 static bool flatview_access_allowed(MemoryRegion
*mr
, MemTxAttrs attrs
,
2639 hwaddr addr
, hwaddr len
)
2641 if (likely(!attrs
.memory
)) {
2644 if (memory_region_is_ram(mr
)) {
2647 qemu_log_mask(LOG_GUEST_ERROR
,
2648 "Invalid access to non-RAM device at "
2649 "addr 0x%" HWADDR_PRIX
", size %" HWADDR_PRIu
", "
2650 "region '%s'\n", addr
, len
, memory_region_name(mr
));
2654 /* Called within RCU critical section. */
2655 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2658 hwaddr len
, hwaddr addr1
,
2659 hwaddr l
, MemoryRegion
*mr
)
2663 MemTxResult result
= MEMTX_OK
;
2664 bool release_lock
= false;
2665 const uint8_t *buf
= ptr
;
2668 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2669 result
|= MEMTX_ACCESS_ERROR
;
2671 } else if (!memory_access_is_direct(mr
, true)) {
2672 release_lock
|= prepare_mmio_access(mr
);
2673 l
= memory_access_size(mr
, l
, addr1
);
2674 /* XXX: could force current_cpu to NULL to avoid
2676 val
= ldn_he_p(buf
, l
);
2677 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
2678 size_memop(l
), attrs
);
2681 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2682 memmove(ram_ptr
, buf
, l
);
2683 invalidate_and_set_dirty(mr
, addr1
, l
);
2687 qemu_mutex_unlock_iothread();
2688 release_lock
= false;
2700 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2706 /* Called from RCU critical section. */
2707 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2708 const void *buf
, hwaddr len
)
2715 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
2716 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2717 return MEMTX_ACCESS_ERROR
;
2719 return flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
2723 /* Called within RCU critical section. */
2724 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
2725 MemTxAttrs attrs
, void *ptr
,
2726 hwaddr len
, hwaddr addr1
, hwaddr l
,
2731 MemTxResult result
= MEMTX_OK
;
2732 bool release_lock
= false;
2735 fuzz_dma_read_cb(addr
, len
, mr
);
2737 if (!flatview_access_allowed(mr
, attrs
, addr1
, l
)) {
2738 result
|= MEMTX_ACCESS_ERROR
;
2740 } else if (!memory_access_is_direct(mr
, false)) {
2742 release_lock
|= prepare_mmio_access(mr
);
2743 l
= memory_access_size(mr
, l
, addr1
);
2744 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
2745 size_memop(l
), attrs
);
2746 stn_he_p(buf
, l
, val
);
2749 ram_ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2750 memcpy(buf
, ram_ptr
, l
);
2754 qemu_mutex_unlock_iothread();
2755 release_lock
= false;
2767 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2773 /* Called from RCU critical section. */
2774 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2775 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2782 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
2783 if (!flatview_access_allowed(mr
, attrs
, addr
, len
)) {
2784 return MEMTX_ACCESS_ERROR
;
2786 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
2790 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
2791 MemTxAttrs attrs
, void *buf
, hwaddr len
)
2793 MemTxResult result
= MEMTX_OK
;
2797 RCU_READ_LOCK_GUARD();
2798 fv
= address_space_to_flatview(as
);
2799 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
2805 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
2807 const void *buf
, hwaddr len
)
2809 MemTxResult result
= MEMTX_OK
;
2813 RCU_READ_LOCK_GUARD();
2814 fv
= address_space_to_flatview(as
);
2815 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
2821 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
2822 void *buf
, hwaddr len
, bool is_write
)
2825 return address_space_write(as
, addr
, attrs
, buf
, len
);
2827 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
2831 MemTxResult
address_space_set(AddressSpace
*as
, hwaddr addr
,
2832 uint8_t c
, hwaddr len
, MemTxAttrs attrs
)
2834 #define FILLBUF_SIZE 512
2835 uint8_t fillbuf
[FILLBUF_SIZE
];
2837 MemTxResult error
= MEMTX_OK
;
2839 memset(fillbuf
, c
, FILLBUF_SIZE
);
2841 l
= len
< FILLBUF_SIZE
? len
: FILLBUF_SIZE
;
2842 error
|= address_space_write(as
, addr
, attrs
, fillbuf
, l
);
2850 void cpu_physical_memory_rw(hwaddr addr
, void *buf
,
2851 hwaddr len
, bool is_write
)
2853 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
2854 buf
, len
, is_write
);
2857 enum write_rom_type
{
2862 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
2867 enum write_rom_type type
)
2873 const uint8_t *buf
= ptr
;
2875 RCU_READ_LOCK_GUARD();
2878 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
2880 if (!(memory_region_is_ram(mr
) ||
2881 memory_region_is_romd(mr
))) {
2882 l
= memory_access_size(mr
, l
, addr1
);
2885 ram_ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
2888 memcpy(ram_ptr
, buf
, l
);
2889 invalidate_and_set_dirty(mr
, addr1
, l
);
2892 flush_idcache_range((uintptr_t)ram_ptr
, (uintptr_t)ram_ptr
, l
);
2903 /* used for ROM loading : can write in RAM and ROM */
2904 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
2906 const void *buf
, hwaddr len
)
2908 return address_space_write_rom_internal(as
, addr
, attrs
,
2909 buf
, len
, WRITE_DATA
);
2912 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
2915 * This function should do the same thing as an icache flush that was
2916 * triggered from within the guest. For TCG we are always cache coherent,
2917 * so there is no need to flush anything. For KVM / Xen we need to flush
2918 * the host's instruction cache at least.
2920 if (tcg_enabled()) {
2924 address_space_write_rom_internal(&address_space_memory
,
2925 start
, MEMTXATTRS_UNSPECIFIED
,
2926 NULL
, len
, FLUSH_CACHE
);
2937 static BounceBuffer bounce
;
2939 typedef struct MapClient
{
2941 QLIST_ENTRY(MapClient
) link
;
2944 QemuMutex map_client_list_lock
;
2945 static QLIST_HEAD(, MapClient
) map_client_list
2946 = QLIST_HEAD_INITIALIZER(map_client_list
);
2948 static void cpu_unregister_map_client_do(MapClient
*client
)
2950 QLIST_REMOVE(client
, link
);
2954 static void cpu_notify_map_clients_locked(void)
2958 while (!QLIST_EMPTY(&map_client_list
)) {
2959 client
= QLIST_FIRST(&map_client_list
);
2960 qemu_bh_schedule(client
->bh
);
2961 cpu_unregister_map_client_do(client
);
2965 void cpu_register_map_client(QEMUBH
*bh
)
2967 MapClient
*client
= g_malloc(sizeof(*client
));
2969 qemu_mutex_lock(&map_client_list_lock
);
2971 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
2972 /* Write map_client_list before reading in_use. */
2974 if (!qatomic_read(&bounce
.in_use
)) {
2975 cpu_notify_map_clients_locked();
2977 qemu_mutex_unlock(&map_client_list_lock
);
2980 void cpu_exec_init_all(void)
2982 qemu_mutex_init(&ram_list
.mutex
);
2983 /* The data structures we set up here depend on knowing the page size,
2984 * so no more changes can be made after this point.
2985 * In an ideal world, nothing we did before we had finished the
2986 * machine setup would care about the target page size, and we could
2987 * do this much later, rather than requiring board models to state
2988 * up front what their requirements are.
2990 finalize_target_page_bits();
2993 qemu_mutex_init(&map_client_list_lock
);
2996 void cpu_unregister_map_client(QEMUBH
*bh
)
3000 qemu_mutex_lock(&map_client_list_lock
);
3001 QLIST_FOREACH(client
, &map_client_list
, link
) {
3002 if (client
->bh
== bh
) {
3003 cpu_unregister_map_client_do(client
);
3007 qemu_mutex_unlock(&map_client_list_lock
);
3010 static void cpu_notify_map_clients(void)
3012 qemu_mutex_lock(&map_client_list_lock
);
3013 cpu_notify_map_clients_locked();
3014 qemu_mutex_unlock(&map_client_list_lock
);
3017 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3018 bool is_write
, MemTxAttrs attrs
)
3025 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3026 if (!memory_access_is_direct(mr
, is_write
)) {
3027 l
= memory_access_size(mr
, l
, addr
);
3028 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3039 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3040 hwaddr len
, bool is_write
,
3045 RCU_READ_LOCK_GUARD();
3046 fv
= address_space_to_flatview(as
);
3047 return flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3051 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3053 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3054 bool is_write
, MemTxAttrs attrs
)
3058 MemoryRegion
*this_mr
;
3064 if (target_len
== 0) {
3069 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3070 &len
, is_write
, attrs
);
3071 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3077 /* Map a physical memory region into a host virtual address.
3078 * May map a subset of the requested range, given by and returned in *plen.
3079 * May return NULL if resources needed to perform the mapping are exhausted.
3080 * Use only for reads OR writes - not for read-modify-write operations.
3081 * Use cpu_register_map_client() to know when retrying the map operation is
3082 * likely to succeed.
3084 void *address_space_map(AddressSpace
*as
,
3100 RCU_READ_LOCK_GUARD();
3101 fv
= address_space_to_flatview(as
);
3102 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3104 if (!memory_access_is_direct(mr
, is_write
)) {
3105 if (qatomic_xchg(&bounce
.in_use
, true)) {
3109 /* Avoid unbounded allocations */
3110 l
= MIN(l
, TARGET_PAGE_SIZE
);
3111 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3115 memory_region_ref(mr
);
3118 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3123 return bounce
.buffer
;
3127 memory_region_ref(mr
);
3128 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3129 l
, is_write
, attrs
);
3130 fuzz_dma_read_cb(addr
, *plen
, mr
);
3131 return qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3134 /* Unmaps a memory region previously mapped by address_space_map().
3135 * Will also mark the memory as dirty if is_write is true. access_len gives
3136 * the amount of memory that was actually read or written by the caller.
3138 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3139 bool is_write
, hwaddr access_len
)
3141 if (buffer
!= bounce
.buffer
) {
3145 mr
= memory_region_from_host(buffer
, &addr1
);
3148 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3150 if (xen_enabled()) {
3151 xen_invalidate_map_cache_entry(buffer
);
3153 memory_region_unref(mr
);
3157 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3158 bounce
.buffer
, access_len
);
3160 qemu_vfree(bounce
.buffer
);
3161 bounce
.buffer
= NULL
;
3162 memory_region_unref(bounce
.mr
);
3163 /* Clear in_use before reading map_client_list. */
3164 qatomic_set_mb(&bounce
.in_use
, false);
3165 cpu_notify_map_clients();
3168 void *cpu_physical_memory_map(hwaddr addr
,
3172 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3173 MEMTXATTRS_UNSPECIFIED
);
3176 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3177 bool is_write
, hwaddr access_len
)
3179 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3182 #define ARG1_DECL AddressSpace *as
3185 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3186 #define RCU_READ_LOCK(...) rcu_read_lock()
3187 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3188 #include "memory_ldst.c.inc"
3190 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3196 AddressSpaceDispatch
*d
;
3204 cache
->fv
= address_space_get_flatview(as
);
3205 d
= flatview_to_dispatch(cache
->fv
);
3206 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3209 * cache->xlat is now relative to cache->mrs.mr, not to the section itself.
3210 * Take that into account to compute how many bytes are there between
3211 * cache->xlat and the end of the section.
3213 diff
= int128_sub(cache
->mrs
.size
,
3214 int128_make64(cache
->xlat
- cache
->mrs
.offset_within_region
));
3215 l
= int128_get64(int128_min(diff
, int128_make64(l
)));
3218 memory_region_ref(mr
);
3219 if (memory_access_is_direct(mr
, is_write
)) {
3220 /* We don't care about the memory attributes here as we're only
3221 * doing this if we found actual RAM, which behaves the same
3222 * regardless of attributes; so UNSPECIFIED is fine.
3224 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3225 cache
->xlat
, l
, is_write
,
3226 MEMTXATTRS_UNSPECIFIED
);
3227 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3233 cache
->is_write
= is_write
;
3237 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3241 assert(cache
->is_write
);
3242 if (likely(cache
->ptr
)) {
3243 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3247 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3249 if (!cache
->mrs
.mr
) {
3253 if (xen_enabled()) {
3254 xen_invalidate_map_cache_entry(cache
->ptr
);
3256 memory_region_unref(cache
->mrs
.mr
);
3257 flatview_unref(cache
->fv
);
3258 cache
->mrs
.mr
= NULL
;
3262 /* Called from RCU critical section. This function has the same
3263 * semantics as address_space_translate, but it only works on a
3264 * predefined range of a MemoryRegion that was mapped with
3265 * address_space_cache_init.
3267 static inline MemoryRegion
*address_space_translate_cached(
3268 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3269 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3271 MemoryRegionSection section
;
3273 IOMMUMemoryRegion
*iommu_mr
;
3274 AddressSpace
*target_as
;
3276 assert(!cache
->ptr
);
3277 *xlat
= addr
+ cache
->xlat
;
3280 iommu_mr
= memory_region_get_iommu(mr
);
3286 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3287 NULL
, is_write
, true,
3292 /* Called from RCU critical section. address_space_read_cached uses this
3293 * out of line function when the target is an MMIO or IOMMU region.
3296 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3297 void *buf
, hwaddr len
)
3303 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3304 MEMTXATTRS_UNSPECIFIED
);
3305 return flatview_read_continue(cache
->fv
,
3306 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3310 /* Called from RCU critical section. address_space_write_cached uses this
3311 * out of line function when the target is an MMIO or IOMMU region.
3314 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3315 const void *buf
, hwaddr len
)
3321 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3322 MEMTXATTRS_UNSPECIFIED
);
3323 return flatview_write_continue(cache
->fv
,
3324 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3328 #define ARG1_DECL MemoryRegionCache *cache
3330 #define SUFFIX _cached_slow
3331 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3332 #define RCU_READ_LOCK() ((void)0)
3333 #define RCU_READ_UNLOCK() ((void)0)
3334 #include "memory_ldst.c.inc"
3336 /* virtual memory access for debug (includes writing to ROM) */
3337 int cpu_memory_rw_debug(CPUState
*cpu
, vaddr addr
,
3338 void *ptr
, size_t len
, bool is_write
)
3344 cpu_synchronize_state(cpu
);
3350 page
= addr
& TARGET_PAGE_MASK
;
3351 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3352 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3353 /* if no physical page mapped, return an error */
3354 if (phys_addr
== -1)
3356 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3359 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3361 res
= address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3364 res
= address_space_read(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3367 if (res
!= MEMTX_OK
) {
3378 * Allows code that needs to deal with migration bitmaps etc to still be built
3379 * target independent.
3381 size_t qemu_target_page_size(void)
3383 return TARGET_PAGE_SIZE
;
3386 int qemu_target_page_mask(void)
3388 return TARGET_PAGE_MASK
;
3391 int qemu_target_page_bits(void)
3393 return TARGET_PAGE_BITS
;
3396 int qemu_target_page_bits_min(void)
3398 return TARGET_PAGE_BITS_MIN
;
3401 /* Convert target pages to MiB (2**20). */
3402 size_t qemu_target_pages_to_MiB(size_t pages
)
3404 int page_bits
= TARGET_PAGE_BITS
;
3406 /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */
3407 g_assert(page_bits
< 20);
3409 return pages
>> (20 - page_bits
);
3412 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3417 RCU_READ_LOCK_GUARD();
3418 mr
= address_space_translate(&address_space_memory
,
3419 phys_addr
, &phys_addr
, &l
, false,
3420 MEMTXATTRS_UNSPECIFIED
);
3422 return !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3425 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3430 RCU_READ_LOCK_GUARD();
3431 RAMBLOCK_FOREACH(block
) {
3432 ret
= func(block
, opaque
);
3441 * Unmap pages of memory from start to start+length such that
3442 * they a) read as 0, b) Trigger whatever fault mechanism
3443 * the OS provides for postcopy.
3444 * The pages must be unmapped by the end of the function.
3445 * Returns: 0 on success, none-0 on failure
3448 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3452 uint8_t *host_startaddr
= rb
->host
+ start
;
3454 if (!QEMU_PTR_IS_ALIGNED(host_startaddr
, rb
->page_size
)) {
3455 error_report("ram_block_discard_range: Unaligned start address: %p",
3460 if ((start
+ length
) <= rb
->max_length
) {
3461 bool need_madvise
, need_fallocate
;
3462 if (!QEMU_IS_ALIGNED(length
, rb
->page_size
)) {
3463 error_report("ram_block_discard_range: Unaligned length: %zx",
3468 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3470 /* The logic here is messy;
3471 * madvise DONTNEED fails for hugepages
3472 * fallocate works on hugepages and shmem
3473 * shared anonymous memory requires madvise REMOVE
3475 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3476 need_fallocate
= rb
->fd
!= -1;
3477 if (need_fallocate
) {
3478 /* For a file, this causes the area of the file to be zero'd
3479 * if read, and for hugetlbfs also causes it to be unmapped
3480 * so a userfault will trigger.
3482 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3484 * We'll discard data from the actual file, even though we only
3485 * have a MAP_PRIVATE mapping, possibly messing with other
3486 * MAP_PRIVATE/MAP_SHARED mappings. There is no easy way to
3487 * change that behavior whithout violating the promised
3488 * semantics of ram_block_discard_range().
3490 * Only warn, because it works as long as nobody else uses that
3493 if (!qemu_ram_is_shared(rb
)) {
3494 warn_report_once("ram_block_discard_range: Discarding RAM"
3495 " in private file mappings is possibly"
3496 " dangerous, because it will modify the"
3497 " underlying file and will affect other"
3498 " users of the file");
3501 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3505 error_report("ram_block_discard_range: Failed to fallocate "
3506 "%s:%" PRIx64
" +%zx (%d)",
3507 rb
->idstr
, start
, length
, ret
);
3512 error_report("ram_block_discard_range: fallocate not available/file"
3513 "%s:%" PRIx64
" +%zx (%d)",
3514 rb
->idstr
, start
, length
, ret
);
3519 /* For normal RAM this causes it to be unmapped,
3520 * for shared memory it causes the local mapping to disappear
3521 * and to fall back on the file contents (which we just
3522 * fallocate'd away).
3524 #if defined(CONFIG_MADVISE)
3525 if (qemu_ram_is_shared(rb
) && rb
->fd
< 0) {
3526 ret
= madvise(host_startaddr
, length
, QEMU_MADV_REMOVE
);
3528 ret
= madvise(host_startaddr
, length
, QEMU_MADV_DONTNEED
);
3532 error_report("ram_block_discard_range: Failed to discard range "
3533 "%s:%" PRIx64
" +%zx (%d)",
3534 rb
->idstr
, start
, length
, ret
);
3539 error_report("ram_block_discard_range: MADVISE not available"
3540 "%s:%" PRIx64
" +%zx (%d)",
3541 rb
->idstr
, start
, length
, ret
);
3545 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3546 need_madvise
, need_fallocate
, ret
);
3548 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3549 "/%zx/" RAM_ADDR_FMT
")",
3550 rb
->idstr
, start
, length
, rb
->max_length
);
3557 bool ramblock_is_pmem(RAMBlock
*rb
)
3559 return rb
->flags
& RAM_PMEM
;
3562 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3564 if (start
== end
- 1) {
3565 qemu_printf("\t%3d ", start
);
3567 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
3569 qemu_printf(" skip=%d ", skip
);
3570 if (ptr
== PHYS_MAP_NODE_NIL
) {
3571 qemu_printf(" ptr=NIL");
3573 qemu_printf(" ptr=#%d", ptr
);
3575 qemu_printf(" ptr=[%d]", ptr
);
3580 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3581 int128_sub((size), int128_one())) : 0)
3583 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3587 qemu_printf(" Dispatch\n");
3588 qemu_printf(" Physical sections\n");
3590 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3591 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3592 const char *names
[] = { " [unassigned]", " [not dirty]",
3593 " [ROM]", " [watch]" };
3595 qemu_printf(" #%d @" HWADDR_FMT_plx
".." HWADDR_FMT_plx
3598 s
->offset_within_address_space
,
3599 s
->offset_within_address_space
+ MR_SIZE(s
->size
),
3600 s
->mr
->name
? s
->mr
->name
: "(noname)",
3601 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3602 s
->mr
== root
? " [ROOT]" : "",
3603 s
== d
->mru_section
? " [MRU]" : "",
3604 s
->mr
->is_iommu
? " [iommu]" : "");
3607 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
3608 s
->mr
->alias
->name
: "noname");
3613 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3614 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3615 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3618 Node
*n
= d
->map
.nodes
+ i
;
3620 qemu_printf(" [%d]\n", i
);
3622 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3623 PhysPageEntry
*pe
= *n
+ j
;
3625 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3629 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3635 if (jprev
!= ARRAY_SIZE(*n
)) {
3636 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
3641 /* Require any discards to work. */
3642 static unsigned int ram_block_discard_required_cnt
;
3643 /* Require only coordinated discards to work. */
3644 static unsigned int ram_block_coordinated_discard_required_cnt
;
3645 /* Disable any discards. */
3646 static unsigned int ram_block_discard_disabled_cnt
;
3647 /* Disable only uncoordinated discards. */
3648 static unsigned int ram_block_uncoordinated_discard_disabled_cnt
;
3649 static QemuMutex ram_block_discard_disable_mutex
;
3651 static void ram_block_discard_disable_mutex_lock(void)
3653 static gsize initialized
;
3655 if (g_once_init_enter(&initialized
)) {
3656 qemu_mutex_init(&ram_block_discard_disable_mutex
);
3657 g_once_init_leave(&initialized
, 1);
3659 qemu_mutex_lock(&ram_block_discard_disable_mutex
);
3662 static void ram_block_discard_disable_mutex_unlock(void)
3664 qemu_mutex_unlock(&ram_block_discard_disable_mutex
);
3667 int ram_block_discard_disable(bool state
)
3671 ram_block_discard_disable_mutex_lock();
3673 ram_block_discard_disabled_cnt
--;
3674 } else if (ram_block_discard_required_cnt
||
3675 ram_block_coordinated_discard_required_cnt
) {
3678 ram_block_discard_disabled_cnt
++;
3680 ram_block_discard_disable_mutex_unlock();
3684 int ram_block_uncoordinated_discard_disable(bool state
)
3688 ram_block_discard_disable_mutex_lock();
3690 ram_block_uncoordinated_discard_disabled_cnt
--;
3691 } else if (ram_block_discard_required_cnt
) {
3694 ram_block_uncoordinated_discard_disabled_cnt
++;
3696 ram_block_discard_disable_mutex_unlock();
3700 int ram_block_discard_require(bool state
)
3704 ram_block_discard_disable_mutex_lock();
3706 ram_block_discard_required_cnt
--;
3707 } else if (ram_block_discard_disabled_cnt
||
3708 ram_block_uncoordinated_discard_disabled_cnt
) {
3711 ram_block_discard_required_cnt
++;
3713 ram_block_discard_disable_mutex_unlock();
3717 int ram_block_coordinated_discard_require(bool state
)
3721 ram_block_discard_disable_mutex_lock();
3723 ram_block_coordinated_discard_required_cnt
--;
3724 } else if (ram_block_discard_disabled_cnt
) {
3727 ram_block_coordinated_discard_required_cnt
++;
3729 ram_block_discard_disable_mutex_unlock();
3733 bool ram_block_discard_is_disabled(void)
3735 return qatomic_read(&ram_block_discard_disabled_cnt
) ||
3736 qatomic_read(&ram_block_uncoordinated_discard_disabled_cnt
);
3739 bool ram_block_discard_is_required(void)
3741 return qatomic_read(&ram_block_discard_required_cnt
) ||
3742 qatomic_read(&ram_block_coordinated_discard_required_cnt
);