2 # Power ISA decode for 32-bit insns (opcode space 0)
4 # Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
6 # This library is free software; you can redistribute it and/or
7 # modify it under the terms of the GNU Lesser General Public
8 # License as published by the Free Software Foundation; either
9 # version 2.1 of the License, or (at your option) any later version.
11 # This library is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 # Lesser General Public License for more details.
16 # You should have received a copy of the GNU Lesser General Public
17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 @D ...... rt:5 ra:5 si:s16 &D
23 &D_bf bf l:bool ra imm
24 @D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf
25 @D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf
27 %dq_si 4:s12 !function=times_16
28 %dq_rtp 22:4 !function=times_2
29 @DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si
31 %ds_si 2:s14 !function=times_4
32 @DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
34 %ds_rtp 22:4 !function=times_2
35 @DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si
39 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
42 @VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
45 @X ...... rt:5 ra:5 rb:5 .......... . &X
48 @X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
50 &X_bfl bf l:bool ra rb
51 @X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
53 ### Fixed-Point Load Instructions
55 LBZ 100010 ..... ..... ................ @D
56 LBZU 100011 ..... ..... ................ @D
57 LBZX 011111 ..... ..... ..... 0001010111 - @X
58 LBZUX 011111 ..... ..... ..... 0001110111 - @X
60 LHZ 101000 ..... ..... ................ @D
61 LHZU 101001 ..... ..... ................ @D
62 LHZX 011111 ..... ..... ..... 0100010111 - @X
63 LHZUX 011111 ..... ..... ..... 0100110111 - @X
65 LHA 101010 ..... ..... ................ @D
66 LHAU 101011 ..... ..... ................ @D
67 LHAX 011111 ..... ..... ..... 0101010111 - @X
68 LHAXU 011111 ..... ..... ..... 0101110111 - @X
70 LWZ 100000 ..... ..... ................ @D
71 LWZU 100001 ..... ..... ................ @D
72 LWZX 011111 ..... ..... ..... 0000010111 - @X
73 LWZUX 011111 ..... ..... ..... 0000110111 - @X
75 LWA 111010 ..... ..... ..............10 @DS
76 LWAX 011111 ..... ..... ..... 0101010101 - @X
77 LWAUX 011111 ..... ..... ..... 0101110101 - @X
79 LD 111010 ..... ..... ..............00 @DS
80 LDU 111010 ..... ..... ..............01 @DS
81 LDX 011111 ..... ..... ..... 0000010101 - @X
82 LDUX 011111 ..... ..... ..... 0000110101 - @X
84 LQ 111000 ..... ..... ............ ---- @DQ_rtp
86 ### Fixed-Point Store Instructions
88 STB 100110 ..... ..... ................ @D
89 STBU 100111 ..... ..... ................ @D
90 STBX 011111 ..... ..... ..... 0011010111 - @X
91 STBUX 011111 ..... ..... ..... 0011110111 - @X
93 STH 101100 ..... ..... ................ @D
94 STHU 101101 ..... ..... ................ @D
95 STHX 011111 ..... ..... ..... 0110010111 - @X
96 STHUX 011111 ..... ..... ..... 0110110111 - @X
98 STW 100100 ..... ..... ................ @D
99 STWU 100101 ..... ..... ................ @D
100 STWX 011111 ..... ..... ..... 0010010111 - @X
101 STWUX 011111 ..... ..... ..... 0010110111 - @X
103 STD 111110 ..... ..... ..............00 @DS
104 STDU 111110 ..... ..... ..............01 @DS
105 STDX 011111 ..... ..... ..... 0010010101 - @X
106 STDUX 011111 ..... ..... ..... 0010110101 - @X
108 STQ 111110 ..... ..... ..............10 @DS_rtp
110 ### Fixed-Point Compare Instructions
112 CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl
113 CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl
114 CMPI 001011 ... - . ..... ................ @D_bfs
115 CMPLI 001010 ... - . ..... ................ @D_bfu
117 ### Fixed-Point Arithmetic Instructions
119 ADDI 001110 ..... ..... ................ @D
120 ADDIS 001111 ..... ..... ................ @D
122 ADDPCIS 010011 ..... ..... .......... 00010 . @DX
124 ## Fixed-Point Logical Instructions
126 CFUGED 011111 ..... ..... ..... 0011011100 - @X
127 CNTLZDM 011111 ..... ..... ..... 0000111011 - @X
128 CNTTZDM 011111 ..... ..... ..... 1000111011 - @X
129 PDEPD 011111 ..... ..... ..... 0010011100 - @X
130 PEXTD 011111 ..... ..... ..... 0010111100 - @X
132 ### Float-Point Load Instructions
134 LFS 110000 ..... ..... ................ @D
135 LFSU 110001 ..... ..... ................ @D
136 LFSX 011111 ..... ..... ..... 1000010111 - @X
137 LFSUX 011111 ..... ..... ..... 1000110111 - @X
139 LFD 110010 ..... ..... ................ @D
140 LFDU 110011 ..... ..... ................ @D
141 LFDX 011111 ..... ..... ..... 1001010111 - @X
142 LFDUX 011111 ..... ..... ..... 1001110111 - @X
144 ### Float-Point Store Instructions
146 STFS 110100 ..... ...... ............... @D
147 STFSU 110101 ..... ...... ............... @D
148 STFSX 011111 ..... ...... .... 1010010111 - @X
149 STFSUX 011111 ..... ...... .... 1010110111 - @X
151 STFD 110110 ..... ...... ............... @D
152 STFDU 110111 ..... ...... ............... @D
153 STFDX 011111 ..... ...... .... 1011010111 - @X
154 STFDUX 011111 ..... ...... .... 1011110111 - @X
156 ### Move To/From System Register Instructions
158 SETBC 011111 ..... ..... ----- 0110000000 - @X_bi
159 SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
160 SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
161 SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
163 ## Vector Bit Manipulation Instruction
165 VCFUGED 000100 ..... ..... ..... 10101001101 @VX