accel/tcg/tb-jmp-cache.h

   1 /*
   2  * The per-CPU TranslationBlock jump cache.
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * SPDX-License-Identifier: GPL-2.0-or-later
   7  */
   8
   9 #ifndef ACCEL_TCG_TB_JMP_CACHE_H
  10 #define ACCEL_TCG_TB_JMP_CACHE_H
  11
  12 #define TB_JMP_CACHE_BITS 12
  13 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
  14
  15 /*
  16  * Accessed in parallel; all accesses to 'tb' must be atomic.
  17  * For CF_PCREL, accesses to 'pc' must be protected by a
  18  * load_acquire/store_release to 'tb'.
  19  */
  20 struct CPUJumpCache {
  21     struct rcu_head rcu;
  22     struct {
  23         TranslationBlock *tb;
  24         target_ulong pc;
  25     } array[TB_JMP_CACHE_SIZE];
  26 };
  27
  28 #endif /* ACCEL_TCG_TB_JMP_CACHE_H */