lasips2: move mapping of LASIPS2 registers to HPPA machine
[qemu/armbru.git] / hw / core / cpu-sysemu.c
blob00253f89293a58c47d8a861ed9baf2eb779b1d03
1 /*
2 * QEMU CPU model (system emulation specific)
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "hw/core/sysemu-cpu-ops.h"
26 bool cpu_paging_enabled(const CPUState *cpu)
28 CPUClass *cc = CPU_GET_CLASS(cpu);
30 if (cc->sysemu_ops->get_paging_enabled) {
31 return cc->sysemu_ops->get_paging_enabled(cpu);
34 return false;
37 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
38 Error **errp)
40 CPUClass *cc = CPU_GET_CLASS(cpu);
42 if (cc->sysemu_ops->get_memory_mapping) {
43 cc->sysemu_ops->get_memory_mapping(cpu, list, errp);
44 return;
47 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
50 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
51 MemTxAttrs *attrs)
53 CPUClass *cc = CPU_GET_CLASS(cpu);
55 if (cc->sysemu_ops->get_phys_page_attrs_debug) {
56 return cc->sysemu_ops->get_phys_page_attrs_debug(cpu, addr, attrs);
58 /* Fallback for CPUs which don't implement the _attrs_ hook */
59 *attrs = MEMTXATTRS_UNSPECIFIED;
60 return cc->sysemu_ops->get_phys_page_debug(cpu, addr);
63 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
65 MemTxAttrs attrs = {};
67 return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
70 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
72 CPUClass *cc = CPU_GET_CLASS(cpu);
73 int ret = 0;
75 if (cc->sysemu_ops->asidx_from_attrs) {
76 ret = cc->sysemu_ops->asidx_from_attrs(cpu, attrs);
77 assert(ret < cpu->num_ases && ret >= 0);
79 return ret;
82 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
83 void *opaque)
85 CPUClass *cc = CPU_GET_CLASS(cpu);
87 if (!cc->sysemu_ops->write_elf32_qemunote) {
88 return 0;
90 return (*cc->sysemu_ops->write_elf32_qemunote)(f, cpu, opaque);
93 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
94 int cpuid, void *opaque)
96 CPUClass *cc = CPU_GET_CLASS(cpu);
98 if (!cc->sysemu_ops->write_elf32_note) {
99 return -1;
101 return (*cc->sysemu_ops->write_elf32_note)(f, cpu, cpuid, opaque);
104 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
105 void *opaque)
107 CPUClass *cc = CPU_GET_CLASS(cpu);
109 if (!cc->sysemu_ops->write_elf64_qemunote) {
110 return 0;
112 return (*cc->sysemu_ops->write_elf64_qemunote)(f, cpu, opaque);
115 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
116 int cpuid, void *opaque)
118 CPUClass *cc = CPU_GET_CLASS(cpu);
120 if (!cc->sysemu_ops->write_elf64_note) {
121 return -1;
123 return (*cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque);
126 bool cpu_virtio_is_big_endian(CPUState *cpu)
128 CPUClass *cc = CPU_GET_CLASS(cpu);
130 if (cc->sysemu_ops->virtio_is_big_endian) {
131 return cc->sysemu_ops->virtio_is_big_endian(cpu);
133 return target_words_bigendian();
136 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
138 CPUClass *cc = CPU_GET_CLASS(cpu);
139 GuestPanicInformation *res = NULL;
141 if (cc->sysemu_ops->get_crash_info) {
142 res = cc->sysemu_ops->get_crash_info(cpu);
144 return res;