2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
12 * + sysbus MMIO region 0: MemoryRegion defining the PL050 registers
13 * + Named GPIO input "ps2-input-irq": set to 1 if the downstream PS2 device
14 * has asserted its irq
15 * + sysbus IRQ 0: PL050 output irq
18 #include "qemu/osdep.h"
19 #include "hw/sysbus.h"
20 #include "migration/vmstate.h"
21 #include "hw/input/ps2.h"
22 #include "hw/input/pl050.h"
25 #include "qemu/module.h"
26 #include "qom/object.h"
29 static const VMStateDescription vmstate_pl050
= {
32 .minimum_version_id
= 2,
33 .fields
= (VMStateField
[]) {
34 VMSTATE_UINT32(cr
, PL050State
),
35 VMSTATE_UINT32(clk
, PL050State
),
36 VMSTATE_UINT32(last
, PL050State
),
37 VMSTATE_INT32(pending
, PL050State
),
42 #define PL050_TXEMPTY (1 << 6)
43 #define PL050_TXBUSY (1 << 5)
44 #define PL050_RXFULL (1 << 4)
45 #define PL050_RXBUSY (1 << 3)
46 #define PL050_RXPARITY (1 << 2)
47 #define PL050_KMIC (1 << 1)
48 #define PL050_KMID (1 << 0)
50 static const unsigned char pl050_id
[] = {
51 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
54 static void pl050_update_irq(PL050State
*s
)
56 int level
= (s
->pending
&& (s
->cr
& 0x10) != 0)
57 || (s
->cr
& 0x08) != 0;
59 qemu_set_irq(s
->irq
, level
);
62 static void pl050_set_irq(void *opaque
, int n
, int level
)
64 PL050State
*s
= (PL050State
*)opaque
;
70 static uint64_t pl050_read(void *opaque
, hwaddr offset
,
73 PL050State
*s
= (PL050State
*)opaque
;
75 if (offset
>= 0xfe0 && offset
< 0x1000) {
76 return pl050_id
[(offset
- 0xfe0) >> 2];
79 switch (offset
>> 2) {
88 val
= val
^ (val
>> 4);
89 val
= val
^ (val
>> 2);
90 val
= (val
^ (val
>> 1)) & 1;
94 stat
|= PL050_RXPARITY
;
102 case 2: /* KMIDATA */
104 s
->last
= ps2_read_data(s
->ps2dev
);
107 case 3: /* KMICLKDIV */
110 return s
->pending
| 2;
112 qemu_log_mask(LOG_GUEST_ERROR
,
113 "pl050_read: Bad offset %x\n", (int)offset
);
118 static void pl050_write(void *opaque
, hwaddr offset
,
119 uint64_t value
, unsigned size
)
121 PL050State
*s
= (PL050State
*)opaque
;
123 switch (offset
>> 2) {
127 /* ??? Need to implement the enable/disable bit. */
129 case 2: /* KMIDATA */
130 /* ??? This should toggle the TX interrupt line. */
131 /* ??? This means kbd/mouse can block each other. */
133 ps2_write_mouse(PS2_MOUSE_DEVICE(s
->ps2dev
), value
);
135 ps2_write_keyboard(PS2_KBD_DEVICE(s
->ps2dev
), value
);
138 case 3: /* KMICLKDIV */
142 qemu_log_mask(LOG_GUEST_ERROR
,
143 "pl050_write: Bad offset %x\n", (int)offset
);
146 static const MemoryRegionOps pl050_ops
= {
148 .write
= pl050_write
,
149 .endianness
= DEVICE_NATIVE_ENDIAN
,
152 static void pl050_realize(DeviceState
*dev
, Error
**errp
)
154 PL050State
*s
= PL050(dev
);
156 qdev_connect_gpio_out(DEVICE(s
->ps2dev
), PS2_DEVICE_IRQ
,
157 qdev_get_gpio_in_named(dev
, "ps2-input-irq", 0));
160 static void pl050_kbd_realize(DeviceState
*dev
, Error
**errp
)
162 PL050DeviceClass
*pdc
= PL050_GET_CLASS(dev
);
163 PL050State
*ps
= PL050(dev
);
165 ps
->ps2dev
= ps2_kbd_init();
166 pdc
->parent_realize(dev
, errp
);
169 static void pl050_kbd_init(Object
*obj
)
171 PL050State
*s
= PL050(obj
);
176 static void pl050_mouse_realize(DeviceState
*dev
, Error
**errp
)
178 PL050DeviceClass
*pdc
= PL050_GET_CLASS(dev
);
179 PL050State
*ps
= PL050(dev
);
181 ps
->ps2dev
= ps2_mouse_init();
182 pdc
->parent_realize(dev
, errp
);
185 static void pl050_mouse_init(Object
*obj
)
187 PL050State
*s
= PL050(obj
);
192 static void pl050_kbd_class_init(ObjectClass
*oc
, void *data
)
194 DeviceClass
*dc
= DEVICE_CLASS(oc
);
195 PL050DeviceClass
*pdc
= PL050_CLASS(oc
);
197 device_class_set_parent_realize(dc
, pl050_kbd_realize
,
198 &pdc
->parent_realize
);
201 static const TypeInfo pl050_kbd_info
= {
202 .name
= TYPE_PL050_KBD_DEVICE
,
203 .parent
= TYPE_PL050
,
204 .instance_init
= pl050_kbd_init
,
205 .instance_size
= sizeof(PL050KbdState
),
206 .class_init
= pl050_kbd_class_init
,
209 static void pl050_mouse_class_init(ObjectClass
*oc
, void *data
)
211 DeviceClass
*dc
= DEVICE_CLASS(oc
);
212 PL050DeviceClass
*pdc
= PL050_CLASS(oc
);
214 device_class_set_parent_realize(dc
, pl050_mouse_realize
,
215 &pdc
->parent_realize
);
218 static const TypeInfo pl050_mouse_info
= {
219 .name
= TYPE_PL050_MOUSE_DEVICE
,
220 .parent
= TYPE_PL050
,
221 .instance_init
= pl050_mouse_init
,
222 .instance_size
= sizeof(PL050MouseState
),
223 .class_init
= pl050_mouse_class_init
,
226 static void pl050_init(Object
*obj
)
228 PL050State
*s
= PL050(obj
);
229 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
231 memory_region_init_io(&s
->iomem
, obj
, &pl050_ops
, s
, "pl050", 0x1000);
232 sysbus_init_mmio(sbd
, &s
->iomem
);
233 sysbus_init_irq(sbd
, &s
->irq
);
235 qdev_init_gpio_in_named(DEVICE(obj
), pl050_set_irq
, "ps2-input-irq", 1);
238 static void pl050_class_init(ObjectClass
*oc
, void *data
)
240 DeviceClass
*dc
= DEVICE_CLASS(oc
);
242 dc
->realize
= pl050_realize
;
243 dc
->vmsd
= &vmstate_pl050
;
246 static const TypeInfo pl050_type_info
= {
248 .parent
= TYPE_SYS_BUS_DEVICE
,
249 .instance_init
= pl050_init
,
250 .instance_size
= sizeof(PL050State
),
251 .class_init
= pl050_class_init
,
252 .class_size
= sizeof(PL050DeviceClass
),
254 .class_init
= pl050_class_init
,
257 static void pl050_register_types(void)
259 type_register_static(&pl050_type_info
);
260 type_register_static(&pl050_kbd_info
);
261 type_register_static(&pl050_mouse_info
);
264 type_init(pl050_register_types
)