target/riscv/insn_trans/trans_rvm.inc.c

   1 /*
   2  * RISC-V translation routines for the RV64M Standard Extension.
   3  *
   4  * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
   5  * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
   6  *                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms and conditions of the GNU General Public License,
  10  * version 2 or later, as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21
  22 static bool trans_mul(DisasContext *ctx, arg_mul *a)
  23 {
  24     REQUIRE_EXT(ctx, RVM);
  25     return gen_arith(ctx, a, &tcg_gen_mul_tl);
  26 }
  27
  28 static bool trans_mulh(DisasContext *ctx, arg_mulh *a)
  29 {
  30     REQUIRE_EXT(ctx, RVM);
  31     TCGv source1 = tcg_temp_new();
  32     TCGv source2 = tcg_temp_new();
  33     gen_get_gpr(source1, a->rs1);
  34     gen_get_gpr(source2, a->rs2);
  35
  36     tcg_gen_muls2_tl(source2, source1, source1, source2);
  37
  38     gen_set_gpr(a->rd, source1);
  39     tcg_temp_free(source1);
  40     tcg_temp_free(source2);
  41     return true;
  42 }
  43
  44 static bool trans_mulhsu(DisasContext *ctx, arg_mulhsu *a)
  45 {
  46     REQUIRE_EXT(ctx, RVM);
  47     return gen_arith(ctx, a, &gen_mulhsu);
  48 }
  49
  50 static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a)
  51 {
  52     REQUIRE_EXT(ctx, RVM);
  53     TCGv source1 = tcg_temp_new();
  54     TCGv source2 = tcg_temp_new();
  55     gen_get_gpr(source1, a->rs1);
  56     gen_get_gpr(source2, a->rs2);
  57
  58     tcg_gen_mulu2_tl(source2, source1, source1, source2);
  59
  60     gen_set_gpr(a->rd, source1);
  61     tcg_temp_free(source1);
  62     tcg_temp_free(source2);
  63     return true;
  64 }
  65
  66 static bool trans_div(DisasContext *ctx, arg_div *a)
  67 {
  68     REQUIRE_EXT(ctx, RVM);
  69     return gen_arith(ctx, a, &gen_div);
  70 }
  71
  72 static bool trans_divu(DisasContext *ctx, arg_divu *a)
  73 {
  74     REQUIRE_EXT(ctx, RVM);
  75     return gen_arith(ctx, a, &gen_divu);
  76 }
  77
  78 static bool trans_rem(DisasContext *ctx, arg_rem *a)
  79 {
  80     REQUIRE_EXT(ctx, RVM);
  81     return gen_arith(ctx, a, &gen_rem);
  82 }
  83
  84 static bool trans_remu(DisasContext *ctx, arg_remu *a)
  85 {
  86     REQUIRE_EXT(ctx, RVM);
  87     return gen_arith(ctx, a, &gen_remu);
  88 }
  89
  90 #ifdef TARGET_RISCV64
  91 static bool trans_mulw(DisasContext *ctx, arg_mulw *a)
  92 {
  93     REQUIRE_EXT(ctx, RVM);
  94     return gen_arith(ctx, a, &gen_mulw);
  95 }
  96
  97 static bool trans_divw(DisasContext *ctx, arg_divw *a)
  98 {
  99     REQUIRE_EXT(ctx, RVM);
 100     return gen_arith_div_w(ctx, a, &gen_div);
 101 }
 102
 103 static bool trans_divuw(DisasContext *ctx, arg_divuw *a)
 104 {
 105     REQUIRE_EXT(ctx, RVM);
 106     return gen_arith_div_uw(ctx, a, &gen_divu);
 107 }
 108
 109 static bool trans_remw(DisasContext *ctx, arg_remw *a)
 110 {
 111     REQUIRE_EXT(ctx, RVM);
 112     return gen_arith_div_w(ctx, a, &gen_rem);
 113 }
 114
 115 static bool trans_remuw(DisasContext *ctx, arg_remuw *a)
 116 {
 117     REQUIRE_EXT(ctx, RVM);
 118     return gen_arith_div_uw(ctx, a, &gen_remu);
 119 }
 120 #endif